Journal articles on the topic 'Nm and 32 nm'
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Wisely, D. R. "32 channel WDM multiplexer with 1 nm channel spacing and 0.7 nm bandwidth." Electronics Letters 27, no. 6 (1991): 520. http://dx.doi.org/10.1049/el:19910326.
Full textJaatinen, E., and N. Brown. "A simple external iodine stabilizer applied to 633 nm, 612 nm and 543 nm He-Ne lasers." Metrologia 32, no. 2 (January 1, 1995): 95–101. http://dx.doi.org/10.1088/0026-1394/32/2/004.
Full textFernandes, Leonardo Agostini, and Luiz Henrique Lucas Barbosa. "breve análise exegética de Nm 10,29-32." Revista de Cultura Teológica, no. 102 (October 1, 2022): 287–306. http://dx.doi.org/10.23925/rct.i102.58815.
Full textAsenov, Asen. "Variability Headaches in Sub-32 nm CMOS." ECS Transactions 25, no. 7 (December 17, 2019): 131–36. http://dx.doi.org/10.1149/1.3203949.
Full textKurd, Nasser A., Subramani Bhamidipati, Chris Mozak, Jeffrey L. Miller, Praveen Mosalikanti, Timothy M. Wilson, Ali M. El-Husseini, et al. "A Family of 32 nm IA Processors." IEEE Journal of Solid-State Circuits 46, no. 1 (January 2011): 119–30. http://dx.doi.org/10.1109/jssc.2010.2079430.
Full textSomra, Neha, and Ravinder Singh Sawhney. "32 nm Gate Length FinFET: Impact of Doping." International Journal of Computer Applications 122, no. 6 (July 18, 2015): 11–14. http://dx.doi.org/10.5120/21703-4816.
Full textBohnenstiehl, Brent, Aaron Stillmaker, Jon J. Pimentel, Timothy Andreas, Bin Liu, Anh T. Tran, Emmanuel Adeagbo, and Bevan M. Baas. "KiloCore: A 32-nm 1000-Processor Computational Array." IEEE Journal of Solid-State Circuits 52, no. 4 (April 2017): 891–902. http://dx.doi.org/10.1109/jssc.2016.2638459.
Full textMaharrey, J. A., R. C. Quinn, T. D. Loveless, J. S. Kauppila, S. Jagannathan, N. M. Atkinson, N. J. Gaspard, et al. "Effect of Device Variants in 32 nm and 45 nm SOI on SET Pulse Distributions." IEEE Transactions on Nuclear Science 60, no. 6 (December 2013): 4399–404. http://dx.doi.org/10.1109/tns.2013.2288572.
Full textGao, Ping, Na Yao, Changtao Wang, Zeyu Zhao, Yunfei Luo, Yanqin Wang, Guohan Gao, Kaipeng Liu, Chengwei Zhao, and Xiangang Luo. "Enhancing aspect profile of half-pitch 32 nm and 22 nm lithography with plasmonic cavity lens." Applied Physics Letters 106, no. 9 (March 2, 2015): 093110. http://dx.doi.org/10.1063/1.4914000.
Full textDeren P.J., Watras A., and Stefanska D. "32-21." Optics and Spectroscopy 132, no. 1 (2022): 123. http://dx.doi.org/10.21883/eos.2022.01.52997.32-21.
Full textWilk, Seth J., William Lepkowski, and Trevor J. Thornton. "32 dBm Power Amplifier on 45 nm SOI CMOS." IEEE Microwave and Wireless Components Letters 23, no. 3 (March 2013): 161–63. http://dx.doi.org/10.1109/lmwc.2013.2245413.
Full textJotwani, Ravi, Sriram Sundaram, Stephen Kosonocky, Alex Schaefer, Victor F. Andrade, Amy Novak, and Samuel Naffziger. "An x86-64 Core in 32 nm SOI CMOS." IEEE Journal of Solid-State Circuits 46, no. 1 (January 2011): 162–72. http://dx.doi.org/10.1109/jssc.2010.2080530.
Full textPark, Joon-Min, Ilsin An, and Hye-Keun Oh. "Resist Reflow Process for 32 nm Node Arbitrary Pattern." Japanese Journal of Applied Physics 48, no. 4 (April 20, 2009): 046501. http://dx.doi.org/10.1143/jjap.48.046501.
Full textSchenk, Mirjam, Stephan R. Krutzik, Peter A. Sieling, Delphine J. Lee, Rosane M. B. Teles, Maria Teresa Ochoa, Evangelia Komisopoulou, et al. "NOD2 triggers an interleukin-32–dependent human dendritic cell program in leprosy." Nature Medicine 18, no. 4 (March 25, 2012): 555–63. http://dx.doi.org/10.1038/nm.2650.
Full textYadav, Vinamrata, Nikhil Saxena, and Amit Rajput. "Process Variation and Optimization of Two Stage CMOS Operational Amplifier at 45 nm and 32 nm Technology." Journal of Computational and Theoretical Nanoscience 14, no. 8 (August 1, 2017): 3653–56. http://dx.doi.org/10.1166/jctn.2017.6999.
Full textNoh, Heeso, and Jai-Min Choi. "One-Way Zero Reflection in an Insulator-Metal-Insulator Structure Using the Transfer Matrix Method." Photonics 8, no. 1 (December 31, 2020): 8. http://dx.doi.org/10.3390/photonics8010008.
Full textRuhl, Gregory, Saurabh Dighe, Shailendra Jain, Surhud Khare, and Sriram R. Vangal. "IA-32 Processor with a Wide-Voltage-Operating Range in 32-nm CMOS." IEEE Micro 33, no. 2 (March 2013): 28–36. http://dx.doi.org/10.1109/mm.2013.8.
Full textOjeda-Rojas, Oscar A., Angela Maria M. Gonella-Diaza, Gustavo L. Sartorello, and Augusto H. Hauber Gameiro. "PSVIII-11 Agent-based simulation model to evaluate the economic performance of reproductive programs in beef cattle." Journal of Animal Science 99, Supplement_3 (October 8, 2021): 428–29. http://dx.doi.org/10.1093/jas/skab235.768.
Full textNguyen, H. V., and Youngmin Kim. "Low-Power Fully Digital Voltage Sensor using 32-nm FinFETs." IEIE Transactions on Smart Processing and Computing 5, no. 1 (February 29, 2016): 10–16. http://dx.doi.org/10.5573/ieiespc.2016.5.1.10.
Full textPepe, Domenico, and Domenico Zito. "32 dB Gain 28 nm Bulk CMOS W-Band LNA." IEEE Microwave and Wireless Components Letters 25, no. 1 (January 2015): 55–57. http://dx.doi.org/10.1109/lmwc.2014.2370251.
Full textJoyner Jr., William H., and David C. Yeh. "Guest Editors' Introduction: System IC Design Challenges beyond 32 nm." IEEE Design & Test of Computers 25, no. 4 (July 2008): 294–95. http://dx.doi.org/10.1109/mdt.2008.95.
Full textAllgair, John, Benjamin Bunday, Aaron Cordes, Pete Lipscomb, Milt Godwin, Victor Vartanian, Michael Bishop, Doron Arazi, and Kye-Weon Kim. "Metrology Requirements for the 32 nm Technology Node and Beyond." ECS Transactions 18, no. 1 (December 18, 2019): 151–60. http://dx.doi.org/10.1149/1.3096443.
Full textXu, Yao, Qiang Wu, Xuelong Shi, and Yiming Gu. "DOF and Coherence Optimization in Sub-32 nm Contact Lithography." ECS Transactions 44, no. 1 (December 15, 2019): 257–65. http://dx.doi.org/10.1149/1.3694325.
Full textFerriss, Mark, Alexander Rylyakov, Jose A. Tierno, Herschel Ainspan, and Daniel J. Friedman. "A 28 GHz Hybrid PLL in 32 nm SOI CMOS." IEEE Journal of Solid-State Circuits 49, no. 4 (April 2014): 1027–35. http://dx.doi.org/10.1109/jssc.2014.2299273.
Full textCai, Ming, Karthik Ramani, Michael Belyansky, Brian Greene, Doug H. Lee, Stephan Waidmann, Frank Tamweber, and William Henson. "Stress Liner Effects for 32-nm SOI MOSFETs With HKMG." IEEE Transactions on Electron Devices 57, no. 7 (July 2010): 1706–9. http://dx.doi.org/10.1109/ted.2010.2049076.
Full textSkotnicki, Thomas. "Materials and device structures for sub-32 nm CMOS nodes." Microelectronic Engineering 84, no. 9-10 (September 2007): 1845–52. http://dx.doi.org/10.1016/j.mee.2007.04.091.
Full textHou, Fu-Ju, Po-Jung Sung, Fu-Kuo Hsueh, Chien-Ting Wu, Yao-Jen Lee, Mao-Nang Chang, Yiming Li, and Tuo-Hung Hou. "32-nm Multigate Si-nTFET With Microwave-Annealed Abrupt Junction." IEEE Transactions on Electron Devices 63, no. 5 (May 2016): 1808–13. http://dx.doi.org/10.1109/ted.2015.2466236.
Full textThornton, Trevor J., William Lepkowski, and Seth J. Wilk. "Impact Ionization in SOI MESFETs at the 32-nm Node." IEEE Transactions on Electron Devices 63, no. 10 (October 2016): 4143–46. http://dx.doi.org/10.1109/ted.2016.2601241.
Full textYuan, X., T. Shimizu, U. Mahalingam, J. S. Brown, K. Habib, D. G. Tekleab, T. C. Su, et al. "Transistor mismatch in 32 nm high-k metal-gate process." Electronics Letters 46, no. 10 (2010): 708. http://dx.doi.org/10.1049/el.2010.0343.
Full textMarathe, Radhika, Bichoy Bahr, Wentao Wang, Zohaib Mahmood, Luca Daniel, and Dana Weinstein. "Resonant Body Transistors in IBM's 32 nm SOI CMOS Technology." Journal of Microelectromechanical Systems 23, no. 3 (June 2014): 636–50. http://dx.doi.org/10.1109/jmems.2013.2283720.
Full textPetrillo, Karen, Yayi Wei, R. Brainard, G. Denbeaux, Dario Goldfarb, C. S. Koay, J. Mackey, et al. "Are extreme ultraviolet resists ready for the 32 nm node?" Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures 25, no. 6 (2007): 2490. http://dx.doi.org/10.1116/1.2787815.
Full textGibbons, Francis P., Alex P. G. Robinson, Richard E. Palmer, Sara Diegoli, Mayandithevar Manickam, and Jon A. Preece. "Fullerene Resist Materials for the 32 nm Node and Beyond." Advanced Functional Materials 18, no. 13 (July 9, 2008): 1977–82. http://dx.doi.org/10.1002/adfm.200701155.
Full textKuenstner, J. Todd, and Karl H. Norris. "Spectrophotometry of Human Hemoglobin in the near Infrared Region from 1000 to 2500 nm." Journal of Near Infrared Spectroscopy 2, no. 2 (March 1994): 59–65. http://dx.doi.org/10.1255/jnirs.32.
Full textXu, Zhi-Chao, Duo Pan, Wei Zhuang, and Jing-Biao Chen. "Experimental Scheme of 633 nm and 1359 nm Good-Bad Cavity Dual-Wavelength Active Optical Frequency Standard." Chinese Physics Letters 32, no. 8 (August 2015): 083201. http://dx.doi.org/10.1088/0256-307x/32/8/083201.
Full textOjeda-Rojas, Oscar Alejandro, Angela M. Gonella-Diaza, Daniel Bustos Coral, Gustavo L. Sartorello, Thayla Reijers, Guilherme Pugliesi, Maria Mercadante, Cesar Gonçalves, and Augusto H. Gameiro. "PSXI-1 Agent-based simulation model to evaluate the technical performance of reproductive programs in beef cattle." Journal of Animal Science 98, Supplement_4 (November 3, 2020): 385. http://dx.doi.org/10.1093/jas/skaa278.677.
Full textEngland, Troy D., Rajan Arora, Zachary E. Fleetwood, Nelson E. Lourenco, Kurt A. Moen, Adilson S. Cardoso, Dale McMorrow, et al. "An Investigation of Single Event Transient Response in 45-nm and 32-nm SOI RF-CMOS Devices and Circuits." IEEE Transactions on Nuclear Science 60, no. 6 (December 2013): 4405–11. http://dx.doi.org/10.1109/tns.2013.2289368.
Full textJacke, T., R. Todt, R. Meyer, and M. C. Amann. "32 nm digitally tunable laser diode with a 0.58 nm wavelength grid using a vertically integrated Mach-Zehnder interferometer." Applied Physics Letters 87, no. 20 (November 14, 2005): 201113. http://dx.doi.org/10.1063/1.2132531.
Full textGaertner, A. A., and L. P. Boivin. "Some problems in realizing an infrared spectral-irradiance scale from 1500 nm to 2400 nm at the NRC." Metrologia 32, no. 6 (December 1, 1995): 615–19. http://dx.doi.org/10.1088/0026-1394/32/6/43.
Full textVahidi-Ferdowsi, P., J. Mehrzad, A. M. Malvandi, and S. Hosseinkhani. "Bioluminescence-based detection of astrocytes apoptosis and ATP depletion induced by biologically relevant level aflatoxin B1." World Mycotoxin Journal 11, no. 4 (December 7, 2018): 589–98. http://dx.doi.org/10.3920/wmj2017.2275.
Full textDu Yuchan, 杜宇禅, 李海亮 Li Hailiang, 史丽娜 Shi Lina, 李春 Li Chun, and 谢常青 Xie Changqing. "Integrated Development of Extreme Ultraviolet Lithography Mask at 32 nm Node." Acta Optica Sinica 33, no. 10 (2013): 1034002. http://dx.doi.org/10.3788/aos201333.1034002.
Full textSaito, T., and H. Onuki. "Detector calibration in the wavelength region 10 nm to 100 nm based on a windowless rare gas ionization chamber." Metrologia 32, no. 6 (December 1, 1995): 525–29. http://dx.doi.org/10.1088/0026-1394/32/6/26.
Full textSomra, Neha, Kanika Mishra, and Ravinder Singh. "Optimizing Current Characteristics of 32 nm FinFET by Controlling Fin Width." Communications on Applied Electronics 2, no. 7 (August 25, 2015): 1–5. http://dx.doi.org/10.5120/cae2015651795.
Full textPark, Jin-Hyung, Hao Cui, Jong-Young Cho, Hee-Sub Hwang, Woong-Jun Hwang, Ungyu Paik, Hyun-Goo Kang, Noh-Jung Kwak, and Jea-Gun Park. "Multiselectivity Chemical Mechanical Polishing for NAND Flash Memories beyond 32 nm." Journal of The Electrochemical Society 157, no. 6 (2010): H607. http://dx.doi.org/10.1149/1.3368675.
Full textRonse, K., P. Jansen, R. Gronheid, E. Hendrickx, M. Maenhoudt, V. Wiaux, A. M. Goethals, R. Jonckheere, and G. Vandenberghe. "Lithography Options for the 32 nm Half Pitch Node and Beyond." IEEE Transactions on Circuits and Systems I: Regular Papers 56, no. 8 (August 2009): 1884–91. http://dx.doi.org/10.1109/tcsi.2009.2028417.
Full textKim, Jong-Sun, Wook Chang, Ilsin An, and Hye-Keun Oh. "32 nm Pattern Collapse Modeling with Radial Distance and Rinse Speed." Japanese Journal of Applied Physics 46, no. 8A (August 6, 2007): 5101–3. http://dx.doi.org/10.1143/jjap.46.5101.
Full textGupta, Shourya, Kirti Gupta, and Neeta Pandey. "A 32-nm Subthreshold 7T SRAM Bit Cell With Read Assist." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25, no. 12 (December 2017): 3473–83. http://dx.doi.org/10.1109/tvlsi.2017.2746683.
Full textPalumbo, F., M. Debray, N. Vega, C. Quinteros, A. Kalstein, and F. Guarin. "Evolution of the gate current in 32 nm MOSFETs under irradiation." Solid-State Electronics 119 (May 2016): 19–24. http://dx.doi.org/10.1016/j.sse.2016.02.004.
Full textRodbell, Kenneth P., David F. Heidel, Jonathan A. Pellish, Paul W. Marshall, Henry H. K. Tang, Conal E. Murray, Kenneth A. LaBel, et al. "32 and 45 nm Radiation-Hardened-by-Design (RHBD) SOI Latches." IEEE Transactions on Nuclear Science 58, no. 6 (December 2011): 2702–10. http://dx.doi.org/10.1109/tns.2011.2171715.
Full textWang, YangYuan, Xing Zhang, XiaoYan Liu, and Ru Huang. "Novel devices and process for 32 nm CMOS technology and beyond." Science in China Series F: Information Sciences 51, no. 6 (May 21, 2008): 743–55. http://dx.doi.org/10.1007/s11432-008-0071-8.
Full textJung, Minhee, Joon-Min Park, and Hye-Keun Oh. "32 nm Half Pitch Formation with High-Numerical-Aperture Single Exposure." Japanese Journal of Applied Physics 48, no. 10 (October 20, 2009): 106501. http://dx.doi.org/10.1143/jjap.48.106501.
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