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Journal articles on the topic 'Ni(GeSn)'

Author: Grafiati

Published: 25 May 2024

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1

Quintero, Andrea, Patrice Gergaud, Jean-Michel Hartmann, Vincent Delaye, Vincent Reboud, Eric Cassan, and Philippe Rodriguez. "Impact and behavior of Sn during the Ni/GeSn solid-state reaction." Journal of Applied Crystallography 53, no. 3 (April 14, 2020): 605–13. http://dx.doi.org/10.1107/s1600576720003064.

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Ni-based intermetallics are promising materials for forming efficient contacts in GeSn-based Si photonic devices. However, the role that Sn might have during the Ni/GeSn solid-state reaction (SSR) is not fully understood. A comprehensive analysis focused on Sn segregation during the Ni/GeSn SSR was carried out. In situ X-ray diffraction and cross-section transmission electron microscopy measurements coupled with energy-dispersive X-ray spectrometry and electron energy-loss spectroscopy atomic mappings were performed to follow the phase sequence, Sn distribution and segregation. The results showed that, during the SSR, Sn was incorporated into the intermetallic phases. Sn segregation happened first around the grain boundaries (GBs) and then towards the surface. Sn accumulation around GBs hampered atom diffusion, delaying the growth of the Ni(GeSn) phase. Higher thermal budgets will thus be mandatory for formation of contacts in high-Sn-content photonic devices, which could be detrimental for thermal stability.

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2

Abdi, S., S. Assali, M. R. M. Atalla, S. Koelling, J. M. Warrender, and O. Moutanabbir. "Recrystallization and interdiffusion processes in laser-annealed strain-relaxed metastable Ge_0.89Sn_0.11." Journal of Applied Physics 131, no. 10 (March 14, 2022): 105304. http://dx.doi.org/10.1063/5.0077331.

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The prospect of GeSn semiconductors for silicon-integrated infrared optoelectronics brings new challenges related to the metastability of this class of materials. As a matter of fact, maintaining a reduced thermal budget throughout all processing steps of GeSn devices is essential to avoid possible material degradation. This constraint is exacerbated by the need for higher Sn contents exceeding 8 at. % along with an enhanced strain relaxation to achieve efficient mid-infrared devices. Herein, as a low thermal budget solution for post-epitaxy processing, we elucidate the effects of laser thermal annealing (LTA) on strain-relaxed Ge0.89Sn0.11 layers and Ni-Ge0.89Sn0.11 contacts. Key diffusion and recrystallization processes are proposed and discussed in the light of systematic microstructural studies. LTA treatment at a fluence of 0.40 J/cm2 results in a 200–300 nm-thick layer where Sn atoms segregate toward the surface and in the formation of Sn-rich columnar structures in the LTA-affected region. These structures are reminiscent of those observed in the dislocation-assisted pipe-diffusion mechanism, while the buried GeSn layers remain intact. Moreover, by tailoring the LTA fluence, the contact resistance can be reduced without triggering phase separation across the whole GeSn multi-layer stacking. Indeed, a one order of magnitude decrease in the Ni-based specific contact resistance was obtained at the highest LTA fluence, thus confirming the potential of this method for the functionalization of direct bandgap GeSn materials.

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3

Coudurier, Nicolas, Andrea Quintero, Virginie Loup, Patrice Gergaud, Jean-Michel Hartmann, Denis Mariolle, Vincent Reboud, and Philippe Rodriguez. "Plasma surface treatment of GeSn layers and its subsequent impact on Ni / GeSn solid-state reaction." Microelectronic Engineering 257 (March 2022): 111737. http://dx.doi.org/10.1016/j.mee.2022.111737.

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4

Li, H., H. H. Cheng, L. C. Lee, C. P. Lee, L. H. Su, and Y. W. Suen. "Electrical characteristics of Ni Ohmic contact on n-type GeSn." Applied Physics Letters 104, no. 24 (June 16, 2014): 241904. http://dx.doi.org/10.1063/1.4883748.

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5

Quintero, Andrea, Patrice Gergaud, Jean-Michel Hartmann, Vincent Reboud, and Philippe Rodriguez. "Ni-based metallization of GeSn layers: A review and recent advances." Microelectronic Engineering 269 (January 2023): 111919. http://dx.doi.org/10.1016/j.mee.2022.111919.

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6

Jheng, Li Sian, Hui Li, Chiao Chang, Hung Hsiang Cheng, and Liang Chen Li. "Comparative investigation of Schottky barrier height of Ni/n-type Ge and Ni/n-type GeSn." AIP Advances 7, no. 9 (September 2017): 095324. http://dx.doi.org/10.1063/1.4997348.

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7

Junk, Yannik, Mingshan Liu, Marvin Frauenrath, Jean-Michel Hartmann, Detlev Gruetzmacher, Dan Buca, and Qing-Tai Zhao. "Vertical GeSn/Ge Heterostructure Gate-All-Around Nanowire p-MOSFETs." ECS Meeting Abstracts MA2022-01, no. 29 (July 7, 2022): 1285. http://dx.doi.org/10.1149/ma2022-01291285mtgabs.

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In recent years, Ge-based group-IV alloys (GeSn, SiGeSn) have received a significant amount of attention as candidates to replace Silicon for future low power and high performance nanoelectronics [1]. The interest in these materials stems primarily from the fact that, by varying the Sn-content of the alloy, it is possible to precisely tune its bandgap from indirect to direct [2], which even opens up the possibility to switch the carrier transport from larger mass low mobility L-valley electrons to the lower mass and high mobility Γ-valley electrons. Adding Si atoms into GeSn alloys enables additional strain engineering by decoupling the lattice constant from the band gap and enables the fabrication of devices to target specific applications. Ge exhibits superior hole mobility over Si and GeSn is predicted to further improve carrier mobilities for both electrons and holes, while still retaining Si CMOS compatibility [3]. In this Abstract, we present the fabrication and characterization of Ge- and GeSn-based vertical gate-all-around (GAA) nanowire (NW) p-MOSFETs. Multilayer stacks of Ge and GeSn were grown on a Ge virtual substrate (Ge-VS) using industrial CVD reactors and subsequently characterized, confirming the high quality of the alloys. On these GeSn/Ge heterostructures, vertical GAA nanowire FETs were fabricated using a top-down approach. First, nanowires were defined by electron-beam lithography and subsequently etched anisotropically using reactive ion etching (RIE). The diameter of the nanowires was reduced by digital etching, consisting of repeated combined GeOx layer formation by plasma oxidation and removal in diluted HF solution. This way nanowires with a diameter down to 20 nm and a height of 210 nm were fabricated. A two-step process was employed for gate dielectric formation to ensure a low interface trap density: (i), deposition of a thin layer of Al2O3, followed by an O2-plasma post-oxidation step; (ii) deposition of a HfO2 dielectric layer to reach the required EOT (equivalent oxide thickness). TiN deposited by sputtering forms the gate metal. Planarization and isotropic dry etching were performed to remove the TiN on the top of the nanowire. After a second planarization step, NiGe-contacts were formed on the exposed top nanowire by Ni-deposition followed by a forming-gas annealing step. Finally, metal contacts for gate and source/drain were added. The resulting Ge-NW-pMOSFETs exhibit high electrical performances. A low subthreshold slope (SS) of 66 mV/dec, a low drain-induced barrier lowering (DIBL) of 35 mV/V and an I on/I off-ratio of 2.1×106 were measured for nanowires with a diameter of 20 nm. For 65 nm NWs, the I on/I off-ratio improves, which is attributed to the decreased contact resistance on top of the NWs, leading to larger on-currents. The peak transconductance for the Ge NWs reached ~190 µS/µm (V DS=-0.5 V). Adopting a GeSn/Ge-heterostructure, with GeSn on top of the nanowire used as source the device performances are strongly enhanced. The on-current I on was increased by ~32%, mostly due to the reduced contact resistivity of the smaller bandgap of GeSn compared to Ge. It was also observed that adopting GeSn alloys leads to an increase in transconductance, G max, to a respectable value of ~870 µS/µm, almost 3 times larger as reported to date for Ge NWs. Moreover, both SS and DIBL are improved by decreasing the NW diameter as a consequence of improved electrostatic gate control over the channel. These results demonstrate that the incorporation of GeSn into Ge-MOSFET technology yields a significant advantage and confirm its high potential for low-power-high-performance nanoelectronics. Fig. 1: (a) Schematic of the GAA nanowire FET based on a GeSn/Ge-heterostructure. (b) Optical image on the metallic contacts (c) Transfer curve of a Ge nanowire pFET with a diameter of 20 nm. The SS is 68 mV/dec and the DIBL is 35 mV/V. (d) Transfer curves of Ge0.92Sn0.08/Ge nanowire pFETs with a diameter of 65 nm and different EOTs. Acknowledgments The authors acknowledge support from the German BMBF project “SiGeSn NanoFETs”. References: [1] M. Liu et al. ACS Appl. Nano Mater. 4, 94-101 (2021) [2] S. Wirths et al. Nature Photonics 9, 88-92 (2015) [3] J. Kouvetakis, J. Menendez, A. V. G. Chizmeshya: Annu. Rev. Mater. Res. 36:497-554 (2006) Figure 1

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8

Quintero, A., F. Mazen, P. Gergaud, N. Bernier, J. M. Hartmann, V. Reboud, E. Cassan, and Ph Rodriguez. "Enhanced thermal stability of Ni/GeSn system using pre-amorphization by implantation." Journal of Applied Physics 129, no. 11 (March 21, 2021): 115302. http://dx.doi.org/10.1063/5.0038253.

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9

Zhang, Xu, Dongliang Zhang, Jun Zheng, Zhi Liu, Chao He, Chunlai Xue, Guangze Zhang, Chuanbo Li, Buwen Cheng, and Qiming Wang. "Formation and characterization of Ni/Al Ohmic contact on n+-type GeSn." Solid-State Electronics 114 (December 2015): 178–81. http://dx.doi.org/10.1016/j.sse.2015.09.010.

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10

Quintero, Andrea, Patrice Gergaud, Joris Aubin, Jean-Michel Hartmann, Vincent Reboud, and Philippe Rodriguez. "Ni/GeSn solid-state reaction monitored by combined X-ray diffraction analyses: focus on the Ni-rich phase." Journal of Applied Crystallography 51, no. 4 (July 23, 2018): 1133–40. http://dx.doi.org/10.1107/s1600576718008786.

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The Ni/Ge0.9Sn0.1 solid-state reaction was monitored by combining in situ X-ray diffraction, in-plane reciprocal space map measurements and in-plane pole figures. A sequential growth was shown, in which the first phase formed was an Ni-rich phase. Then, at 518 K, the mono-stanogermanide phase Ni(Ge0.9Sn0.1) was observed. This phase was stable up to 873 K. Special attention has been given to the nature and the crystallographic orientation of the Ni-rich phase obtained at low temperature. It is demonstrated, with in-plane pole figure measurements and simulation, that it was the ∊-Ni5(Ge0.9Sn0.1)3 metastable phase with a hexagonal structure.

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11

Liu, Y., H. Wang, J. Yan, and G. Han. "Reduction of Formation Temperature of Nickel Mono-Stanogermanide [Ni(GeSn)] by the Incorporation of Tin." ECS Solid State Letters 3, no. 2 (December 3, 2013): P11—P13. http://dx.doi.org/10.1149/2.001402ssl.

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12

Quintero, Andrea, Patrice Gergaud, Jean-Michel Hartmann, Vincent Delaye, Nicolas Bernier, David Cooper, Zineb Saghi, Vincent Reboud, Eric Cassan, and Philippe Rodriguez. "Analysis of Sn Behavior During Ni/GeSn Solid-State Reaction by Correlated X-ray Diffraction, Atomic Force Microscopy, and Ex-situ/In-situ Transmission Electron Microscopy." ECS Transactions 98, no. 5 (September 23, 2020): 365–75. http://dx.doi.org/10.1149/09805.0365ecst.

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13

Quintero Colmenares, Andrea, Patrice Gergaud, Jean-Michel Hartmann, Vincent Delaye, Nicolas Bernier, David Cooper, Zineb Saghi, Vincent Reboud, Eric Cassan, and Philippe Rodriguez. "(G03 Best Paper Award Winner) Analysis of Sn Behavior During Ni/GeSn Solid-State Reaction by Correlated X-ray Diffraction, Atomic Force Microscopy, and Ex-situ/In-situ Transmission Electron Microscopy." ECS Meeting Abstracts MA2020-02, no. 24 (November 23, 2020): 1750. http://dx.doi.org/10.1149/ma2020-02241750mtgabs.

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14

Noroozi, M., M. Moeen, A. Abedin, M. S. Toprak, and H. H. Radamson. "Effect of strain on Ni-(GeSn)x contact formation to GeSn nanowires." MRS Proceedings 1707 (2014). http://dx.doi.org/10.1557/opl.2014.559.

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ABSTRACTIn this study, the formation of Ni-(GeSn)x on strained and relaxed Ge1−xSnx (0.01≤x≤ 0.03) nanowires in contact areas has been investigated. The epi-layers were grown at different temperatures (290 to 380°C) by RPCVD technique. The strain in GeSn layers tailored through carefully chosen of growth parameters and virtual substrate. The nanowires were fabricated through both I-line and dry-etching. 15 nm Ni was deposited either on the contact areas or whole length of nanowires. The wires went through rapid thermal annealing at intervals of 360 to 550°C for 30s in N2 ambient. The results show the thermal stability and amount of particular phases were strain-dependent. The formation of Ni-GeSn was eased when GeSn layers were strain-free. When the Sn content is high the epi-layers suffer from Sn segregation. The Sn-rich surface impedes remarkably the Ni diffusion. The electrical conductivity measurement of nanowires shows low resistivity and Ohmic contact are obtained for Ni-GeSn.

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15

Quintero, Andrea, Pablo Acosta Alba, Jean-Michel Hartmann, David Cooper, Patrice Gergaud, Vincent Reboud, and Philippe Rodriguez. "Use of Nanosecond Laser Annealing for Thermally Stable Ni(GeSn) Alloys." IEEE Journal of the Electron Devices Society, 2023, 1. http://dx.doi.org/10.1109/jeds.2023.3332094.

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16

Gantet, Claire. "Ni pédants, ni amateurs?" Gesnerus, 2016. http://dx.doi.org/10.24894/gesn-fr.2016.73010.

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