Journal articles on the topic 'Neural network accelerator'
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Eliahu, Adi, Ronny Ronen, Pierre-Emmanuel Gaillardon, and Shahar Kvatinsky. "multiPULPly." ACM Journal on Emerging Technologies in Computing Systems 17, no. 2 (April 2021): 1–27. http://dx.doi.org/10.1145/3432815.
Full textCho, Jaechan, Yongchul Jung, Seongjoo Lee, and Yunho Jung. "Reconfigurable Binary Neural Network Accelerator with Adaptive Parallelism Scheme." Electronics 10, no. 3 (January 20, 2021): 230. http://dx.doi.org/10.3390/electronics10030230.
Full textNoskova, E. S., I. E. Zakharov, Y. N. Shkandybin, and S. G. Rykovanov. "Towards energy-efficient neural network calculations." Computer Optics 46, no. 1 (February 2022): 160–66. http://dx.doi.org/10.18287/2412-6179-co-914.
Full textHong, JiUn, Saad Arslan, TaeGeon Lee, and HyungWon Kim. "Design of Power-Efficient Training Accelerator for Convolution Neural Networks." Electronics 10, no. 7 (March 26, 2021): 787. http://dx.doi.org/10.3390/electronics10070787.
Full textFerianc, Martin, Hongxiang Fan, Divyansh Manocha, Hongyu Zhou, Shuanglong Liu, Xinyu Niu, and Wayne Luk. "Improving Performance Estimation for Design Space Exploration for Convolutional Neural Network Accelerators." Electronics 10, no. 4 (February 23, 2021): 520. http://dx.doi.org/10.3390/electronics10040520.
Full textSunny, Febin P., Asif Mirza, Mahdi Nikdast, and Sudeep Pasricha. "ROBIN: A Robust Optical Binary Neural Network Accelerator." ACM Transactions on Embedded Computing Systems 20, no. 5s (October 31, 2021): 1–24. http://dx.doi.org/10.1145/3476988.
Full textAnmin, Kong, and Zhao Bin. "A Parallel Loading Based Accelerator for Convolution Neural Network." International Journal of Machine Learning and Computing 10, no. 5 (October 5, 2020): 669–74. http://dx.doi.org/10.18178/ijmlc.2020.10.5.989.
Full textXia, Chengpeng, Yawen Chen, Haibo Zhang, Hao Zhang, Fei Dai, and Jigang Wu. "Efficient neural network accelerators with optical computing and communication." Computer Science and Information Systems, no. 00 (2022): 66. http://dx.doi.org/10.2298/csis220131066x.
Full textTang, Wenkai, and Peiyong Zhang. "GPGCN: A General-Purpose Graph Convolution Neural Network Accelerator Based on RISC-V ISA Extension." Electronics 11, no. 22 (November 21, 2022): 3833. http://dx.doi.org/10.3390/electronics11223833.
Full textAn, Fubang, Lingli Wang, and Xuegong Zhou. "A High Performance Reconfigurable Hardware Architecture for Lightweight Convolutional Neural Network." Electronics 12, no. 13 (June 27, 2023): 2847. http://dx.doi.org/10.3390/electronics12132847.
Full textBiookaghazadeh, Saman, Pravin Kumar Ravi, and Ming Zhao. "Toward Multi-FPGA Acceleration of the Neural Networks." ACM Journal on Emerging Technologies in Computing Systems 17, no. 2 (April 2021): 1–23. http://dx.doi.org/10.1145/3432816.
Full textGe, Fen, Ning Wu, Hao Xiao, Yuanyuan Zhang, and Fang Zhou. "Compact Convolutional Neural Network Accelerator for IoT Endpoint SoC." Electronics 8, no. 5 (May 5, 2019): 497. http://dx.doi.org/10.3390/electronics8050497.
Full textClements, Joseph, and Yingjie Lao. "DeepHardMark: Towards Watermarking Neural Network Hardware." Proceedings of the AAAI Conference on Artificial Intelligence 36, no. 4 (June 28, 2022): 4450–58. http://dx.doi.org/10.1609/aaai.v36i4.20367.
Full textXia, Chengpeng, Yawen Chen, Haibo Zhang, and Jigang Wu. "STADIA: Photonic Stochastic Gradient Descent for Neural Network Accelerators." ACM Transactions on Embedded Computing Systems 22, no. 5s (September 9, 2023): 1–23. http://dx.doi.org/10.1145/3607920.
Full textWei, Rongshan, Chenjia Li, Chuandong Chen, Guangyu Sun, and Minghua He. "Memory Access Optimization of a Neural Network Accelerator Based on Memory Controller." Electronics 10, no. 4 (February 10, 2021): 438. http://dx.doi.org/10.3390/electronics10040438.
Full textHu, Jian, Xianlong Zhang, and Xiaohua Shi. "Simulating Neural Network Processors." Wireless Communications and Mobile Computing 2022 (February 23, 2022): 1–12. http://dx.doi.org/10.1155/2022/7500195.
Full textChen, Weijian, Zhi Qi, Zahid Akhtar, and Kamran Siddique. "Resistive-RAM-Based In-Memory Computing for Neural Network: A Review." Electronics 11, no. 22 (November 9, 2022): 3667. http://dx.doi.org/10.3390/electronics11223667.
Full textLim, Se-Min, and Sang-Woo Jun. "MobileNets Can Be Lossily Compressed: Neural Network Compression for Embedded Accelerators." Electronics 11, no. 6 (March 9, 2022): 858. http://dx.doi.org/10.3390/electronics11060858.
Full textAfifi, Salma, Febin Sunny, Amin Shafiee, Mahdi Nikdast, and Sudeep Pasricha. "GHOST: A Graph Neural Network Accelerator using Silicon Photonics." ACM Transactions on Embedded Computing Systems 22, no. 5s (September 9, 2023): 1–25. http://dx.doi.org/10.1145/3609097.
Full textLi, Yihang. "Sparse-Aware Deep Learning Accelerator." Highlights in Science, Engineering and Technology 39 (April 1, 2023): 305–10. http://dx.doi.org/10.54097/hset.v39i.6544.
Full textXie, Xiaoru, Mingyu Zhu, Siyuan Lu, and Zhongfeng Wang. "Efficient Layer-Wise N:M Sparse CNN Accelerator with Flexible SPEC: Sparse Processing Element Clusters." Micromachines 14, no. 3 (February 24, 2023): 528. http://dx.doi.org/10.3390/mi14030528.
Full textYang, Zhi. "Dynamic Logo Design System of Network Media Art Based on Convolutional Neural Network." Mobile Information Systems 2022 (May 31, 2022): 1–10. http://dx.doi.org/10.1155/2022/3247229.
Full textHosseini, Morteza, and Tinoosh Mohsenin. "Binary Precision Neural Network Manycore Accelerator." ACM Journal on Emerging Technologies in Computing Systems 17, no. 2 (April 2021): 1–27. http://dx.doi.org/10.1145/3423136.
Full textPark, Sang-Soo, and Ki-Seok Chung. "CENNA: Cost-Effective Neural Network Accelerator." Electronics 9, no. 1 (January 10, 2020): 134. http://dx.doi.org/10.3390/electronics9010134.
Full textKim, Dongyoung, Junwhan Ahn, and Sungjoo Yoo. "ZeNA: Zero-Aware Neural Network Accelerator." IEEE Design & Test 35, no. 1 (February 2018): 39–46. http://dx.doi.org/10.1109/mdat.2017.2741463.
Full textChen, Tianshi, Zidong Du, Ninghui Sun, Jia Wang, Chengyong Wu, Yunji Chen, and Olivier Temam. "A High-Throughput Neural Network Accelerator." IEEE Micro 35, no. 3 (May 2015): 24–32. http://dx.doi.org/10.1109/mm.2015.41.
Full textTo, Chun-Hao, Eduardo Rozo, Elisabeth Krause, Hao-Yi Wu, Risa H. Wechsler, and Andrés N. Salcedo. "LINNA: Likelihood Inference Neural Network Accelerator." Journal of Cosmology and Astroparticle Physics 2023, no. 01 (January 1, 2023): 016. http://dx.doi.org/10.1088/1475-7516/2023/01/016.
Full textLiang, Yong, Junwen Tan, Zhisong Xie, Zetao Chen, Daoqian Lin, and Zhenhao Yang. "Research on Convolutional Neural Network Inference Acceleration and Performance Optimization for Edge Intelligence." Sensors 24, no. 1 (December 31, 2023): 240. http://dx.doi.org/10.3390/s24010240.
Full textLiu, Yang, Yiheng Zhang, Xiaoran Hao, Lan Chen, Mao Ni, Ming Chen, and Rong Chen. "Design of a Convolutional Neural Network Accelerator Based on On-Chip Data Reordering." Electronics 13, no. 5 (March 4, 2024): 975. http://dx.doi.org/10.3390/electronics13050975.
Full textRo, Yuhwan, Eojin Lee, and Jung Ahn. "Evaluating the Impact of Optical Interconnects on a Multi-Chip Machine-Learning Architecture." Electronics 7, no. 8 (July 27, 2018): 130. http://dx.doi.org/10.3390/electronics7080130.
Full textHuang, Hongmin, Zihao Liu, Taosheng Chen, Xianghong Hu, Qiming Zhang, and Xiaoming Xiong. "Design Space Exploration for YOLO Neural Network Accelerator." Electronics 9, no. 11 (November 16, 2020): 1921. http://dx.doi.org/10.3390/electronics9111921.
Full textChen, Zhimei. "Hardware Accelerated Optimization of Deep Learning Model on Artificial Intelligence Chip." Frontiers in Computing and Intelligent Systems 6, no. 2 (December 15, 2023): 11–14. http://dx.doi.org/10.54097/fcis.v6i2.03.
Full textBrennsteiner, Stefan, Tughrul Arslan, John Thompson, and Andrew McCormick. "A Real-Time Deep Learning OFDM Receiver." ACM Transactions on Reconfigurable Technology and Systems 15, no. 3 (September 30, 2022): 1–25. http://dx.doi.org/10.1145/3494049.
Full textCho, Mannhee, and Youngmin Kim. "FPGA-Based Convolutional Neural Network Accelerator with Resource-Optimized Approximate Multiply-Accumulate Unit." Electronics 10, no. 22 (November 19, 2021): 2859. http://dx.doi.org/10.3390/electronics10222859.
Full textChoubey, Abhishek, and Shruti Bhargava Choubey. "A Promising Hardware Accelerator with PAST Adder." Advances in Science and Technology 105 (April 2021): 241–48. http://dx.doi.org/10.4028/www.scientific.net/ast.105.241.
Full textde Sousa, André L., Mário P. Véstias, and Horácio C. Neto. "Multi-Model Inference Accelerator for Binary Convolutional Neural Networks." Electronics 11, no. 23 (November 30, 2022): 3966. http://dx.doi.org/10.3390/electronics11233966.
Full textKang, Soongyu, Seongjoo Lee, and Yunho Jung. "Design of Network-on-Chip-Based Restricted Coulomb Energy Neural Network Accelerator on FPGA Device." Sensors 24, no. 6 (March 15, 2024): 1891. http://dx.doi.org/10.3390/s24061891.
Full textCosatto, E., and H. P. Craf. "A neural network accelerator for image analysis." IEEE Micro 15, no. 3 (June 1995): 32–38. http://dx.doi.org/10.1109/40.387680.
Full textKuznar, Damian, Robert Szczygiel, Piotr Maj, and Anna Kozioł. "Design of artificial neural network hardware accelerator." Journal of Instrumentation 18, no. 04 (April 1, 2023): C04013. http://dx.doi.org/10.1088/1748-0221/18/04/c04013.
Full textWang, Yuejiao, Zhong Ma, and Zunming Yang. "Sequential Characteristics Based Operators Disassembly Quantization Method for LSTM Layers." Applied Sciences 12, no. 24 (December 12, 2022): 12744. http://dx.doi.org/10.3390/app122412744.
Full textSeto, Kenshu. "A Survey on System-Level Design of Neural Network Accelerators." Journal of Integrated Circuits and Systems 16, no. 2 (August 18, 2021): 1–10. http://dx.doi.org/10.29292/jics.v16i2.505.
Full textPark, Sang-Soo, and Ki-Seok Chung. "CONNA: Configurable Matrix Multiplication Engine for Neural Network Acceleration." Electronics 11, no. 15 (July 29, 2022): 2373. http://dx.doi.org/10.3390/electronics11152373.
Full textWang, Hongzhe, Junjie Wang, Hao Hu, Guo Li, Shaogang Hu, Qi Yu, Zhen Liu, Tupei Chen, Shijie Zhou, and Yang Liu. "Ultra-High-Speed Accelerator Architecture for Convolutional Neural Network Based on Processing-in-Memory Using Resistive Random Access Memory." Sensors 23, no. 5 (February 21, 2023): 2401. http://dx.doi.org/10.3390/s23052401.
Full textGowda, Kavitha Malali Vishveshwarappa, Sowmya Madhavan, Stefano Rinaldi, Parameshachari Bidare Divakarachari, and Anitha Atmakur. "FPGA-Based Reconfigurable Convolutional Neural Network Accelerator Using Sparse and Convolutional Optimization." Electronics 11, no. 10 (May 22, 2022): 1653. http://dx.doi.org/10.3390/electronics11101653.
Full textC., Dr Aarthi, and Kowsalya S. "Feed Forward Neural Network With Column-Wise Matrix–Vector Multiplication on FPGAs." International Research Journal of Computer Science 11, no. 04 (April 5, 2024): 355–59. http://dx.doi.org/10.26562/irjcs.2024.v1104.42.
Full textHou, Jia, Zichu Liu, Zepeng Yang, and Chen Yang. "Hardware Trojan Attacks on the Reconfigurable Interconnections of Field-Programmable Gate Array-Based Convolutional Neural Network Accelerators and a Physically Unclonable Function-Based Countermeasure Detection Technique." Micromachines 15, no. 1 (January 19, 2024): 149. http://dx.doi.org/10.3390/mi15010149.
Full textDeng, Bao, and Hao Lv. "Research on Dynamic Reconfigurable Convolutional Neural Network Accelerator." Journal of Physics: Conference Series 1952, no. 3 (June 1, 2021): 032045. http://dx.doi.org/10.1088/1742-6596/1952/3/032045.
Full textYAN, Jiale, Ying ZHANG, Fengbin TU, Jianxun YANG, Shixuan ZHENG, Peng OUYANG, Leibo LIU, Yuan XIE, Shaojun WEI, and Shouyi YIN. "Research on low-power neural network computing accelerator." SCIENTIA SINICA Informationis 49, no. 3 (March 1, 2019): 314–33. http://dx.doi.org/10.1360/n112018-00282.
Full textKim, Doo Young, Jin Min Kim, Hakbeom Jang, Jinkyu Jeong, and Jae W. Lee. "A neural network accelerator for mobile application processors." IEEE Transactions on Consumer Electronics 61, no. 4 (November 2015): 555–63. http://dx.doi.org/10.1109/tce.2015.7389812.
Full textGao, Chang, Antonio Rios-Navarro, Xi Chen, Shih-Chii Liu, and Tobi Delbruck. "EdgeDRNN: Recurrent Neural Network Accelerator for Edge Inference." IEEE Journal on Emerging and Selected Topics in Circuits and Systems 10, no. 4 (December 2020): 419–32. http://dx.doi.org/10.1109/jetcas.2020.3040300.
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