Relevant bibliographies by topics / Network architectures

Academic literature on the topic 'Network architectures'

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Published: 4 June 2021
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Journal articles on the topic "Network architectures"

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DELGADO-FRIAS, JOSE G., STAMATIS VASSILIADIS, and JAMSHID GOSHTASBI. "SEMANTIC NETWORK ARCHITECTURES: AN EVALUATION." International Journal on Artificial Intelligence Tools 01, no. 01 (March 1992): 57–83. http://dx.doi.org/10.1142/s0218213092000132.

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Semantic networks as a means for knowledge representation and manipulation are used in many artificial intelligence applications. A number of computer architectures, that have been reported for semantic network processing, are presented in this paper. A novel set of evaluation criteria for such semantic network architectures has been developed. Semantic network processing as well as architectural issues are considered in such evaluation criteria. A study of how the reported architectures meet the requirements of each criterion is presented. This set of evaluation criteria is useful for future designs of machines for semantic networks because of its comprehensive range of issues on semantic networks and architectures.
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Zurn, Perry, and Danielle S. Bassett. "Network architectures supporting learnability." Philosophical Transactions of the Royal Society B: Biological Sciences 375, no. 1796 (February 24, 2020): 20190323. http://dx.doi.org/10.1098/rstb.2019.0323.

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Human learners acquire complex interconnected networks of relational knowledge. The capacity for such learning naturally depends on two factors: the architecture (or informational structure) of the knowledge network itself and the architecture of the computational unit—the brain—that encodes and processes the information. That is, learning is reliant on integrated network architectures at two levels: the epistemic and the computational, or the conceptual and the neural. Motivated by a wish to understand conventional human knowledge, here, we discuss emerging work assessing network constraints on the learnability of relational knowledge, and theories from statistical physics that instantiate the principles of thermodynamics and information theory to offer an explanatory model for such constraints. We then highlight similarities between those constraints on the learnability of relational networks, at one level, and the physical constraints on the development of interconnected patterns in neural systems, at another level, both leading to hierarchically modular networks. To support our discussion of these similarities, we employ an operational distinction between the modeller (e.g. the human brain), the model (e.g. a single human’s knowledge) and the modelled (e.g. the information present in our experiences). We then turn to a philosophical discussion of whether and how we can extend our observations to a claim regarding explanation and mechanism for knowledge acquisition. What relation between hierarchical networks, at the conceptual and neural levels, best facilitate learning? Are the architectures of optimally learnable networks a topological reflection of the architectures of comparably developed neural networks? Finally, we contribute to a unified approach to hierarchies and levels in biological networks by proposing several epistemological norms for analysing the computational brain and social epistemes, and for developing pedagogical principles conducive to curious thought. This article is part of the theme issue ‘Unifying the essential concepts of biological networks: biological insights and philosophical foundations’.
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Dinn, Neil F. "Network architectures." Future Generation Computer Systems 7, no. 1 (October 1991): 79–89. http://dx.doi.org/10.1016/0167-739x(91)90018-s.

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Neeb, C., M. J. Thul, and N. Wehn. "Application driven evaluation of network on chip architectures forcation parallel signal processing." Advances in Radio Science 2 (May 27, 2005): 181–86. http://dx.doi.org/10.5194/ars-2-181-2004.

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Abstract. Today’s signal processing applications exhibit steadily increasing throughput requirements which can be achieved by parallel architectures. However, efficient communication is mandatory to fully exploit their parallelism. Turbo-Codes as an instance of highly efficient forward-error correction codes are a very good application to demonstrate the communication complexity in parallel architectures. We present a network-on-chip approach to derive an optimal communication architecture for a parallel Turbo-Decoder system. The performance of such a system significantly depends on the efficiency of the underlying interleaver network to distribute data among the parallel units. We focus on the strictly orthogonal n-dimensional mesh, torus and k-ary-n cube networks comparing deterministic dimension-order and partially adaptive negative- first and planar-adaptive routing algorithms. For each network topology and routing algorithm, input- and output-queued packet switching schemes are compared on the architectural level. The evaluation of candidate network architectures is based on performance measures and implementation cost to allow a fair trade-off.
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Lee, Woosik, Eun Suk Suh, Woo Young Kwak, and Hoon Han. "Comparative Analysis of 5G Mobile Communication Network Architectures." Applied Sciences 10, no. 7 (April 4, 2020): 2478. http://dx.doi.org/10.3390/app10072478.

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Mobile communication technology is evolving from 4G to 5G. Compared to previous generations, 5G has the capability to implement latency-critical services, such as autonomous driving, real-time AI on handheld devices and remote drone control. Multi-access Edge Computing is one of the key technologies of 5G in guaranteeing ultra-low latency aimed to support latency critical services by distributing centralized computing resources to networks edges closer to users. However, due to its high granularity of computing resources, Multi-access Edge Computing has an architectural vulnerability in that it can lead to the overloading of regional computing resources, a phenomenon called regional traffic explosion. This paper proposes an improved communication architecture called Hybrid Cloud Computing, which combines the advantages of both Centralized Cloud Computing and Multi-access Edge Computing. The performance of the proposed network architecture is evaluated by utilizing a discrete-event simulation model. Finally, the results, advantages, and disadvantages of various network architectures are discussed.
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Orhan, Orhan, and Huseyin Goren. "Largely Scalable Wireless Network Formation Architectures for Internet of Things." International Research Journal of Electronics and Computer Engineering 3, no. 4 (December 29, 2017): 17. http://dx.doi.org/10.24178/irjece.2017.3.4.17.

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As number of mobile devices increases with Internet of Things (IoT) capability and power consumption is important in multi hop communication, there is need of considering network formation architectures inIoT networks.In this work power levels of nodes, urgency of messages to be transmitted are not taken into consideration, a general approach considered with all nodes with same power levels and no priority for messages to be sent.Another assumption is all nodes are on the same 2D plane. Multi hop wireless network architectures studied and scalable, best performing architecture which is hypercubic network architecture is highlighted for IoT networks. Especially for large number of nodes needs to be considered hypercubic architecture performs much better than mesh, tree and ring kind of architectures in terms of dilation and number of connections. The simulation results are based on a simulator developed on C++ program. The results are showed that Hypercubic architecture with logarithmic dilation is much better than other network types. Cube Connected Cycles (CCC)based network architecture (which is derivative of Hypercube) can be preferred, especially when a constant degree is needed, in communication technologies such as Bluetooth. As a future work, a network architecture study can be made which takes energy levels and urgency of messages to be sent.
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Fernandes, Silvio R., Ivan S. Silva, and Marcio Kreutz. "Packet-driven General Purpose Instruction Execution on Communication-based Architectures." Journal of Integrated Circuits and Systems 5, no. 1 (November 21, 2010): 53–66. http://dx.doi.org/10.29292/jics.v5i1.310.

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In the last few years, the development of Multi-Core architectures was driven by the crescent advance in integration technology. In this scenario, when the number of cores increases, problems found on shared communication media, such as busses, can be addressed by using a network approach. This paper proposes the usage of communication capabilities of Networks-on-Chip (NoCs) to execute general purpose instructions. The main idea behind this approach is to allow networks-on-chip architectures to execute general purpose instructions inside each router architecture. This paper addresses the main architectural concerns involved on creating datapaths for routers as well as the programming model suggested to pack instructions on messages. Simulation results on two case studies illustrate the benefits of the proposed architecture when compared to an equivalent NoC-based MP-SoC.
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Pelt, Daniël M., and James A. Sethian. "A mixed-scale dense convolutional neural network for image analysis." Proceedings of the National Academy of Sciences 115, no. 2 (December 26, 2017): 254–59. http://dx.doi.org/10.1073/pnas.1715832114.

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Deep convolutional neural networks have been successfully applied to many image-processing problems in recent works. Popular network architectures often add additional operations and connections to the standard architecture to enable training deeper networks. To achieve accurate results in practice, a large number of trainable parameters are often required. Here, we introduce a network architecture based on using dilated convolutions to capture features at different image scales and densely connecting all feature maps with each other. The resulting architecture is able to achieve accurate results with relatively few parameters and consists of a single set of operations, making it easier to implement, train, and apply in practice, and automatically adapts to different problems. We compare results of the proposed network architecture with popular existing architectures for several segmentation problems, showing that the proposed architecture is able to achieve accurate results with fewer parameters, with a reduced risk of overfitting the training data.
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Dovrolis, Constantine, and J. Todd Streelman. "Evolvable network architectures." ACM SIGCOMM Computer Communication Review 40, no. 2 (April 9, 2010): 72–77. http://dx.doi.org/10.1145/1764873.1764886.

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Littmann, Enno, and Helge Ritter. "Learning and Generalization in Cascade Network Architectures." Neural Computation 8, no. 7 (October 1996): 1521–39. http://dx.doi.org/10.1162/neco.1996.8.7.1521.

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Incrementally constructed cascade architectures are a promising alternative to networks of predefined size. This paper compares the direct cascade architecture (DCA) proposed in Littmann and Ritter (1992) to the cascade-correlation approach of Fahlman and Lebiere (1990) and to related approaches and discusses the properties on the basis of various benchmark results. One important virtue of DCA is that it allows the cascading of entire subnetworks, even if these admit no error-backpropagation. Exploiting this flexibility and using LLM networks as cascaded elements, we show that the performance of the resulting network cascades can be greatly enhanced compared to the performance of a single network. Our results for the Mackey-Glass time series prediction task indicate that such deeply cascaded network architectures achieve good generalization even on small data sets, when shallow, broad architectures of comparable size suffer from overfitting. We conclude that the DCA approach offers a powerful and flexible alternative to existing schemes such as, e.g., the mixtures of experts approach, for the construction of modular systems from a wide range of subnetwork types.
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Dissertations / Theses on the topic "Network architectures"

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Seah, Peng Leong Chung Wai Kong. "Architectures for device aware network /." Monterey, Calif. : Springfield, Va. : Naval Postgraduate School ; Available from National Technical Information Service, 2005. http://library.nps.navy.mil/uhtbin/hyperion/05Mar%5FSeah.pdf.

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Chung, Wai Kong. "Architectures for device aware network." Thesis, Monterey, California. Naval Postgraduate School, 2005. http://hdl.handle.net/10945/2306.

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In today's heterogeneous computing environment, a wide variety of computing devices with varying capabilities need to access information in the network. Existing network is not able to differentiate the different device capabilities, and indiscriminatingly send information to the end-devices, without regard to the ability of the end-devices to use the information. The goal of a device-aware network is to match the capability of the end-devices to the information delivered, thereby optimizing the network resource usage. In the battlefield, all resources - including time, network bandwidth and battery capacity - are very limited. A device-aware network avoids the waste that happens in current, device-ignorant networks. By eliminating unusable traffic, a device-aware network reduces the time the end-devices spend receiving extraneous information, and thus saves time and conserves battery-life. In this thesis, we evaluated two potential DAN architectures, Proxy-based and Router-based approaches, based on the key requirements we identified. To demonstrate the viability of DAN, we built a prototype using a hybrid of the two architectures. The key elements of our prototype include a DAN browser, a DAN Lookup Server and DAN Processing Unit (DPU). We have demonstrated how our architecture can enhance the overall network utility by ensuring that only appropriate content is delivered to the end-devices.
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Newton, Todd A., Myron L. Moodie, Ryan J. Thibodeaux, and Maria S. Araujo. "Network System Integration: Migrating Legacy Systems into Network-Based Architectures." International Foundation for Telemetering, 2010. http://hdl.handle.net/10150/604308.

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ITC/USA 2010 Conference Proceedings / The Forty-Sixth Annual International Telemetering Conference and Technical Exhibition / October 25-28, 2010 / Town and Country Resort & Convention Center, San Diego, California
The direction of future data acquisition systems is rapidly moving toward a network-based architecture. There is a handful of these network-based flight test systems already operating, and the current trend is catching on all over the flight test community. As vendors are churning out a whole new product line for networking capabilities, system engineers are left asking, "What do I do with all of this non-networked, legacy equipment?" Before overhauling an entire test system, one should look for a way to incorporate the legacy system components into the modern network architecture. Finding a way to integrate the two generations of systems can provide substantial savings in both cost and application development time. This paper discusses the advantages of integrating legacy equipment into a network-based architecture with examples from systems where this approach was utilized.
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Al-Azez, Zaineb Talib Saeed. "Optimised green IoT network architectures." Thesis, University of Leeds, 2018. http://etheses.whiterose.ac.uk/22224/.

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The work in this thesis proposes a number of energy efficient architectures of IoT networks. These proposed architectures are edge computing, Passive Optical Network (PON) and Peer to Peer (P2P) based architectures. A framework was introduced for virtualising edge computing assisted IoT. Two mixed integer linear programming (MILP) models and heuristics were developed to minimise the power consumption and to maximise the number of served IoT processing tasks. Further consideration was also given to the limited IoT processing capabilities and hence the potential of processing task blockage. Two placement scenarios were studied revealing that the optimal distribution of cloudlets achieved 38% power saving compared to placing the cloudlet in the gateway while gateway placement can save up to 47% of the power compared to the optimal placement but blocked 50% of the total IoT object requests. The thesis also investigated the impact of PON deployment on the energy efficiency of IoT networks. A MILP model and a heuristic were developed to optimally minimise the power consumption of the proposed network. The results of this investigation showed that packing most of the VMs in OLT at a low traffic reduction percentage and placing them in relays at high traffic reduction rate saved power Also, the results revealed that utilising energy efficient PONs and serving heterogeneous VMs can save up to 19% of the total power. Finally, the thesis investigated a peer-to-peer (P2P) based architecture for IoT networks with fairness and incentives. It considered three VM placement scenarios and developed MILP models and heuristics to maximise the number of processing tasks served by VMs and to minimise the total power consumption of the proposed network. The results showed that the highest service rate was achieved by the hybrid scenario which consumes the highest amount of power compared to other scenarios.
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Zheng, Huanyang. "SOCIAL NETWORK ARCHITECTURES AND APPLICATIONS." Diss., Temple University Libraries, 2017. http://cdm16002.contentdm.oclc.org/cdm/ref/collection/p245801coll10/id/470889.

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Computer and Information Science
Ph.D.
Rather than being randomly wired together, the components of complex network systems are recently reported to represent a scale-free architecture, in which the node degree distribution follows power-law. While social networks are scale-free, it is natural to utilize their structural properties in some social network applications. As a result, this dissertation explores social network architectures, and in turn, leverages these architectures to facilitate some influence and information propagation applications. Social network architectures are analyzed in two different aspects. The first aspect focuses on the node degree snowballing effects (i.e., degree growth effects) in social networks, which is based on an age-sensitive preferential attachment model. The impact of the initial links is explored, in terms of accelerating the node degree snowballing effects. The second aspect focuses on Nested Scale-Free Architectures (NSFAs) for social networks. The scale-free architecture is a classic concept, which means that the node degree distribution follows the power-law distribution. `Nested' indicates that the scale-free architecture is preserved when low-degree nodes and their associated connections are iteratively removed. NSFA has a bounded hierarchy. Based on the social network structure, this dissertation explores two influence propagation applications for the Social Influence Maximization Problem (SIMP). The first application is a friend recommendation strategy with the perspective of social influence maximization. For the system provider, the objective is to recommend a fixed number of new friends to a given user, such that the given user can maximize his/her social influence through making new friends. This problem is proved to be NP-hard by reduction from the SIMP. A greedy friend recommendation algorithm with an approximation ratio of $1-e^{-1}$ is proposed. The second application studies the SIMP with the crowd influence, which is NP-hard, monotone, non-submodular, and inapproximable in general graphs. However, since user connections in Online Social Networks (OSNs) are not random, approximations can be obtained by leveraging the structural properties of OSNs. The modularity, denoted by $\Delta$, is proposed to measure to what degree this problem violates the submodularity. Two approximation algorithms are proposed with ratios of $\frac{1}{\Delta+2}$ and $1-e^{-1/(\Delta+1)}$, respectively. Beside the influence propagation applications, this dissertation further explores three different information propagation applications. The first application is a social network quarantine strategy, which can eliminate epidemic outbreaks with minimal isolation costs. This problem is NP-hard. An approximation algorithm with a ratio of 2 is proposed through utilizing the problem properties of feasibility and minimality. The second application is a rating prediction scheme, called DynFluid, based on the fluid dynamics. DynFluid analogizes the rating reference among the users in OSNs to the fluid flow among containers. The third application is an information cascade prediction framework: given the social current cascade and social topology, the number of propagated users at a future time slot is predicted. To reduce prediction time complexities, the spatiotemporal cascade information (a larger size of data) is decomposed to user characteristics (a smaller size of data) for subsequent predictions. All these three applications are based on the social network structure.
Temple University--Theses
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Armstrong, James R. "Boolean weightless neural network architectures." Thesis, University of Central Lancashire, 2011. http://clok.uclan.ac.uk/5325/.

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A collection of hardware weightless Boolean elements has been developed. These form fundamental building blocks which have particular pertinence to the field of weightless neural networks. They have also been shown to have merit in their own right for the design of robust architectures. A major element of this is a collection of weightless Boolean sum and threshold techniques. These are fundamental building blocks which can be used in weightless architectures particularly within the field of weightless neural networks. Included in these is the implementation of L-max also known as N point thresholding. These elements have been applied to design a Boolean weightless hardware version of Austin’s ADAM neural network. ADAM is further enhanced by the addition of a new learning paradigm, that of non-Hebbian Learning. This new method concentrates on the association of ‘dis-similarity’, believing this is as important as areas of similarity. Image processing using hardware weightless neural networks is investigated through simulation of digital filters using a Type 1 Neuroram neuro-filter. Simulations have been performed using MATLAB to compare the results to a conventional median filter. Type 1 Neuroram has been tested on an extended collection of noise types. The importance of the threshold has been examined and the effect of cascading both types of filters was examined. This research has led to the development of several novel weightless hardware elements that can be applied to image processing. These patented elements include a weightless thermocoder and two weightless median filters. These novel robust high speed weightless filters have been compared with conventional median filters. The robustness of these architectures has been investigated when subjected to accelerated ground based generated neutron radiation simulating the atmospheric radiation spectrum experienced at commercial avionic altitudes. A trial investigating the resilience of weightless hardware Boolean elements in comparison to standard weighted arithmetic logic is detailed, examining the effects on the operation of the function when implemented on hardware experiencing high energy neutron bombardment induced single event effects. Further weightless Boolean elements are detailed which contribute to the development of a weightless implementation of the traditionally weighted self ordered map.
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Tham, Kevin Wen Kaye. "Developing security services for network architectures." Queensland University of Technology, 2006. http://eprints.qut.edu.au/16546/.

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In the last 15 years, the adoption of enterprise level data networks had increased dramatically. This is mainly due to reasons, such as better use of IT resources, and even better coordination between departments and business units. These great demands have fuelled the push for better and faster connectivity to and from these networks, and even within the networks. We have moved from the slow 10Mbps to 1Gbps connectivity for end-point connections and moved from copper-based ISDN to fibre-linked connections for enterprise connections to the Internet. We now even include wireless network technologies in the mix, because of the greater convenience it offers. Such rapid progress is accompanied by ramifications, especially if not all aspects of networking technologies are improved linearly. Since the 1960s and 1970s, the only form of security had been along the line of authentication and authorisation. This is because of the widely used mainframes in that era. When the Internet and, ultimately, the wide-spread use of the Internet influxed in the 1980s, network security was born, and it was not until the late 1980s that saw the first Internet Worm that caused damage to information and systems on the Internet. Fast forward to today, and we see that although we have come a long way in terms of connectivity (connect to anywhere, and anytime, from anywhere else), the proposed use of network security and network security methods have not improved very much. Microsoft Windows XP recently switched from using their own authentication method, to the use of Kerberos, which was last revised 10 years ago. This thesis describes the many problems we face in the world of network security today, and proposes several new methods for future implementation, and to a certain extend, modification to current standards to encompass future developments. Discussion will include a proposed overview of what a secure network architecture should include, and this will lead into several aspects that can be improved on. All problems identified in this thesis have proposed solutions, except for one. The critical flaw found in the standard IEEE802.11 wireless technology was discovered during the course of this research. This flaw is explained and covered in great detail, and also, an explanation is given as to why this critical flaw is not fixable.
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Milosavljevic, Milos. "Integrated wireless-PON access network architectures." Thesis, University of Hertfordshire, 2011. http://hdl.handle.net/2299/6371.

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Next generation access networks should be able to cultivate the ongoing evolution in services and applications. Advancements on that front are expected to exhibit the transformation of high definition television (HDTV) and 2D services into ultra-HDTV and individual interactive 3D services. Currently deployed passive optical networks (PONs) have been certified to be able to deliver high quality video and internet services while in parallel broadband wireless standards are increasing their spectral efficiency and subscriber utilisation. Exploiting the benefits of both by providing an integrated infrastructure benefiting from the wireless mobility and ease of scalability and escalating bandwidth of next generation PONs are expected to offer service providers the business models justifying the evolved services. In this direction, this thesis deals with the means of transparent routing of standard worldwide interoperability for microwave access (WiMAX) signal formats over legacy PONs to and from wireless end users based on radio over fibre (RoF). The concept of frequency division multiplexing (FDM) with RoF is used for efficient addressing of individual base stations, bandwidth on-demand provisioning across a cell/sector, simple remote radio heads and no interference with the baseband PON spectrum. Network performance evaluation, initially through simulation, has displayed, in the presence of optical non-linearites and multi-path wireless channels, standard error vector magnitudes (EVMs) at remote radio receivers and bit error rates (BERs) of 1E-4 for typical WiMAX rates bidirectionally. To provide enhanced scalability and dynamicity, a newly applied scheme based on extended wavelength band overlay over the splitter, wireless-enabled PONs has been progressively investigated. This allows for the routing of multiple FDM windows to different wavelengths resulting in significantly reduced optical and electrical component costs and no dispersion compensation over the fibre. This has been implemented through the application of a dense array wave guide grating (AWG) and tuneable filter in the optical line terminal (OLT) and optical network unit/base stations (ONU/BSs) respectively. Although with the use of a splitter the distribution point of the optical network remains largely the same, vertical cavity surface emitting laser (VCSEL) arrays provide colourless upstream transmission. In addition, an overlapping cell concept is developed and adopted for increased wireless spectral efficiency and resilience. Finally, an experimental test-bed using commercially available WiMAX transceivers was produced, which enabled repetition of the simulation outcomes and therefore confirmed the overall network performance.
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Crowley, Patrick. "Design and analysis of architectures for programmable network processing systems /." Thesis, Connect to this title online; UW restricted, 2003. http://hdl.handle.net/1773/6991.

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Poluri, Pavan Kamal Sudheendra. "Fault Tolerant Network-on-Chip Router Architectures for Multi-Core Architectures." Diss., The University of Arizona, 2014. http://hdl.handle.net/10150/338752.

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As the feature size scales down to deep nanometer regimes, it has enabled the designers to fabricate chips with billions of transistors. The availability of such abundant computational resources on a single chip has made it possible to design chips with multiple computational cores, resulting in the inception of Chip Multiprocessors (CMPs). The widespread use of CMPs has resulted in a paradigm shift from computation-centric architectures to communication-centric architectures. With the continuous increase in the number of cores that can be fabricated on a single chip, communication between the cores has become a crucial factor in its overall performance. Network-on-Chip (NoC) paradigm has evolved into a standard on-chip interconnection network that can efficiently handle the strict communication requirements between the cores on a chip. The components of an NoC include routers, that facilitate routing of data between multiple cores and links that provide raw bandwidth for data traversal. While diminishing feature size has made it possible to integrate billions of transistors on a chip, the advantage of multiple cores has been marred with the waning reliability of transistors. Components of an NoC are not immune to the increasing number of hard faults and soft errors emanating due to extreme miniaturization of transistor sizes. Faults in an NoC result in significant ramifications such as isolation of healthy cores, deadlock, data corruption, packet loss and increased packet latency, all of which have a severe impact on the performance of a chip. This has stimulated the need to design resilient and fault tolerant NoCs. This thesis handles the issue of fault tolerance in NoC routers. Within the NoC router, the focus is specifically on the router pipeline that is responsible for the smooth flow of packets. In this thesis we propose two different fault tolerant architectures that can continue to operate in the presence of faults. In addition to these two architectures, we also propose a new reliability metric for evaluating soft error tolerant techniques targeted towards the control logic of the NoC router pipeline. First, we present Shield, a fault tolerant NoC router architecture that is capable of handling both hard faults and soft errors in its pipeline. Shield uses techniques such as spatial redundancy, exploitation of idle resources and bypassing a faulty resource to achieve hard fault tolerance. The use of these techniques reveals that Shield is six times more reliable than baseline-unprotected router. To handle soft errors, Shield uses selective hardening technique that includes hardening specific gates of the router pipeline to increase its soft error tolerance. To quantify soft error tolerance improvement, we propose a new metric called Soft Error Improvement Factor (SEIF) and use it to show that Shield’s soft error tolerance is three times better than that of the baseline-unprotected router. Then, we present Soft Error Tolerant NoC Router (STNR), a low overhead fault tolerating NoC router architecture that can tolerate soft errors in the control logic of its pipeline. STNR achieves soft error tolerance based on the idea of dual execution, comparison and rollback. It exploits idle cycles in the router pipeline to perform redundant computation and comparison necessary for soft error detection. Upon the detection of a soft error, the pipeline is rolled back to the stage that got affected by the soft error. Salient features of STNR include high level of soft error detection, fault containment and minimum impact on latency. Simulations show that STNR has been able to detect all injected single soft errors in the router pipeline. To perform a quantitative comparison between STNR and other existing similar architectures, we propose a new reliability metric called Metric for Soft error Tolerance (MST) in this thesis. MST is unique in the aspect that it encompasses four crucial factors namely, soft error tolerance, area overhead, power overhead and pipeline latency overhead into a single metric. Analysis using MST shows that STNR provides better reliability while incurring low overhead compared to existing architectures.
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Books on the topic "Network architectures"

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Network security architectures. Indianapolis, IN: Cisco Press, 2004.

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Tronco, Tania, ed. New Network Architectures. Berlin, Heidelberg: Springer Berlin Heidelberg, 2010. http://dx.doi.org/10.1007/978-3-642-13247-6.

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David, Hutchison. Local area network architectures. Wokingham, England: Addison-Wesley, 1988.

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Tom, Dell, and Heiberger E. L, eds. Designing AppleTalk network architectures. Boston: AP Professional, 1996.

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Nicopoulos, Chrysostomos, Vijaykrishnan Narayanan, and Chita R. Das. Network-on-Chip Architectures. Dordrecht: Springer Netherlands, 2010. http://dx.doi.org/10.1007/978-90-481-3031-3.

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Bill, Hancock. Network concepts and architectures. Wellesley, Mass: QED Information Sciences, 1989.

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Danny, McPherson, and Cisco Systems Inc, eds. Internet routing architectures. 2nd ed. Indianapolis, Ind: Cisco, 2000.

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Halabi, Bassam. Internet routing architectures. Indianapolis, IN: Cisco Press, 1997.

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Advanced router architectures. Boca Raton, FL: Taylor & Francis, 2006.

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Dayhoff, Judith E. Neural network architectures: An introduction. New York, N.Y: Van Nostrand Reinhold, 1990.

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Book chapters on the topic "Network architectures"

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Ciubotaru, Bogdan, and Gabriel-Miro Muntean. "Network Architectures." In Computer Communications and Networks, 3–28. London: Springer London, 2013. http://dx.doi.org/10.1007/978-1-4471-5292-7_2.

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Pužman, Josef, and Boris Kubín. "Network Architectures." In Public Data Networks, 43–123. London: Springer London, 1992. http://dx.doi.org/10.1007/978-1-4471-1737-7_4.

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Freer, John R. "Layered network architectures." In Computer Communications and Networks, 133–70. Boston, MA: Springer US, 1988. http://dx.doi.org/10.1007/978-1-4613-1041-9_5.

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Haas, Zygmunt. "Optical Network Architectures." In High Performance Networks, 85–107. Boston, MA: Springer US, 1994. http://dx.doi.org/10.1007/978-1-4615-3194-4_4.

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Goda, Kazuo. "Storage Network Architectures." In Encyclopedia of Database Systems, 3741–45. New York, NY: Springer New York, 2018. http://dx.doi.org/10.1007/978-1-4614-8265-9_1327.

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Goda, Kazuo. "Storage Network Architectures." In Encyclopedia of Database Systems, 2812–15. Boston, MA: Springer US, 2009. http://dx.doi.org/10.1007/978-0-387-39940-9_1327.

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Goda, Kazuo. "Storage Network Architectures." In Encyclopedia of Database Systems, 1–5. New York, NY: Springer New York, 2016. http://dx.doi.org/10.1007/978-1-4899-7993-3_1327-2.

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Wan, Peng-Jun. "WDM Network Architectures." In Network Theory and Applications, 3–30. Boston, MA: Springer US, 1999. http://dx.doi.org/10.1007/978-1-4615-5317-5_1.

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Tronco, Tania Regina. "Principles of Internet Architecture." In New Network Architectures, 13–23. Berlin, Heidelberg: Springer Berlin Heidelberg, 2010. http://dx.doi.org/10.1007/978-3-642-13247-6_2.

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Tronco, Tania Regina. "A Brief History of the Internet." In New Network Architectures, 1–11. Berlin, Heidelberg: Springer Berlin Heidelberg, 2010. http://dx.doi.org/10.1007/978-3-642-13247-6_1.

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Conference papers on the topic "Network architectures"

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Kasiviswanathan, Shiva Prasad, Nina Narodytska, and Hongxia Jin. "Network Approximation using Tensor Sketching." In Twenty-Seventh International Joint Conference on Artificial Intelligence {IJCAI-18}. California: International Joint Conferences on Artificial Intelligence Organization, 2018. http://dx.doi.org/10.24963/ijcai.2018/321.

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Deep neural networks are powerful learning models that achieve state-of-the-art performance on many computer vision, speech, and language processing tasks. In this paper, we study a fundamental question that arises when designing deep network architectures: Given a target network architecture can we design a `smaller' network architecture that 'approximates' the operation of the target network? The question is, in part, motivated by the challenge of parameter reduction (compression) in modern deep neural networks, as the ever increasing storage and memory requirements of these networks pose a problem in resource constrained environments.In this work, we focus on deep convolutional neural network architectures, and propose a novel randomized tensor sketching technique that we utilize to develop a unified framework for approximating the operation of both the convolutional and fully connected layers. By applying the sketching technique along different tensor dimensions, we design changes to the convolutional and fully connected layers that substantially reduce the number of effective parameters in a network. We show that the resulting smaller network can be trained directly, and has a classification accuracy that is comparable to the original network.
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Paparistodimou, G., A. Duffy, P. Knight, I. Whitfield, M. Robb, and C. Voong. "Network-based metrics for assessment of naval distributed system architectures." In 14th International Naval Engineering Conference and Exhibition. IMarEST, 2018. http://dx.doi.org/10.24868/issn.2515-818x.2018.030.

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The architecture of a system is generally established at the end of the conceptual design phase where sixty to eighty percent of the lifetime system costs are committed. The architecture influences the system’s complexity, integrality, modularity and robustness. However, such properties of system architecture are not typically analytically evaluated early on during the conceptual process. System architectures are defined using qualitative experience, and the early stage decisions are subject to the judgement of stakeholders. This article suggests a set of network-based metrics that can potentially function as early evaluation indicators to assess complexity, integrality, modularity and robustness of distributed system architectures during conceptual design. A new robustness metric is proposed that assesses the ability of architecture to support a level functional requirement of the system after a disruption. The new robustness metric is evaluated by an electrical simulation software (MATPOWER). A ship vulnerability assessment software (SURVIVE) was used to find potential disruptive events. Two technical case studies examining existing naval distributed system architectures are elaborated. Conclusions on the network modelling and metrics as early aids to assess system architectures and to choose among alternatives during the conceptual decision phase are presented.
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Gao, Yang, Hong Yang, Peng Zhang, Chuan Zhou, and Yue Hu. "Graph Neural Architecture Search." In Twenty-Ninth International Joint Conference on Artificial Intelligence and Seventeenth Pacific Rim International Conference on Artificial Intelligence {IJCAI-PRICAI-20}. California: International Joint Conferences on Artificial Intelligence Organization, 2020. http://dx.doi.org/10.24963/ijcai.2020/195.

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Graph neural networks (GNNs) emerged recently as a powerful tool for analyzing non-Euclidean data such as social network data. Despite their success, the design of graph neural networks requires heavy manual work and domain knowledge. In this paper, we present a graph neural architecture search method (GraphNAS) that enables automatic design of the best graph neural architecture based on reinforcement learning. Specifically, GraphNAS uses a recurrent network to generate variable-length strings that describe the architectures of graph neural networks, and trains the recurrent network with policy gradient to maximize the expected accuracy of the generated architectures on a validation data set. Furthermore, to improve the search efficiency of GraphNAS on big networks, GraphNAS restricts the search space from an entire architecture space to a sequential concatenation of the best search results built on each single architecture layer. Experiments on real-world datasets demonstrate that GraphNAS can design a novel network architecture that rivals the best human-invented architecture in terms of validation set accuracy. Moreover, in a transfer learning task we observe that graph neural architectures designed by GraphNAS, when transferred to new datasets, still gain improvement in terms of prediction accuracy.
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Jaeger, Monika. "Network Architectures for Future Optical Networks." In 2006 International Conference on Transparent Optical Networks. IEEE, 2006. http://dx.doi.org/10.1109/icton.2006.248262.

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Moreira, Rodrigo, Larissa Rodrigues, Pedro Rosa, and Flávio Silva. "Improving the network traffic classification using the Packet Vision approach." In Workshop de Visão Computacional. Sociedade Brasileira de Computação - SBC, 2020. http://dx.doi.org/10.5753/wvc.2020.13496.

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The network traffic classification allows improving the management, and the network services offer taking into account the kind of application. The future network architectures, mainly mobile networks, foresee intelligent mechanisms in their architectural frameworks to deliver application-aware network requirements. The potential of convolutional neural networks capabilities, widely exploited in several contexts, can be used in network traffic classification. Thus, it is necessary to develop methods based on the content of packets transforming it into a suitable input for CNN technologies. Hence, we implemented and evaluated the Packet Vision, a method capable of building images from packets raw-data, considering both header and payload. Our approach excels those found in state-of-the-art by delivering security and privacy by transforming the raw-data packet into images. Therefore, we built a dataset with four traffic classes evaluating the performance of three CNNs architectures: AlexNet, ResNet-18, and SqueezeNet. Experiments showcase the Packet Vision combined with CNNs applicability and suitability as a promising approach to deliver outstanding performance in classifying network traffic.
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Wosinska, Lena. "Optical Network Architectures for Datacenters." In Photonic Networks and Devices. Washington, D.C.: OSA, 2017. http://dx.doi.org/10.1364/networks.2017.new2b.1.

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Lu, Zhichao, Ian Whalen, Yashesh Dhebar, Kalyanmoy Deb, Erik Goodman, Wolfgang Banzhaf, and Vishnu Naresh Boddeti. "NSGA-Net: Neural Architecture Search using Multi-Objective Genetic Algorithm (Extended Abstract)." In Twenty-Ninth International Joint Conference on Artificial Intelligence and Seventeenth Pacific Rim International Conference on Artificial Intelligence {IJCAI-PRICAI-20}. California: International Joint Conferences on Artificial Intelligence Organization, 2020. http://dx.doi.org/10.24963/ijcai.2020/659.

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Convolutional neural networks (CNNs) are the backbones of deep learning paradigms for numerous vision tasks. Early advancements in CNN architectures are primarily driven by human expertise and elaborate design. Recently, neural architecture search (NAS) was proposed with the aim of automating the network design process and generating task-dependent architectures. This paper introduces NSGA-Net -- an evolutionary search algorithm that explores a space of potential neural network architectures in three steps, namely, a population initialization step that is based on prior-knowledge from hand-crafted architectures, an exploration step comprising crossover and mutation of architectures, and finally an exploitation step that utilizes the hidden useful knowledge stored in the entire history of evaluated neural architectures in the form of a Bayesian Network. The integration of these components allows an efficient design of architectures that are competitive and in many cases outperform both manually and automatically designed architectures on CIFAR-10 classification task. The flexibility provided from simultaneously obtaining multiple architecture choices for different compute requirements further differentiates our approach from other methods in the literature.
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Pacharintanakul, Peera, and David Tipper. "Differentiated crosslayer network mapping in multilayered network architectures." In 2010 14th International Telecommunications Network Strategy and Planning Symposium (NETWORKS). IEEE, 2010. http://dx.doi.org/10.1109/netwks.2010.5624908.

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Suganuma, Masanori, Shinichi Shirakawa, and Tomoharu Nagao. "A Genetic Programming Approach to Designing Convolutional Neural Network Architectures." In Twenty-Seventh International Joint Conference on Artificial Intelligence {IJCAI-18}. California: International Joint Conferences on Artificial Intelligence Organization, 2018. http://dx.doi.org/10.24963/ijcai.2018/755.

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We propose a method for designing convolutional neural network (CNN) architectures based on Cartesian genetic programming (CGP). In the proposed method, the architectures of CNNs are represented by directed acyclic graphs, in which each node represents highly-functional modules such as convolutional blocks and tensor operations, and each edge represents the connectivity of layers. The architecture is optimized to maximize the classification accuracy for a validation dataset by an evolutionary algorithm. We show that the proposed method can find competitive CNN architectures compared with state-of-the-art methods on the image classification task using CIFAR-10 and CIFAR-100 datasets.
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Natarajan, Anirudh, Mehul Motani, Buddhika de Silva, Kok-Kiong Yap, and K. C. Chua. "Investigating network architectures for body sensor networks." In the 1st ACM SIGMOBILE international workshop. New York, New York, USA: ACM Press, 2007. http://dx.doi.org/10.1145/1248054.1248061.

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Reports on the topic "Network architectures"

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Getbehead, Mark A., James B. Rosetti, Wesley E. Foor, and Samuel P. Kozaitis. Optical Neural Network Classifier Architectures. Fort Belvoir, VA: Defense Technical Information Center, April 1998. http://dx.doi.org/10.21236/ada345879.

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Arcia-Moret, A., B. Braem, E. Pietrosemoli, A. Sathiaseelan, and M. Zennaro. Alternative Network Deployments: Taxonomy, Characterization, Technologies, and Architectures. Edited by J. Saldana. RFC Editor, August 2016. http://dx.doi.org/10.17487/rfc7962.

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Srikant, R. Optimization-Based Wireless Network Architectures: Complexity, Decentralization and Performance Guarantees. Fort Belvoir, VA: Defense Technical Information Center, April 2011. http://dx.doi.org/10.21236/ada564105.

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Lenahan, Jack. Are Service Oriented Architectures the Only Valid Architectural Approach for the Transformation to Network Centric Warfare? (Briefing Charts). Fort Belvoir, VA: Defense Technical Information Center, June 2004. http://dx.doi.org/10.21236/ada462299.

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Lenahan, Jack. The Data Warehouse in Service Oriented Architectures and Network Centric Warfare (Briefing Charts). Fort Belvoir, VA: Defense Technical Information Center, June 2004. http://dx.doi.org/10.21236/ada464283.

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Kuhfeld, J., J. Johnson, and M. Thatcher. Definitions of Managed Objects for Synchronous Optical Network (SONET) Linear Automatic Protection Switching (APS) Architectures. RFC Editor, March 2003. http://dx.doi.org/10.17487/rfc3498.

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Medard, Muriel, Steven Lumetta, and Liuyang Li. A Network Management Architecture for Robust Packet Routing in Optical Access Networks. Fort Belvoir, VA: Defense Technical Information Center, March 2001. http://dx.doi.org/10.21236/ada491806.

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Barto, Andrew. Adaptive Neural Network Architecture. Fort Belvoir, VA: Defense Technical Information Center, October 1987. http://dx.doi.org/10.21236/ada190114.

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McDonnell, John R., and Don Waagen. Evolving Neural Network Architecture. Fort Belvoir, VA: Defense Technical Information Center, March 1993. http://dx.doi.org/10.21236/ada264802.

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PREDICTION SYSTEMS INC SPRING LAKE NJ. Network Simulation of Technical Architecture. Fort Belvoir, VA: Defense Technical Information Center, December 1997. http://dx.doi.org/10.21236/ada335257.

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