Journal articles on the topic 'Multi-Processor System-on-Chip'
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Nurmi, Jari. "International Symposium on System-on-Chip 2010." International Journal of Embedded and Real-Time Communication Systems 2, no. 4 (October 2011): 38–45. http://dx.doi.org/10.4018/ijertcs.2011100103.
Full textLee, Seung Eun. "Reusing existing resources for testing a multi-processor system-on-chip." International Journal of Electronics 100, no. 3 (March 2013): 355–70. http://dx.doi.org/10.1080/00207217.2012.713011.
Full textCui, Yuan, and Bo Nian Li. "A Multimedia System Based on OMAP3530." Applied Mechanics and Materials 40-41 (November 2010): 506–9. http://dx.doi.org/10.4028/www.scientific.net/amm.40-41.506.
Full textLiu, Lin, and Yuanyuan Yang. "Energy-aware routing in hybrid optical network-on-chip for future multi-processor system-on-chip." Journal of Parallel and Distributed Computing 73, no. 2 (February 2013): 189–97. http://dx.doi.org/10.1016/j.jpdc.2012.09.018.
Full textLafi, Walid, Didier Lattard, and Ahmed Jerrya. "An asynchronous hierarchical router for networks-on-chip-based three-dimensional multi-processor system-on-chip." Software: Practice and Experience 42, no. 7 (February 7, 2012): 877–90. http://dx.doi.org/10.1002/spe.1150.
Full textAMAMIYA, MAKOTO, HIDEO TANIGUCHI, and TAKANORI MATSUZAKI. "AN ARCHITECTURE OF FUSING COMMUNICATION AND EXECUTION FOR GLOBAL DISTRIBUTED PROCESSING." Parallel Processing Letters 11, no. 01 (March 2001): 7–24. http://dx.doi.org/10.1142/s0129626401000397.
Full textLi, Shuo, Gao Chao Xu, Yu Shuang Dong, and Feng Wu. "The Review of Cache Partitioning in Multi-Core Processor." Key Engineering Materials 439-440 (June 2010): 1223–29. http://dx.doi.org/10.4028/www.scientific.net/kem.439-440.1223.
Full textSLIMANI, Hayet, Abderrazak JEMAIU, and Ahmed Chiheb AMMARI. "Multi-Processor System-on-Chip Power Estimation Model At the CABA Level." IFAC Proceedings Volumes 45, no. 7 (2012): 341–46. http://dx.doi.org/10.3182/20120523-3-cz-3015.00065.
Full textTang, Lin, and Jin Zhao Wu. "The Status and Challenges of Multi-Processor System-on-Chip’s Formal Verification." Applied Mechanics and Materials 602-605 (August 2014): 2926–29. http://dx.doi.org/10.4028/www.scientific.net/amm.602-605.2926.
Full textBAGHERZADEH, NADER, and MASARU MATSUURA. "PERFORMANCE IMPACT OF TASK-TO-TASK COMMUNICATION PROTOCOL IN NETWORK-ON-CHIP." Journal of Circuits, Systems and Computers 18, no. 02 (April 2009): 283–94. http://dx.doi.org/10.1142/s021812660900506x.
Full textPrasad Acharya, G., and M. Asha Rani. "FPGA Prototyping of Micro-Blaze soft-processor based Multi-core System on Chip." International Journal of Engineering & Technology 7, no. 2.16 (April 12, 2018): 57. http://dx.doi.org/10.14419/ijet.v7i2.16.11416.
Full textBreaban, Gabriela, Martijn Koedam, Sander Stuijk, and Kees Goossens. "Time synchronization for an emulated CAN device on a Multi-Processor System on Chip." Microprocessors and Microsystems 52 (July 2017): 523–33. http://dx.doi.org/10.1016/j.micpro.2017.04.019.
Full textMilojevic, Dragomir, Luc Montperrus, and Diederik Verkest. "Power Dissipation of the Network-on-Chip in Multi-Processor System-on-Chip Dedicated for Video Coding Applications." Journal of Signal Processing Systems 57, no. 2 (July 29, 2008): 139–53. http://dx.doi.org/10.1007/s11265-008-0251-1.
Full textTang, Qi, Shang-Feng Wu, Jun-Wu Shi, and Ji-Bo Wei. "Optimization of Duplication-Based Schedules on Network-on-Chip Based Multi-Processor System-on-Chips." IEEE Transactions on Parallel and Distributed Systems 28, no. 3 (March 1, 2017): 826–37. http://dx.doi.org/10.1109/tpds.2016.2599166.
Full textGaneshpure, Kunal, and Sandip Kundu. "Game theoretic approach for run‐time task scheduling on an multi‐processor system on chip." IET Circuits, Devices & Systems 7, no. 5 (September 2013): 243–52. http://dx.doi.org/10.1049/iet-cds.2013.0091.
Full textLesecq, Suzanne, Diego Puschini, Edith Beigné, Pascal Vivet, and Yeter Akgul. "Low-Cost and Robust Control of a DFLL for Multi-Processor System-on-Chip." IFAC Proceedings Volumes 44, no. 1 (January 2011): 1940–45. http://dx.doi.org/10.3182/20110828-6-it-1002.01706.
Full textKhan, Haroon-Ur-Rashid, Feng Shi, WeiXing Ji, YuJin Gao, YiZhuo Wang, CaiXia Liu, Ning Deng, and JiaXin Li. "Computationally efficient locality-aware interconnection topology for multi-processor system-on-chip (MP-SoC)." Chinese Science Bulletin 55, no. 29 (October 2010): 3363–71. http://dx.doi.org/10.1007/s11434-010-4118-z.
Full textDeng, Yao Hua, Gui Xiong Liu, Wei Han, Zi Wei Fang, Li Ming Wu, and Qing Fu Liao. "Research on Multi-Core Collaborative Computing for FWP Image Processing Algorithm by FPGA." Advanced Materials Research 230-232 (May 2011): 1340–44. http://dx.doi.org/10.4028/www.scientific.net/amr.230-232.1340.
Full textSalamy, Hassan. "Energy-Aware Schedules Under Chip Reliability Constraint for Multi-Processor Systems-on-a-Chip." Journal of Circuits, Systems and Computers 29, no. 09 (October 29, 2019): 2050135. http://dx.doi.org/10.1142/s0218126620501352.
Full textSalamy, Hassan, and Semih Aslan. "Pipelined-Scheduling of Multiple Embedded Applications on a Multi-Processor-SoC." Journal of Circuits, Systems and Computers 26, no. 03 (November 21, 2016): 1750042. http://dx.doi.org/10.1142/s0218126617500426.
Full textJia, Hao, Shanglin Yang, Ting Zhou, Sizhu Shao, Xin Fu, Lei Zhang, and Lin Yang. "WDM-compatible multimode optical switching system-on-chip." Nanophotonics 8, no. 5 (April 27, 2019): 889–98. http://dx.doi.org/10.1515/nanoph-2019-0005.
Full textHan, Pei Cen, Zhao Hui Ye, Yong Ming Zhou, and Shi Yuan Yang. "SOPC-Based Motion Controller with NURBS Interpolator." Advanced Materials Research 898 (February 2014): 937–43. http://dx.doi.org/10.4028/www.scientific.net/amr.898.937.
Full textBorejko, Tomasz, Krzysztof Marcinek, Krzysztof Siwiec, Paweł Narczyk, Adam Borkowski, Igor Butryn, Arkadiusz Łuczyk, et al. "NaviSoC: High-Accuracy Low-Power GNSS SoC with an Integrated Application Processor." Sensors 20, no. 4 (February 16, 2020): 1069. http://dx.doi.org/10.3390/s20041069.
Full textMhaidat, Khaldoon Moosa, Ahmad Baset, and Osama Al-Khaleel. "OpenSPARC Processor Evaluation Using Virtex-5 FPGA and High Performance Embedded Computing (HPEC) Benchmark Suite." International Journal of Embedded and Real-Time Communication Systems 5, no. 1 (January 2014): 61–74. http://dx.doi.org/10.4018/ijertcs.2014010104.
Full textZuo, Qi. "Task Assignment for Multiple-Application Workload with Streaming Ones in MPSoC Using Shared Memory." Applied Mechanics and Materials 263-266 (December 2012): 1781–85. http://dx.doi.org/10.4028/www.scientific.net/amm.263-266.1781.
Full textPelissier, Frantz, Hanen Chenini, François Berry, Alexis Landrault, and Jean-Pierre Derutin. "Embedded multi-processor system-on-programmable chip for smart camera pose estimation using nonlinear optimization methods." Journal of Real-Time Image Processing 12, no. 4 (September 30, 2014): 663–79. http://dx.doi.org/10.1007/s11554-014-0454-6.
Full textAbbes, Hanen, Hafedh Abid, Kais Loukil, Mohamed Abid, and Ahmad Toumi. "Fuzzy-based MPPT algorithm implementation on FPGA chip for multi-channel photovoltaic system." International Journal of Reconfigurable and Embedded Systems (IJRES) 11, no. 1 (March 1, 2022): 49. http://dx.doi.org/10.11591/ijres.v11.i1.pp49-58.
Full textLiu, Jian Qun, Dong Xu, Ji Rong Wu, Xiao Li, and Jian Huang. "The Design of Carton Samplemaker’s Embedded Numerical Control System Based on Windows CE." Advanced Materials Research 211-212 (February 2011): 330–35. http://dx.doi.org/10.4028/www.scientific.net/amr.211-212.330.
Full textSingh, Akhilesh K., Kevin M. Sullivan, George R. Leal, and Tony Gong. "Assembly challenges with Flip Chip multi-die and interposer-based SiP Modules." International Symposium on Microelectronics 2019, no. 1 (October 1, 2019): 000001–5. http://dx.doi.org/10.4071/2380-4505-2019.1.000001.
Full textWang, Shiyu, Shengbing Zhang, Xiaoping Huang, and Libo Chang. "Single-chip multi-processing architecture for spaceborne SAR imaging and intelligent processing." Xibei Gongye Daxue Xuebao/Journal of Northwestern Polytechnical University 39, no. 3 (June 2021): 510–20. http://dx.doi.org/10.1051/jnwpu/20213930510.
Full textShahid, Arsalan, Muhammad Yasir Qadri, Martin Fleury, Hira Waris, Ayaz Ahmad, and Nadia N. Qadri. "AC-DSE: Approximate Computing for the Design Space Exploration of Reconfigurable MPSoCs." Journal of Circuits, Systems and Computers 27, no. 09 (April 26, 2018): 1850145. http://dx.doi.org/10.1142/s0218126618501451.
Full textBAHN, JUN HO, SEUNG EUN LEE, YOON SEOK YANG, JUNGSOOK YANG, and NADER BAGHERZADEH. "ON DESIGN AND APPLICATION MAPPING OF A NETWORK-ON-CHIP(NOC) ARCHITECTURE." Parallel Processing Letters 18, no. 02 (June 2008): 239–55. http://dx.doi.org/10.1142/s0129626408003363.
Full textWen, Wu, De Hua He, Hua Feng, and Peng Gu. "The Design of a New Network Cabling Experimental Instrument Based on Embedded System." Advanced Materials Research 328-330 (September 2011): 2427–31. http://dx.doi.org/10.4028/www.scientific.net/amr.328-330.2427.
Full textGarzia, Fabio, Roberto Airoldi, and Jari Nurmi. "Implementation of FFT on General-Purpose Architectures for FPGA." International Journal of Embedded and Real-Time Communication Systems 1, no. 3 (July 2010): 24–43. http://dx.doi.org/10.4018/jertcs.2010070102.
Full textZhang, Diandian, Li Lu, Jeronimo Castrillon, Torsten Kempf, Gerd Ascheid, Rainer Leupers, and Bart Vanthournout. "Efficient Implementation of Application-Aware Spinlock Control in MPSoCs." International Journal of Embedded and Real-Time Communication Systems 4, no. 1 (January 2013): 64–84. http://dx.doi.org/10.4018/jertcs.2013010104.
Full textMuscheid, T., A. Boebel, N. Karcher, T. Vanat, L. Ardila-Perez, I. Cheviakov, M. Schleicher, M. Zimmer, M. Balzer, and O. Sander. "DTS-100G — a versatile heterogeneous MPSoC board for cryogenic sensor readout." Journal of Instrumentation 18, no. 02 (February 1, 2023): C02067. http://dx.doi.org/10.1088/1748-0221/18/02/c02067.
Full textZhang, Diandian, Han Zhang, Jeronimo Castrillon, Torsten Kempf, Bart Vanthournout, Gerd Ascheid, and Rainer Leupers. "Optimized Communication Architecture of MPSoCs with a Hardware Scheduler." International Journal of Embedded and Real-Time Communication Systems 2, no. 3 (July 2011): 1–20. http://dx.doi.org/10.4018/jertcs.2011070101.
Full textZhou, Xinbing, Peng Hao, and Dake Liu. "PCCNoC: Packet Connected Circuit as Network on Chip for High Throughput and Low Latency SoCs." Micromachines 14, no. 3 (February 21, 2023): 501. http://dx.doi.org/10.3390/mi14030501.
Full textBellemou, A., N. Benblidia, M. Anane, and M. Issad. "MicroBlaze-Based Multiprocessor Embedded Cryptosystem on FPGA for Elliptic Curve Scalar Multiplication Over Fp." Journal of Circuits, Systems and Computers 28, no. 03 (February 24, 2019): 1950037. http://dx.doi.org/10.1142/s0218126619500373.
Full textGaniee, Sajad Ahmad, Shabeer Ahmad Ganiee, and Jehangir Rashid Dar. "FPGA Design of 8 bit 4×4 Crossbar Switch for Multi Processor System on Chip Using Round Robin Arbitration Algorithm." International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering 04, no. 01 (January 20, 2015): 109–19. http://dx.doi.org/10.15662/ijareeie.2015.0401010.
Full textMehner, T., L. E. Ardila-Perez, M. N. Balzer, O. Sander, D. Tcherniakhovski, M. Schleicher, M. Fuchs, et al. "ZynqMP-based board-management mezzanines for Serenity ATCA-blades." Journal of Instrumentation 17, no. 03 (March 1, 2022): C03009. http://dx.doi.org/10.1088/1748-0221/17/03/c03009.
Full textBossuet, Lilian, and El Mehdi Benhani. "Performing Cache Timing Attacks from the Reconfigurable Part of a Heterogeneous SoC—An Experimental Study." Applied Sciences 11, no. 14 (July 20, 2021): 6662. http://dx.doi.org/10.3390/app11146662.
Full textKumar, K. Suresh, S. Anitha, and M. Gayathri. "3D Stacked Cache Data Management for Energy Minimization of 3D Chip Multiprocessor." International Journal of Students' Research in Technology & Management 3, no. 2 (September 27, 2015): 264–68. http://dx.doi.org/10.18510/ijsrtm.2015.325.
Full textDey, Somdip, Samuel Isuwa, Suman Saha, Amit Kumar Singh, and Klaus McDonald-Maier. "CPU-GPU-Memory DVFS for Power-Efficient MPSoC in Mobile Cyber Physical Systems." Future Internet 14, no. 3 (March 14, 2022): 91. http://dx.doi.org/10.3390/fi14030091.
Full textLeon, Vasileios, George Lentaris, Evangelos Petrongonas, Dimitrios Soudris, Gianluca Furano, Antonis Tavoularis, and David Moloney. "Improving Performance-Power-Programmability in Space Avionics with Edge Devices: VBN on Myriad2 SoC." ACM Transactions on Embedded Computing Systems 20, no. 3 (April 2021): 1–23. http://dx.doi.org/10.1145/3440885.
Full textVandendriessche, Jurgen, Bruno da Silva, Lancelot Lhoest, An Braeken, and Abdellah Touhafi. "M3-AC: A Multi-Mode Multithread SoC FPGA Based Acoustic Camera." Electronics 10, no. 3 (January 29, 2021): 317. http://dx.doi.org/10.3390/electronics10030317.
Full textEL-MOURSY, ALI A., and FADI N. SIBAI. "V-SET CACHE: AN EFFICIENT ADAPTIVE SHARED CACHE FOR MULTI-CORE PROCESSORS." Journal of Circuits, Systems and Computers 23, no. 07 (June 2, 2014): 1450095. http://dx.doi.org/10.1142/s0218126614500959.
Full textBallan, Oscar, Pierre Maillard, Jue Arver, Christina Smith, Roland Petersson, Alexander Griessing, and Federico Venini. "Evaluation of ISO 26262 and IEC 61508 metrics for transient faults of a multi-processor system-on-chip through radiation testing." Microelectronics Reliability 107 (April 2020): 113601. http://dx.doi.org/10.1016/j.microrel.2020.113601.
Full textAshkenazi, A., and D. Akselrod. "Platform independent overall security architecture in multi-processor system-on-chip integrated circuits for use in mobile phones and handheld devices." Computers & Electrical Engineering 33, no. 5-6 (September 2007): 407–24. http://dx.doi.org/10.1016/j.compeleceng.2007.05.003.
Full textWang, Shiyu, Shengbing Zhang, Xiaoping Huang, and Hao Lyu. "On-chip data organization and access strategy for spaceborne SAR real-time imaging processor." Xibei Gongye Daxue Xuebao/Journal of Northwestern Polytechnical University 39, no. 1 (February 2021): 126–34. http://dx.doi.org/10.1051/jnwpu/20213910126.
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