Academic literature on the topic 'Model and Program Verification'

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Journal articles on the topic "Model and Program Verification":

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Yim, Joon-Seo, Chang-Jae Park, In-Cheol Park, and Chong-Min Kyung. "Design Verification of Complex Microprocessors." Journal of Circuits, Systems and Computers 07, no. 04 (August 1997): 301–18. http://dx.doi.org/10.1142/s021812669700022x.

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As the complexity of microprocessors increases, functional verification becomes more difficult and emerges as the bottleneck of the design cycle. In this paper, we suggest a functional verification methodology, especially for compatible microprocessor designs. To guarantee perfect compatibility with previous microprocessors, we developed three C models in different abstraction levels, i.e. Polaris, MCV and StreC. An instruction behavioral level C model (Polaris) is verified using the slowed-down PC. In the implemetation of micro-architecture, a micro-operational level model (MCV) and RTL model (StreC) are co-simulated with consistency checking between these two models. The simulation speed of C models makes it possible to test the "real-world" application programs on the RTL design with a software board model (VPC). To increase the confidence level of verifications, Profiler reports the verification coverage of the test program, which is fed-back to the automatic test program generator (Pandora). The Restartability feature also helps to significantly reduce the total simulation time. Using the proposed verification methodology, we designed and verified the HK486, an Intel 80486 pin-compatible microprocessor successfully.
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He, Pei, Achun Hu, Dongqing Xie, and Zhiping Fan. "Component-Based Verification Model of Sequential Programs." Journal of Software 10, no. 11 (November 2015): 1319–26. http://dx.doi.org/10.17706//jsw.10.11.1319-132.

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Zelkowitz, M. V. "A functional correctness model of program verification." Computer 23, no. 11 (November 1990): 30–39. http://dx.doi.org/10.1109/2.60878.

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Gregorics, Tibor, and Zsolt Borsi. "A unified approach of program verification." Acta Universitatis Sapientiae, Informatica 9, no. 1 (July 26, 2017): 65–82. http://dx.doi.org/10.1515/ausi-2017-0005.

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Abstract The subject of this paper is a program verification method that takes into account abortion caused by partial functions in program statements. In particular, boolean expressions of various statements will be investigated that are not well-defined. For example, a loop aborts if its execution begins in a state for which the loop condition is undefined. This work considers the program constructs of nondeterministic sequential programs and also deals with the synchronization statement of parallel programs introduced by Owicki and Gries [7]. The syntax of program constructs will be reviewed and their semantics will be formally defined in such a way that they suit the relational model of programming developed at Eőtvős Loránd University [3, 4]. This relational model defines the program as a set of its possible executions and also provides definition for other important programming notions like problem and solution. The proof rules of total correctness [2, 5, 8, 9, 7] will be extended by treating abortion caused by partial functions. The use of these rules will be demonstrated by means of a verification case study.
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DE ANGELIS, EMANUELE, FABIO FIORAVANTI, ALBERTO PETTOROSSI, and MAURIZIO PROIETTI. "Predicate Pairing for program verification." Theory and Practice of Logic Programming 18, no. 2 (December 4, 2017): 126–66. http://dx.doi.org/10.1017/s1471068417000497.

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AbstractIt is well-known that the verification of partial correctness properties of imperative programs can be reduced to the satisfiability problem for constrained Horn clauses (CHCs). However, state-of-the-art solvers for constrained Horn clauses (or CHC solvers) based onpredicate abstractionare sometimes unable to verify satisfiability because they look for models that are definable in a given class 𝓐 of constraints, called 𝓐-definable models. We introduce a transformation technique, calledPredicate Pairing, which is able, in many interesting cases, to transform a set of clauses into an equisatisfiable set whose satisfiability can be proved by finding an 𝓐-definable model, and hence can be effectively verified by a state-of-the-art CHC solver. In particular, we prove that, under very general conditions on 𝓐, the unfold/fold transformation rules preserve the existence of an 𝓐-definable model, that is, if the original clauses have an 𝓐-definable model, then the transformed clauses have an 𝓐-definable model. The converse does not hold in general, and we provide suitable conditions under which the transformed clauses have an 𝓐-definable modelif and only ifthe original ones have an 𝓐-definable model. Then, we present a strategy, called Predicate Pairing, which guides the application of the transformation rules with the objective of deriving a set of clauses whose satisfiability problem can be solved by looking for 𝓐-definable models. The Predicate Pairing (PP) strategy introduces a new predicate defined by the conjunction of two predicates occurring in the original set of clauses, together with a conjunction of constraints. We will show through some examples that an 𝓐-definable model may exist for the new predicate even if it does not exist for its defining atomic conjuncts. We will also present some case studies showing that Predicate Pairing plays a crucial role in the verification ofrelational properties of programs, that is, properties relating two programs (such as program equivalence) or two executions of the same program (such as non-interference). Finally, we perform an experimental evaluation of the proposed techniques to assess the effectiveness of Predicate Pairing in increasing the power of CHC solving.
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Luo, Min. "Model Extraction and Reliability Verification on SOCKET Program." Advanced Materials Research 616-618 (December 2012): 2055–59. http://dx.doi.org/10.4028/www.scientific.net/amr.616-618.2055.

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Formal method is a means to verify the reliability and safety of concurrent systems. Formal verification of model which automatically extracted from concurrent system built from high level language is a hot research topic in the field of model checking technology. With the focus on potential run time problems (deadlocks, memory leaks, the boundary data loss and other run-time errors) result from abnormal socket function call sequence, we analyze the sequence structure of the socket program and construct the Promela model of socket functions through the description of message data structures and channels, as well as define mapping rules of socket function to Promela. The socket function call sequence extraction algorithm and target Promela model generation algorithm are proposed by using linear temporal logic (LTL) to describe the property the socket function call sequence. A socket communication program analysis system has been constructed. The experiment result shows that the system can detect the potential run time problems of socket program effectively.
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Yamane, Satoshi. "Deductive Verification Method of Real-Time Safety Properties for Embedded Assembly Programs." Electronics 8, no. 10 (October 14, 2019): 1163. http://dx.doi.org/10.3390/electronics8101163.

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It is important to verify both the correctness and real-time properties of embedded systems. However, as practical computer programs are represented by infinite state transition systems, specifying and verifying a computer program is difficult. Real-time properties are also important for embedded programs, but verifying the real-time properties of an embedded program is difficult. In this paper, we focus on verifying an embedded assembly program, in order to verify the real-time safety properties. We propose a deductive verification method to verify real-time safety properties, based on discrete time, as follows: (1) First, we construct a timed computational model including the execution time from the assembly program. We can specify an infinite state transition system including the execution time of the timed computational model. (2) Next, we verify whether a timed computational model satisfies RTLTL (Real-Time Linear Temporal Logic) formulas by deductive verification. We can specify real-time properties by RTLTL. By our proposed methods, we are able to achieve verification of the real-time safety properties of an embedded program.
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Neyzov, Maxim V., and Egor V. Kuzmin. "LTL-specification for development and verification of control programs." Modeling and Analysis of Information Systems 30, no. 4 (December 11, 2023): 308–39. http://dx.doi.org/10.18255/1818-1015-2023-4-308-339.

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This work continues the series of articles on development and verification of control programs based on the LTL-specification. The essence of the approach is to describe the behavior of programs using formulas of linear temporal logic LTL of a special form. The developed LTL-specification can be directly verified by using a model checking tool. Next, according to the LTL-specification, the program code in the imperative programming language is unambiguously built. The translation of the specification into the program is carried out using a template. The novelty of the work consists in the proposal of two LTL-specifications of a new form — declarative and imperative, as well as in a more strict formal justification for this approach to program development and verification. A transition has been made to a more modern verification tool for finite and infinite systems — nuXmv. It is proposed to describe the behavior of control programs in a declarative style. For this purpose, a declarative LTL-specification is intended, which defines a labelled transition system as a formal model of program behavior. This method of describing behavior is quite expressive — the theorem on the Turing completeness of the declarative LTL-specification is proved. Next, to construct program code in an imperative language, the declarative LTL-specification is converted into an equivalent imperative LTL-specification. An equivalence theorem is proved, which guarantees that both specifications specify the same behavior. The imperative LTL-specification is translated into imperative program code according to the presented template. The declarative LTL-specification, which is subject to verification, and the control program built on it are guaranteed to specify the same behavior in the form of a corresponding transition system. Thus, during verification, a model is used that is adequate to the real behavior of the control program.
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ZUO, Zhengkang, Ying HU, Qing HUANG, Yuan WANG, and Changjing WANG. "Automatic Algorithm Programming Model Based on the Improved Morgan's Refinement Calculus." Wuhan University Journal of Natural Sciences 27, no. 5 (October 2022): 405–14. http://dx.doi.org/10.1051/wujns/2022275405.

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The automatic algorithm programming model can increase the dependability and efficiency of algorithm program development, including specification generation, program refinement, and formal verification. However, the existing model has two flaws: incompleteness of program refinement and inadequate automation of formal verification. This paper proposes an automatic algorithm programming model based on the improved Morgan's refinement calculus. It extends the Morgan's refinement calculus rules and designs the C++ generation system for realizing the complete process of refinement. Meanwhile, the automation tools VCG (Verification Condition Generator) and Isabelle are used to improve the automation of formal verification. An example of a stock's maximum income demonstrates the effectiveness of the proposed model. Furthermore, the proposed model has some relevance for automatic software generation.
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Kuzmin, E. V., and V. A. Sokolov. "On Construction and Verification of PLC-Programs." Modeling and Analysis of Information Systems 19, no. 4 (February 28, 2015): 25–36. http://dx.doi.org/10.18255/1818-1015-2012-4-25-36.

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We review some methods and approaches to programming discrete problems for Programmable Logic Controllers on the example of constructing PLC-programs for controling a code lock. For these approaches we evaluate the usability of the model checking method for the analysis of program correctness with respect to the automatic verification tool Cadence SMV. Some possible PLC-program vulnerabilities arising at a number approaches to programming of PLC are revealed.

Dissertations / Theses on the topic "Model and Program Verification":

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Beyene, Tewodros Awgichew. "Constraint-based verification of imperative programs." Master's thesis, Faculdade de Ciências e Tecnologia, 2011. http://hdl.handle.net/10362/7965.

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work presented in the context of the European Master’s program in Computational Logic, as the partial requirement for obtaining Master of Science degree in Computational Logic
The continuous reduction in the cost of computing ever since the first days of computers has resulted in the ubiquity of computing systems today; there is no any sphere of life in the daily routine of human beings that is not directly or indirectly influenced by computer systems anymore. But this high reliance on computers has not come without a risk to the society or a challenge to computer scientists. As many computer systems of today are safety critical, it is crucial for computer scientists to make sure that computer systems, both the hardware and software components, behave correctly under all circumstances. In this study, we are interested in techniques of program verification that are aimed at ensuring the correctness of the software component. In this work, constraint programming techniques are used to device a program verification framework where constraint solvers play the role of typical verification tools. The programs considered are written in some subset of Java, and their specifications are written in some subset of Java Modeling Language(JML). In our framework, the program verification process has two principal steps: constraint generation and constraint solving. A program together with its specification is first parsed into a system of constraints. And then, the system of constraints is processed using constraint solvers so that the correctness of the original program is proved to hold, or not, based on the outcome of the constraint solving. The performance of our framework is compared with other well-known program verification tools using standard benchmarks, and our framework has performed quite well for most of the cases.
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Kaiser, Alexander. "Monotonicity in shared-memory program verification." Thesis, University of Oxford, 2013. http://ora.ox.ac.uk/objects/uuid:1d16b4b5-524a-40db-b7bf-062374f8679c.

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Predicate abstraction is a key enabling technology for applying model checkers to programs written in mainstream languages. It has been used very successfully for debugging sequential system-level C code. Although model checking was originally designed for analysing concurrent systems, there is little evidence of fruitful applications of predicate abstraction to shared-variable concurrent software. The goal of the present thesis is to close this gap. We propose an algorithmic solution implementing predicate abstraction that targets safety properties in non-recursive programs executed by an unbounded number of threads, which communicate via shared memory or higher-level mechanisms, such as mutexes and broadcasts. As system-level code makes frequent use of such primitives, their correct usage is critical to ensure reliability. Monotonicity - the property that thread actions remain executable when other threads are added to the current global state - is a natural and common feature of human-written concurrent software. It is also useful: if every thread’s memory is finite, monotonicity often guarantees the decidability of safety properties even when the number of running threads is unspecified. In this thesis, we show that the process of obtaining finite-data thread abstrac tions for model checking is not always compatible with monotonicity. Predicate-abstracting certain mainstream asynchronous software such as the ticket busy-wait lock algorithm results in non-monotone multi-threaded Boolean programs, despite the monotonicity of the input program: the monotonicity is lost in the abstraction. As a result, the unbounded thread Boolean programs do not give rise to well quasi-ordered systems [1], for which sound and complete safety checking algorithms are available. In fact, safety checking turns out to be undecidable for the obtained class of abstract programs, despite the finiteness of the individual threads’ state spaces. Our solution is to restore the monotonicity in the abstract program, using an inexpensive closure operator that precisely preserves all safety properties from the (non-monotone) abstract program without the closure. As a second contribution, we present a novel, sound and complete, yet empirically much improved algorithm for verifying abstractions, applicable to general well quasi-ordered systems. Our approach is to gradually widen the set of safety queries during the search by program states that involve fewer threads and are thus easier to decide, and are likely to finalise the decision on earlier queries. To counter the negative impact of "bad guesses", i.e. program states that turn out feasible, the search is supported by a parallel engine that generates such states; these are never selected for widening. We present an implementation of our techniques and extensive experiments on multi-threaded C programs, including device driver code from FreeBSD and Solaris. The experiments demonstrate that by exploiting monotonicity, model checking techniques - enabled by predicate abstraction - scale to realistic programs even of a few thousands of multi-threaded C code lines.
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Bezuidenhout, Johannes Abraham. "Automated program generation : bridging the gap between model and implementation." Thesis, Stellenbosch : Stellenbosch University, 2012. http://hdl.handle.net/10019.1/19584.

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Thesis (MSc)--University of Stellenbosch, 2007.
ENGLISH ABSTRACT: The general goal of this thesis is the investigation of a technique that allows model checking to be directly integrated into the software development process, preserving the benefits of model checking while addressing some of its limitations. A technique was developed that allows a complete executable implementation to be generated from an enhanced model specification. This included the development of a program, the Generator, that completely automates the generation process. In addition, it is illustrated how structuring the specification as a transitions system formally separates the control flow from the details of manipulating data. This simplifies the verification process which is focused on checking control flow in detail. By combining this structuring approach with automated implementation generation we ensure that the verified system behaviour is preserved in the actual implementation. An additional benefit is that data manipulation, which is generally not suited to model checking, is restricted to separate, independent code fragments that can be verified using verification techniques for sequential programs. These data manipulation code segments can also be optimised for the implementation without affecting the verification of the control structure. This technique was used to develop a reactive system, an FTP server, and this experiment illustrated that efficient code can be automatically generated while preserving the benefits of model checking.
AFRIKAANSE OPSOMMING: Hierdie tesis ondersoek ’n tegniek wat modeltoetsing laat deel uitmaak van die sagtewareontwikkelingsproses, en sodoende betroubaarheid verbeter terwyl sekere tekorkominge van die tradisionele modeltoetsing proses aangespreek word. Die tegniek wat ontwikkel is maak dit moontlik om ’n volledige uitvoerbare implementasie vanaf ’n gespesialiseerde model spesifikasie te genereer. Om die implementasie-generasie stap ten volle te outomatiseer is ’n program, die Generator, ontwikkel. Daarby word dit ook gewys hoe die kontrolevloei op ’n formele manier geskei kan word van data-manipulasie deur gebruik te maak van ’n staatoorgangsstelsel struktureringsbenadering. Dit vereenvoudig die verifikasie proses, wat fokus op kontrolevloei. Deur di´e struktureringsbenadering te kombineer met outomatiese implementasie-generasie, word verseker dat die geverifieerde stelsel se gedrag behou word in die finale implementasie. ’n Bykomende voordeel is dat data-manipulasie, wat gewoonlik nie geskik is vir modeltoetsing nie, beperk word tot aparte, onafhanklike kode segmente wat geverifieer kan word deur gebruik te maak van verifikasie tegnieke vir sekwensi¨eele programme. Hierdie data-manipulasie kode segmente kan ook geoptimeer word vir die implementasie sonder om die verifikasie van die kontrole struktuur te be¨ınvloed. Hierdie tegniek word gebruik om ’n reaktiewe stelsel, ’n FTP bediener, te ontwikkel, en di´e eksperiment wys dat doeltreffende kode outomaties gegenereer kan word terwyl die voordele van modeltoetsing behou word.
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Wardana, Awang Noor Indra. "Development of automatic program verification for continuous function chart based on model checking /." Kassel : Kassel Univ. Press, 2009. http://d-nb.info/998980234/04.

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de, Carvalho Gomes Pedro. "Automatic Extraction of Program Models for Formal Software Verification." Doctoral thesis, KTH, Teoretisk datalogi, TCS, 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-176286.

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In this thesis we present a study of the generation of abstract program models from programs in real-world programming languages that are employed in the formal verification of software. The thesis is divided into three parts, which cover distinct types of software systems, programming languages, verification scenarios, program models and properties.The first part presents an algorithm for the extraction of control flow graphs from sequential Java bytecode programs. The graphs are tailored for a compositional technique for the verification of temporal control flow safety properties. We prove that the extracted models soundly over-approximate the program behaviour w.r.t. sequences of method invocations and exceptions. Therefore, the properties that are established with the compositional technique over the control flow graphs also hold for the programs. We implement the algorithm as ConFlEx, and evaluate the tool on a number of test cases.The second part presents a technique to generate program models from incomplete software systems, i.e., programs where the implementation of at least one of the components is not available. We first define a framework to represent incomplete Java bytecode programs, and extend the algorithm presented in the first part to handle missing code. Then, we introduce refinement rules, i.e., conditions for instantiating the missing code, and prove that the rules preserve properties established over control flow graphs extracted from incomplete programs. We have extended ConFlEx to support the new definitions, and re-evaluate the tool, now over test cases of incomplete programs.The third part addresses the verification of multithreaded programs. We present a technique to prove the following property of synchronization with condition variables: "If every thread synchronizing under the same condition variables eventually enters its synchronization block, then every thread will eventually exit the synchronization". To support the verification, we first propose SyncTask, a simple intermediate language for specifying synchronized parallel computations. Then, we propose an annotation language for Java programs to assist the automatic extraction of SyncTask programs, and show that, for correctly annotated programs, the above-mentioned property holds if and only if the corresponding SyncTask program terminates. We reduce the termination problem into a reachability problem on Coloured Petri Nets. We define an algorithm to extract nets from SyncTask programs, and show that a program terminates if and only if its corresponding net always reaches a particular set of dead configurations. The extraction of SyncTask programs and their translation into Petri nets is implemented as the STaVe tool. We evaluate the technique by feeding annotated Java programs to STaVe, then verifying the extracted nets with a standard Coloured Petri Net analysis tool
Den här avhandlingen studerar automatisk konstruktion av abstrakta modeller för formell verifikation av program skrivna i verkliga programmeringsspråk. Avhandlingen består av tre delar som involverar olika typer av program, programmeringsspråk, verifikationsscenarier, programmodeller och egenskaper.Del ett presenterar en algoritm för generation av flödesgrafer från sekventiella program i Java bytekod. Graferna är skräddarsydda för en kompositionell teknik för verifikationen av temporala kontrollflödens säkerhetsegenskaper. Vi visar att de extraherade modellerna sunt överapproximerar programbeteenden med avseende på sekvenser av metodanrop och -undantag. Således gäller egenskaperna som kan fastställas genom kompositionstekniken över kontrollflöden även för programmen. Vi implementerar dessutom algoritmen i form av verktyget ConFlEx och utvärderar verktyget på ett antal testfall.Del två presenterar en teknik för att generera modeller av ofullständiga program. Det vill säga, program där implementationen av åtminstone en komponent inte är tillgänglig. Vi definierar ett ramverk för att representera ofullständiga Java bytekodsprogram och utökar algoritmen från del ett till att hantera ofullständig kod.  Därefter presenterar vi raffineringsregler - villkor för att instansiera den saknade koden - och bevisar att reglerna bevarar relevanta egenskaper av kontrollflödesgrafer. Vi har dessutom utökat ConFlEx till att stödja de nya definitionerna och har omvärderat verktyget på testfall av ofullständiga program.Del tre angriper verifikation av multitrådade program. Vi presenterar en teknik för att bevisa följande egenskap för synkronisering med vilkorsvariabler: "Om varje trådsynkronisering under samma villkor så småningom stiger in i sitt synkroniseringsblock så kommer varje tråd också till slut lämna synkroniseringen". För att stödja verifikationen så introducerar vi först SyncTask - ett enkelt mellanliggande språk för att specificera synkronisering av parallella beräkningar. Därefter presenterar vi ett annoteringsspråk för Java som tillåter automatisk extrahering av SyncTask-program och visar att egenskapen gäller om och endast om motsvarande SyncTask-program terminerar. Vi reducerar termineringsproblemet till ett nåbarhetsproblem på färgade Petrinät samt definierar en algoritm som skapar Petrinät från SyncTask-program där programmet terminerar om och endast om nätet alltid når en särskild mängd av döda konfigurationer. Extraktionen av SyncTask-program och deras motsvarande Petrinät är implementerade i form av verktyget STaVe.  Slutligen utvärderar vi verktyget genom att mata annoterade.

QC 20151101

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He, Nannan. "Exploring Abstraction Techniques for Scalable Bit-Precise Verification of Embedded Software." Diss., Virginia Tech, 2009. http://hdl.handle.net/10919/27683.

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Conventional testing has become inadequate to satisfy rigorous reliability requirements of embedded software that is playing an increasingly important role in many safety critical applications. Automatic formal verification is a viable avenue for ensuring the reliability of such software. Recently, more and more formal verification techniques have begun modeling a non-Boolean data variable as a bit-vector with bounded width (i.e. a vector of multiple bits like 32- or 64- bits) to implement bit-precise verification. One major challenge in the scalable application of such bit-precise verification on real-world embedded software is that the state space for verification can be intractably large. In this dissertation, several abstraction techniques are explored to deal with this scalability challenge in the bit-precise verification of embedded software. First, we propose a tight integration of program slicing, which is an important static program analysis technique, with bounded model checking (BMC). While many software verification tools apply program slicing as a separate preprocessing step, we integrate slicing operations into our model construction and reduction process and enhance them with compilation optimization techniques to compute accurate program slices. We also apply a proof-based abstraction-refinement framework to further remove those program segments irrelevant to the property being verified. Next, we present a method of using symbolic simulation for scalable formal verification. The simulation involves distinguishing X as symbolic values to abstract concrete variablesâ values. Also, the method embeds this symbolic simulation in a counterexample-guided abstraction-refinement framework to automatically construct and verify an abstract model, which has a smaller state space than that of the original concrete program. This dissertation also presents our efforts on using two common testability metrics â controllability metric (CM) and observability metric (OM) â as the high-level structural guidance for scalable bit-precise verification. A new abstraction approach is proposed based on the concept of under- and over-approximation to efficiently solve bit-vector formulas generated from embedded software verification instances. These instances include both complicated arithmetic computations and intensive control structures. Our approach applies CM and OM to assist the abstraction refinement procedure in two ways: (1) it uses CM and OM to guide the construction of a simple under-approximate model, which includes only a subset of execution paths in a verification instance, so that a counterexample that refutes the instance can be obtained with reduced effort, and (2) in order to reduce the cost of using proof-based refinement alone, it uses OM heuristics to guide the restoration of additional verification-relevant formula constraints with low computational cost for refinement. Experiments show a significant reduction of the solving time compared to state-of-the-art solvers for the bit-vector arithmetic. This dissertation finally proposes an efficient algorithm to discover non-uniform encoding widths of individual variables in the verification model, which may be smaller than their original modeling width but sufficient for the verification. Our algorithm distinguishes itself from existing approaches in that it is path-oriented; it takes advantage of CM and OM values to guide the computation of the initial, non-uniform encoding widths, and the effective adjustment of these widths along different paths, until the property is verified. It can restrict the search from those paths that are deemed less favorable or have been searched in previous steps, thus simplifying the problem. Experiments demonstrate that our algorithm can significantly speed up the verification especially in searching for a counterexample that violates the property under verification.
Ph. D.
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Mahtab, Tazeen 1981. "Automated verification of model-based programs under uncertainty." Thesis, Massachusetts Institute of Technology, 2004. http://hdl.handle.net/1721.1/28453.

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Thesis (M. Eng. and S.B.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2004.
Includes bibliographical references (p. 89-91).
Highly robust embedded systems have been enabled through software executives that have the ability to reason about their environment. Those that employ the model-based autonomy paradigm automatically diagnose and plan future actions, based on models of themselves and their environment. This includes autonomous systems that must operate in harsh and dynamic environments, like, deep space. Such systems must be robust to a large space of possible failure scenarios. This large state space poses difficulties for traditional scenario-based testing, leading to a need for new approaches to verification and validation. We propose a novel verification approach that generates an analysis of the most likely failure scenarios for a model-based program. By finding only the lost likely failures, we increase the relevance and reduce the quantity of information the developer must examine. First, we provide the ability to verify a stochastic system that encodes both off-nominal and nominal scenarios. We incorporate uncertainty into the verification process by acknowledging that all such programs may fail, but in different ways, with different likelihoods. The verification process is one of finding the most likely executions that fail the specification. Second, we provide a capability for verifying executable specifications that are fault-aware. We generalize offline plant model verification to the verification of model-based programs, which consist of both a plant model that captures the physical plant's nominal and off-nominal states and a control program that specifies its desired behavior. Third, we verify these specifications through execution of the RMPL executive itself. We therefore circumvent the difficulty of formalizing the behavior of complex
(cont.) software executives. We present the RMPL Verifier, a tool for verification of model-based programs written in the Reactive Model-based Programming Language (RMPL) for the Titan execution kernel. Using greedy forward-directed search, this tool finds as counterexamples to the program's goal specification the most likely executions that do not achieve the goal within a given time bound.
by Tazeen Mahtab.
M.Eng.and S.B.
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Newcomb, Tom C. "Model checking data-independent systems with arrays." Thesis, University of Oxford, 2003. http://ora.ox.ac.uk/objects/uuid:7fc75da9-e653-4578-b061-8a1cc30ba609.

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We say a program is data-independent with respect to a data type X if the operations it can perform on values of type X are restricted to just equality testing, although the system may also input, store and move around (via assignment) values of type X within its variables. This property can be exploited to give procedures for the automatic verification, called model checking, of such programs independently of the instance for the type X. This thesis considers data-independent programs with arrays, which are useful for modelling memory systems such as cache protocols. The main question of interest is the following parameterised model-checking problem: whether a program satisfies its specification for all non-empty finite instances of its types. In order to obtain these results, we present a UNITY-like programming language with arrays that is suited to the study of decidability of various modelchecking problems, whilst being useful for prototyping memory systems such as caches. Its semantics are given in terms of transition systems, and we use the modal μ-calculus, a branching-time temporal logic with recursion, as our specification language. We describe a model-checking procedure for programs that use arrays indexed by one data-independent type X and storing values from another Y. This allows us to prove properties about parameterised systems: for example, that memory systems can be verified independently of memory size and data values. This decidability result is shown to extend to data-independent programs with many types and multidimensional arrays which are acyclic, meaning it is not possible to form loops of types in the 'indexed by' relation. Conversely, it is shown that even reachability model-checking problems are undecidable for classes of programs that allow cyclic-array programs. We give practical motivation for these decidability results by demonstrating how one could verify a fault-tolerant interface on a set of unreliable memories, and the cache protocol in the Pentium Pro processor. Significantly, the verifications are performed independently of many of these systems' parameters. These case studies suggest two extensions to the language: an array reset instruction, which sets every element of an array to a particular value, and an array assignment or copy instruction. Both are shown to restrict decidability of model checking problems; however we can obtain some interesting decidability results for arrays with reset by restricting the number of arrays to just one, or by allowing the arrays only to store fixed finite types, such as the booleans.
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Rezine, Othmane. "Verification of networks of communicating processes : Reachability problems and decidability issues." Doctoral thesis, Uppsala universitet, Avdelningen för datorteknik, 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-334788.

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Computer systems are used in almost all aspects of our lives and our dependency on them keeps on increasing. When computer systems are used to handle critical tasks, any software failure can cause severe human and/or material losses. Therefore, for such applications, it is important to detect software errors at an early stage of software development. Furthermore, the growing use of concurrent and distributed programs exponentially increases the complexity of computer systems, making the problem of detecting software errors even harder (if not impossible). This calls for defining systematic and efficient techniques to evaluate the safety and the correctness of programs. The aim of Model-Checking is to analyze automatically whether a given program satisfies its specification. Early applications of Model-Checking were restricted to systems whose behaviors can be captured by finite graphs, so called finite-state systems. Since many computer systems cannot be modeled as finite-state machines, there has been a growing interest in extending the applicability of Model-Checking to infinite-state systems. The goal of this thesis is to extend the applicability of Model Checking for three instances of infinite-state systems: Ad-Hoc Networks, Dynamic Register Automata and Multi Pushdown Systems. Each one of these instances models challenging types of networks of communicating processes. In both Ad-Hoc Networks and Dynamic Register Automata, communication is carried through message passing. In each type of network, a graph topology models the communication links between processes in the network. The graph topology is static in the case of Ad-Hoc Networks while it is dynamic in the case of Dynamic Register Automata. The number of processes in both types of networks is unbounded. Finally, we consider Multi Pushdown Systems, a model used to study the behaviors of concurrent programs composed of sequential recursive sequential programs communicating through a shared memory.
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de, Carvalho Gomes Pedro. "Sound Modular Extraction of Control Flow Graphs from Java Bytecode." Licentiate thesis, KTH, Teoretisk datalogi, TCS, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-105275.

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Control flow graphs (CFGs) are abstract program models that preserve the control flow information. They have been widely utilized for many static analyses in the past decades. Unfortunately, previous studies about the CFG construction from modern languages, such as Java, have either neglected advanced features that influence the control flow, or do not provide a correctness argument. This is a bearable issue for some program analyses, but not for formal methods, where the soundness of CFGs is a mandatory condition for the verification of safety-critical properties. Moreover, when developing open systems, i.e., systems in which at least one component is missing, one may want to extract CFGs to verify the available components. Soundness is even harder to achieve in this scenario, because of the unknown inter-dependencies involving missing components. In this work we present two variants of a CFG extraction algorithm from Java bytecode considering precise exceptional flow, which are sound w.r.t to the JVM behavior. The first algorithm extracts CFGs from fully-provided (closed) programs only. It proceeds in two phases. Initially the Java bytecode is translated into a stack-less intermediate representation named BIR, which provides explicit representation of exceptions, and is more compact than the original bytecode. Next, we define the transformation from BIR to CFGs, which, among other features, considers the propagation of uncaught exceptions within method calls. We then establish its correctness: the behavior of the extracted CFGs is shown to be a sound over-approximation of the behavior of the original programs. Thus, temporal safety properties that hold for the CFGs also hold for the program. We prove this by suitably combining the properties of the two transformations with those of a previous idealized CFG extraction algorithm, whose correctness has been proven directly. The second variant of the algorithm is defined for open systems. We generalize the extraction algorithm for closed systems for a modular set-up, and resolve inter-dependencies involving missing components by using user-provided interfaces. We establish its correctness by defining a refinement relation between open systems, which constrains the instantiation of missing components. We prove that if the relation holds, then the CFGs extracted from the components of the original open system are sound over-approximations of the CFGs for the same components in the refined system. Thus, temporal safety properties that hold for an open system also hold for closed systems that refine it. We have implemented both algorithms as the ConFlEx tool. It uses Sawja, an external library for the static analysis of Java bytecode, to transform bytecode into BIR, and to resolve virtual method calls. We have extended Sawja to support open systems, and improved its exception type analysis. Experimental results have shown that the algorithm for closed systems generates more precise CFGs than the modular algorithm. This was expected, due to the heavy over-approximations the latter has to perform to be sound. Also, both algorithms are linear in the number of bytecode instructions. Therefore, ConFlEx is efficient for the extraction of CFGs from either open, or closed Java bytecode programs.

QC 20121122

Books on the topic "Model and Program Verification":

1

Dampier, David A. A model for merging software prototypes. Monterey, Calif: Naval Postgraduate School, 1992.

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George, Sabolish, and United States. National Aeronautics and Space Administration., eds. A process improvement model for software verification and validation. [Morgantown, West Va.]: West Virginia University, 1994.

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Larsen, Gunner C. Verification of Design Basis Program 2: A coupled aeroelastic wind turbine model. Roskilde, Denmark: Risø National Laboratory, 1994.

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Wang, Jong-Rong. The development and verification of TRACE model for IIST experiments. Washington, DC: Office of Nuclear Regulatory Research, U.S. Nuclear Regulatory Commission, 2011.

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VMCAI 2004 (Conference) (2004 Venice, Italy). Verification, model checking, and abstract interpretation: 5th International Conference, VMCAI 2004, Venice, Italy, January 11-13, 2004 : proceedings. Berlin: Springer, 2004.

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VMCAI 2008 (2008 San Francisco, Calif.). Verification, model checking, and abstract interpretation: 9th international conference, VMCAI 2008, San Francisco, USA, January 7-9, 2008 : proceedings. Berlin: Springer, 2008.

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Center, Langley Research, ed. A verification procedure for MSC/NASTRAN finite element models. Hampton, Va: National Aeronautics and Space Administration, Langley Research Center, 1995.

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VMCAI 2002 (2002 Venice, Italy). Verification, model checking, and abstract interpretation: Third international workshop, VMCAI 2002, Venice, Italy, January 21-22, 2002 : revised papers. Berlin: Springer, 2002.

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Roever, W. P. de. Data refinement: Model-oriented proof methods and their comparison. Cambridge: Cambridge University Press, 2009.

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VMCAI 2005 (2005 Paris, France). Verification, model checking, and abstract interpretation: 6th international conference, VMCAI 2005, Paris, France, January 17-19, 2005 : proceedings. Berlin: Springer, 2005.

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Book chapters on the topic "Model and Program Verification":

1

Iosif, Radu. "Program Verification with Separation Logic." In Model Checking Software, 48–62. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-94111-0_3.

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Jhala, Ranjit, Andreas Podelski, and Andrey Rybalchenko. "Predicate Abstraction for Program Verification." In Handbook of Model Checking, 447–91. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-10575-8_15.

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Wu, Wenhao, Jan Hückelheim, Paul D. Hovland, Ziqing Luo, and Stephen F. Siegel. "Model Checking Race-Freedom When “Sequential Consistency for Data-Race-Free Programs” is Guaranteed." In Computer Aided Verification, 265–87. Cham: Springer Nature Switzerland, 2023. http://dx.doi.org/10.1007/978-3-031-37703-7_13.

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AbstractMany parallel programming models guarantee that if all sequentially consistent (SC) executions of a program are free of data races, then all executions of the program will appear to be sequentially consistent. This greatly simplifies reasoning about the program, but leaves open the question of how to verify that all SC executions are race-free. In this paper, we show that with a few simple modifications, model checking can be an effective tool for verifying race-freedom. We explore this technique on a suite of C programs parallelized with OpenMP.
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Chatterjee, Prantik, Jaydeepsinh Meda, Akash Lal, and Subhajit Roy. "Proof-Guided Underapproximation Widening for Bounded Model Checking." In Computer Aided Verification, 304–24. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-13185-1_15.

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AbstractBounded Model Checking (BMC) is a popularly used strategy for program verification and it has been explored extensively over the past decade. Despite such a long history, BMC still faces scalability challenges as programs continue to grow larger and more complex. One approach that has proven to be effective in verifying large programs is called Counterexample Guided Abstraction Refinement (CEGAR). In this work, we propose a complementary approach to CEGAR for bounded model checking of sequential programs: in contrast to CEGAR, our algorithm gradually widens underapproximations of a program, guided by the proofs of unsatisfiability. We implemented our ideas in a tool called Legion. We compare the performance of Legion against that of Corral, a state-of-the-art verifier from Microsoft, that utilizes the CEGAR strategy. We conduct our experiments on 727 Windows and Linux device driver benchmarks. We find that Legion is able to solve 12% more instances than Corral and that Legion exhibits a complementary behavior to that of Corral. Motivated by this, we also build a portfolio verifier, $$\textsc {Legion}^{+}$$ L E G I O N + , that attempts to draw the best of Legion and Corral. Our portfolio, $$\textsc {Legion}^{+}$$ L E G I O N + , solves 15% more benchmarks than Corral with similar computational resource constraints (i.e. each verifier in the portfolio is run with a time budget that is half of the time budget of Corral). Moreover, it is found to be $$2.9\times $$ 2.9 × faster than Corral on benchmarks that are solved by both Corral and $$\textsc {Legion}^{+}$$ L E G I O N + .
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Gurfinkel, Arie. "Program Verification with Constrained Horn Clauses (Invited Paper)." In Computer Aided Verification, 19–29. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-13185-1_2.

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AbstractMany problems in program verification, Model Checking, and type inference are naturally expressed as satisfiability of a verification condition expressed in a fragment of First-Order Logic called Constrained Horn Clauses (CHC). This transforms program analysis and verification tasks to the realm of first order satisfiability and into the realm of SMT solvers. In this paper, we give a brief overview of how CHCs capture verification problems for sequential imperative programs, and discuss CHC solving algorithm underlying the Spacer engine of SMT-solver Z3.
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Andriushchenko, Roman, Milan Češka, Sebastian Junges, Joost-Pieter Katoen, and Šimon Stupinský. "PAYNT: A Tool for Inductive Synthesis of Probabilistic Programs." In Computer Aided Verification, 856–69. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-81685-8_40.

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AbstractThis paper presents PAYNT, a tool to automatically synthesise probabilistic programs. PAYNT enables the synthesis of finite-state probabilistic programs from a program sketch representing a finite family of program candidates. A tight interaction between inductive oracle-guided methods with state-of-the-art probabilistic model checking is at the heart of PAYNT. These oracle-guided methods effectively reason about all possible candidates and synthesise programs that meet a given specification formulated as a conjunction of temporal logic constraints and possibly including an optimising objective. We demonstrate the performance and usefulness of PAYNT using several case studies from different application domains; e.g., we find the optimal randomized protocol for network stabilisation among 3M potential programs within minutes, whereas alternative approaches would need days to do so.
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Amilon, Jesper, Zafer Esen, Dilian Gurov, Christian Lidström, and Philipp Rümmer. "Automatic Program Instrumentation for Automatic Verification." In Computer Aided Verification, 281–304. Cham: Springer Nature Switzerland, 2023. http://dx.doi.org/10.1007/978-3-031-37709-9_14.

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AbstractIn deductive verification and software model checking, dealing with certain specification language constructs can be problematic when the back-end solver is not sufficiently powerful or lacks the required theories. One way to deal with this is to transform, for verification purposes, the program to an equivalent one not using the problematic constructs, and to reason about its correctness instead. In this paper, we propose instrumentation as a unifying verification paradigm that subsumes various existing ad-hoc approaches, has a clear formal correctness criterion, can be applied automatically, and can transfer back witnesses and counterexamples. We illustrate our approach on the automated verification of programs that involve quantification and aggregation operations over arrays, such as the maximum value or sum of the elements in a given segment of the array, which are known to be difficult to reason about automatically. We implement our approach in the MonoCera tool, which is tailored to the verification of programs with aggregation, and evaluate it on example programs, including SV-COMP programs.
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Chien, Po-Chun, and Nian-Ze Lee. "CPV: A Circuit-Based Program Verifier." In Tools and Algorithms for the Construction and Analysis of Systems, 365–70. Cham: Springer Nature Switzerland, 2024. http://dx.doi.org/10.1007/978-3-031-57256-2_22.

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AbstractWe submit to SV-COMP 2024 CPV, a circuit-based software verifier for C programs. CPV utilizes sequential circuits as its intermediate representation and invokes hardware model checkers to analyze the reachability safety of C programs. As the frontend, it uses Kratos2, a recently proposed verification tool, to translate a C program to a sequential circuit. As the backend, state-of-the-art hardware model checkers ABC and AVR are employed to verify the translated circuits. We configure the hardware model checkers to run various analyses, including IC3/PDR, interpolation-based model checking, and $$k$$ k -induction. Information discovered by hardware model checkers is represented as verification witnesses. In the competition, CPV achieved comparable performance against participants whose intermediate representations are based on control-flow graphs. In the category ReachSafety, it outperformed several mature software verifiers as a first-year participant. CPV manifests the feasibility of sequential circuits as an alternative intermediate representation for program analysis and enables head-to-head algorithmic comparison between hardware and software verification.
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Shankar, N. "Machine-Assisted Verification Using Theorem Proving and Model Checking." In Mathematical Methods in Program Development, 499–528. Berlin, Heidelberg: Springer Berlin Heidelberg, 1997. http://dx.doi.org/10.1007/978-3-642-60858-2_26.

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Huisman, Marieke, Irem Aktug, and Dilian Gurov. "Program Models for Compositional Verification." In Formal Methods and Software Engineering, 147–66. Berlin, Heidelberg: Springer Berlin Heidelberg, 2008. http://dx.doi.org/10.1007/978-3-540-88194-0_11.

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Conference papers on the topic "Model and Program Verification":

1

Lathouwers, Sophie, and Vadim Zaytsev. "Modelling program verification tools for software engineers." In MODELS '22: ACM/IEEE 25th International Conference on Model Driven Engineering Languages and Systems. New York, NY, USA: ACM, 2022. http://dx.doi.org/10.1145/3550355.3552426.

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"Program Committee." In 2010 Workshop on Model-Driven Engineering, Verification, and Validation (MoDeVVa). IEEE, 2010. http://dx.doi.org/10.1109/modevva.2010.8.

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Owe, Olaf, Jia-Chun Lin, and Elahe Fazeldehkordi. "A Flexible Framework for Program Evolution and Verification." In 7th International Conference on Model-Driven Engineering and Software Development. SCITEPRESS - Science and Technology Publications, 2019. http://dx.doi.org/10.5220/0007690301770189.

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Owe, Olaf, Jia-Chun Lin, and Elahe Fazeldehkordi. "A Flexible Framework for Program Evolution and Verification." In 7th International Conference on Model-Driven Engineering and Software Development. SCITEPRESS - Science and Technology Publications, 2019. http://dx.doi.org/10.5220/0007690301790191.

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Sun, Liang, Bailin Lu, Liangze Yin, Zhe Bu, and Wenjing Jin. "OpenMP Program Verification Based on Bounded Model Checking." In 2023 IEEE 23rd International Conference on Software Quality, Reliability, and Security Companion (QRS-C). IEEE, 2023. http://dx.doi.org/10.1109/qrs-c60940.2023.00107.

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Even-Mendoza, Karine, Antti E. J. Hyvärinen, Hana Chockler, and Natasha Sharygina. "Lattice-based SMT for program verification." In MEMOCODE '19: 17th ACM-IEEE International Conference on Formal Methods and Models for System Design. New York, NY, USA: ACM, 2019. http://dx.doi.org/10.1145/3359986.3361214.

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Kamkin, Alexander, Eugene Kornykhin, and Dmitry Vorobyev. "Reconfigurable Model-Based Test Program Generator for Microprocessors." In 2011 IEEE Fourth International Conference on Software Testing, Verification and Validation Workshops (ICSTW). IEEE, 2011. http://dx.doi.org/10.1109/icstw.2011.35.

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Liu, Haihao, Shuangquan Chen, Jianxin Wei, and Xiang-Yang Li. "Experimental verification of frequency-dependent characteristics in a physical model with horizontal fractures." In SEG Technical Program Expanded Abstracts 2017. Society of Exploration Geophysicists, 2017. http://dx.doi.org/10.1190/segam2017-17731876.1.

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Wardana, Awang N. I., Jens Folmer, and Birgit Vogel-Heuser. "Automatic program verification of continuous function chart based on model checking." In IECON 2009 - 35th Annual Conference of IEEE Industrial Electronics (IECON). IEEE, 2009. http://dx.doi.org/10.1109/iecon.2009.5415231.

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Eshraghi, Shaun, Michael Carolan, Benjamin Perlman, and Francisco González. "Comparison of Methodologies for Finite Element Model Validation of Railroad Tank Car Side Impact Tests." In ASME 2020 Verification and Validation Symposium. American Society of Mechanical Engineers, 2020. http://dx.doi.org/10.1115/vvs2020-8822.

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Abstract The U.S. Department of Transportation’s Federal Railroad Administration (FRA) has sponsored a series of full-scale dynamic shell impact tests on railroad tank cars. For each shell impact test a pre-test finite element (FE) model is created to predict the overall force-time or force-displacement histories of the impactor, puncture/non-puncture outcomes of the impacted tank shell, global motions of the tank car, internal pressures within the tank, and the energy absorbed by the tank during the impact. While qualitative comparisons (e.g. the shapes of the indentation) and quantitative comparisons (e.g. peak impact forces) have been made between tests and simulations, there are currently no standards or guidelines on how to compare the simulation results with the test results, or what measurable level of agreement would be an acceptable demonstration of model validation. It is desirable that a framework for model validation, including well-defined criteria for comparison, be developed or adopted if FE analysis is to be used without companion full-scale shell impact testing for future tank car development. One of the challenges to developing model validation criteria and procedures for tank car shell puncture is the number of complex behaviors encountered in this problem, and the variety of approaches that could be used in simulating these behaviors. The FE models used to simulate tank car shell impacts include several complex behaviors, which increase the level of uncertainty in simulation results, including dynamic impacts, non-linear steel material behavior, two-phase (water and air) fluid-structure interaction, and contact between rigid and deformable bodies. Approaches to model validation employed in other areas of transportation where validation procedures have been documented are applied to railroad tank car dynamic shell impact FE simulation results. This work compares and contrasts two model validation programs: Roadside Safety Verification and Validation Program (RSVVP) and Correlation and Analysis Plus (CORA). RSVVP and CORA are used to apply validation metrics and ratings specified by the National Cooperative Highway Research Program Project 22-24 (NCHRP 22-24) and ISO/TS 18571:2014 respectively. The validation methods are applied to recently-completed shell impact tests on two different types of railroad tank cars sponsored by the FRA. Additionally, this paper includes discussion on model validation difficulties unique to dynamic impacts involving puncture.

Reports on the topic "Model and Program Verification":

1

Baader, Franz, and Benjamin Zarrieß. Verification of Golog Programs over Description Logic Actions. Technische Universität Dresden, 2013. http://dx.doi.org/10.25368/2022.198.

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High-level action programming languages such as Golog have successfully been used to model the behavior of autonomous agents. In addition to a logic-based action formalism for describing the environment and the effects of basic actions, they enable the construction of complex actions using typical programming language constructs. To ensure that the execution of such complex actions leads to the desired behavior of the agent, one needs to specify the required properties in a formal way, and then verify that these requirements are met by any execution of the program. Due to the expressiveness of the action formalism underlying Golog (situation calculus), the verification problem for Golog programs is in general undecidable. Action formalisms based on Description Logic (DL) try to achieve decidability of inference problems such as the projection problem by restricting the expressiveness of the underlying base logic. However, until now these formalisms have not been used within Golog programs. In the present paper, we introduce a variant of Golog where basic actions are defined using such a DL-based formalism, and show that the verification problem for such programs is decidable. This improves on our previous work on verifying properties of infinite sequences of DL actions in that it considers (finite and infinite) sequences of DL actions that correspond to (terminating and non-terminating) runs of a Golog program rather than just infinite sequences accepted by a Büchi automaton abstracting the program.
2

Weber, Scott, Nathan E. Bixler, and Katherine Letizia McFadden. SecPop Version 4: Sector Population Land Fraction and Economic Estimation Program: Users? Guide Model Manual and Verification Report. Office of Scientific and Technical Information (OSTI), April 2018. http://dx.doi.org/10.2172/1436067.

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Koopmann, Patrick. Actions with Conjunctive Queries: Projection, Conflict Detection and Verification. Technische Universität Dresden, 2018. http://dx.doi.org/10.25368/2022.243.

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Description Logic actions specify adaptations of description logic interpretations based on some preconditions defined using a description logic. We consider DL actions in which preconditions can be specified using DL axioms as well as using conjunctive queries, and combinatiosn thereof. We investigate complexity bounds for the executability and the projection problem for these actions, which respectively ask whether an action can be executed on models of an interpretation, and which entailments are satisfied after an action has been executed on this model. In addition, we consider a set of new reasoning tasks concerned with conflicts and interactions that may arise if two action are executed at the same time. Since these problems have not been investigated before for Description Logic actions, we investigate the complexity of these tasks both for actions with conjunctive queries and without those. Finally, we consider the verification problem for Golog programs formulated over our famility of actions. Our complexity analysis considers several expressive DLs, and we provide tight complexity bounds for those for which the exact complexity of conjunctive query entailment is known.
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Zarrieß, Benjamin, and Patrick Koopmann. On the Complexity of Verifying Timed Golog Programs over Description Logic Actions (Extended Version). Technische Universität Dresden, 2018. http://dx.doi.org/10.25368/2022.241.

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Golog programs allow to model complex behaviour of agents by combining primitive actions defined in a Situation Calculus theory using imperative and non-deterministic programming language constructs. In general, verifying temporal properties of Golog programs is undecidable. One way to establish decidability is to restrict the logic used by the program to a Description Logic (DL), for which recently some complexity upper bounds for verification problem have been established. However, so far it was open whether these results are tight, and lightweight DLs such as EL have not been studied at all. Furthermore, these results only apply to a setting where actions do not consume time, and the properties to be verified only refer to the timeline in a qualitative way. In a lot of applications, this is an unrealistic assumption. In this work, we study the verification problem for timed Golog programs, in which actions can be assigned differing durations, and temporal properties are specified in a metric branching time logic. This allows to annotate temporal properties with time intervals over which they are evaluated, to specify for example that some property should hold for at least n time units, or should become specified within some specified time window. We establish tight complexity bounds of the verification problem for both expressive and lightweight DLs. Our lower bounds already apply to a very limited fragment of the verification problem, and close open complexity bounds for the non-metrical cases studied before.
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Krabill, Eleanor, Vivienne Zhang, Eric Lepowsky, Christoph Wirz, Alexander Glaser, Jaewoo Shin, Veronika Bedenko, and Pavel Podvig. Menzingen Verification Experiment - Verifying the Absence of Nuclear Weapons in the Field. Edited by Pavel Podvig. The United Nations Institute for Disarmament Research, July 2023. http://dx.doi.org/10.37559/wmd/23/mve.

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The Menzingen Verification Experiment described in this report was designed to test practical procedures for verifying the absence of nuclear weapons at a storage site. The experiment, which was conducted on 8 March 2023, was organized by UNIDIR in partnership with the Swiss Armed Forces, Spiez Laboratory, Princeton University’s Program on Science and Global Security, and the Open Nuclear Network. The project was supported by the Governments of the Kingdom of the Netherlands, Norway, and Switzerland. The experiment modelled an on-site inspection of a nuclear weapons storage site, represented by a former air defence site near Menzingen, Switzerland. In preparation for the experiment, UNIDIR developed a model protocol governing the inspection activities. Together with its partners, it designed procedures to confirm the non-nuclear nature of the inspected items, including radiation measurements with active sources, and arranged for the acquisition of satellite imagery of the site. The scenario developed for the experiment assumed that the inspection was conducted as part of an agreement that requires the parties to remove all nuclear weapons from storage sites associated with military bases that host nuclear-capable delivery systems. The inspection procedures used in the experiment were modelled on those developed for the Conventional Forces in Europe Treaty and New START. The Menzingen Verification Experiment demonstrated in practice the viability of the approach to nuclear disarmament based on removing nuclear weapons from their delivery systems. It provided an opportunity to test in practice specific verification procedures and techniques, provided valuable insights into the challenges that can be encountered during an on-site inspection, and identified promising new approaches to verification that can create political space for arms control and disarmament initiatives.
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Schroeder, J. E. Hydraulic fracture model and diagnostics verification at GRI/DOE multi-site projects and tight gas sand program support. Final report, July 28, 1993--February 28, 1997. Office of Scientific and Technical Information (OSTI), December 1997. http://dx.doi.org/10.2172/639755.

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7

Palkovic, Steven, Yasamin Salamat, Brendon Willey, and Simon Bellemare. PR-610-183867-R01 Fracture Toughness via In-ditch Non-destructive Testing - Validation. Chantilly, Virginia: Pipeline Research Council International, Inc. (PRCI), September 2020. http://dx.doi.org/10.55274/r0011802.

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Abstract:
A challenge for many pipeline operators is missing or incomplete records for sections of their transmission pipeline networks, especially regarding fracture toughness properties. These toughness values are necessary for performing fitness for service calculations and engineering critical assessment. New regulations for gas transmission pipelines stipulate conservative default values for applicable assets when traceable, verifiable, and complete (TVC) records are not available. The new rules allow for the use of nondestructive techniques within material verification programs to measure the actual steel properties in lieu of conventional destructive cut-outs. However, the nondestructive technique must be validated, and the measurement must account for error and uncertainty of the nondestructive process. The aim of this research program is to assess the capabilities and limitations of the Nondestructive Toughness Tester (NDTT) to meet the requirements of a material verification process for measuring fracture toughness properties. The NDTT is a new approach for measuring the toughness of steel pipelines through the application of a contact mechanics technique known as frictional sliding. This project consists of testing on 41 vintage steel pipe joints to compare the NDTT measurement of the tensile fracture response in a superficial volume of surface material with conventional laboratory measurements of toughness on the same sample. The outcomes include the development and assessment of nondestructive prediction models for the initiation fracture toughness from compact tension (CT) testing and the upper shelf Charpy V-Notch (CVN) impact energy. This report summarizes the testing procedures and analysis methodologies used, and the prediction performance of models based on NDTT measurements.
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Myers, Rodney S., and Geetha Mandava. Retention Model Verification. Fort Belvoir, VA: Defense Technical Information Center, March 2004. http://dx.doi.org/10.21236/ada421782.

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Marzban, Caren, David W. Jones, and Scott A. Sandgathe. Verification-Based Model Tuning. Fort Belvoir, VA: Defense Technical Information Center, September 2012. http://dx.doi.org/10.21236/ada574125.

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Marzban, Caren, David W. Jones, and Scott A. Sandgathe. Verification-Based Model Tuning. Fort Belvoir, VA: Defense Technical Information Center, September 2013. http://dx.doi.org/10.21236/ada598028.

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