Journal articles on the topic 'Metal oxide semiconductors, Complementary Design and construction'
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Sotner, Roman, Jan Jerabek, Ladislav Polak, Roman Prokop, and Vilem Kledrowetz. "Integrated Building Cells for a Simple Modular Design of Electronic Circuits with Reduced External Complexity: Performance, Active Element Assembly, and an Application Example." Electronics 8, no. 5 (May 22, 2019): 568. http://dx.doi.org/10.3390/electronics8050568.
Breslin, Catherine, and Adrian O'Lenskie. "Neuromorphic hardware databases for exploring structure–function relationships in the brain." Philosophical Transactions of the Royal Society of London. Series B: Biological Sciences 356, no. 1412 (August 29, 2001): 1249–58. http://dx.doi.org/10.1098/rstb.2001.0904.
Anusha, N., and T. Sasilatha. "Performance Analysis of Wide AND OR Structures Using Keeper Architectures in Various Complementary Metal Oxide Semiconductors Technologies." Journal of Computational and Theoretical Nanoscience 13, no. 10 (October 1, 2016): 6999–7008. http://dx.doi.org/10.1166/jctn.2016.5660.
Rajendran, Selvakumar, Arvind Chakrapani, Srihari Kannan, and Abdul Quaiyum Ansari. "A Research Perspective on CMOS Current Mirror Circuits: Configurations and Techniques." Recent Advances in Electrical & Electronic Engineering (Formerly Recent Patents on Electrical & Electronic Engineering) 14, no. 4 (June 17, 2021): 377–97. http://dx.doi.org/10.2174/2352096514666210127140831.
Kalagadda, B., N. Muthyala, and K. K. Korlapati. "Performance Comparison of Digital Circuits Using Subthreshold Leakage Power Reduction Techniques." Journal of Engineering Research [TJER] 14, no. 1 (March 1, 2017): 74. http://dx.doi.org/10.24200/tjer.vol14iss1pp74-84.
Wang, Xiaochun, Meicheng Fu, Heng Yang, Jiali Liao, and Xiujian Li. "Temperature and Pulse-Energy Range Suitable for Femtosecond Pulse Transmission in Si Nanowire Waveguide." Applied Sciences 10, no. 23 (November 26, 2020): 8429. http://dx.doi.org/10.3390/app10238429.
Mizuno, Tomohisa, Naoki Mizoguchi, Kotaro Tanimoto, Tomoaki Yamauchi, Mitsuo Hasegawa, Toshiyuki Sameshima, and Tsutomu Tezuka. "New Source Heterojunction Structures with Relaxed/Strained Semiconductors for Quasi-Ballistic Complementary Metal–Oxide–Semiconductor Transistors: Relaxation Technique of Strained Substrates and Design of Sub-10 nm Devices." Japanese Journal of Applied Physics 49, no. 4 (April 20, 2010): 04DC13. http://dx.doi.org/10.1143/jjap.49.04dc13.
Chang, Wen-Teng, Hsu-Jung Hsu, and Po-Heng Pao. "Vertical Field Emission Air-Channel Diodes and Transistors." Micromachines 10, no. 12 (December 6, 2019): 858. http://dx.doi.org/10.3390/mi10120858.
Heyns, M., and W. Tsai. "Ultimate Scaling of CMOS Logic Devices with Ge and III–V Materials." MRS Bulletin 34, no. 7 (July 2009): 485–92. http://dx.doi.org/10.1557/mrs2009.136.
Banerjee, Writam. "Challenges and Applications of Emerging Nonvolatile Memory Devices." Electronics 9, no. 6 (June 22, 2020): 1029. http://dx.doi.org/10.3390/electronics9061029.
Ren, Xiaojiao, Ming Zhang, Nicolas Llaser, and Yiqi Zhuang. "On-Chip Measurement of Quality Factor Implemented in 0.35μm CMOS." Journal of Circuits, Systems and Computers 25, no. 08 (May 17, 2016): 1650087. http://dx.doi.org/10.1142/s0218126616500870.
Kajal and Vijay Kumar Sharma. "An Investigation for the Negative-Bias Temperature Instability Aware CMOS Logic." Micro and Nanosystems 13 (January 25, 2021). http://dx.doi.org/10.2174/1876402913666210125144339.
"The Mixed Logic Style based Low Power and High Speed 3-2 Compressor for ASIC designs at 32nm Technology." International Journal of Engineering and Advanced Technology 9, no. 1 (October 30, 2019): 43–49. http://dx.doi.org/10.35940/ijeat.a1027.109119.
"The Mixed Logic Style based Low Power and High Speed One-bit Binary adder for SOI Designs AT 32NM Technology." International Journal of Recent Technology and Engineering 8, no. 4 (November 30, 2019): 361–66. http://dx.doi.org/10.35940/ijrte.d6903.118419.
Naz, Syed Farah, Sadat Riyaz, and Vijay Kumar Sharma. "A Review of QCA Nanotechnology as an Alternate to CMOS." Current Nanoscience 17 (March 1, 2021). http://dx.doi.org/10.2174/1573413717666210301111822.
Torres, Florent, Eric Kerhervé, Andreia Cathelin, and Magali De Matos. "A 31 GHz body-biased configurable power amplifier in 28 nm FD-SOI CMOS for 5 G applications." International Journal of Microwave and Wireless Technologies, August 25, 2020, 1–18. http://dx.doi.org/10.1017/s1759078720001087.
TR, Mrs Lakshmidevi, Mr K. N. Jeevan Reddy, Mr Ashrith Rao, Mr Dhanush Kashyap S, and Ms Chandini K. "Comparison of 4-Bit SAR ADC Using Different Logic Styles in 90nm Technology." International Journal of Advanced Research in Science, Communication and Technology, August 6, 2021, 100–108. http://dx.doi.org/10.48175/ijarsct-1817.
Chang, Jane P. "Innovative Curriculum on Electronic Materials Processing and Engingeering." MRS Proceedings 684 (2001). http://dx.doi.org/10.1557/proc-684-gg5.2.
Li, Kai, Chao Teng, Shuang Wang, and Qianhao Min. "Recent Advances in TiO2-Based Heterojunctions for Photocatalytic CO2 Reduction With Water Oxidation: A Review." Frontiers in Chemistry 9 (April 15, 2021). http://dx.doi.org/10.3389/fchem.2021.637501.
Rahimi, Ronak, and D. Korakakis. "Charge transport in ambipolar pentacene thin film transistors." MRS Proceedings 1286 (2011). http://dx.doi.org/10.1557/opl.2011.239.