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Journal articles on the topic 'MESFET'

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Author: Grafiati

Published: 4 June 2021

Last updated: 12 February 2022

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1

Katakami, S., Makoto Ogata, Shuichi Ono, and Manabu Arai. "Improvement of Electrical Characteristics of Ion Implanted 4H-SiC MESFET on a Semi-Insulating Substrate." Materials Science Forum 556-557 (September 2007): 803–6. http://dx.doi.org/10.4028/www.scientific.net/msf.556-557.803.

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The electrical characteristics of a SiC-MESFET are affected by the channel structure characteristics, such as impurity density and thickness. MESFETs fabricated with ion implantation technique, can form thinner and higher doped channel layers than those fabricated with conventional epitaxial growth, thus improve RF characteristics of MESFETs. We calculated the doping profile of the channel layer for an ion implanted SiC-MESFET using a simulator and then fabricated a SiC-MESFET with the same doping profile as obtained from the simulation. The ion implanted SiC-MESFET operated successfully and had the same electrical characteristics as the epitaxial SiC-MESFET. We demonstrated the effectiveness of one-step implantation channel layer for the ion implanted SiC-MESFET.

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2

Kang, In Ho, Wook Bahng, Sang Cheol Kim, Sung Jae Joo, and Nam Kyun Kim. "Numerical Investigation of the DC and RF Performances for a 4H-SiC Double Delta-Doped Channel MESFET Having Various Delta-Doping Concentrations." Materials Science Forum 556-557 (September 2007): 823–26. http://dx.doi.org/10.4028/www.scientific.net/msf.556-557.823.

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A double delta-doped channel 4H-SiC MESFET is proposed to kick out degradation of the DC and RF performances caused by the surface traps, by forming a quantum-well-like potential well and separating an effective channel from the surface. To obtain an optimum device structure, the DC and RF performances of double delta-doped channel MESFETs having various delta-doping concentrations but the same pinch-off voltage with that of conventional MESFET were also investigated. The SilvacoTM simulation results show that the double delta-doped channel MESFET achieved more improvement of the drain current, the cut-off frequency, and the maximum oscillation frequency for higher delta-doping concentration near the gate. In all cases, DC and RF performances for double delta-doped channel MESFETs are much improved than those of the conventional MESFET.

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3

Zheng, Chun-Yi, Wen-Jung Chiang, Yeong-Lin Lai, Edward Y. Chang, Shen-Li Chen, and K. B. Wang. "Characteristics of GaAs Power MESFETs with Double Silicon Ion Implantations for Wireless Communication Applications." Open Materials Science Journal 10, no. 1 (June 15, 2016): 29–36. http://dx.doi.org/10.2174/1874088x01610010029.

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GaAs power metal-semiconductor field-effect transistors (MESFETs) were fabricated using direct double silicon (Si) ion implantation technology for wireless communication applications. A 150-µm MESFET had a saturation drain current of 238 mA/mm after Si3N4passivation. A 15-mm MESFET, when measured under a class-AB condition with a biased drain voltage of 3.4 V and a quiescent drain current of 600 mA, delivered a maximum output power (Pout) of 31.1 dBm and a maximum power-added efficiency (PAE) of 58.0% at a frequency of 1.88 GHz. The MESFET exhibited aPoutof 29.2 dBm with a PAE of 45.0% at the 1-dB gain compression point. The MESFET, when measured under a deep class-B condition with a biased drain voltage of 4.7 V and a quiescent drain current of 50 mA, achieved a maximumPoutof 33.1 dBm and a maximum PAE of 55.9% at 1.88 GHz. The MESFET operating at 4.7 V and 1.88 GHz exhibited aP1dBof 31.8 dBm and an associated PAE of 47.1% at the 1-dB gain compression point. When tested by IS-95 code-division multiple access (CDMA) standard signals and biased at 4.7 V under the deep class-B condition, the MESFET with aPoutof 28 dBm demonstrated an adjacent channel power rejection (ACPR) of –31.2 dBc at +1.25 MHz apart from the 1.88 GHz center frequency and –45.7 dBc at +2.25 MHz.

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4

Banu, Viorel, Josep Montserrat, Mihaela Alexandru, Xavier Jordá, José Millan, and Philippe Godignon. "Monolithic Integration of Power MESFET for High Temperature SiC Integrated Circuits." Materials Science Forum 778-780 (February 2014): 891–94. http://dx.doi.org/10.4028/www.scientific.net/msf.778-780.891.

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This work provides experimental result on fabricated 4H-SiC lateral power MESFET intended to be used in further development of high temperature integrated circuits for power application. The power SiC MESFET device was developed using a planar technology on silicon carbide and P implant isolation technique. Its destination to monolithic integration demands a lateral layout connection topology. The use of quite high doped N type epitaxial layer (1017cm-3) typical for the integrated circuits raises difficulties to keep the leakage current of the Schottky gate in a decent range. Therefore, a hexagonal close loop gate in conjunction with three metal interconnection levels was adopted, thus obtaining a compact lateral MESFET device and avoiding any drain to source parasitic leakage path. Using the tungsten gate MESFETS, the first generation of monolithic integrated lateral power MESFET device was integrated on the same wafer with digital circuits and a voltage reference analog circuit able to operate up to 250C. The temperature range can be next improved by using higher barrier for the gate contact.

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5

OTSUJI, TAIICHI, KOICHI MURATA, KOICHI NARAHARA, KIMIKAZU SANO, EIICHI SANO, and KIMIYOSHI YAMASAKI. "20-40-Gbit/s-CLASS GaAs MESFET DIGITAL ICs FOR FUTURE OPTICAL FIBER COMMUNICATIONS SYSTEMS." International Journal of High Speed Electronics and Systems 09, no. 02 (June 1998): 399–435. http://dx.doi.org/10.1142/s0129156498000191.

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This paper describes recent advances in high-speed digital IC design technologies based on GaAs MESFETs for future high-speed optical communications systems. We devised new types of a data selector and flip-flops, which are key elements in performing high-speed digital functions (signal multiplexing, decision, demultiplexing, and frequency conversion) in front-end transmitter/receiver systems. Incorporating these circuit design technologies with state-of-the-art 0.12 μm gate-length GaAs MESFET process, we developed a DC-to-44-Gbit/s 2:1 data multiplexer IC, a DC-to 22-Gbit/s static decision IC, and a 20-to-40-Gbit/s dynamic decision IC. The fabricated ICs demonstrated record speed performances for GaAs MESFETs. Although further operating speed margin is still required, the GaAs MESFET is a potential candidate for 20- to 40-Gbit/s class applications.

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6

Wojtasiak, Wojciech, and Daniel Gryglewski. "A 100 W SiC MESFET Amplifier for L-band T/R Module of APAR." International Journal of Electronics and Telecommunications 57, no. 1 (March 1, 2011): 135–40. http://dx.doi.org/10.2478/v10177-011-0020-0.

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A 100 W SiC MESFET Amplifier for L-band T/R Module of APAR In the paper, a 100W SiC MESFET amplifier design dedicated for a L-band T/R module of APAR is presented. The output power higher than 100 W has been achieved by combining in a balanced configuration two single stages with Cree's 60 W CRF24060 SiC MESFETs. The amplifier design methodology is based on the small-signal model and DC characteristics of SiC MESFET. The model is extracted using the transistor S-parameters at three operating points for On-state, Off-state and normally biased. The measurements and simulations prove usefulness of the proposed design method. The amplifier was excited with pulsed and cw signals for the case temperature ranging from 60°C to 140°C. As a result of the case temperature changes the output power drop was lower than 0.5 dB at the level of 150 W.

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7

SHUR, M. S., T. A. FJELDLY, T. YTTERDAL, and K. LEE. "UNIFIED GaAs MESFET MODEL FOR CIRCUIT SIMULATIONS." International Journal of High Speed Electronics and Systems 03, no. 02 (June 1992): 201–33. http://dx.doi.org/10.1142/s0129156492000084.

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We describe a new, unified model for MEtal Semiconductor Field Effect Transistors (MESFETs) which covers all ranges of operation, including the subthreshold regime. The current-voltage (I-V) and capacitance-voltage (C-V) characteristics are described by continuous, analytical expressions with relatively few, physically based parameters. The model includes effects such as velocity saturation, parasitic series resistances, the dependence of the threshold voltage on drain bias, finite output conductance in saturation, and temperature dependence of the device parameters. We also describe a parameter extraction routine which allows the model parameters to be derived in a straightforward fashion from experimental data. The model has been incorporated into our new circuit simulator AIM-Spice. The new device characterization is applied with good results to a typical ion-implanted GaAs MESFET and a delta-doped MESFET.

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8

Tournier, Dominique, Miquel Vellvehi, Phillippe Godignon, Xavier Jordá, and José Millan. "Double Gate 180V-128mA/mm SiC-MESFET for Power Switch Applications." Materials Science Forum 527-529 (October 2006): 1243–46. http://dx.doi.org/10.4028/www.scientific.net/msf.527-529.1243.

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The potential of SiC MESFETs has been demonstrated for high frequency applications on several circuits in the 1-5 GHz frequency range. Although MESFET structures are conventionally used for RF applications, in this paper we report a low voltage (180V) power switch and its current limiting application based on a double gate MESFET structure, showing enhanced forward and blocking capabilities. The reported devices utilize a thin highly doped p-type layer implanted at high energy as buffer layer. Various layouts have been fabricated, varying the gate length; with either a single gate (p-buried layer connected to source) or double gate (one Schottky, and the second on the P-buried layer). Gate RESURF field-plate variation has been also included at the gate electrode. The I(V) electrical characterization validates the double gate configuration benefits. This double gate structure shows a higher gate transconductance than the single gate one. High voltage measurements in conducting mode (180V, 160mA/mm, 30W/mm) confirm the operation of the MESFET as a current limiting device, with excellent gate control capabilities at temperature up to 190°C.

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9

Franklin, A. J., E. A. Amerasekera, and D. S. Campbell. "A Comparison Between GaAs Mesfet and Si NMOS ESD Behaviour." Active and Passive Electronic Components 12, no. 3 (1987): 201–11. http://dx.doi.org/10.1155/1987/96107.

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Work is in hand at Loughborough University to investigate and compare the ESD sensitivity of GaAs D-MESFETs and unprotected enhancement mode NMOS structures.The work to date has shown that GaAs MESFET structures can be severely degraded with ESD pulses above 600V as compared with 200V for Si NMOS. It has also been shown that both GaAs and NMOS structures are polarity sensitive.The behaviour of the Schottky barrier is used to explain the polarity behaviour in GaAs MESFETs. The breakdown of the oxide in the NMOS devices can be explained by impact ionisation.

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10

Estakhrian Haghighi, Amir Reza, and Mojtaba Mohamadi. "The Silicon Plates in Buried Oxide for Enhancement of the Breakdown Voltage in SOI MESFET." Applied Mechanics and Materials 538 (April 2014): 58–61. http://dx.doi.org/10.4028/www.scientific.net/amm.538.58.

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This paper introduces a novel SOI MESFET which enhancement breakdown voltage (VBR) by modifying electric field distribution. To achieve high enhancement of the VBR utilized three Silicon plates in buried oxide of the silicon on insulator metal semiconductor field effect transistor (SOI MESFET). This change in the SOI MESFET structure leads to controlled electric field distribution , increase VBR and Output Resistance (RO). The numerical simulation results show that the VBR of the Silicon Plates SOI MESFET (SP-SOI MESFET) structure improves by 50% compared with that of the conventional SOI MESFET (C-SOI MESFET) structure. As a result, the SP-SOI MESFET structure has superior electrical performances in comparison with the conventional structure.

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11

Jia, Hujun, Yuan Liang, Tao Li, Yibo Tong, Shunwei Zhu, Xingyu Wang, Tonghui Zeng, and Yintang Yang. "Improved DRUS 4H-SiC MESFET with High Power Added Efficiency." Micromachines 11, no. 1 (December 27, 2019): 35. http://dx.doi.org/10.3390/mi11010035.

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A 4H-SiC metal semiconductor field effect transistor (MESFET) with layered doping and undoped space regions (LDUS-MESFET) is proposed and simulated by ADS and ISE-TCAD software in this paper. The structure (LDUS-MESFET) introduced layered doping under the lower gate of the channel, while optimizing the thickness of the undoped region. Compared with the double-recessed 4H-SiC MESFET with partly undoped space region (DRUS-MESFET), the power added efficiency of the LDUS-MESFET is increased by 85.8%, and the saturation current is increased by 27.4%. Although the breakdown voltage of the device has decreased, the decrease is within an acceptable range. Meanwhile, the LDUS-MESFET has a smaller gate-source capacitance and a large transconductance. Therefore, the LDUS-MESFET can better balance DC and AC characteristics and improve power added efficiency (PAE).

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12

Jia, Hujun, Mei Hu, and Shunwei Zhu. "An Improved UU-MESFET with High Power Added Efficiency." Micromachines 9, no. 11 (November 5, 2018): 573. http://dx.doi.org/10.3390/mi9110573.

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An improved ultrahigh upper gate 4H-SiC metal semiconductor field effect transistor (IUU-MESFET) is proposed in this paper. The structure is obtained by modifying the ultrahigh upper gate height h of the ultrahigh upper gate 4H-SiC metal semiconductor field effect transistor (UU-MESFET) structure, and the h is 0.1 μm and 0.2 μm for the IUU-MESFET and UU-MESFET, respectively. Compared with the UU-MESFET, the IUU-MESFET structure has a greater threshold voltage and trans-conductance, and smaller breakdown voltage and saturation drain current, and when the ultrahigh upper gate height h is 0.1 μm, the relationship between these parameters is balanced, so as to solve the contradictory relationship that these parameters cannot be improved simultaneously. Therefore, the power added efficiency (PAE) of the IUU-MESFET structure is increased from 60.16% to 70.99% compared with the UU-MESFET, and advanced by 18%.

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13

Zhu, Shunwei, Hujun Jia, Xingyu Wang, Yuan Liang, Yibo Tong, Tao Li, and Yintang Yang. "Improved MRD 4H-SiC MESFET with High Power Added Efficiency." Micromachines 10, no. 7 (July 17, 2019): 479. http://dx.doi.org/10.3390/mi10070479.

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An improved multi-recessed double-recessed p-buffer layer 4H–SiC metal semiconductor field effect transistor (IMRD 4H-SiC MESFET) with high power added efficiency is proposed and studied by co-simulation of advanced design system (ADS) and technology computer aided design (TCAD) Sentaurus software in this paper. Based on multi-recessed double-recessed p-buffer layer 4H–SiC metal semiconductor field effect transistor (MRD 4H-SiC MESFET), the recessed area of MRD MESFET on both sides of the gate is optimized, the direct current (DC), radio frequency (RF) parameters and efficiency of the device is balanced, and the IMRD MESFET with a best power-added efficiency (PAE) is finally obtained. The results show that the PAE of the IMRD MESFET is 68.33%, which is 28.66% higher than the MRD MESFET, and DC and RF performance have not dropped significantly. Compared with the MRD MESFET, the IMRD MESFET has a broader prospect in the field of microwave radio frequency.

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14

Hashemi, M. M., K. Kiziloglu, J. B. Shealy, S. P. DenBaars, and U. K. Mishra. "Ga0.5In0.49P channel MESFET." Electronics Letters 29, no. 24 (1993): 2154. http://dx.doi.org/10.1049/el:19931440.

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15

El-Ghazaly, Samir, and Tatsuo Itoh. "Effect of carrier injection into MESFET substrates : comparison of MESFET on a semi-insulating buffer, MESFET on a P substrate, and substrate-less MESFET." Annales des Télécommunications 43, no. 7-8 (July 1988): 415–22. http://dx.doi.org/10.1007/bf02999711.

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16

Bai, Yun, Cheng Zhan Li, Hua Jun Shen, Cheng Yue Yang, Yi Dan Tang, and Xin Yu Liu. "Design and Simulation of 4H-SiC MESFET Ultraviolet Photodetector with Gain." Materials Science Forum 897 (May 2017): 610–13. http://dx.doi.org/10.4028/www.scientific.net/msf.897.610.

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The 4H-SiC ultraviolet detector of the MESFET structure with gain is proposed and simulated in this paper. The Schottky gate of MESFET is transparent or semi-transparent to allow more of the incident UV light to be absorbed in the device. The effect of the doping and thickness of the channel layer on the photocurrent of the 4H-SiC MESFET UV detector is simulated and the effect mechanism is analyzed. The simulation results show that the 4H-SiC MESFET exhibits photocurrent below 380 nm. And only when the channel of the 4H-SiC MESFET is in the open state there will be a gain in the detector. Shorter gate length is beneficial to improve the responsivity and the gain of the 4H-SiC MESFET UV detector. When the gate length is set to 10 μm with the channel thickness of 0.3 μm and channel doping of 1×1017 cm-3, the peak responsivity and the gain are calculated to be 12.9 A/W and 55.6 respectively.

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17

Ejebjörk, Niclas, Herbert Zirath, Peder Bergman, Björn Magnusson, and Niklas Rorsman. "Optimization of SiC MESFET for High Power and High Frequency Applications." Materials Science Forum 679-680 (March 2011): 629–32. http://dx.doi.org/10.4028/www.scientific.net/msf.679-680.629.

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SiC MESFETs were scaled both laterally and vertically to optimize high frequency and high power performance. Two types of epi-stacks of SiC MESFETs were fabricated and measured. The first type has a doping of 3×1017 cm-3 in the channel and the second type has higher doping (5×1017 cm-3) in the channel. The higher doping allows the channel to be thinner for the same current density and therefore a reduction of the aspect ratio is possible. This could impede short channel effects. For the material with higher channel doping the maximum transconductance is 58 mS/mm. The maximum current gain frequency, fT, and maximum frequency of oscillation, fmax, is 9.8 GHz and 23.9 GHz, and 12.4 GHz and 28.2 GHz for the MESFET with lower doped channel and higher doping, respectively.

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18

Katakami, S., Shuichi Ono, and Manabu Arai. "RF Characteristics of a Fully Ion-Implanted MESFET with Highly Doped Thin Channel Layer on a Bulk Semi-Insulating 4H-SiC Substrate." Materials Science Forum 600-603 (September 2008): 1107–10. http://dx.doi.org/10.4028/www.scientific.net/msf.600-603.1107.

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We fabricated a 0.5-μm-gate MESFET on a bulk 4H-SiC semi-insulating substrate using ion implantation for the channel and contact regions. Our device design used a thin, highly doped channel layer, which was implanted at single energy to improve the device’s RF characteristics. The electrical characteristics of the ion-implanted MESFET annealed at 1700°C were better than those of the ion-implanted MESFET annealed at 1300°C. The fabricated ion-implanted MESFET has a maximum transconductance of 32.8 mS/mm and an fT/fmax of 9.1/26.2 GHz. The saturated output power was 26.2 dBm (2.1 W/mm) at 2 GHz. These values were the same as those of the conventional epitaxial MESFET with a recessed gate.

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19

Jaya, T., and V. Kannan. "ON/OFF Light Effect on the Buried Gate MESFET." Advanced Materials Research 268-270 (July 2011): 143–47. http://dx.doi.org/10.4028/www.scientific.net/amr.268-270.143.

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An analytical model for the time dependent characteristic of ion implanted buried gate MESFET have been obtained by solving continuity equation with variation of light , turning ON and OFF in the active layer of buried gate through the optical fiber. This paper provides new insight into the cause of channel conductance variation in an ion implanted buried gate MESFET with front side illumination. At time‘t’ is equal to zero, the light through the optical fiber is turning ‘ON’ and ‘OFF’ has been considered. The channel conductance of the buried gate MESFET evaluated with front side illumination. These results indicate very good performance of the device compared with the other devices like MESFET with back and front illumination. Buried gate MESFET highly used in Aerospace System Technology and Microwave communication.

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20

Alexandru, Mihaela, Viorel Banu, Matthieu Florentin, Xavier Jordá, Miguel Vellvehi, and Dominique Tournier. "High Temperature Electrical Characterization of 4H-SiC MESFET Basic Logic Gates." Materials Science Forum 778-780 (February 2014): 1130–34. http://dx.doi.org/10.4028/www.scientific.net/msf.778-780.1130.

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Due to our demonstrated stable Tungsten-Schottky barrier at elevated temperatures, and also thanks to our technological process maturity regarding SiC-Schottky contact fabrication, we have implemented the digital logic gates library adopting a normally-on MESFET topology. In this paper we present new experimental results showing the thermal behavior up to 300oC of 4H-SiC logic gates library, monolithically integrating normally-on MESFETs and epitaxial resistors. The implemented SiC devices are based on important CMOS features and are specially designed for large ICs device integration density.

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21

Zhang, Weihong, C. Andre, and T. Salama. "Subthreshold MESFET empirical model." Solid-State Electronics 41, no. 5 (May 1997): 781–83. http://dx.doi.org/10.1016/s0038-1101(96)00254-7.

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22

Andersson, K., J. Eriksson, N. Rorsman, and H. Zirath. "Resistive SiC-MESFET mixer." IEEE Microwave and Wireless Components Letters 12, no. 4 (April 2002): 119–21. http://dx.doi.org/10.1109/7260.993287.

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23

Wager, J. F., and A. J. McCamant. "GaAs MESFET interface considerations." IEEE Transactions on Electron Devices 34, no. 5 (May 1987): 1001–7. http://dx.doi.org/10.1109/t-ed.1987.23036.

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24

Bohlin, K. E., P. A. Tove, U. Magnusson, and J. Tiren. "Complementary silicon MESFET technology." Electronics Letters 23, no. 5 (February 26, 1987): 205–6. http://dx.doi.org/10.1049/el:19870144.

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25

Hafdallah, H., G. Vernet, and R. Adde. "2.4 GHz MESFET sampler." Electronics Letters 24, no. 3 (1988): 151. http://dx.doi.org/10.1049/el:19880101.

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26

Novosyadliy, S. P., V. M. Lukovkin, R. Melnyk, and A. V. Pavlyshyn. "Physical-topology modeling of silicon/gallium arsenide Schottky transistor of submicron technology LSI." Physics and Chemistry of Solid State 21, no. 2 (June 15, 2020): 361–64. http://dx.doi.org/10.15330/pcss.21.2.361-364.

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In this paper described researched essentials and physical mechanisms of MESFET on epitaxy layers of GaAs with monocrystalline silicon wafer. Conducted computer modeling of MESFET with p-channel: distributions of potential, volumetric charge, current in channel and its characteristics. Based on conducted modeling discovered new effect in MESFET, shielding of volumetric charge, which sufficiently influences on current distribution in channel.

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27

Jia, Hujun, Yibo Tong, Tao Li, Shunwei Zhu, Yuan Liang, Xingyu Wang, Tonghui Zeng, and Yintang Yang. "An Improved 4H-SiC MESFET with a Partially Low Doped Channel." Micromachines 10, no. 9 (August 23, 2019): 555. http://dx.doi.org/10.3390/mi10090555.

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An improved 4H-SiC metal semiconductor field effect transistor (MESFET) based on the double-recessed MESFET (DR-MESFET) for high power added efficiency (PAE) is designed and simulated in this paper and its mechanism is explored by co-simulation of ADS and ISE-TCAD software. This structure has a partially low doped channel (PLDC) under the gate, which increases the PAE of the device by decreasing the absolute value of the threshold voltage (Vt), gate-source capacitance (Cgs) and saturation current (Id). The simulated results show that with the increase of H, the PAE of the device increases and then decreases when the value of NPLDC is low enough. The doping concentration and thickness of the PLDC are respectively optimized to be NPLDC = 1 × 1015 cm−3 and H = 0.15 μm to obtain the best PAE. The maximum PAE obtained from the PLDC-MESFET is 43.67%, while the PAE of the DR-MESFET is 23.43%; the optimized PAE is increased by 86.38%.

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28

YANG, JINMAN, ASHA BALIJEPALLI, TREVOR J. THORNTON, JAMES VANDERSAND, BENJAMIN J. BLALOCK, MICHAEL E. WOOD, and MOHAMMAD M. MOJARRADI. "SILICON-BASED INTEGRATED MOSFETS AND MESFETS: A NEW PARADIGM FOR LOW POWER, MIXED SIGNAL, MONOLITHIC SYSTEMS USING COMMERCIALLY AVAILABLE SOI." International Journal of High Speed Electronics and Systems 16, no. 02 (June 2006): 723–32. http://dx.doi.org/10.1142/s0129156406003977.

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Metal Semiconductor Field Effect Transistors fabricated using compound semiconductor materials have important applications in high-speed/low-noise communication systems. However, their integration densities are low compared to silicon technologies, and it is difficult to combine them with conventional CMOS for single-chip, mixed-signal circuit applications. In this paper we describe how silicon-on-insulator MESFETs can be fabricated alongside conventional MOSFETs using a commercially available silicon-on-insulator foundry. The process flow for the integrated MOSFETS and MESFETs is presented. Measurements from MESFETs fabricated using a commercial foundry demonstrate good depletion-mode device operation. The measured data confirms a square-law behavior for the saturated drain current, which can be reproduced using readily available MESFET models for Spice circuit simulation. The Spice model is applied to a simple differential-pair amplifier and the modeled results compared to measured data.

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29

CHEN, Y. W., J. B. BEYER, and S. N. PRASAD. "MESFET wideband distributed paraphase amplifier." International Journal of Electronics 58, no. 4 (April 1985): 553–69. http://dx.doi.org/10.1080/00207218508939054.

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30

Freundorfer, A. P., and T. L. Nguyen. "Noise in distributed MESFET preamplifiers." IEEE Journal of Solid-State Circuits 31, no. 8 (1996): 1100–1111. http://dx.doi.org/10.1109/4.508257.

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31

Abid, Z., A. Gopinath, F. Williamson, and M. I. Nathan. "Direct-Schottky-contact InP MESFET." IEEE Electron Device Letters 12, no. 6 (June 1991): 279–80. http://dx.doi.org/10.1109/55.82060.

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32

Ooi, B. L., J. Y. Ma, and M. S. Leong. "A new MESFET nonlinear model." Microwave and Optical Technology Letters 29, no. 4 (2001): 226–30. http://dx.doi.org/10.1002/mop.1139.

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33

Linden, P. A., and V. F. Fusco. "Mesfet small signal transfer functions." Microwave and Optical Technology Letters 3, no. 10 (October 1990): 343–47. http://dx.doi.org/10.1002/mop.4650031005.

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34

Ramam, A., R. Gulati, and B. L. Sharma. "Variable Pinch-Off GaAs MESFET." physica status solidi (a) 91, no. 2 (October 16, 1985): K169—K172. http://dx.doi.org/10.1002/pssa.2210910264.

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35

Baier, S. M., Gi-Young Lee, H. K. Chung, B. J. Fure, and R. Mactaggart. "Complementary GaAs MESFET logic gates." IEEE Electron Device Letters 8, no. 6 (June 1987): 260–62. http://dx.doi.org/10.1109/edl.1987.26623.

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36

Hafdallah, H., G. Vernet, A. Ouslimani, and R. Adde. "20 ps MESFET sampling gate." Electronics Letters 25, no. 22 (1989): 1471. http://dx.doi.org/10.1049/el:19890987.

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37

Conger, J., M. S. Shur, and A. Peczalski. "Power law GaAs MESFET model." IEEE Transactions on Electron Devices 39, no. 10 (1992): 2415–17. http://dx.doi.org/10.1109/16.158819.

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38

Zampardi, P. J., S. M. Beccue, K. D. Pedrotti, R. L. Pierson, M. F. Chang, K. C. Wang, D. Cheskis, C. E. Chang, and P. M. Asbeck. "Monolithically integrated HBT/MESFET circuit." Electronics Letters 29, no. 12 (1993): 1100. http://dx.doi.org/10.1049/el:19930734.

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39

Mader, T., J. Schoenberg, L. Harmon, and Z. B. Popović. "Planar MESFET transmission wave amplifier." Electronics Letters 29, no. 19 (1993): 1699. http://dx.doi.org/10.1049/el:19931130.

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40

Daga, O. P., J. K. Singh, B. R. Singh, H. S. Kothari, and W. S. Khokle. "GaAs MESFET and related processes." Bulletin of Materials Science 13, no. 1-2 (March 1990): 99–112. http://dx.doi.org/10.1007/bf02744864.

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41

Yamasaki, Kimiyoshi. "VI. Millimeter-Wave GaAs MESFET Technology." IEEJ Transactions on Electronics, Information and Systems 116, no. 5 (1996): 509–11. http://dx.doi.org/10.1541/ieejeiss1987.116.5_509.

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42

Lau, W. M., Ji Lijiu, K. Lowe, W. Tang, and L. Young. "Hysteresis in GaAs metal-semiconductor field-effect transistors I–V characteristics." Canadian Journal of Physics 63, no. 6 (June 1, 1985): 748–52. http://dx.doi.org/10.1139/p85-119.

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The hysteresis loops observed in the drain current vs. voltage characteristics of metal-semiconductor field-effect transistors (MESFET's) fabricated on semi-insulating GaAs by ion implantation were investigated as a function of the sweep frequency and of the temperature. A model was developed to correlate the extent of the looping to the characteristics of the deep-level traps in the channel. Experimental results were compared with the channel deep-level transient spectroscopic results on the same MESFET.

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43

Alexandru, Mihaela, Viorel Banu, Phillippe Godignon, Miguel Vellvehi, and José Millan. "4H-SiC Digital Logic Circuitry Based on P+ Implanted Isolation Walls MESFET Technology." Materials Science Forum 740-742 (January 2013): 1048–51. http://dx.doi.org/10.4028/www.scientific.net/msf.740-742.1048.

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The design and development of SiC integrated circuits (ICs) nowadays is a necessity due to the increasing demand for high temperature intelligent power applications and intelligent sensors. Due to the superior electrical, mechanical and chemical proprieties of 4H-SiC poly-type, 4H-SiC MESFET transistor is a good compromise for ICs on SiC able to work at higher temperatures (HT) than on Si. This paper presents new experimental results of approaching embedded logic gates with SiC MESFETs and resistors, built in junction-isolated tubs. The P+ implantation isolation technology offers important perspectives regarding the integration density of devices per unit area and wafer surface, being able to use far more complex design geometry for modeling ICs on SiC.

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44

Djouder, Mohamed, Arezki Benfdila, and Ahcene Lakhlef. "Temperature dependent analytical model for submicron GaAs-MESFET." Bulletin of Electrical Engineering and Informatics 10, no. 3 (June 1, 2021): 1271–82. http://dx.doi.org/10.11591/eei.v10i3.2944.

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MESFET are used in circuitsof gigahertz frequencies as they are based on gallium arsenide (GaAs) having electron mobility six times higher than that of silicon. An analytical model simulating different device current-voltage characteristics, i.e., output conductance and output transconductance of a 0.3μm gate MESFET with temperature dependence is proposed. The model is validated by comparing the results of the proposed model and those of the numerical simulation. The parameter values are computed using an intrinsic MESFET of two-dimensional geometry. In this work, the distribution of different output loads for varied applied voltages is considered. Simulation results obtainedunder temperature variation effectsfor load distribution and applied driven voltage variation are considered. The RMS and average errors between the different models and GaAs MESFET simulations are calculated to evidence the proposed model accuracy. This was demonstrated by a good agreement between the proposed model and the simulation results, which are found in good agreement. The simulation results obtained under temperature variations were discussed and found to complement those obtained in the literature. This clarifies the relevance of the suggested model analytical.

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Novosjadly, S. P., A. I. Terletsky, and O. B. Fryk. "Formation CMOS Schemes on GaAs with Self-Aligned Nitride and Silicide Gates." Фізика і хімія твердого тіла 16, no. 2 (June 15, 2015): 420–24. http://dx.doi.org/10.15330/pcss.16.2.420-424.

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Advanced integrated logic circuits on GaAs are mainly based on the using of n-channel field-effect transistors with gate Schottky (MESFET). To create the complementary MESFET integrated circuits the main problem is quite small Schottky barrier height (< 0,5 eV) on p-type gallium arsenide. One way to solve this problem is to use a nitride or silicide tungsten compounds to form gates given the thickness and composition. This paper highlights the features of the formation of complementary high-speed logic circuits on the p-GaAs with self-aligned gate based on nitride or silicide of tungsten obtained by reduced pressure horizontal reactor "Izotron 4" and of RF magnetron sputtering equipment "Oratorio-5." This technology can also be used to form a Schottky contact to n- channel MESFET. Since the manufacturing process of MESFET self-aligned gate provides using refractory gate material as a mask for the multiply ion implantation, the Schottky contact must withstand subsequent high-temperature heat treatment required to activate implanted impurities. In this connection, the action of high-temperature photonic and resistive heating on the barrier height of Schottky contact formed by nitride (silicide) tungsten (WNx, WSix) GaAs was also studied.

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Jonsson, Rolf, and Staffan Rudner. "Broadband RF SiC MESFET Power Amplifiers." Materials Science Forum 483-485 (May 2005): 857–60. http://dx.doi.org/10.4028/www.scientific.net/msf.483-485.857.

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We have designed and characterized preliminary versions of two wideband SiC-based RF power amplifiers using SiC MESFETs from Chalmers University and Lateral Epitaxy SiC MESFETs fabricated at AMDS AB. When optimized transistors are available they will be used in the design of amplifiers for a 100 – 500 MHz multifunction EW system.

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Noblanc, O., E. Chartier, C. Arnodo, and C. Brylinski. "Microwave power MESFET on 4H-SiC." Diamond and Related Materials 6, no. 10 (August 1997): 1508–11. http://dx.doi.org/10.1016/s0925-9635(97)00059-9.

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Huang, W. C., C. T. Horng, and J. C. Cheng. "Pt/Al stacked metals gate MESFET." Microelectronic Engineering 88, no. 5 (May 2011): 601–4. http://dx.doi.org/10.1016/j.mee.2010.06.022.

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Popovic, Z. B., R. M. Weikle, M. Kim, and D. B. Rutledge. "A 100-MESFET planar grid oscillator." IEEE Transactions on Microwave Theory and Techniques 39, no. 2 (1991): 193–200. http://dx.doi.org/10.1109/22.102960.

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Winslow, Thomas A., and Robert J. Trew. "Principles of Large-Signal MESFET Operation." IEEE Transactions on Microwave Theory and Techniques 42, no. 6 (June 1994): 935–42. http://dx.doi.org/10.1109/22.293561.

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