Academic literature on the topic 'Memory and power applications'
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Journal articles on the topic "Memory and power applications":
Zhang, Kaiqiang, Dongyang Ou, Congfeng Jiang, Yeliang Qiu, and Longchuan Yan. "Power and Performance Evaluation of Memory-Intensive Applications." Energies 14, no. 14 (July 6, 2021): 4089. http://dx.doi.org/10.3390/en14144089.
Kumar, S., M. Santhanalakshmi, and R. Navaneethakrishnan. "Content addressable memory for energy efficient computing applications." Scientific Temper 14, no. 02 (June 6, 2023): 430–36. http://dx.doi.org/10.58414/scientifictemper.2023.14.2.30.
Tyler, Neil. "Tempo Targets Low-Power Chips for AI Applications." New Electronics 52, no. 13 (July 9, 2019): 7. http://dx.doi.org/10.12968/s0047-9624(22)61557-8.
Kumar Lamba, Anil, and Anuradha Konidena. "IoT Applications: Analysis of MTCMOS Cache Memory Architecture in a Processor." Journal of Futuristic Sciences and Applications 2, no. 1 (2019): 24–33. http://dx.doi.org/10.51976/jfsa.211905.
Zuo, Ze Yu, Wei Hu, Rui Xin Hu, Heng Xiong, Wen Bin Du, and Xiu Cai. "Efficient Scratchpad Memory Management for Mobile Multimedia Application." Advanced Materials Research 748 (August 2013): 932–35. http://dx.doi.org/10.4028/www.scientific.net/amr.748.932.
Birla, Shilpi. "Variability aware FinFET SRAM cell with improved stability and power for low power applications." Circuit World 45, no. 4 (November 4, 2019): 196–207. http://dx.doi.org/10.1108/cw-12-2018-0098.
Marchal, P., J. I. Gomez, D. Atienza, S. Mamagkakis, and F. Catthoor. "Power aware data and memory management for dynamic applications." IEE Proceedings - Computers and Digital Techniques 152, no. 2 (2005): 224. http://dx.doi.org/10.1049/ip-cdt:20045077.
K, Bharathi, and Vijayakumar S. "QCA Design of Encoder for Low Power Memory Applications." International Journal of Electronics and Communication Engineering 3, no. 11 (November 25, 2016): 13–15. http://dx.doi.org/10.14445/23488549/ijece-v3i11p114.
Fang, Juan, Jiajia Lu, Mengxuan Wang, and Hui Zhao. "A Performance Conserving Approach for Reducing Memory Power Consumption in Multi-Core Systems." Journal of Circuits, Systems and Computers 28, no. 07 (June 27, 2019): 1950113. http://dx.doi.org/10.1142/s0218126619501135.
Yadav, Pradeep Singh, and Harsha Jain. "Review of 6T SRAM for Embedded Memory Applications." Indian Journal of VLSI Design 3, no. 1 (March 30, 2023): 24–30. http://dx.doi.org/10.54105/ijvlsid.a1217.033123.
Dissertations / Theses on the topic "Memory and power applications":
Wang, Xin. "Power Efficient Embedded Memory Design for Mobile Video Applications." Thesis, North Dakota State University, 2015. https://hdl.handle.net/10365/27621.
SELMO, SIMONE. "Functional analysis of In-based nanowires for low power phase change memory applications." Doctoral thesis, Università degli Studi di Milano-Bicocca, 2017. http://hdl.handle.net/10281/153247.
Phase change memories (PCMs), based on chalcogenide alloys (mainly Ge2Sb2Te5), are the most promising candidate for the realization of “Storage Class Memories”, which would fill the gap between ‘‘operation’’ and ‘‘storage’’ memories. PCMs are also one of the few currently available technologies for the implementation of nanoeletronic synapses in high density neuromorphic systems. The main improvements needed in order to exploit the full potential of PCMs in these innovative applications are the reduction of the programming currents and power consumption, and further cell downscaling. Thanks to their nano-sized active volume to be programmed and self-heating behavior, phase change nanowires (NWs) are expected to exhibit improved memory performances with respected to commonly used thin-film/heater-based structures. The Ph. D. Thesis of the candidate reports the study of the phase change properties of ultra-thin In-based NWs for low power consuming PCMs, exploring the more promising features of this class of materials with respect to the commonly considered Ge-Sb-Te alloys. In particular, the self-assembly of In-Sb-Te, In-doped Sb and In-Ge-Te NWs was successfully achieved by Metal Organic Chemical Vapour Deposition (MOCVD), coupled to vapour-liquid-solid mechanism, catalysed by catalyst nanoparticles. The parameters influencing the NW self-assembly were studied and the compositional, morphological and structural analysis of the grown structures was performed. In all cases, NWs of several μm in length and with diameters as small as 15 nm were obtained. The experimental contribution of the Ph. D. candidate to the NWs growth study was mainly related to the substrates preparation, catalyst deposition and, morphological and elemental analysis of the grown samples. Moreover, the Ph. D. candidate has performed the functional analysis of In3Sb1Te2 and In-doped Sb NW-based PCM devices. To conduct that analysis, a suitable fabrication procedure of the devices and an appropriate electrical measuring set-up have been identified. Reversible and well reproducible phase change memory switching was demonstrated for In3Sb1Te2 and In-doped Sb NW devices, showing low working parameters, such as “RESET” voltage, current and power. The obtained results support the conclusion that In-based ultra-thin NWs are potential building blocks for the realization of ultra-scaled, high performance PCM devices.
Morrison, Matthew Arthur. "Theory, Synthesis, and Application of Adiabatic and Reversible Logic Circuits For Security Applications." Scholar Commons, 2013. https://scholarcommons.usf.edu/etd/5082.
Ramclam, Kenneth M. "Low-Power and Robust Level-Shifter with Contention Mitigation for Memory and Standalone Applications." Scholar Commons, 2015. https://scholarcommons.usf.edu/etd/5555.
Lai, Farley. "Stream processing optimizations for mobile sensing applications." Diss., University of Iowa, 2017. https://ir.uiowa.edu/etd/5797.
Mandlekar, Anup Shrikant. "An Application Framework for a Power-Aware Processor Architecture." Thesis, Virginia Tech, 2012. http://hdl.handle.net/10919/34484.
Master of Science
Cortes, Christoffer, and Adam Krauser. "Android : Resource Consumption in Native and Web Applications." Thesis, Blekinge Tekniska Högskola, Sektionen för datavetenskap och kommunikation, 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:bth-4681.
Mugisha, Dieudonne Manzi. "Exploiting Application Behaviors for Resilient Static Random Access Memory Arrays in the Near-Threshold Computing Regime." DigitalCommons@USU, 2015. https://digitalcommons.usu.edu/etd/4550.
Mahato, Prabir. "Study and development of resistive memories for flexible electronic applications." Thesis, Lyon, 2020. http://www.theses.fr/2020LYSEI134.
The advent of flexible electronics has brought about rapid research towards sensors, bio implantable and wearable devices for assessment of diseases such as epilepsy, Parkinson’s and heart attacks. Memory devices are major component in any electronic circuits, only secondary to transistors, therefore many research efforts are devoted to the development of flexible memory devices. Conductive Bridge Random Access Memories (CBRAMs) based on creation/dissolution of a metallic filament within a solid electrolyte are of great research interest because of their simple Metal Insulator Metal architecture, low-voltage capabilities, and compatibility with flexible substrates. In this work, instead of a conventional metallic oxide or a chalcogenide layer, a biocompatible polymer - Polyethylene Oxide (PEO) – is employed as the solid electrolyte layer using water as solvent. Memory devices, consisting in Ag/PEO/Pt tri-layer stacks, were fabricated on both silicon and flexible substrates using a heterogeneous process combining physical vapour deposition and spin coating. To aim this, a systematic study on the effect of solution concentration and deposition speed on the PEO thickness is presented. SEM/EDX and AFM measurements were then conducted on devoted “nano-gap” planar structures and have revealed the formation of metallic Ag precipitates together with morphological changes of the polymer layer after resistance switching. The performance of the resistive memory devices is then assessed on silicon and flexible substrates. In particular programming voltage statistics, OFF/ON resistance ratio, endurance cycles and retention tests are performed and the effect of current compliance is analysed. The conduction mechanism in the HRS/LRS is studied on the Ag/PEO/Pt and Pt/PEO/Pt reference devices. Finally, the electrical characterization of devices on flexible substrate is performed under mechanical stress, showing promising results. Polymer-based CBRAM devices are therefore suggested as potential candidates for sustainable development of flexible memory devices
Ly, Aliou. "Développement d’un oscillateur paramétrique optique continu intense et à faible bruit pour des applications aux communications quantiques." Thesis, Université Paris-Saclay (ComUE), 2017. http://www.theses.fr/2017SACLS528/document.
Long distance quantum communications are limited to few tens of km due to the attenuation of light in telecom fibres. Quantum repeaters (quantum relays synchronized by photonic quantum memories) were introduced in order to increase distances. Or, currently, the most efficient memories do not operate at wavelengths in the telecom C band. In order to take advantage of these memories, the use of quantum interfaces (second order nonlinear medium) was proposed as an alternative. Thus, by adding by sum frequency generation a pump photon at an appropriate wavelength to the telecom photon carrying the information, one transfers the information to a wavelength compatible with these memories, and this with a preservation of the information initially carried by the telecom photon. Our aim is thus to build a continuous-wave singly resonant optical parametric oscillator (cw SRO) which will provide a wave at 1648 nm that will be frequency summed to telecom photons at 1536 nm to transfer the information to a photon storable into alkali atoms based memory. To efficiently transfer the information, the cw SRO has to fulfill some requirements: a high spectral purity (linewidth ~kHz), a high output power (~1 W) and a wavelength longer than that of the telecom photon to be converted. To this aim, we use the non-resonant wave of a cw SRO. The first work done during this thesis was to experimentally prove the possibility to have both high output power and high spectral purity from a cw SRO. By reusing a cw SRO already built during our previous works, we were able to stabilize at the kHz level the frequency of the non-resonant wave at 947 nm (signal wave) of this SRO, with an output power of more than one watt. Then, we built the cw SRO of which non-resonant wave at 1648 nm (idler wave) has been frequency stabilized below the kHz level along with an output power of the order of one watt. We next studied the long term stability of the idler wavelength at 1648 nm. We have measured frequency drifts of the order of 10 MHz/mn. These drifts originating mainly from the reference cavity to which the SRO is locked, can be reduced by, firstly, an active control of the cavity and by, secondly, the use of robust frequency stabilization techniques
Books on the topic "Memory and power applications":
Chernow, Fred B. Memory power plus! Paramas, N.J: Prentice Hall, 1997.
Lapp, Danielle C. Maximizing your memory power. Hauppauge, N.Y: Barron's, 1992.
Kellett, Michael Cliff. High-intensity memory power. New York: Sterling, 1986.
Os, H. W. van. The power of memory. Baarn, the Netherlands: De Prom, 1999.
Weiss, Donald H. Increasing your memory power. New York, NY: American Management Association, 1986.
Lapp, Danielle C. Maximizing your memory power. 2nd ed. Hauppauge, NY: Barron's Educational Series, 1998.
Semiconductor, National. Memory applications handbook. Santa Clara: National Semiconductor, 1993.
Esposito, Anthony. Fluid power with applications. 6th ed. Upper Saddle River, N.J: Prentice Hall, 2003.
Klemin, V. Wayne. PC power: Microcomputer applications. New York, N.Y: Glencoe/McGraw-Hill, 1991.
Esposito, Anthony. Fluid power with applications. 4th ed. Upper Saddle River, N.J: Prentice Hall, 1997.
Book chapters on the topic "Memory and power applications":
Tarasov, Vasily E. "Economic models with power-law memory." In Applications in Engineering, Life and Social Sciences, Part B, edited by Dumitru Bǎleanu and António Mendes Lopes, 1–32. Berlin, Boston: De Gruyter, 2019. http://dx.doi.org/10.1515/9783110571929-001.
Edelman, Mark. "Dynamics of nonlinear systems with power-law memory." In Applications in Physics, Part A, edited by Vasily E. Tarasov, 103–32. Berlin, Boston: De Gruyter, 2019. http://dx.doi.org/10.1515/9783110571707-005.
Corcuera, José Manuel. "Power Variation Analysis of Some Integral Long-Memory Processes." In Stochastic Analysis and Applications, 219–34. Berlin, Heidelberg: Springer Berlin Heidelberg, 2007. http://dx.doi.org/10.1007/978-3-540-70847-6_9.
Prodromakis, Themis. "Harnessing the Power of the Brain with Memory-resitors." In Circuits and Systems for Biomedical Applications, 49–69. New York: River Publishers, 2022. http://dx.doi.org/10.1201/9781003337546-3.
Qiu, Yeliang, Congfeng Jiang, Tiantian Fan, Yumei Wang, Liangbin Zhang, Jian Wan, and Weisong Shi. "Power Characterization of Memory Intensive Applications: Analysis and Implications." In Benchmarking, Measuring, and Optimizing, 189–201. Cham: Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-030-32813-9_16.
Choi, Hong Jun, Dong Oh Son, and Cheol Hong Kim. "Memory Contention Aware Power Management for High Performance GPUs." In Parallel and Distributed Computing, Applications and Technologies, 220–29. Singapore: Springer Singapore, 2019. http://dx.doi.org/10.1007/978-981-13-5907-1_23.
Cheng, Yao, Chang Xu, Daisuke Mashima, Vrizlynn L. L. Thing, and Yongdong Wu. "PowerLSTM: Power Demand Forecasting Using Long Short-Term Memory Neural Network." In Advanced Data Mining and Applications, 727–40. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-69179-4_51.
Yoo, Hoi Jun, and Donghyun Kim. "Embedded Memory Architecture for Low-Power Application Processor." In Integrated Circuits and Systems, 7–38. Boston, MA: Springer US, 2009. http://dx.doi.org/10.1007/978-0-387-88497-4_2.
Song, Yong-Ha, and Jun-Bo Yoon. "Micro and Nanoelectromechanical Contact Switches for Logic, Memory, and Power Applications." In Nano Devices and Circuit Techniques for Low-Energy Applications and Energy Harvesting, 65–117. Dordrecht: Springer Netherlands, 2015. http://dx.doi.org/10.1007/978-94-017-9990-4_3.
El-Atab, Nazek, Ali K. Okyay, and Ammar Nayfeh. "Two-nanometer Laser Synthesized Si-Nanoparticles for Low Power Memory Applications." In 3D Stacked Chips, 129–56. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-20481-9_7.
Conference papers on the topic "Memory and power applications":
Roizin, Yakov, Evgeny Pikhay, Vladislav Dayan, and Alexey Heiman. "High Density MTP Logic NVM for Power Management Applications." In 2009 IEEE International Memory Workshop (IMW). IEEE, 2009. http://dx.doi.org/10.1109/imw.2009.5090593.
Zhu, Zongwei, Xi Li, Chao Wang, and Xuehai Zhou. "Memory power optimization on different memory address mapping schemas." In 2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA). IEEE, 2014. http://dx.doi.org/10.1109/rtcsa.2014.6910545.
Kouznetsov, Igor, Krishnaswamy Ramkumar, Venkatraman Prabhakar, Long Hinh, H. M. Shih, S. Saha, S. Govindaswamy, et al. "40 nm Ultralow-Power Charge-Trap Embedded NVM Technology for IoT Applications." In 2018 IEEE International Memory Workshop (IMW). IEEE, 2018. http://dx.doi.org/10.1109/imw.2018.8388777.
Yiyan Tang, Yingtao Jiang, and Yuke Wang. "Reduce FFT memory reference for low power applications." In IEEE International Conference on Acoustics Speech and Signal Processing ICASSP-02. IEEE, 2002. http://dx.doi.org/10.1109/icassp.2002.1005369.
Tang, Yiyan, Yingtao Jiang, and Yuke Wang. "Reduce FFT memory reference for low power applications." In Proceedings of ICASSP '02. IEEE, 2002. http://dx.doi.org/10.1109/icassp.2002.5745331.
Golanbari, Mohammad Saber, Saman Kiamehr, Rajendra Bishnoi, and Mehdi B. Tahoori. "Reliable memory PUF design for low-power applications." In 2018 19th International Symposium on Quality Electronic Design (ISQED). IEEE, 2018. http://dx.doi.org/10.1109/isqed.2018.8357289.
Mansilla, Oscar, and Eric Thomson. "Power solution for DDR memory in space applications." In 2014 IEEE Aerospace Conference. IEEE, 2014. http://dx.doi.org/10.1109/aero.2014.6836177.
Sharif, Kazi Fatima, Riazul Islam, Mahbubul Haque, Satyendra N. Biswas, Voicu Groza, and Mansour Assaf. "Low power nMOS based memory cell." In 2017 International Conference on Innovative Mechanisms for Industry Applications (ICIMIA). IEEE, 2017. http://dx.doi.org/10.1109/icimia.2017.7975598.
Nii, Koji. "Ultra-Low Standby Power Embedded SRAM Design Techniques for Smart IoT Applications." In 2019 IEEE 11th International Memory Workshop (IMW). IEEE, 2019. http://dx.doi.org/10.1109/imw.2019.8739660.
Wang, M., Y. L. Song, H. J. Wan, H. B. Lv, P. Zhou, T. A. Tang, Y. Y. Lin, et al. "A CuxO-based resistive memory with low power and high reliability for SOC nonvolatile memory applications." In 2010 IEEE International Memory Workshop. IEEE, 2010. http://dx.doi.org/10.1109/imw.2010.5488318.
Reports on the topic "Memory and power applications":
Musmanno, Joseph F., Joseph W. Manke, and Jon W. Harris. Processor-in-Memory Applications Assessment. Fort Belvoir, VA: Defense Technical Information Center, October 2000. http://dx.doi.org/10.21236/ada386682.
Agarwal, Anant, and Anoop Gupta. Memory-Reference Characteristics of Multiprocessor Applications under MACH. Fort Belvoir, VA: Defense Technical Information Center, January 1988. http://dx.doi.org/10.21236/ada207318.
Schindewolf, M., B. Bihari, J. Gyllenhaal, M. Schulz, A. Wang, and W. Karl. What Scientific Applications can Benefit from Hardware Transactional Memory? Office of Scientific and Technical Information (OSTI), June 2012. http://dx.doi.org/10.2172/1044233.
Bochat, W. M. Atomic Bomb: Memory and its Power on Japanese Pacifism. Fort Belvoir, VA: Defense Technical Information Center, May 2008. http://dx.doi.org/10.21236/ada526120.
Levy, Scott N., Patrick G. Bridges, Kurt Brian Ferreira, Aidan Patrick Thompson, and Christian Robert Trott. An examination of content similarity within the memory of HPC applications. Office of Scientific and Technical Information (OSTI), January 2013. http://dx.doi.org/10.2172/1088105.
Merritt, Alexander M., and Kevin Thomas Tauke Pedretti. LDRD final report : managing shared memory data distribution in hybrid HPC applications. Office of Scientific and Technical Information (OSTI), September 2010. http://dx.doi.org/10.2172/1007320.
Biryukov, A., D. Dinu, D. Khovratovich, and S. Josefsson. Argon2 Memory-Hard Function for Password Hashing and Proof-of-Work Applications. RFC Editor, September 2021. http://dx.doi.org/10.17487/rfc9106.
Lindemuth, I. R., R. E. Reinovsky, and C. M. Fowler. Megagauss technology and pulsed power applications. Office of Scientific and Technical Information (OSTI), September 1996. http://dx.doi.org/10.2172/378770.
Muljadi, E., Y. C. Zhang, A. Allen, M. Singh, V. Gevorgian, and Y. H. Wan. Synchrophasor Applications for Wind Power Generation. Office of Scientific and Technical Information (OSTI), February 2014. http://dx.doi.org/10.2172/1126317.
Zhang, Y. Aluminide Coatings for Power-Generation Applications. Office of Scientific and Technical Information (OSTI), November 2003. http://dx.doi.org/10.2172/885900.