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Journal articles on the topic 'Low-Cost silicon'

Author: Grafiati

Published: 25 May 2024

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1

Chatzakis, J., S. Hassan, E. Clark, and M. Tatarakis. "A 1GHz Low-cost, Ultra Low-noise Preamplifier." WSEAS TRANSACTIONS ON ELECTRONICS 11 (September 1, 2020): 120–26. http://dx.doi.org/10.37394/232017.2020.11.15.

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A high quality, compact 1GHz preamplifier suitable for operation in conjunction with micro channelplates (MCP) and silicon Photomultipliers (SiPM), that is comprised of two integrated circuits is described inthis paper. The amplifier requires no adjustment and has a flat response from low frequencies and adequatebandwidth for high speed measurement systems.

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2

Tamboli, Adele C., David C. Bobela, Ana Kanevce, Timothy Remo, Kirstin Alberi, and Michael Woodhouse. "Low-Cost CdTe/Silicon Tandem Solar Cells." IEEE Journal of Photovoltaics 7, no. 6 (November 2017): 1767–72. http://dx.doi.org/10.1109/jphotov.2017.2737361.

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3

Khoury, H. J., C. A. Hazin, A. P. Mascarenhas, and E. F. da Silva. "Low Cost Silicon Photodiode for Electron Dosimetry." Radiation Protection Dosimetry 84, no. 1 (August 1, 1999): 341–43. http://dx.doi.org/10.1093/oxfordjournals.rpd.a032751.

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4

Kress, A., R. Kuhn, P. Fath, G. P. Willeke, and E. Bucher. "Low-cost back contact silicon solar cells." IEEE Transactions on Electron Devices 46, no. 10 (1999): 2000–2004. http://dx.doi.org/10.1109/16.791988.

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5

Burtescu, S., C. Parvulescu, F. Babarada, and E. Manea. "The low cost multicrystalline silicon solar cells." Materials Science and Engineering: B 165, no. 3 (December 2009): 190–93. http://dx.doi.org/10.1016/j.mseb.2009.08.009.

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6

Hampel, Jonathan, Philipp Ehrenreich, Norbert Wiehl, Jens Volker Kratz, and Stefan Reber. "HCl gas gettering of low-cost silicon." physica status solidi (a) 210, no. 4 (January 14, 2013): 767–70. http://dx.doi.org/10.1002/pssa.201200885.

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7

Kondo, Naoki, Mikinori Hotta, and Tatsuki Ohji. "Low-Cost Silicon Nitride from β-Silicon Nitride Powder and by Low-Temperature Sintering." International Journal of Applied Ceramic Technology 12, no. 2 (August 8, 2013): 377–82. http://dx.doi.org/10.1111/ijac.12157.

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8

Matsuura, Hideharu, Shungo Sakurai, Yuya Oda, Shinya Fukushima, Shohei Ishikawa, Akinobu Takeshita, and Atsuki Hidaka. "Gated Silicon Drift Detector Fabricated from a Low-Cost Silicon Wafer." Sensors 15, no. 5 (May 22, 2015): 12022–33. http://dx.doi.org/10.3390/s150512022.

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9

Lo Faro, Maria, Antonio Leonardi, Dario Morganti, Barbara Fazio, Ciro Vasi, Paolo Musumeci, Francesco Priolo, and Alessia Irrera. "Low Cost Fabrication of Si NWs/CuI Heterostructures." Nanomaterials 8, no. 8 (July 25, 2018): 569. http://dx.doi.org/10.3390/nano8080569.

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In this paper, we present the realization by a low cost approach compatible with silicon technology of new nanostructures, characterized by the presence of different materials, such as copper iodide (CuI) and silicon nanowires (Si NWs). Silicon is the principal material of the microelectronics field for its low cost, easy manufacturing and market stability. In particular, Si NWs emerged in the literature as the key materials for modern nanodevices. Copper iodide is a direct wide bandgap p-type semiconductor used for several applications as a transparent hole conducting layers for dye-sensitized solar cells, light emitting diodes and for environmental purification. We demonstrated the preparation of a solid system in which Si NWs are embedded in CuI material and the structural, electrical and optical characterization is presented. These new combined Si NWs/CuI systems have strong potentiality to obtain new nanostructures characterized by different doping, that is strategic for the possibility to realize p-n junction device. Moreover, the combination of these different materials opens the route to obtain multifunction devices characterized by promising absorption, light emission, and electrical conduction.

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10

Rahali, F., S. Ansermet, J. Ardalan, and D. Otter. "Low‐cost Integrated Silicon Sensors for Industrial Applications." Microelectronics International 11, no. 3 (March 1994): 18–21. http://dx.doi.org/10.1108/eb044540.

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11

Bellanger, P., A. Slaoui, S. Roques, A. G. Ulyashin, M. Debucquoy, A. Straboni, A. Sow, Y. Salinesi, I. Costa, and J. M. Serra. "Silicon foil solar cells on low cost supports." Journal of Renewable and Sustainable Energy 10, no. 2 (March 2018): 023502. http://dx.doi.org/10.1063/1.5012744.

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12

Dingus, Peter, James Garnett, Shumin Wang, and Chaehwi Chong. "Low cost single crystal CdZnTe-Silicon tandem PV." Renewable Energy 168 (May 2021): 659–67. http://dx.doi.org/10.1016/j.renene.2020.12.087.

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13

Birkelund, K., Peter Gravesen, Sergey Shiryaev, Per Brandt Rasmussen, and Maria Dall Rasmussen. "High-pressure silicon sensor with low-cost packaging." Sensors and Actuators A: Physical 92, no. 1-3 (August 2001): 16–22. http://dx.doi.org/10.1016/s0924-4247(01)00534-9.

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14

Bilton, C., S. Hedges, P. R. Hobson, and D. C. Imrie. "Low-cost silicon photodiodes for x-ray detection." Journal of Physics E: Scientific Instruments 21, no. 8 (August 1988): 809–11. http://dx.doi.org/10.1088/0022-3735/21/8/014.

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15

Yi, J., R. Wallace, N. Sridhar, Z. Wang, K. Xie, D. D. L. Chung, C. R. Wie, et al. "Crystallized amorphous silicon for low-cost solar cells." Solar Cells 30, no. 1-4 (May 1991): 403–13. http://dx.doi.org/10.1016/0379-6787(91)90073-x.

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16

Asadikiya, Mohammad, and Adam Clayton Powell. "Low-Cost Clean One-Step Production of Solar Silicon from Natural Quartzite." ECS Meeting Abstracts MA2023-01, no. 21 (August 28, 2023): 1535. http://dx.doi.org/10.1149/ma2023-01211535mtgabs.

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Despite the fact that many groups have tried to achieve solar silicon production using molten salt electrolysis, the motivation for this project is to build on a recent breakthrough in silicon molten salt chemistry. The novel molten salt bath comprised of MgF₂-CaF₂-YF₃-CaO-SiO₂ exhibits low volatility (<0.1 μg/cm2·s), low viscosity (<5 mPa·s), high ionic conductivity (>4 S/cm), SiO₂ solubility (>5 wt%), and yttria-stabilized zirconia (YSZ) solid oxide membrane (SOM) compatibility, which are all at least an order of magnitude better than prior works. Our goal is to produce high-purity silicon from natural 99.7-99.9% pure quartzite (SiO₂) in only one step, utilizing molten salt electrolysis with a state-of-the-art molten salt composition. This process can potentially produce silicon with 4-5N purity at $1.70/kg using <30 kWh/kg, with pure oxygen by-product and zero direct Greenhouse Gas (GHG) emissions. The 4-5N product purity would be sufficient for directional solidification, resulting in $2.20-2.70/kg solar-grade silicon cost, i.e., 90-95% lower than today. Besides considerable silicon price reduction, our novel technology provides a high level of scalability that can control solar silicon price fluctuations, while it is a "green" production.

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17

Luff, B. Jonathan, Dazeng Feng, Daniel C. Lee, Wei Qian, Hong Liang, and Mehdi Asghari. "Hybrid Silicon Photonics for Low-Cost High-Bandwidth Link Applications." Advances in Optical Technologies 2008 (May 13, 2008): 1–6. http://dx.doi.org/10.1155/2008/245131.

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Current discrete optical solutions for high data-rate link applications, even with potentially high manufacturing volumes, are too costly. Highly integrated, multifunction modules are a key part of the solution, reducing size and cost while providing improved reliability. Silicon, with its proven manufacturability and reliability, offers a solid foundation for building a cost-efficient path to successful products. In this paper, recent work on the development of silicon photonic enabling components for multichannel high data-rate links is presented.

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18

Berg, Håkan, Heiko Thiesies, and Niklas Billström. "Low-cost TRM technologies for phased array radars." International Journal of Microwave and Wireless Technologies 1, no. 4 (June 19, 2009): 369–75. http://dx.doi.org/10.1017/s1759078709990304.

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Low-cost enabling technologies for T/R modules (TRMs) in phased array radars are proposed and analyzed in terms of technology, performance, and cost aspects. Phase and amplitude controlling integrated circuits (ICs) realized in a low-cost standard silicon process are demonstrated. The design of several ICs at the S-, C-, on X-band has shown that silicon germanium is a strong contender for gallium arsenide. This also applies to TRMs suited for military active phased array antenna (AESA) radars. The circuits presented in this paper are manufactured by austriamicrosystems in their 0.35 µm SiGe-BiCMOS process with an fT of around 70 GHz. A TRM packaging concept based on soldered surface-mount technology and organic substrates is also demonstrated. A cost analysis concludes that by using the proposed packaging concept and the SiGe core-chip technology, the TRM production cost can be potentially reduced by 70% compared to traditional ceramic hermetic packaging with core chip in GaAs technology.

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19

Gou, Xian Fang, Xu Dong Li, Ying Xu, Shuang Song, Yin Fang Cui, and Hong Yan Fan. "A Simple and Low Cost Approach for Texturing on CZ-Silicon Solar Cell." Materials Science Forum 650 (May 2010): 168–71. http://dx.doi.org/10.4028/www.scientific.net/msf.650.168.

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Silicon solar cell surface texture was effective to reduce reflectance and improve light collection. Alkaline etchants was a conventional process in monocrystalline silicon texturing.However, isopropyl alcohol(IPA) as buffer solution was expensive and high consumption, which increased the cost of solar cell. In the paper, It has been found that a cheaper surfactant as buffer solution decrease silicon surface interfacial force and increase etchant infiltrating of silicon wafer, so a large number of very small and uniform texture appeared on the silicon surface. pyramids size of about 3µm formed after etching of 15min. A new process to reduce the production cost and form the high quality pyramids texturization has been developed by this investigation.

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20

Marchal, Julien C., David J. Krug III, Patrick McDonnell, Kai Sun, and Richard M. Laine. "A low cost, low energy route to solar grade silicon from rice hull ash (RHA), a sustainable source." Green Chemistry 17, no. 7 (2015): 3931–40. http://dx.doi.org/10.1039/c5gc00622h.

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Polycrystalline silicon, with impurity levels lower than those of the SEMI III standard for solar grade silicon feedstock (≈99.9999% pure), was produced using rice hull ash (RHA) as a biogenic silica source.

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21

Szlufcik, J., S. Sivoththaman, J. F. Nlis, R. P. Mertens, and R. Van Overstraeten. "Low-cost industrial technologies of crystalline silicon solar cells." Proceedings of the IEEE 85, no. 5 (May 1997): 711–30. http://dx.doi.org/10.1109/5.588971.

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22

Ryckman, Judson D., Marco Liscidini, J. E. Sipe, and S. M. Weiss. "Porous silicon structures for low-cost diffraction-based biosensing." Applied Physics Letters 96, no. 17 (April 26, 2010): 171103. http://dx.doi.org/10.1063/1.3421545.

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23

Kress, A., O. Breitenstein, S. Glunz, P. Fath, G. Willeke, and E. Bucher. "Investigations on low-cost back-contact silicon solar cells." Solar Energy Materials and Solar Cells 65, no. 1-4 (January 2001): 555–60. http://dx.doi.org/10.1016/s0927-0248(00)00140-9.

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24

Vitanov, P., N. Tyutyundzhiev, P. Stefchev, and B. Karamfilov. "Low cost multilayer metallization system for silicon solar cells." Solar Energy Materials and Solar Cells 44, no. 4 (December 1996): 471–84. http://dx.doi.org/10.1016/s0927-0248(95)00170-0.

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25

Ebong, A. U., D. S. Kim, and S. H. Lee. "Low cost double-sided buried-contact silicon solar cells." Renewable Energy 11, no. 3 (July 1997): 285–92. http://dx.doi.org/10.1016/s0960-1481(97)00008-6.

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26

Schmich, Evelyn, Norbert Schillinger, and Stefan Reber. "Silicon CVD deposition for low cost applications in photovoltaics." Surface and Coatings Technology 201, no. 22-23 (September 2007): 9325–29. http://dx.doi.org/10.1016/j.surfcoat.2007.04.089.

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27

Fan, Yiqiang, Arpys Arevalo, Huawei Li, and Ian G. Foulds. "Low-cost silicon wafer dicing using a craft cutter." Microsystem Technologies 21, no. 7 (May 20, 2014): 1411–14. http://dx.doi.org/10.1007/s00542-014-2198-4.

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28

Švrček, V. "Colloidal silicon nanocrystallites for low-cost solar cell development." Nano-Micro Letters 1, no. 1 (December 2009): 40–44. http://dx.doi.org/10.1007/bf03353605.

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29

Uekawa, M., H. Sasaki, D. Shimura, K. Kotani, Y. Maeno, and T. Takamori. "Surface-mountable silicon microlens for low-cost laser modules." IEEE Photonics Technology Letters 15, no. 7 (July 2003): 945–47. http://dx.doi.org/10.1109/lpt.2003.813396.

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30

Wang, Zhehui, Zhifei Wang, Jiang Xu, Yi-Shing Chang, Jun Feng, Xuanqi Chen, Shixi Chen, and Jiaxu Zhang. "CAMON: Low-Cost Silicon Photonic Chiplet for Manycore Processors." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39, no. 9 (September 2020): 1820–33. http://dx.doi.org/10.1109/tcad.2019.2926495.

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31

Lo Faro, Maria Josè, Antonio Alessio Leonardi, Cristiano D’Andrea, Dario Morganti, Paolo Musumeci, Cirino Vasi, Francesco Priolo, Barbara Fazio, and Alessia Irrera. "Low cost synthesis of silicon nanowires for photonic applications." Journal of Materials Science: Materials in Electronics 31, no. 1 (January 7, 2019): 34–40. http://dx.doi.org/10.1007/s10854-019-00672-y.

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32

Miao, Rongrong, Jun Yang, Yanan Wu, Jiulin Wang, Yanna Nuli, and Wei Lu. "Nanoporous silicon from low-cost natural clinoptilolite for lithium storage." RSC Advances 5, no. 70 (2015): 56772–79. http://dx.doi.org/10.1039/c5ra08622a.

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Nanoporous silicon is derived from extremely low-cost natural clinoptilolite by using magnesiothermic reduction method. After surface carbon coating, it exhibits good cycling stability and is of tremendous potential for its practical application.

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33

Kwon, Woon-Seong, Suresh Ramalingam, Xin Wu, Liam Madden, C. Y. Huang, Hung-Hsien Chang, Chi-Hsin Chiu, Steve Chiu, and Stephen Chen. "New Stacked Die Interconnect Technology for High-Performance and Low-Cost FPGA." Journal of Microelectronics and Electronic Packaging 12, no. 3 (July 1, 2015): 111–17. http://dx.doi.org/10.4071/imaps.452.

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This article introduces the first comprehensive demonstration of new innovative technology comprising multiple key technologies for highly cost-effective and high-performance Xilinx field programmable gate array (FPGA), which is so-called stack silicon-less interconnect technology (SLIT) that provides the equivalent high-bandwidth connectivity and routing design-rule as stack silicon interconnect (SSI) technology at a cost-effective manner. We have successfully demonstrated the overall process integration and functions of our new SLIT-employed package using Virtex®-7 2000T FPGA product with chip-to-wafer stacking, wafer-level flux cleaning, microbump underfilling, mold encapsulation, and backside silicon removal. Of all technology elements, both full silicon removal process with faster etching and no dielectric layer damage and wafer warpage management after full silicon etching are most crucial elements to realize the SLIT technology. To manage the wafer warpage after full Si removal, a couple of knobs are identified and used such as top reinforcement layer, microbump underfill properties tuning, die thickness, die-to-die space, and total thickness adjustments. It is also discussed in the article how the wafer warpage behaves and how the wafer warpage is managed. New SLIT module shows excellent warpage characteristics of only −30 μm ∼ −40 μm at room temperature (25°C) for 25 mm × 31 mm in size and +20 μm ∼ +25 μm at reflow temperature (250°C). Thermal simulation results shows that thermal resistance of new SLIT package is almost comparable to that of standard 2000T flip-chip ball grid array (FC-BGA) package using through silicon via interposer with standard heat sink configuration and air wind condition. The reliability assessment is now under the study.

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34

Gu, Xin, Deren Yang, Tingting Jiang, Xuegong Yu, and Duanlin Que. "Recent Patenting Activities in Low-Cost Silicon Raw Materials for Silicon Solar Cells." Recent Patents on Materials Sciencee 4, no. 1 (January 1, 2011): 35–42. http://dx.doi.org/10.2174/1874464811104010035.

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35

Gu, Xin, Deren Yang, Tingting Jiang, Xuegong Yu, and Duanlin Que. "Recent Patenting Activities in Low-Cost Silicon Raw Materials for Silicon Solar Cells." Recent Patents on Materials Science 4, no. 1 (March 21, 2011): 35–42. http://dx.doi.org/10.2174/1874465611104010035.

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36

Franklin, Evan, Vernie Everett, Andrew Blakers, and Klaus Weber. "Sliver Solar Cells: High-Efficiency, Low-Cost PV Technology." Advances in OptoElectronics 2007 (September 2, 2007): 1–9. http://dx.doi.org/10.1155/2007/35383.

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Sliver cells are thin, single-crystal silicon solar cells fabricated using standard fabrication technology. Sliver modules, composed of several thousand individual Sliver cells, can be efficient, low-cost, bifacial, transparent, flexible, shadow tolerant, and lightweight. Compared with current PV technology, mature Sliver technology will need 10% of the pure silicon and fewer than 5% of the wafer starts per MW of factory output. This paper deals with two distinct challenges related to Sliver cell and Sliver module production: providing a mature and robust Sliver cell fabrication method which produces a high yield of highly efficient Sliver cells, and which is suitable for transfer to industry; and, handling, electrically interconnecting, and encapsulating billions of sliver cells at low cost. Sliver cells with efficiencies of 20% have been fabricated at ANU using a reliable, optimised processing sequence, while low-cost encapsulation methods have been demonstrated using a submodule technique.

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37

Kuo, C. C. "A low-cost dehydrogenation system of amorphous silicon thin films used for fabricating low-temperature polycrystalline silicon." Materialwissenschaft und Werkstofftechnik 45, no. 3 (March 2014): 217–23. http://dx.doi.org/10.1002/mawe.201400210.

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38

Gooch, Roland, and Thomas Schimert. "Low-Cost Wafer-Level Vacuum Packaging for MEMS." MRS Bulletin 28, no. 1 (January 2003): 55–59. http://dx.doi.org/10.1557/mrs2003.18.

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AbstractVacuum packaging of high-performance surface-micromachined uncooled microbolometer detectors and focal-plane arrays (FPAs) for infrared imaging and nonimaging applications, inertial MEMS (microelectromechanical systems) accelerometers and gyroscopes, and rf MEMS resonators is a key issue in the technology development path to low-cost, high-volume MEMS production. In this article, two approaches to vacuum packaging for MEMS will be discussed. The first is component-level vacuum packaging, a die-level approach that involves packaging individual die in a ceramic package using either a silicon or germanium lid. The second approach is wafer-level vacuum packaging, in which the vacuum-packaging process is carried out at the wafer level prior to dicing the wafer into individual die. We focus the discussion of MEMS vacuum packaging on surface-micromachined uncooled amorphous silicon infrared microbolometer detectors and FPAs for which both component-level and wafer-level vacuum packaging have found widespread application and system insertion. We first discuss the requirement for vacuum packaging of uncooled a-Si microbolometers and FPAs. Second, we discuss the details of the component-level and wafer-level vacuum-packaging approaches. Finally, we discuss the system insertion of wafer-level vacuum packaging into the Raytheon 2000AS uncooled infrared imaging camera product line that employs a wafer-level-packaged 160 × 120 pixel a-Si infrared FPA.

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39

Li, Junpeng, and Zi Wang. "Porous structure based on Fenton reaction-assisted chemical etching of commercial silicon powder and its application for electrocatalytic reduction of carbon dioxide." Journal of Physics: Conference Series 2713, no. 1 (February 1, 2024): 012054. http://dx.doi.org/10.1088/1742-6596/2713/1/012054.

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Abstract Silicon-based porous nanocomposites are considered promising as electrode materials for the photoelectrochemical reduction of carbon dioxide. However, the high cost of raw materials and tedious processing for building nanostructures may not be conducive to large-scale industrial applications in terms of cost. Herein, we would like to introduce a porous structure prepared by Fenton reaction-assisted chemical etching of low-cost commercial silicon powder in the mixed solution of hydrogen fluoride and hydrogen peroxide. These porous particles are further decorated with silver nanoparticles to explore their feasibility for photoelectrochemical reduction of carbon dioxide. As shown by experimental results, this silicon-based nanocomposite is capable of catalyzing the conversion of carbon dioxide into carbon monoxide. The low cost of commercial silicon powder (~$3000/ton) compared with that of silicon wafers also renders this method potential and feasible for large-scale production of silicon-based porous materials.

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40

Agarwrwal, Dhirendra, Neeraj Kumar, and A. K. Bansal. "Development of Low Cost Corrosion Resistant Fe-Cr-Mn-Mo White Cast Irons." Material Science Research India 14, no. 2 (December 25, 2017): 176–84. http://dx.doi.org/10.13005/msri/140215.

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Cast irons are basically binary alloys of iron and carbon having carbon exceeding its maximum solid solubility in austenite but less than the carbon content of iron carbide. However, like steels, cast irons have varying quantities of silicon, manganese, phosphorus and sulphur. Silicon plays an important role in controlling the properties of cast irons and for this reason, the term cast iron is usually applied to a series of iron, carbon and silicon alloys. Special purpose cast irons include white and alloy cast irons which are mainly used for applications demanding enhanced abrasion, corrosion or heat resistance. In present study, corrosion resistant cast irons are of our interest.

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41

Cheng, Yuang-Tung, Jyh-Jier Ho, William J. Lee, Song-Yeu Tsai, Yung-An Lu, Jia-Jhe Liou, Shun-Hsyung Chang, and Kang L. Wang. "Investigation of Low-Cost Surface Processing Techniques for Large-Size Multicrystalline Silicon Solar Cells." International Journal of Photoenergy 2010 (2010): 1–6. http://dx.doi.org/10.1155/2010/268035.

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The subject of the present work is to develop a simple and effective method of enhancing conversion efficiency in large-size solar cells using multicrystalline silicon (mc-Si) wafer. In this work, industrial-type mc-Si solar cells with area of125×125 mm2were acid etched to produce simultaneouslyPOCl3emitters and silicon nitride deposition by plasma-enhanced chemical vapor deposited (PECVD). The study of surface morphology and reflectivity of different mc-Si etched surfaces has also been discussed in this research. Using our optimal acid etching solution ratio, we are able to fabricate mc-Si solar cells of 16.34% conversion efficiency with double layers silicon nitride (Si3N4) coating. From our experiment, we find that depositing double layers silicon nitride coating on mc-Si solar cells can get the optimal performance parameters. Open circuit (Voc) is 616 mV, short circuit current (Jsc) is 34.1 mA/cm2, and minority carrier diffusion length is 474.16 μm. The isotropic texturing and silicon nitride layers coating approach contribute to lowering cost and achieving high efficiency in mass production.

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42

Keller, Caroline, Yassine Djezzar, Jingxian Wang, Saravanan Karuppiah, Gérard Lapertot, Cédric Haon, and Pascale Chenevier. "Easy Diameter Tuning of Silicon Nanowires with Low-Cost SnO2-Catalyzed Growth for Lithium-Ion Batteries." Nanomaterials 12, no. 15 (July 28, 2022): 2601. http://dx.doi.org/10.3390/nano12152601.

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Silicon nanowires are appealing structures to enhance the capacity of anodes in lithium-ion batteries. However, to attain industrial relevance, their synthesis requires a reduced cost. An important part of the cost is devoted to the silicon growth catalyst, usually gold. Here, we replace gold with tin, introduced as low-cost tin oxide nanoparticles, to produce a graphite–silicon nanowire composite as a long-standing anode active material. It is equally important to control the silicon size, as this determines the rate of decay of the anode performance. In this work, we demonstrate how to control the silicon nanowire diameter from 10 to 40 nm by optimizing growth parameters such as the tin loading and the atmosphere in the growth reactor. The best composites, with a rich content of Si close to 30% wt., show a remarkably high initial Coulombic efficiency of 82% for SiNWs 37 nm in diameter.

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43

Li, Jian Gong, Peng Wu, Peng Yu, and Shu Ai Li. "Ribbon Silicon Material for Solar Cells." Advanced Materials Research 531 (June 2012): 67–70. http://dx.doi.org/10.4028/www.scientific.net/amr.531.67.

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Solar cell is one of most important renewable energy. But now it is not be widely used because of its high cost compared with traditional resource. Ribbon silicon is one new low cost solar cell material avoiding ingot casting and slicing. It is a promising silicon wafer fabrication technology alternative to traditional ingot casting and slicing. Using ribbon silicon can make solar cell production cost greatly reduced. In this paper EFG, String Ribbon and a novel silicon wafer are discussed.

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44

Khalifa, Marouan, Malek Atyaoui, Rachid Ouertani, Messaoud Hajji, and Hatem Ezzaouia. "Low-cost solar grade silicon powder through iterative gettering of thermally treated porous silicon." Materials Research Bulletin 83 (November 2016): 324–28. http://dx.doi.org/10.1016/j.materresbull.2016.06.018.

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45

Ai, Bin, Hui Shen, Qun Ban, Zongcun Liang, Xudong Li, Ying Xu, and Xianbo Liao. "Study on epitaxial silicon thin film solar cells on low cost silicon ribbon substrates." Journal of Crystal Growth 276, no. 1-2 (March 2005): 83–91. http://dx.doi.org/10.1016/j.jcrysgro.2004.11.384.

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abderrassoul, Roshdy. "Low-Cost Purification of Metallurgical Silicon for Photovoltaic Application.(Dept.E)." MEJ. Mansoura Engineering Journal 17, no. 2 (April 28, 2021): 13–23. http://dx.doi.org/10.21608/bfemu.2021.167343.

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Pappalardo, Alfio, Luigi Cosentino, Carlotta Scirè, Sergio Scirè, Gianfranco Vecchio, and Paolo Finocchiaro. "Low-cost radioactivity monitoring with scintillating fibers and silicon photomultipliers." Optical Engineering 53, no. 4 (April 7, 2014): 047102. http://dx.doi.org/10.1117/1.oe.53.4.047102.

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Tashiro, K., and I. Sasada. "A low-cost magnetic shield consisting of nonoriented silicon steel." IEEE Transactions on Magnetics 41, no. 10 (October 2005): 4081–83. http://dx.doi.org/10.1109/tmag.2005.855195.

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Silard, A., and G. Nani. "Bifacial solar cells on large-area low-cost silicon wafers." IEEE Electron Device Letters 9, no. 1 (January 1988): 20–22. http://dx.doi.org/10.1109/55.20400.

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Weber, K. J., A. W. Blakers, M. J. Stocks, J. H. Babaei, V. A. Everett, A. J. Neuendorf, and P. J. Verlinden. "A Novel Low-Cost, High-Efficiency Micromachined Silicon Solar Cell." IEEE Electron Device Letters 25, no. 1 (January 2004): 37–39. http://dx.doi.org/10.1109/led.2003.821600.

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