Relevant bibliographies by topics / Logical synthesis

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
  6. Reports

Academic literature on the topic 'Logical synthesis'

Author: Grafiati
Published: 30 May 2022
Last updated: 31 May 2022

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Journal articles on the topic "Logical synthesis"

1

Sylvan, Richard. "Toward an Improved Cosmo-Logical Synthesis." Grazer Philosophische Studien 25 (1985): 135–79. http://dx.doi.org/10.5840/gps1985/8625/266.

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Sylvan, Richard. "Toward an Improved Cosmo-Logical Synthesis." Grazer Philosophische Studien 25, no. 1 (September 6, 1986): 135–79. http://dx.doi.org/10.1163/18756735-02501007.

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Rengaswamy, Narayanan, Robert Calderbank, Swanand Kadhe, and Henry D. Pfister. "Logical Clifford Synthesis for Stabilizer Codes." IEEE Transactions on Quantum Engineering 1 (2020): 1–17. http://dx.doi.org/10.1109/tqe.2020.3023419.

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Benzaken, C. "From logical gates synthesis to chromatic bicritical clutters." Discrete Applied Mathematics 96-97 (October 1999): 259–305. http://dx.doi.org/10.1016/s0166-218x(99)00095-5.

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Kimura, Shigetomo, Atsushi Togashi, and Norio Shiratori. "Inductive Synthesis of Recursive Processes from Logical Properties." Information and Computation 163, no. 2 (December 2000): 257–84. http://dx.doi.org/10.1006/inco.2000.2883.

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Opanasenko, V. M., and S. L. Kryvyi. "Synthesis multilevel structure with multiple output." PROBLEMS IN PROGRAMMING, no. 2-3 (June 2016): 048–62. http://dx.doi.org/10.15407/pp2016.02-03.048.

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The method for solution of adaptation problem of the logical network with many outputs for the restoration of the input set of binary vectors when given only the lower values of this set and the values of the outputs is considered. The algorithm synthesis of the logical network is based on the description of its polynomial Zhegalkin.
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Timis, Mihai Grigore, Alexandru Valachi, Alexandru Barleanu, and Andrei Stan. "Logical Function Decomposition Method for Synthesis of Digital Logical System Implemented with Programmable Logic Devices (PLD)." Circuits and Systems 04, no. 07 (2013): 472–77. http://dx.doi.org/10.4236/cs.2013.47062.

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Voevoda, Alexandr Aleksandrovich, and Dmitry Olegovich Romannikov. "Synthesis of Neural Network for Solving Logical-Arithmetic Problems." SPIIRAS Proceedings 5, no. 54 (October 1, 2017): 205. http://dx.doi.org/10.15622/sp.54.9.

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Roussel, Jean-Marc, and Jean-Jacques Lesage. "Algebraic synthesis of logical controllers despite inconsistencies in specifications." IFAC Proceedings Volumes 45, no. 29 (2012): 307–14. http://dx.doi.org/10.3182/20121003-3-mx-4033.00050.

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Brendel, M. H., F. Friedler, and L. T. Fan. "Combinatorial foundation for logical formulation in process network synthesis." Computers & Chemical Engineering 24, no. 8 (September 2000): 1859–64. http://dx.doi.org/10.1016/s0098-1354(00)00569-x.

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Dissertations / Theses on the topic "Logical synthesis"

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Yang, Ting. "Evaluating development projects : exploring a synthesis model of the logical framework approach and outcome mapping." Thesis, University of Sussex, 2018. http://sro.sussex.ac.uk/id/eprint/79800/.

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Under the current results-driven development agenda, sound evaluation, and a corresponding evaluation toolkit, need to be in place to examine whether and to what extent development interventions have achieved their targeted objectives and results, and to generate lessons for further development learning and improvement. My review of the literature shows that innovative and appropriate evaluation approaches are needed to address key challenges in evaluation such as the tension between learning and accountability objectives, the need to unpack the mechanisms linking outputs and outcomes or goal, and to add an actor perspective. Irrespective of project type, the Logical Framework Approach (LFA) is often a standard requirement of major official donor agencies on projects they fund, so as to fulfil bureaucratic imperatives. However, it is often considered inadequate in addressing key challenges in development evaluation. Given the dominant status of the LFA with such strong support from donors, it is helpful to seek a ‘middle way': a combination of the LFA with other approaches in order to address some of its inadequacies, while satisfying donor agencies' requirements. A synthesis of the LFA and Outcome Mapping (OM) is one such option. This thesis explores the practical value and usefulness of a synthesis model empirically. Applying the model in two case study aid projects, I found that it serves well as a theory-based evaluation tool with a double-stranded (actor strand and results chain) theory of change. The model helps reconcile learning and accountability and add explanatory power and an explicit actor perspective. It also helps establish causation and enable attribution claims at various results levels with its different elements. The model has some limitations but my results suggest it can be usefully adopted. The choice of its application depends on project evaluation context and purpose in specific cases.
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Teslenko, Maxim. "All Around Logic Synthesis." Doctoral thesis, Stockholm : Mikroelektronik och informationsteknik, Kungliga Tekniska högskolan, 2008. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-4700.

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Kozlowski, Tomasz. "Application of exclusive-OR logic in technology independent logic optimisation." Thesis, University of Bristol, 1996. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.296702.

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Berrada, Fathi Wafâa. "Influence des architectures "materiel" et "logiciel" de systemes de synthese d'image sur l'efficacite d'algorithmes de visualisation." Université Louis Pasteur (Strasbourg) (1971-2008), 1988. http://www.theses.fr/1988STR13185.

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Presentation sur le materiel existant, les logiciels de base disponibles, les normalisations operationnelles ainsi que les algorithmes diffuses actuellement. Il est montre comment ces trois parties interreagissent entre elles. Il est precise qu'elle parait etre l'architecture "materiel" et "logiciel" la plus adaptee a une exploitation avancee
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Färm, Petra. "Advanced algorithms for logic synthesis." Licentiate thesis, KTH, Microelectronics and Information Technology, IMIT, 2004. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-1717.

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In this thesis, new algorithms for logic synthesis areexplored. Our work is motivated by two observations: (1)Traditional logic synthesis applies literal count as theprimary quality metric during the technology independentoptimization phase. Thissimplistic metric often leads to badcircuit structures as it cannot foresee the impact of earlychoices on the final area, delay, power consumption, etc. (2)Although powerful, global Boolean optimization is not robustand corresponding algorithms cannot be used in practice withoutartificially restricting the application window. Othertechniques, such as algebraic methods scale well but provideweaker optimization power.

In our most recent work, both problems are addressed byapplying a simulated annealing approach that is based on asimple circuit graph representation and a complete set of localtransformations, including algebraic and Boolean optimizationsteps. The objective of the annealing process can be tuned tocomplex cost functions, combining area, timing, routability,and power. Our experimental results on benchmark functionsdemonstrate the significant potential of the simulatedannealing approach.

Earlier work includes a fast rule-based system fortechnology independent optimization. A Boolean network isoptimized by applying local structural transformations thatpreserve its functionality. NPN classes of Boolean functionsare used to identify replacement rules for localtransformations. It provides fast and roboust optimization, butuses a simplistic objective.

Decomposition is one of the important steps of logicsynthesis. It can be applied during the technology independentoptimization phase as well as during the technology mapping. Wehave extended a conjunctive decomposition of Boolean functions[1]to multiple-valued input binary-valued output functions.Our extension provides a more efficient way for decomposingmutiple-output Boolean functions, since [1]only considerssingle-output functions.

Furthermore, we address the problems of technology mappingand logic optimization for Chemically Assembled ElectronicNanotechnoloy (CAEN).CAEN is a promising alternative toCMOS-based technology, allowing construction of extremeleydense low-power computational elements with inexpensivechemical self-assembly.

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Wang, Qi. "Logic synthesis for low power." Diss., The University of Arizona, 1998. http://hdl.handle.net/10150/288924.

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The dissertation addresses several problems in the power optimization and power-delay tradeoffs in digital CMOS circuits. The work is organized according to the three main sources of power dissipation: Power dissipation due to switching (P(sc)), standby or leakage power (P(leak)) and short circuit power (P(sc)). First we present new, efficient and provably correct algorithms for minimizing the switching power in combinational and sequential CMOS logic circuits. The techniques are based on the addition and removal of redundancies at the logic level. The basic technique developed for combinational circuits is extended to sequential circuits. Results of experiments carried on large (thousands of logic gates) commerical circuits (of the PowerPC chip) will be presented. Power dissipation due to the short circuit current has received much less attention. For submicron MOSFETs, this can be comparable to the switching power. A new, and computationally tractable model for the short circuit current in CMOS inverters and more complex CMOS gates was developed. This model was verified using a commerical 0.25 μm CMOS library and device models. The problem of minimizing the standby power for deep submicron technology is also addressed. The standby power dissipation has often been ignored in the design of CMOS circuits since its contribution to the total power dissipation has been negligable. However as device dimensions and voltages are scaled down, the standby power can be of the same order of magnitude as the switching power. This is a serious problem of many portable devices as they are in standby mode for considerable periods of time. One approach to alleviate this problem is the use of dual threshold voltages. We developed several new algorithms that optimally assign one of two threshold voltages to CMOS gates so as to minimize the standby power without sacrificing performance. The new algorithms handle circuits of thousands of gates and it is shown that the standby power can be reduced by as much as an order of magnitude without any loss of performance.
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Hadjinicolaou, M. G. "Synthesis of programmable logic arrays." Thesis, Brunel University, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.371168.

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Pearce, Maureen. "Logic synthesis for programmable devices." Thesis, University of Bristol, 1993. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.357911.

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Poulain, Thierry. "Contribution du génie logiciel pour la conception et l'évaluation d'applications de supervision." Valenciennes, 1994. https://ged.uphf.fr/nuxeo/site/esupversions/86faffad-3e4b-4990-b7c1-7a6b0cf7faac.

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A partir d'une démarche axée sur le génie logiciel, l'objectif de cette thèse est d'intégrer des fonctionnalités de prototypage, favorisant le cycle de développement d'applications de surveillance. Le mémoire est divisé en cinq chapitres. Dans le premier, sont abordés les systèmes de supervision. Puis, après avoir identifié un ensemble de problèmes ergonomiques résultant de leur utilisation et de leur conception, une démarche globale de conception et évaluation développée au LAIH est décrite. Une application de supervision nécessitant de nombreux développements informatiques, les principaux modèles utilisés en génie logiciel sont ensuite abordés. La conception et l'évaluation d'un système homme-machine fait intervenir de multiples méthodes et outils issus de domaines divers. Dans ce cadre, un panorama de ces méthodes et outils fait l'objet du deuxième chapitre. Ces différents points nous conduisent à proposer une démarche axée sur le prototypage dans le troisième chapitre. Celle-ci a pour objectif d'améliorer la conception des images destinées à la supervision des procédés en fournissant un cadre méthodologique aux différents intervenants impliqués dans le cycle de développement. Dans l'objectif d'appliquer cette démarche, le quatrième chapitre décrit notre contribution à l'étude et l'intégration de fonctionnalités de prototypage dans l'atelier ATLAS (atelier logiciel pour l'animation de synoptiques). Cette recherche a été menée en collaboration avec la CSEE et 3IP. ATLAS consiste, à partir d'une description graphique du procédé, à générer des prototypes d'images. Une fois les vues graphiques évaluées et validées dynamiquement, une partie des données de prototypage est ensuite récupérée pour produire l'application définitive qui sera implantée sur le site. Enfin une première validation technique ainsi que des perspectives de recherches et de développement sont présentées dans le cinquième chapitre.
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Димко, Єгор Павлович. "Моделі та методи оптимального керування індукційним дуплекс-процесом за умов невизначеності." Thesis, Національний технічний університет "Харківський політехнічний інститут", 2018. http://repository.kpi.kharkov.ua/handle/KhPI-Press/38635.

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Дисертація на здобуття наукового ступеня кандидата технічних наук за спеціальністю 05.13.03 – системи та процеси керування. – Національний технічний університет "Харківський політехнічний інститут", Харків, 2018. Дисертація присвячена вирішенню актуальної науково-практичної задачі – розробці методів оптимального управління в умовах невизначеності. Показана можливість побудови адекватної математичної моделі індукційного дуплекс-процесу плавки як об'єкта управління в умовах неможливості реалізації плану активного експерименту в виробничих умовах. На основі цього запропоновано для опису кінцевого стану в задачі пошуку оптимального за кінцевим станом управління використовувати результати параметричного опису за визначенням локально-оптимальних значень вхідних змінних на основі реалізації процедури рідж-аналізу. Показано, як з використанням комбінованої процедури штучної ортогоналізації за даними пасивного експерименту при довільній формі плану експерименту і центрального ортогонального планування отримати таке параметричне опис. Розв'язана задача синтезу оптимального управління індукційної плавкою в печах ІСТ1 / 0.8-М5 в умовах альтернативних стратегій і доведено, що при виборі стратегії плавлення на "болоті" фазова траєкторія буде постійно змінюватися внаслідок корекції початкового стану, що обумовлено зміною швидкості розплавлення при обраному способі управління. Показано, як оптимальне за швидкодією управління може бути отримано з використанням принципу максимуму Понтрягіна в умовах обліку невизначеності в описі початкового стану об'єкта управління. Синтезований оптимальний регулятор температурного режиму в індукційної міксері на основі мультіальтернатівного опису кінцевого стану, характерною особливістю якого є використання оптимальних рішень рідж-аналізу і параметричної класифікації температурного режиму. Показано, що такий підхід може бути застосований для блоку логічних умов при логічному синтезі комбінованої системи управління індукційним дуплекс-процесом.
Thesis for the degree of candidate of technical sciences in specialty 05.13.03 – systems and control processes. – National Technical University "Kharkov Polytechnic Institute", Kharkov, 2018. The thesis is devoted to the solution of an actual scientific and practical problem – the development of optimal control methods in conditions of uncertainty. The possibility of building an adequate mathematical model of an induction duplex melting process as a control object under the conditions of impossibility of implementing an active experiment plan under production conditions is shown. Based on this, it is proposed to use the results of the parametric description by definition of the local-optimal values of the input variables based on the implementation of the ridge analysis procedure to describe the final state in the problem of finding the optimal by the final state control. It is shown how using a combined procedure of artificial orthogonalization according to a passive experiment with an arbitrary form of the experiment plan and central orthogonal planning to obtain such a parametric description. The problem of synthesizing optimal control of induction melting in IST1 / 0.8-M5 furnaces in terms of alternative strategies was solved and it was proved that when choosing a melting strategy in the “bog” phase trajectory will constantly change due to the correction of the initial state, which is caused by the change in melting rate with the selected control method. It is shown how the optimal in terms of speed control can be obtained using the Pontryagin maximum principle in terms of taking into account the uncertainty in the description of the initial state of the control object. An optimal temperature regulator was synthesized in an induction mixer based on a multi-alternative description of the final state, a characteristic feature of which is the use of optimal solutions of ridge analysis and parametric classification of the temperature regime. It is shown how such an approach can be applied to a block of logical conditions in the logical synthesis of a combined control system of an induction duplex process.
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Books on the topic "Logical synthesis"

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Lampert, Jay. Synthesis and Backward Reference in Husserl’s Logical Investigations. Dordrecht: Springer Netherlands, 1995. http://dx.doi.org/10.1007/978-94-015-8443-2.

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Lampert, Jay. Synthesis and backward reference in Husserl's Logical investigations. Dordrecht: Kluwer Academic Publishers, 1995.

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Smarandache, Florentin. Neutrosophy: Neutrosophic probability, set, and logic : analytic synthesis & synthetic analysis. Rehoboth, NM: American Research Press, 1998.

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Grodskiy, Vladimir. Economics: The End of the "Two Cambridge Disput". ru: Publishing Center RIOR, 2020. http://dx.doi.org/10.29039/02029-6.

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The monograph for the first time comprehensively explores two main areas of modern economics - the mainstream and neoricardianism, which are in the state of the so-called "dispute between the two Cambridges". The theoretical advantages and disadvantages of the directions, as well as specific proposals for their synthesis are shown. The author’s interpretations of many issues of economic theory are presented, aimed at increasing its consistency, logical tenacity and predictability of further development. Addressed to scientists, graduate students and teachers who specialize in the field of economics.
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Husserl, Edmund. Aktive Synthesen: Aus der Vorlesung "Transzendentale Logik" 1920/21 : Ergänzungsband zu "Analysen zur passiven Synthesis". Dordrecht: Kluwer Academic Publishers, 2000.

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Balikoev, Vladimir. Economic studies: history, theory, methodology. ru: INFRA-M Academic Publishing LLC., 2020. http://dx.doi.org/10.12737/1035827.

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It analyzes methodological problems of contemporary economic theory and concrete economic disciplines. In a simple and accessible form set out in historical perspective theory and methodology of economic research in a variety of economic doctrines from mercantilism to contemporary neoliberalism. Much attention is paid to the national identity of economic theory in the methodological aspect. In detail and with specific examples, discusses the methodology of dialectics and dialectical materialism, the combination of historical and logical, analysis and synthesis, induction and deduction, etc., as well as their tools of research — a scientific theory, concept, paradigm, principle, Maxim. Similar to the analysis in the example are exposed to methodologies and tools for economic studies analysis of economic activities, banking, statistics, accounting, and financial management. Addressed to students, undergraduates, graduate students, teachers and anyone interested in research methodology.
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1964-, Ghosh Abhijit, and Keutzer Kurt William 1955-, eds. Logic synthesis. New York: McGraw-Hill, 1994.

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Baranov, S. I. Logic synthesis for control automata. Dordrecht [The Netherlands]: Kluwer Academic Publishers, 1994.

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Ashar, Pranav. Sequential logic synthesis. Boston: Kluwer Academic Publishers, 1992.

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Manna, Zohar. Fundamentals of deductive program synthesis. Stanford, Calif: Dept. of Computer Science, Stanford University, 1992.

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Book chapters on the topic "Logical synthesis"

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Costea, Andreea, Amy Zhu, Nadia Polikarpova, and Ilya Sergey. "Concise Read-Only Specifications for Better Synthesis of Programs with Pointers." In Programming Languages and Systems, 141–68. Cham: Springer International Publishing, 2020. http://dx.doi.org/10.1007/978-3-030-44914-8_6.

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AbstractIn program synthesis there is a well-known trade-off between concise and strong specifications: if a specification is too verbose, it might be harder to write than the program; if it is too weak, the synthesised program might not match the user’s intent. In this work we explore the use of annotations for restricting memory access permissions in program synthesis, and show that they can make specifications much stronger while remaining surprisingly concise. Specifically, we enhance Synthetic Separation Logic (SSL), a framework for synthesis of heap-manipulating programs, with the logical mechanism of read-only borrows.We observe that this minimalistic and conservative SSL extension benefits the synthesis in several ways, making it more (a) expressive (stronger correctness guarantees are achieved with a modest annotation overhead), (b) effective (it produces more concise and easier-to-read programs), (c) efficient (faster synthesis), and (d) robust (synthesis efficiency is less affected by the choice of the search heuristic). We explain the intuition and provide formal treatment for read-only borrows. We substantiate the claims (a)–(d) by describing our quantitative evaluation of the borrowing-aware synthesis implementation on a series of standard benchmark specifications for various heap-manipulating programs.
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Coudert, Olivier. "Logical and Physical Design: A Flow Perspective." In Logic Synthesis and Verification, 167–96. Boston, MA: Springer US, 2002. http://dx.doi.org/10.1007/978-1-4615-0817-5_7.

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Moody, Jonathan. "Logical Mobility and Locality Types." In Logic Based Program Synthesis and Transformation, 69–84. Berlin, Heidelberg: Springer Berlin Heidelberg, 2005. http://dx.doi.org/10.1007/11506676_5.

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Bellot, Patrick, and Bernard Robinet. "Logical Synthesis of Imperative O.O. Programs." In Logic-Based Program Synthesis and Transformation, 316–18. Berlin, Heidelberg: Springer Berlin Heidelberg, 1999. http://dx.doi.org/10.1007/3-540-48958-4_20.

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Johnson, Steven D. "Manipulating logical organization with system factorizations." In Hardware Specification, Verification and Synthesis: Mathematical Aspects, 260–81. New York, NY: Springer New York, 1990. http://dx.doi.org/10.1007/0-387-97226-9_33.

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Ferrari, Mauro, Camillo Fiorentini, and Mario Ornaghi. "Extracting Exact Time Bounds from Logical Proofs." In Logic Based Program Synthesis and Transformation, 245–65. Berlin, Heidelberg: Springer Berlin Heidelberg, 2002. http://dx.doi.org/10.1007/3-540-45607-4_14.

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Saeedloei, Neda. "A Logical Encoding of Timed $$\pi $$ -Calculus." In Logic-Based Program Synthesis and Transformation, 164–82. Cham: Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-14125-1_10.

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André, Charles, Julien DeAntoni, Frédéric Mallet, and Robert de Simone. "The Time Model of Logical Clocks Available in the OMG MARTE Profile." In Synthesis of Embedded Software, 201–27. Boston, MA: Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-6400-7_7.

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Frühwirth, Thom. "Justifications in Constraint Handling Rules for Logical Retraction in Dynamic Algorithms." In Logic-Based Program Synthesis and Transformation, 147–63. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-94460-9_9.

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Lampert, Jay. "Introduction." In Synthesis and Backward Reference in Husserl’s Logical Investigations, 1–37. Dordrecht: Springer Netherlands, 1995. http://dx.doi.org/10.1007/978-94-015-8443-2_1.

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Conference papers on the topic "Logical synthesis"

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Hahanov, Vladimir, Mykhailo Liubarskyi, Wajeb Gharibi, Svetlana Chumachenko, Eugenia Litvinova, and Ivan Hahanov. "Test Synthesis for Logical X-functions." In 2018 IEEE East-West Design & Test Symposium (EWDTS). IEEE, 2018. http://dx.doi.org/10.1109/ewdts.2018.8524863.

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"Synthesis of Software from Logical Constraints." In 7th International Conference on Software Paradigm Trends. SciTePress - Science and and Technology Publications, 2012. http://dx.doi.org/10.5220/0004101903550358.

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Henderson, Tom, Chuck Hansen, and Bir Bhanu. "The Synthesis of Logical Sensor Specifications." In 1985 Cambridge Symposium, edited by David P. Casasent. SPIE, 1985. http://dx.doi.org/10.1117/12.950832.

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Deniziak, S., M. Wiśniewski, and K. Kurczyna. "FPGA-oriented synthesis of multivalued logical networks." In INTERNATIONAL CONFERENCE OF COMPUTATIONAL METHODS IN SCIENCES AND ENGINEERING 2016 (ICCMSE 2016). Author(s), 2016. http://dx.doi.org/10.1063/1.4968664.

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Deniziak, Stanislaw, Mariusz Wisniewski, and Karol Wieczorek. "Synthesis of Multivalued Logical Networks for FPGA Implementations." In 2016 Euromicro Conference on Digital System Design (DSD). IEEE, 2016. http://dx.doi.org/10.1109/dsd.2016.107.

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Rengaswamy, Narayanan, Robert Calderbank, Henry D. Pfister, and Swanand Kadhe. "Synthesis of Logical Clifford Operators via Symplectic Geometry." In 2018 IEEE International Symposium on Information Theory (ISIT). IEEE, 2018. http://dx.doi.org/10.1109/isit.2018.8437652.

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Pandya, Paritosh K., and Amol Wakankar. "Logical specification and uniform synthesis of robust controllers." In MEMOCODE '19: 17th ACM-IEEE International Conference on Formal Methods and Models for System Design. New York, NY, USA: ACM, 2019. http://dx.doi.org/10.1145/3359986.3361213.

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Zhang, Kuize, and Karl Henrik Johansson. "Synthesis for controllability and observability of logical control networks." In 2019 IEEE 58th Conference on Decision and Control (CDC). IEEE, 2019. http://dx.doi.org/10.1109/cdc40024.2019.9028927.

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Tanguy, Julien, Jean-Luc Béchennec, Mikaël Briday, and Olivier H. Roux. "Reactive Embedded Device Driver Synthesis using Logical Timed Models." In 4th International Conference on Simulation and Modeling Methodologies, Technologies and Applications. SCITEPRESS - Science and Technology Publications, 2014. http://dx.doi.org/10.5220/0005040101630169.

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Verevkin, Alexander, and Oleg Kiryushin. "The Synthesis of Complex Logical Controllers with Variables of Boolean and Fuzzy Logics." In Proceedings of the 7th Scientific Conference on Information Technologies for Intelligent Decision Making Support (ITIDS 2019). Paris, France: Atlantis Press, 2019. http://dx.doi.org/10.2991/itids-19.2019.9.

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Reports on the topic "Logical synthesis"

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Saldanha, Alexander, and Viorica Simion. Combinational Logic Synthesis Research Report for Advanced Logic Synthesis for Low Power Mobile Applications Project. Fort Belvoir, VA: Defense Technical Information Center, August 1997. http://dx.doi.org/10.21236/ada329387.

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Rudell, Richard L. Multiple-Valued Logic Minimization for PLA Synthesis. Fort Belvoir, VA: Defense Technical Information Center, June 1986. http://dx.doi.org/10.21236/ada606736.

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Devadas, Srinivas. Approaches to Multi-Level Sequential Logic Synthesis. Fort Belvoir, VA: Defense Technical Information Center, March 1989. http://dx.doi.org/10.21236/ada208322.

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Lukac, Martin. Quantum Inductive Learning and Quantum Logic Synthesis. Portland State University Library, January 2000. http://dx.doi.org/10.15760/etd.2316.

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Devadas, Srinivas, Hi-Keung T. Ma, and A. R. Newton. Redundancies and Don't Cares in Sequential Logic Synthesis. Fort Belvoir, VA: Defense Technical Information Center, May 1989. http://dx.doi.org/10.21236/ada211931.

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Sarabi, Andisheh. Logic Synthesis with High Testability for Cellular Arrays. Portland State University Library, January 2000. http://dx.doi.org/10.15760/etd.6638.

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Patino, Alberto. Reversible Logic Synthesis Using a Non-blocking Order Search. Portland State University Library, January 2000. http://dx.doi.org/10.15760/etd.162.

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Chen, Bing C., Weiya Zhang, David Johnson, Manoj Thota, Zhen Wu, Kon-Well Wang, Soobum Lee, and Fabio Semperlotti. Adaptable Structural Logic System Synthesis with Bistable Snap-Through Elements. Fort Belvoir, VA: Defense Technical Information Center, December 2012. http://dx.doi.org/10.21236/ada574780.

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DUDLEY, PETER A. Synthetic Aperture Radar Image Formation in Reconfigurable Logic. Office of Scientific and Technical Information (OSTI), June 2001. http://dx.doi.org/10.2172/782724.

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Sadigh, Dorsa, Eric Kim, Samuel Coogan, S. S. Sastry, and Sanjt A. Seshia. A Learning Based Approach to Control Synthesis of Markov Decision Processes for Linear Temporal Logic Specifications. Fort Belvoir, VA: Defense Technical Information Center, September 2014. http://dx.doi.org/10.21236/ada623517.

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