Dissertations / Theses on the topic 'Log-domain filter'

The cochlea is an organ which extracts frequency information from the input sound wave. It also produces nerve signals, which are further analysed by the brain and ultimately lead to perception of the sound. An existing model of the cochlea by Fragni`ere is first analysed by simulation. This passive model is found to have the properties that the living cochlea does in terms of the frequency response. An analog VLSI circuit implementation of this cochlear model in CMOS weak inversion is proposed, using log-domain filters in current domain. It is fabricated on a chip and a measurement of a basilar membrane section is performed. The measurement shows a reasonable agreement to the model. However, the circuit is found to have a problem related to transistor mismatch, causing different behaviour in identical circuit blocks. An active cochlear model is proposed to overcome this problem. The model incorporates the effect of the outer hair cells in the living cochlea, which controls the quality factor of the basilar membrane filters. The outer hair cells are incorporated as an extra voltage source in series with the basilar membrane resonator. Its value saturates as the input signal becomes larger, making the behaviour rather closer to that of a passive model. The simulation results show this nonlinear phenomenon, which is also seen in the living cochlea. The contribution of this thesis is summarised as follows: a) the first CMOS weak inversion current domain basilar membrane resonator is designed and fabricated, and b) the first active two-dimensional cochlear model for analog VLSI implementation is developed.

Frequency filtering networks have numerous applications in consumer products. For high-speed and low-voltage systems, continuous-time filters are the preferred choice---these filters have become very popular with the wireless industry. Unfortunately, continuous-time filters have a high production cost since they are not geared toward mass production. This thesis proposes an analog filter structure that can be both mass produced and customized for a particular application. Such a structure is possible through the use of a state-space approach, and log-domain filtering.<br>First, a general state-space formulation is presented; a method of obtaining the state-space coefficients from an equivalent LC ladder network is described. Such a set of coefficients results in a realization with low noise and low sensitivity properties. Next, the effects of coefficient quantization on a state-space filter's response is examined. An optimization procedure is outlined to obtain the best approximation to the desired transfer function.<br>In order to implement the proposed filter structure, a universal log-domain cell is presented. Such a cell can be used to produce the stages required by any filter design (input, output, and integrator stages). Using the universal log-domain cell, a systematic approach to realizing any arbitrary-order filter is described. Next, the peripheral components needed to complete the filter are presented. Included are a novel 8-bit DAC, used to implement the programmable current sources that bias the filter, and V-to-I and I-to-V converters, used to interface the current-mode filter with voltage-mode instruments.<br>Finally, experimental results from several prototype boards are used to verify the feasibility of the proposed filter structure. These boards make use of ICs fabricated in a 0.8 mum BiCMOS technology; included are an IC with stand-alone programmable current sources, an IC with a third-order filter, as well as one with a fifth-order filter. The results from the test boards clearly demonstrate the programmability and functionality of digitally programmable state-space filters.

Thesis (M.S.) -- University of Maryland, College Park, 2004.<br>Thesis research directed by: Dept. of Electrical and Computer Engineering . Title from t.p. of PDF. Includes bibliographical references. Published by UMI Dissertation Services, Ann Arbor, Mich. Also available in paper.

Log-domain filters have emerged in recent years as a new and important class of continuous-time filter. The attractive features of these filters include their compact structure, their potential to run at high frequencies while operating from low power supplies, and their electronic tunability. At the heart of the log-domain filtering technique is the logarithmic/exponential relationship between voltage and current in a transistor. In this work, the development of log-domain filters in CMOS technology will be investigated. The lateral bipolar transistor, inherent to CMOS processes, will be used for this purpose.<br>A SPICE compatible model for a lateral PNP transistor, fabricated in 0.35mu CMOS technology, is presented. A log-domain integrator, which makes use of both lateral PNP transistors and MOSFET transistors operating in strong inversion, as well as a biquadratic low-pass log-domain filter and a third order elliptic low-pass log-domain filter, have each been designed and characterized in 0.35mu CMOS technology. Experimental results indicate that these filters are capable of operation at frequencies up to 10 MHz. For the elliptic filter operating at a bias current of 10 muA, the experimentally measured total harmonic distortion is -39.6 dB for an input current of 5 muA (a 50% current modulation index), the dynamic range is -34.1 dB, and the total power consumption is 183 muW/pole from a 2.5 V supply. These filters are capable of operating at significantly higher frequencies than CMOS log-domain filters described in the literature which make use of MOSFET transistors operating in weak inversion.

A study of the concepts involved in the bias-stability of log-domain filters is presented. Through a thorough analysis of the factors contributing to the existence of multiple and unstable operating points in log-domain filters, a biquad architecture that overcomes these drawbacks is proposed. This is accompanied with a theoretical verification of both stability and the input-output linear behavior. The study provides a foundation for the design and implementation of other bias-stable log-domain circuits.<br>This thesis also presents the design of a multistandard channel-select filter for GSM, IS-95, and WCDMA. The filter's tunability extends from 100 kHz to 20.05 MHz. The implemented 6th-order quasi-Butterworth log-domain filter was fabricated in a Silicon Germanium (SiGeHP5) technology, operates from a supply voltage as low as 1.2 V, and consumes a maximum power of 12.9 mW at 20.05 MHz cutoff frequency. Dynamic biasing techniques are employed in order to extend the SFDR of the filter, e.g. from SFDR = 39 dBm to SFDR = 48 dBm at 20.05 MHz cutoff frequency.

With the advent of portable communications there has been an increased emphasis on high-speed, low-power microelectronics. The log-domain filter is a novel form of continuous-time filter which shows promise in this area. Based on the translinear principle, log-domain filters are simple in structure, fast and easily tunable.<br>This thesis will present a technique for the design of log-domain filters which is based on the operational simulation of LC ladders. The technique is demonstrated through the complete design of a fifth-order Chebyshev log-domain filter, as well as the design of elliptic and bandpass filters. The filters were fabricated using the Gennum GA911 bipolar transistor array technology. HSPICE simulation and experimental results are shown with emphasis on frequency behavior and linearity. The filters showed good correlation between the measured response and the original specifications. They were tunable over two decades and could be operated up to 1 MHz or 1/10th of the $f sb{T}$ of the slowest transistor. Total harmonic distortion and intermodulation distortion was measured with results ranging from $-$45 dB to $-$70 dB.

Thesis (Ph. D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2008.<br>Committee Chair: Anderson, David; Committee Member: Habetler, Thomas; Committee Member: Hasler, Paul; Committee Member: McClellan, James; Committee Member: Minch, Bradley.

碩士<br>國立中山大學<br>電機工程學系研究所<br>97<br>On traditional filters, we usually need a trade off between low-voltage and high dynamic range. The companding filters may solve this problem. This thesis presents a pseudo-exponential third-older low pass filter. All MOSFETs are operated in saturated region to obtain high frequency. The filter has small chip area and less MOSFETs. The filter has supply voltage of 3V, has cutoff frequency of 3MHz to 10MHz, and 1.06mW power dissipation. We will first employ Hspice to simulate the log-domain filter to ensure the correctness of the circuit and make it a reliable reference with the circuit layout. After summarizing all the simulations and analyses, the chip has been fabricated with 0.35um CMOS technology.

碩士<br>國立中山大學<br>電機工程學系研究所<br>96<br>In this thesis, a CMOS tunable second-order log-domain filter using pseudo-exponential approximation is proposed. MOSFETs in the circuit are working in the saturation region. This filter has higher frequency response than that of weak inversion CMOS filter. The circuit has been fabricated with 0.35um CMOS technology. It operates with a supply voltage 3V, internal capacitance C is 1pF, the biasing current varies from 2uA~10uA. The cutoff frequency can be turned from 2MHz~37.5MHz. The harmonic distortion is 0.93% and the power consumption is 772uW.

碩士<br>國立中山大學<br>電機工程學系研究所<br>95<br>Traditionally, the design of continuous time active filters usually has a trade offbetween low-voltage and high dynamic range. One way to solve this problem is companding technology. There are two methods for companding filters. The first method utilizes the exponential I-V characteristics of BJT in the saturation region. In order to reduce the cost andintegrate the analog and digital circuits, the other method was exploited using CMOS process. In this project, a new first-order low pass log-domain filter based on CMOS parasitic vertical BJTwill be proposed. This filter has higher frequency response than previous circuits. We will first employ Hspice to simulate the log-domain filter to ensure the correctness of the circuit and make it a reliable reference with the circuit layout. After summarizing all the simulations and analyses, the chip will be fabricated with 0.35um CMOS technology.

碩士<br>國立成功大學<br>電機工程學系<br>89<br>In this thesis, we implement current-mode log-domain filters by applying MOSFET square law. With respect to different type of filters, we propose an approach to maintain the same operating range of the external current sources. We utilize MATLAB to perform the linear regression analysis of the simulation results. By applying the linear regressive equations, we can calculate the necessary currents and then substitute these currents into the filter to complete our design. We simulate first-order lowpass, second-order lowpass, second-order bandpass, and biquad filters. By connecting these low-order filters, we can compose a high-order filter. The simulation results show that the proposed circuits have the advantages of higher frequency operation (the maximum pole frequency of the first-order lowpass filter can achieve 5.2MHz), tuneablilty and modular design. In this thesis, we implement the proposed current-mode log-domain filters by UMC 2P2M 0.5µm process. The chip integrates six current-mode square root circuit modules, three grounded capacitor modules, and two cascode NMOS current mirror modules. The proposed filters can be implemented by connecting these modules. This chip can be utilized to implement a third-order lowpass filter.

Τα φίλτρα λογαριθμικού πεδίου (log-domain filters) είναι μια οικογένεια φίλτρων συνεχούς χρόνου στην οποία γίνεται χρήση της μη-γραμμικής I/V χαρακτηριστικής των ενεργών στοιχείων (BJT τρανζίστορ, MOSFET τρανζίστορ σε ασθενή αναστροφή) για να επιτευχθεί γραμμική συμπεριφορά από είσοδο σε έξοδο. Επιπρόσθετα τα log-domain φίλτρα, προσφέρουν και άλλα πλεονεκτήματα, όπως την ηλεκτρονική ρύθμιση της συχνότητας αποκοπής, την λειτουργία σε υψηλές συχνότητες και την δυνατότητα λειτουργίας με χαμηλή τάση τροφοδοσίας. Στην παρούσα διατριβή προτείνεται μια καινούρια τεχνική σχεδιασμού log-domain φίλτρων, η οποία στηρίζεται στη κυματική μέθοδο (log-domain wave filters). Με αυτή την τεχνική, log-domain φίλτρα μπορούν να σχεδιαστούν είτε με την χρήση των κυματικών παραμέτρων σκέδασης (wave scattering parameters), είτε με την χρήση κυματικών τερματιστών θύρας (wave port terminator). Έτσι αρχικά, προτείνονται δομές log-domain κυματικών φίλτρων με χρήση των κυματικών παραμέτρων σκέδασης. Σε αυτήν την προσέγγιση, το log-domain κυματικό ισοδύναμο ενός επαγωγού σε σειρά κλάδο μετασχηματίζεται από το γραμμικό στο λογαριθμικό πεδίο. Τα log-domain κυματικά ισοδύναμα των υπολοίπων βασικών στοιχείων του παθητικού πρωτοτύπου φίλτρου προκύπτουν από το κυματικό ισοδύναμο του επαγωγού σε σειρά κλάδο με την εναλλαγή των εξόδων του ή/και την προσθήκη αντιστροφέων τάσης. Χρησιμοποιώντας μια διαφορετική προσέγγιση, προτείνονται δομές log-domain κυματικών φίλτρων με χρήση του log-domain κυματικού τερμαστιστή θύρας. Με την χρήση του σχεδιάζεται το κυματικό ισοδύναμο στο log-domain ενός πυκνωτή σε παράλληλο κλάδο, το οποίο χρησιμοποιείται ως το βασικό κυματικό ισοδύναμο δομικό στοιχείο. Τα κυματικά ισοδύναμα των υπολοίπων στοιχείων του παθητικού κυκλώματος προκύπτουν με χρήση των παραπάνω κυματικών ισοδυνάμων. Τέλος γίνεται μελέτη της επίδρασης των μη-ιδανικών χαρακτηριστικών του BJT τρανζίστορ και της επίδρασης των θερμοκρασιακών μεταβολών στην συμπεριφορά των προτεινόμενων φίλτρων, ενώ προτείνονται μέθοδοι τόσο για την επιμέρους όσο και την συνολική αντιστάθμισή τους.<br>Log-domain filters are a family of continuous time filters that instead of being designed using locally linearized components, directly exploit the non-linear nature of a BJT, or a MOSFET transistor operating in weak inversion, in order to obtain a system with overall linear performance. This way they exhibit high linearity even for large signal to bias ratios. In addition they have some other interesting features like tunability and the ability to work at high frequencies even with low voltage supplies. In the present dissertation a new method for the design of log-domain filters is proposed, based on the well-known wave method. According to this method log-domain filters can be designed using the wave scattering parameters or using the wave port terminator block. Structures of log-domain wave filters using wave scattering parameters are initially proposed. In this approach the log-domain wave equivalent of a series inductor is transformed from linear to log-domain. Log-domain wave equivalents of the other basic elements of a passive prototype are then derived by the interchange of its outputs or/and the addition of voltage inverters. These equivalents are then connected together forming the actual filter. Log-domain differential wave filters can be designed by the introduction of the log-domain differential wave equivalent of the series inductor. Using a different approach, log-domain wave filters have been designed, introducing the block of a log-domain wave port terminator. Using this block, the log-domain wave equivalent of a shunt capacitor is derived as the based structure element. The wave equivalents of other basic elements of the passive prototype are derived as before interchanging its outputs or/and adding voltage inverters. Finally the influence of the non-ideal characteristics of the BJT transistor on the frequency response of the derived filters is analyzed and efficient methods are proposed for their compensation.

Οι εφαρμογές της σύγχρονης τεχνολογίας επιτάσσουν τη χρήση συσκευών με όσο το δυνατόν μικρότερες διαστάσεις, χαμηλή τάση τροφοδοσίας, χαμηλή κατανάλωση ισχύος και ταυτόχρονα υψηλές επιδόσεις. Το αντικείμενο της εργασίας αυτής, αφορά στη σχεδίαση αναλογικών ολοκληρωμένων φίλτρων, χαμηλής τάσης τροφοδοσίας, για υλοποίηση μεγάλων σταθερών χρόνου, στο πεδίο του λογαρίθμου. Προς αυτή την κατεύθυνση, μελετώντας και σχεδιάζοντας δομές αναλογικών φίλτρων στο πεδίο του λογαρίθμου, επιτεύχθηκε η σχεδίαση φίλτρων δεύτερης τάξης με μεγάλες σταθερές χρόνου, διατηρώντας τις φυσικές διαστάσεις των κυκλωμάτων σε εξαιρετικά χαμηλά επίπεδα. Αρχικά, παρουσιάζονται κάποια εισαγωγικά στοιχεία για την σχεδίαση ολοκληρωμένων κυκλωμάτων σε περιβάλλον χαμηλής τάσης τροφοδοσίας. Γίνεται εισαγωγή στην ιδέα των λογαριθμικών φίλτρων και αναλύονται οι βασικές αρχές σχεδίασης. Παρουσιάζονται βασικά χαρακτηριστικά των κυκλωμάτων στο πεδίο του λογαρίθμου, καθώς και ανάλυση των τελεστών και των διαγωγών που αποτελούν τη βάση της σχεδίασης στο λογαριθμικό πεδίο. Επιπλέον, παρουσιάζονται οι υλοποιήσεις των ολοκληρωτών των φίλτρων στο πεδίο του λογαρίθμου. Στη συνέχεια, γίνεται τοπολογική εξομοίωση 2ης τάξης βαθυπερατών φίλτρων στο πεδίο του λογαρίθμου. Σχεδιάζονται φίλτρα με την κλασική μέθοδο υλοποίησης, κάνοντας χρήση ισοδύναμων των παθητικών στοιχείων στο λογαριθμικό πεδίο, αλλά και φίλτρα υλοποιημένα με διάγραμμα ροής (SFG). Παρουσιάζονται τα πρώτα αποτελέσματα των εξομοιώσεων που πραγματοποιήθηκαν με το λογισμικό Cadence και το γραφικό περιβάλλον που διαθέτει για την σχεδίαση αναλογικών ηλεκτρονικών κυκλωμάτων (Virtuoso Analog Environment). Προτείνονται, δύο κυκλώματα τα οποία πραγματοποιούν πολλαπλασιασμό της χωρητικότητας των πυκνωτών, επιτυγχάνοντας έτσι μεγάλες σταθερές χρόνου, και η υλοποίηση νέων ολοκληρωτών που κάνουν χρήση των πολλαπλασιαστών. Δημιουργούνται έτσι οι βάσεις για την υλοποίηση φίλτρων με εξαιρετικά μικρές διαστάσεις, των οποίων η σχεδίαση, η εξομοίωση και η φυσική σχεδίαση (layout design) παρουσιάζονται, αναλύονται και συγκρίνονται.<br>The technological evolution and market requirements have led to an increasing demand of low - power portable devices, featuring the reduced size of the devises and high efficiency. This M.Sc project deals with the design of analog integrated, Log - Domain filters, for low - voltage implementation, with large time - constants. In this direction, the design of a second order, low - pass filter, with the above features, and with the occupied silicon area maintained at very low levels, was achieved. In Chapters 1 and 2, an introduction to the design of integrated circuits in low voltage environment is presented. There is an introduction to the idea and the basic principles of Log - Domain filters. The key characteristics of circuits in a large signal operation point of view, and an analysis of the operators and the exponential transconductor cells are, also presented. Furthermore, the basic Log - Domain integrators has been analyzed. A topologic analysis of second order Log - Domain filters is given in Chapter 3. Filters has been initially designed firstly with the classic implementation, using Log - Domain equivalent of passive elements. In a second step, the filter has been realizes by employing the signal flow diagram (SFG) representation. These filters were simulated with the Analog Design environment of the Cadence software. the obtained simulation results confirmed the correct operation of the circuit. Two implementations for realizing the Log - Domain equivalent of a capacitor multiplier are introduced. In addition, implementations of new Log - Domain integrators, that use the capacitor multipliers, are given in Chapter 4. Using these implementations, Log - Domain filters, with reduced total area and large time - constants, are designed, simulated and characterized in Chapter 5. Finally, the layout design of a second - order has been performed in Chapter 6 and the provided post - layout simulation results show that the performance of the filter was close to that of the filter realized in schematic level.