Relevant bibliographies by topics / Linear integrated circuits

Academic literature on the topic 'Linear integrated circuits'

Author: Grafiati
Published: 4 June 2021
Last updated: 5 March 2023

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Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers

Journal articles on the topic "Linear integrated circuits":

1

Silva, M. M. "Linear integrated circuits." Proceedings of the IEEE 73, no. 8 (1985): 1340. http://dx.doi.org/10.1109/proc.1985.13290.

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2

BARNABY, H. J. "TOTAL DOSE EFFECTS IN LINEAR BIPOLAR INTEGRATED CIRCUITS." International Journal of High Speed Electronics and Systems 14, no. 02 (June 2004): 519–41. http://dx.doi.org/10.1142/s0129156404002491.

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Abstract:
Electronics systems that operate in space or strategic environments can be severely damaged by exposure to ionizing radiation. Space-based systems that utilize linear bipolar integrated circuits are particularly susceptible to radiation-induced damage because of the enhanced sensitivity of these circuits to the low rate of radiation exposure. The phenomenon of enhanced low-dose-rate sensitivity (ELDRS) demonstrates the need for a comprehensive understanding of the mechanisms of total dose effects in linear bipolar circuits. The majority of detailed bipolar total dose studies to date have focused on radiation effects mechanisms at either the process or transistor level. The goal of this text is to provide an overview of total dose mechanisms from the circuit perspective; in particular, the effects of transistor gain degradation on specific linear bipolar circuit parameters and the effects of circuit parameter degradation on select linear bipolar circuit applications.
3

Rax, B. G., A. H. Johnston, and C. I. Lee. "Proton damage effects in linear integrated circuits." IEEE Transactions on Nuclear Science 45, no. 6 (1998): 2632–37. http://dx.doi.org/10.1109/23.736507.

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Rax, B. G., A. H. Johnston, and T. Miyahira. "Displacement damage in bipolar linear integrated circuits." IEEE Transactions on Nuclear Science 46, no. 6 (1999): 1660–65. http://dx.doi.org/10.1109/23.819135.

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5

Jantos, P., D. Grzechca, and J. Rutkowski. "Evolutionary algorithms for global parametric fault diagnosis in analogue integrated circuits." Bulletin of the Polish Academy of Sciences: Technical Sciences 60, no. 1 (March 1, 2012): 133–42. http://dx.doi.org/10.2478/v10175-012-0019-4.

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Evolutionary algorithms for global parametric fault diagnosis in analogue integrated circuitsAn evolutionary method for analogue integrated circuits diagnosis is presented in this paper. The method allows for global parametric faults localization at the prototype stage of life of an analogue integrated circuit. The presented method is based on the circuit under test response base and the advanced features classification. A classifier is built with the use of evolutionary algorithms, such as differential evolution and gene expression programming. As the proposed diagnosis method might be applied at the production phase there is a method for shortening the diagnosis time suggested. An evolutionary approach has been verified with the use of several exemplary circuits - an oscillator, a band-pass filter and two operational amplifiers. A comparison of the presented algorithm and two classical methods - the linear classifier and the nearest neighborhood method - proves that the heuristic approach allows for acquiring significantly better results.
6

Abraitis, Vidas, and Žydrūnas Tamoševičius. "Transition Test Patterns Generation for BIST Implemented in ASIC and FPGA." Solid State Phenomena 144 (September 2008): 214–19. http://dx.doi.org/10.4028/www.scientific.net/ssp.144.214.

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Transition delay testing of sequential circuits in a clocked environment is analyzed. There are presented two test pattern generator methods for built in self testing of the circuit implemented as Application Specific Integrated Circuit (ASIC) and Field Programmable Gate Array (FPGA) of Virtex family. Cellular automaton and Linear Feedback Shift Register (LFSR) structures are used for test sequence generation. The circuits are tested as the black boxes under Transition fault model. Experimental results of the test pattern generation methods are presented and analyzed. Results compared with exhaustive test of transition faults for ASICs and programmable integrated circuits with given configuration.
7

Vosper, J. V. "Book Review: Linear Integrated Circuits: Operation and Applications." International Journal of Electrical Engineering & Education 23, no. 2 (April 1986): 184. http://dx.doi.org/10.1177/002072098602300223.

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8

Jain, L. C. "Book Review: Operational Amplifiers and Linear Integrated Circuits:." International Journal of Electrical Engineering & Education 29, no. 2 (April 1992): 162. http://dx.doi.org/10.1177/002072099202900212.

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9

Buchner, Stephen, and Dale McMorrow. "Single-Event Transients in Bipolar Linear Integrated Circuits." IEEE Transactions on Nuclear Science 53, no. 6 (December 2006): 3079–102. http://dx.doi.org/10.1109/tns.2006.882497.

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Johnston, A. H., and R. E. Plaag. "Models for Total Dose Degradation of Linear Integrated Circuits." IEEE Transactions on Nuclear Science 34, no. 6 (1987): 1474–80. http://dx.doi.org/10.1109/tns.1987.4337502.

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You might also be interested in the extended bibliographies on the topic 'Linear integrated circuits' for particular source types:
Journal articles Dissertations / Theses Books

Dissertations / Theses on the topic "Linear integrated circuits":

1

Devarayanadurg, Giri V. "Test selection and fault simulation for analog integrated circuits /." Thesis, Connect to this title online; UW restricted, 2001. http://hdl.handle.net/1773/6040.

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2

Zhang, Yue. "A fourth order current-mode sigma-delta modulator /." free to MU campus, to others for purchase, 1997. http://wwwlib.umi.com/cr/mo/fullcit?p9841350.

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3

Mantooth, Homer Alan. "Higher level modeling of analog integrated circuits." Diss., Georgia Institute of Technology, 1990. http://hdl.handle.net/1853/14951.

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4

Bhattacharya, Sambuddha. "Template-driven parasitic-aware optimization of analog/RF IC layouts /." Thesis, Connect to this title online; UW restricted, 2005. http://hdl.handle.net/1773/6121.

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Natarajan, Ekanathan Palamadai. "KLU--a high performance sparse linear solver for circuit simulation problems." [Gainesville, Fla.] : University of Florida, 2005. http://purl.fcla.edu/fcla/etd/UFE0011721.

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Lui, Siu-hong. "Analog circuit design by nonconvex polynomial optimization two design examples /." Click to view the E-thesis via HKUTO, 2007. http://sunzi.lib.hku.hk/HKUTO/record/B39557418.

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7

Li, Harry W. "A noniterative DC analysis program for analog integrated circuits." Diss., Georgia Institute of Technology, 1992. http://hdl.handle.net/1853/15977.

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8

Hum, Herbert Hing-Jing. "A linear unification processor /." Thesis, McGill University, 1987. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=63790.

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Jangkrajarng, Nuttorn. "Analog/RF VLSI layout generation : layout retargeting via symbolic template /." Thesis, Connect to this title online; UW restricted, 2006. http://hdl.handle.net/1773/6084.

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Thomsen, Axel. "High speed high accuracy signal processing with parallel analog circuits." Diss., Georgia Institute of Technology, 1992. http://hdl.handle.net/1853/13846.

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Books on the topic "Linear integrated circuits":

1

Winzer, Jack. Linear integrated circuits. Fort Worth: Saunders College Pub., 1992.

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2

Carr, Joseph J. Linear integrated circuits. Oxford [England]: Butterworth Heinemann, 1996.

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Winzer, Jack. Linear integrated circuits. Fort Worth: Saunders College Pub., 1992.

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4

Associates, Derivation and Tabulation, ed. Linear integrated circuits. 3rd ed. San Diego: D.A.T.A. Inc, 1987.

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5

D, Roy Choudhury. Linear integrated circuits. New York: Wiley, 1991.

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6

Division, Raytheon Company Semiconductor, ed. Linear integrated circuits. High Wycombe, CA: Raytheon, 1989.

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7

Coughlin, Robert F. Operational amplifiers & linear integrated circuits. 5th ed. Upper Saddle River, N.J: Prentice Hall, 1998.

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8

State, RCA Solid. Integrated circuits for linear applications. Somerville, N.J: RCA Solid State, 1986.

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9

Coughlin, Robert F. Operational amplifiers & linear integrated circuits. 5th ed. Upper Saddle River, N.J: Prentice Hall, 1998.

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10

Motorola. Linear and interface integrated circuits. (s.l.): Motorola, 1990.

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Book chapters on the topic "Linear integrated circuits":

1

Powell, Richard F. "Linear Integrated Circuits." In Testing Active and Passive Electronic Components, 147–77. Boca Raton: Routledge, 2022. http://dx.doi.org/10.1201/9780203737255-10.

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2

Encinas, J. B. "Linear bipolar silicon PLL integrated circuits." In Phase Locked Loops, 102–23. Boston, MA: Springer US, 1993. http://dx.doi.org/10.1007/978-1-4615-3064-0_7.

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3

Unbehauen, Rolf, and Andrzej Cichocki. "MOS Devices for Linear Analog Integrated Circuits." In MOS Switched-Capacitor and Continuous-Time Integrated Circuits and Systems, 83–171. Berlin, Heidelberg: Springer Berlin Heidelberg, 1989. http://dx.doi.org/10.1007/978-3-642-83677-0_2.

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4

Luo, Tao, and David Z. Pan. "DPlace: Anchor Cell-Based Quadratic Placement with Linear Objective." In Series on Integrated Circuits and Systems, 39–58. Boston, MA: Springer US, 2007. http://dx.doi.org/10.1007/978-0-387-68739-1_3.

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5

Grund, Friedrich. "Solution of Linear Systems with Sparse Matrices." In Modeling, Simulation, and Optimization of Integrated Circuits, 333–47. Basel: Birkhäuser Basel, 2003. http://dx.doi.org/10.1007/978-3-0348-8065-7_21.

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Spindler, Peter, and Frank M. Johannes. "Kraftwerk: A Fast and Robust Quadratic Placer Using an Exact Linear Net Model." In Series on Integrated Circuits and Systems, 59–93. Boston, MA: Springer US, 2007. http://dx.doi.org/10.1007/978-0-387-68739-1_4.

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7

Ismail, Yehea I., and Eby G. Friedman. "Evaluating the Transient Response of Linear Networks." In On-Chip Inductance in High Speed Integrated Circuits, 41–72. Boston, MA: Springer US, 2001. http://dx.doi.org/10.1007/978-1-4615-1685-9_3.

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8

Gielen, Georges, and Willy Sansen. "Algorithmic Aspects of Linear Symbolic Simulation." In Symbolic Analysis for Automated Design of Analog Integrated Circuits, 101–96. Boston, MA: Springer US, 1991. http://dx.doi.org/10.1007/978-1-4615-3962-9_4.

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9

Unbehauen, Rolf, and Andrzej Cichocki. "Basic Building Blocks of Linear SC Networks." In MOS Switched-Capacitor and Continuous-Time Integrated Circuits and Systems, 255–325. Berlin, Heidelberg: Springer Berlin Heidelberg, 1989. http://dx.doi.org/10.1007/978-3-642-83677-0_4.

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10

Shi, C. J. Richard, and Michael W. Tian. "Non-Monte Carlo Simulation and Sensitivity of Linear(ized) Analog Circuits under Parameter Variations." In VLSI: Integrated Systems on Silicon, 540–51. Boston, MA: Springer US, 1997. http://dx.doi.org/10.1007/978-0-387-35311-1_44.

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Conference papers on the topic "Linear integrated circuits":

1

Zjajo, Amir, Qin Tang, Michel Berkelaar, and Nick van der Meijs. "Noise analysis of non-linear dynamic integrated circuits." In 2010 IEEE Custom Integrated Circuits Conference -CICC 2010. IEEE, 2010. http://dx.doi.org/10.1109/cicc.2010.5617429.

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Wang, Hua, and Ali Hajimiri. "A Wideband CMOS Linear Digital Phase Rotator." In 2007 IEEE Custom Integrated Circuits Conference. IEEE, 2007. http://dx.doi.org/10.1109/cicc.2007.4405821.

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Thanigaivelan, Balavelan, Adam Postula, and Yong Ding. "Efficient simplification strategies for symbolic circuit expressions of linear analog integrated circuits." In Microelectronics, MEMS, and Nanotechnology, edited by Alex J. Hariz. SPIE, 2005. http://dx.doi.org/10.1117/12.638479.

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Kurahashi, Peter, Pavan Hanumolu, Gabor Temes, and Un-ku Moon. "A 0.6V Highly Linear Switched-R-MOSFET-C Filter." In IEEE Custom Integrated Circuits Conference 2006. IEEE, 2006. http://dx.doi.org/10.1109/cicc.2006.320841.

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Mukherjee, Parijat, G. Peter Fang, Rod Burt, and Peng Li. "Automatic stability checking for large linear analog integrated circuits." In the 48th Design Automation Conference. New York, New York, USA: ACM Press, 2011. http://dx.doi.org/10.1145/2024724.2024798.

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Michailidis, Anastasios, Thomas Noulis, and Kostas Siozios. "Linear and Periodic State Integrated Circuits Noise Simulation Benchmarking." In 2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC). IEEE, 2022. http://dx.doi.org/10.1109/vlsi-soc54400.2022.9939575.

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Hashemian, Reza. "A Linear-like Biasing Technique for Nonlinear Circuits." In 2007 IEEE International Conference on Integrated Circuit Design and Technology. IEEE, 2007. http://dx.doi.org/10.1109/icicdt.2007.4299535.

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8

Schreurs, Dominique. "Systematic Evaluation of Non-Linear Microwave Device and Amplifier Models." In 2006 European Microwave Integrated Circuits Conference. IEEE, 2006. http://dx.doi.org/10.1109/emicc.2006.282802.

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Danneville, F., G. Pailloncy, A. Siligaris, D. Gloria, and G. Dambrine. "Linear, Noise and Nonlinear HF Models for Advanced CMOS Technology." In 2006 European Microwave Integrated Circuits Conference. IEEE, 2006. http://dx.doi.org/10.1109/emicc.2006.282789.

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10

Schlechtweg, M. "Linear circuit design - a multistage low noise amplifier." In IEE Colloquium on MMICs (Monolithic Microwave Integrated Circuits). IEE, 1995. http://dx.doi.org/10.1049/ic:19951413.

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