Dissertations / Theses on the topic 'Intrinsic noise'
Create a spot-on reference in APA, MLA, Chicago, Harvard, and other styles
Consult the top 15 dissertations / theses for your research on the topic 'Intrinsic noise.'
Next to every source in the list of references, there is an 'Add to bibliography' button. Press on it, and we will generate automatically the bibliographic reference to the chosen work in the citation style you need: APA, MLA, Harvard, Chicago, Vancouver, etc.
You can also download the full text of the academic publication as pdf and read online its abstract whenever available in the metadata.
Browse dissertations / theses on a wide variety of disciplines and organise your bibliography correctly.
Qu, Song. "Non-Intrinsic Differential-Mode Noise in Switching Power Supplies and Its Implications to EMI Filter Design." Thesis, Virginia Tech, 1999. http://hdl.handle.net/10919/9788.
Full textMaster of Science
Hortsch, Sayuri Katharina [Verfasser], Andreas [Akademischer Betreuer] Kremling, Andreas [Gutachter] Kremling, and Christina [Gutachter] Kuttler. "Model-based characterization of intrinsic noise in multistable genetic circuits / Sayuri Katharina Hortsch ; Gutachter: Andreas Kremling, Christina Kuttler ; Betreuer: Andreas Kremling." München : Universitätsbibliothek der TU München, 2018. http://d-nb.info/1171425600/34.
Full textMurrugarra, Tomairo David M. "Algebraic Methods for Modeling Gene Regulatory Networks." Diss., Virginia Tech, 2012. http://hdl.handle.net/10919/28388.
Full textPh. D.
Xie, Zhi. "Modelling genetic regulatory networks: a new model for circadian rhythms in Drosophila and investigation of genetic noise in a viral infection process." Phd thesis, Lincoln University. Agriculture and Life Sciences Division, 2007. http://theses.lincoln.ac.nz/public/adt-NZLIU20070712.144258/.
Full textSaygun, Yakup. "Computational Stochastic Morphogenesis." Thesis, Uppsala universitet, Avdelningen för beräkningsvetenskap, 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-257096.
Full textAndrade, Maria Glória Caño de. "Estudo de transistores de porta tripla de corpo." Universidade de São Paulo, 2012. http://www.teses.usp.br/teses/disponiveis/3/3140/tde-10062013-150025/.
Full textThe main goal of this work is to investigate the n-channel MuGFETs (triple-gate) Bulk transistors with and without the application of DTMOS operation. This work will be done through three-dimensional numerical simulation and by electrical characterizations. The drain current, transconductance, resistance, threshold voltage, subthreshold swing and Drain Induced Barrier Lowering (DIBL) will be analyzed in the DTMOS mode and the standard biasing configuration. Important figures of merit for the analog performance such as transconductance-over-drain current, output conductance, Early voltage and intrinsic voltage gain will be studied experimentally and through three-dimensional numerical simulations for different channel doping concentrations. The results indicate that the DTMOS configuration has superior electrical characteristics (4 e 10 %) and higher transistor efficiency. In addition, DTMOS devices with a high channel doping concentration exhibit much better analog performance compared to the normal operation mode. Low-Frequency (LF) noise is for the first time experimentally investigated in linear and saturation region. The origin of the noise will be analyzed in order to understand the physical mechanisms involved in this type of noise. Measurements showed that the signal spectra for Bulk and DTMOS are composed of number fluctuations related flicker noise with on top generation and recombination noise humps, which become more pronounced at higher gate voltage. However, the most important finding is the fact that DTMOS devices showed practically the same LF noise magnitude in linear and saturation region than standard Bulk device. Proton irradiation with energy of 60 MeV and fluence of p/1012 cm-2 is also experimentally studied in terms of electric characteristic, analog performance and the LF noise in Bulk and DTMOS triple gate devices. The results indicate that the combined of the better electrical characteristics and an excellent analog performance of DTMOS devices, makes it a very competitive candidate for low-noise RF analog applications before and after irradiation. The advantage of dynamic threshold voltage in triple gate transistors in environments where the devices have to withstand high-energy radiation is due to its lower drain electric field penetration that lowers the effect of the radiation-induced charges in the STI (shallow trench isolation) regions adjacent to the fin. Finally, the n-channel triple gate Bulk device is used for memory application, that is, 1T-DRAM (Dynamic Random Access Memory with 1 Transistor). Bipolar junction transistor (BJT) programming mode is used to write and read 1 while the forward biasing of the body-drain junction is used to write 0. The reading and writing current increases with increasing body bias (VB) because the load induced by the BJT effect is stored within the fin. When the body of the transistor is floating, the device retains more charge within its fin. In addition, transistor could also operate as 1T-DRAM with both gate and bulk contacts floating, which is similar to the biristor (gateless) behavior.
Deloupy, Alexandre. "Expression stochastique des gènes chez Bacillus subtilis." Thesis, Sorbonne université, 2018. http://www.theses.fr/2018SORUS443.
Full textA population of genetically identical individuals sharing the same environment exhibits some residual phenotypic variability. Such heterogeneity arises from the stochastic, or random, nature of gene expression also referred as noise. This stochasticity results on the one hand from the random encounter of chemical species during both transcription and translation (intrinsic noise), and on the other hand from the fluctuations in the concentration of these chemicals (extrinsic noise). A stochastic model involving only intrinsic noise predicts that phenotypic noise strength varies linearly with translational efficiency but does not depend on transcriptional one. This prediction was shown to be compatible with data on a limited number of strains and conditions but has never been fully tested on a large collection of strains with different transcription and translation efficiencies. We aim to go further in the test of this prediction by using a collection of ~40 strains of the bacterium Bacillus subtilis where GFP is expressed under the control of different Promoters, TSS and RBS. For each strain, cell-to-cell heterogeneity is investigated by quantifying fluorescence signal at the single cell level, based on flow cytometry techniques and epifluorescence microscopy. Our results show that, contrary to expectations, phenotypic noise strength shows a strong positive correlation with transcriptional efficiency. We demonstrated that over a wide range of expression covering most of the proteome of B. subtilis, the expression noise is dominated by external noise sources. Therefore, stochastic models of gene expression are not suitable for quantifying the effects of translation and transcription on gene expression noise
Al, Roumi Fosca. "Théorie Lagrangienne Relativiste de la Formation des Grandes Structures : description Intrinsèque des Perturbations et Gravitoélectromagnétisme." Thesis, Lyon 1, 2015. http://www.theses.fr/2015LYO10136/document.
Full textThe dynamics of structure formation in the Universe is usually described by Newtonian numerical simulations and analytical models in the frame of the Standard Model of Cosmology. The structures are then defined on a homogeneous and isotropic background. Such a description has major drawbacks since, to be self-consistent, it entails a large amount of dark components in the content of the Universe. To address the problem of dark matter and dark energy, we will neither suppose that exotic sources contribute to the content of the Universe, nor that General Relativity is obsolete. We will develop a more realistic description of structure formation in the frame of General Relativity and thus no longer assume that the average model is a homogeneous-isotropic solution of the Einstein equations, as claimed by the Standard Model of Cosmology. During my work under the supervision of Thomas Buchert, I contributed to the development of the perturbative formalism that enables a more realistic description of spacetime dynamics. In the framework of the intrinsic Lagrangian approach, which avoids defining physical quantities on a flat background, I contributed to the building of relativistic solutions to the gravitoelectric part of the Einstein equations from the generalization of the Newtonian perturbative solutions. Moreover, the gravitoelectromagnetic approach I worked with has provided a new understanding of the dynamics of the analytical solutions to the field equations. Finally, treating globally the spatial manifold, I used powerful mathematical tools and theorems to describe the impact of topology on the dynamics of gravitational waves
Chung, Tien-Shen, and 鍾天伸. "Intrinsic noise in genetic regulation networks." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/23227796124027063488.
Full text中原大學
應用物理研究所
95
In this thesis, we investigate the intrinsic noise in transcription and translation level of genetic regulation networks without environmental conditions. The genetic regulation networks can be mathematically described by rate equations. To obtain the stochastic features of the system, the macroscopic rate equation is first rewritten as the stochastic master equation, and then expansion method is used to obtain the linear noise Fokker-Planck equation. We use the linear noise Fokker-Planck equation to analyze the stochastic fluctuations in the regulation networks of single gene and toggle switch. The noise strength is measured by Fano Factor which is defined as variance over mean, and the correlation of noise is also analyzed. The effect of regulation strength on the characteristics of noises and discussed.
Lin, Yi-Min, and 林益民. "Lossy Substrate De-embedding Method for RF MOSFET Intrinsic Noise Extraction." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/45213202486085666236.
Full text國立交通大學
電子工程系所
94
For sub-100nm MOSFETs with the gate length scaling to 80 nm and 65 nm, the unit current gain cut off frequency (fT) can achieve as high as 100 GHz and 165 GHz, respectively. However, the as-measured noise figure shows no much difference between 80 nm and 65 nm devices. The minimum noise figure (NFmin) is even higher than 5dB at 10GHz under gate bias responsible for the maximum fT. Strong finger number dependence of noise figure was also observed. All the mentioned phenomena can not be simply explained by gate resistance reduction through multi-finger structure. It suggests that noise de-embedding is required for the as-measured noise parameters. In this thesis, the basic noise theory of MOSFET, noise measurement principles and instruments will be covered in the first place. Conventional noise correlation matrix de-embedding method will be reviewed. Regarding the intrinsic MOSFET model, I-V and C-V model calibration have been done based on the measured I-V, transconductance, and admittance by Y-parameters. Then discussion of different probing pad effect on device characterization and the corresponding equivalent circuit model has been established and extensively verified. A new equivalent circuit de-embedding method was proposed. Modeling of as-measured S-parameters and noise parameters was done by incorporating the pad model with a well calibrated MOSEFT model. The lossy pad and lossy substrate de-embedding has been conducted to obtain the intrinsic characteristic. Finally, the intrinsic performance of the device will be analyzed and discussed.
Li, Tien-Yeh, and 李典燁. "Intrinsic Parameter Variability Induced Static Noise Margin Fluctuation in Nano-CMOS SRAM Cells." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/90375348331205719804.
Full text國立交通大學
電信工程系所
97
As the dimension of complementary metal-oxide-semiconductor (CMOS) devices shrunk into sub-65nm scale, the threshold voltage Vth fluctuation is pronounced and becomes crucial for the design window, yield, noise margin, stability, and reliability of ultra large-scale integration circuits. Various randomness effects resulted from the random nature of manufacturing process have induced significant fluctuations of electrical characteristics in nanometer scale (nanoscale) devices and circuits. In this thesis, a three-dimensional “atomistic” coupled device-circuit simulation is intensively performed to investigate the impact of intrinsic parameter fluctuations on 16-nm-gate planar metal-oxide-semiconductor field-effect-transistor (MOSFET) static random access memory (SRAM) cells. For device with 140 mV threshold voltage, the static noise margin (SNM) of 6T SRAM with unitary cell ratio is 20 mV with 80% normalized SNM fluctuation (σSNM), which may not ensure correct operation of circuits. Thus, improvement and suppression approaches based on the circuit and device viewpoints are implemented to examine the associated characteristics in 16-nm-gate SRAM cells. From the circuit viewpoint, an 8T planar SRAM architecture is explored. Compared with the conventional 6T SRAM, under the same Vth = 140 mV, the SNM is enlarged to 233 mV and the SNM is reduced to 22 mV (around 9.5% normalized SNM) at a cost of 30% extra chip area. To prevent the increase of chip area, silicon-on-insulator fin-type field-effect-transistors (SOI FinFETs) replaced the planar MOSFETs in 6T SRAM is further examined. The SNM of 6T SOI FinFETs SRAM is 125 mV and the normalized σSNM is suppressed significantly to 5.3% (6.8 mV in σSNM). The 8T SRAM architecture can provide largest SNM and is promising in near future design; however, to prevent the increase of chip area and suppress the intrinsic parameter fluctuations, development of fabrication for SOI FinFET SRAM is crucial for sub-22nm technology.
Ou, Jyun-Rong, and 歐俊榮. "New Methods for Intrinsic Parasitic RLC Extraction and Small signal Equivalent Circuit Models for High Frequency and RF Noise Simulation in 3T and 4T Nanoscale Multi-finger MOSFETs." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/3j8eev.
Full text國立交通大學
電子研究所
106
In this thesis, an extensive investigation has been performed on the three- and four-terminal (3T and 4T) multi-finger nMOSFETs for precise extraction of intrinsic parasitic RLC and development of truly accurate intrinsic MOSFET model aimed at high frequency and RF noise simulation for nano-CMOS RF circuits design. Gate resistance (Rg), source resistance (Rs,int), and gate sidewall as well as finger-end fringing capacitances (Cof and Cf(poly-end)) appear as most important intrinsic parasitic RC with critical impact on high frequency performance and RF noise, and bring tough challenges to the conventional extraction methods when applied to 3T and 4T multi-finger MOSFETs. For the first time, a new extraction flow has been established for precise determination of the intrinsic parasitic source and drain resistances (Rs,int and Rd,int) and channel resistance (Rch) in 3T and 4T multi-finger MOSFETs and enable accurate prediction of the asymmetric gate to source/drain capacitances, i.e. Cgs≠Cgd at VDS=0 with critical dependence on Rs,int, Rd,int, and Rch. Afterwards, a new method and analytical model have been derived for accurate extraction of Rg and prediction of Rg@Y-method incorporating the Rs,int and Rd,int coupled through the intrinsic gate to source and drain capacitances (Cgs,i and Cgd,i). In this thesis, one more innovation creates new structures, namely multi-finger field devices for direct and precise extraction of Cof and Cf(poly-end) from high frequency measurement, without resort to 3-D interconnect RC simulation like Raphael. The mentioned innovations lead to successful extraction of intrinsic parasitic RC with complicated layout dependence and the integration with intrinsic device parameters determined by our proprietary high precision device parameters extraction method (US patent 8,691,599 B2) can realize the actual intrinsic MOSFET model for 3T and 4T multi-finger MOSFETs with proven accuracy for layout dependent effects and sensitivity to lot-to-lot and die-to-die variations. The actual intrinsic MOSEFT model has been extensively verified and the accuracy is proven by good agreement with high frequency Y-parameters after openM1 and shortM1 deembedding for 3T and 4T nMOSFETs with various multi-finger layouts. Furthermore, the intrinsic device parameters and parasitic RLC with proven accuracy, when applied to analytical models can reach accurate prediction of the high frequency performance like fT and fMAX associated with various multi-finger layouts and facilitate layout optimization. One of the important findings and conclusions is that 4T multi-finger MOSFETs with sufficient freedom for various circuit topologies like common source, common gate, and common drain (CS, CG, and CD) under various body biases, generally suffer significant degradation of fT and fMAX due to drastic increase of Rs,int and Ls,int. The mentioned achievements provide a useful and efficient solution for high frequency simulation and design, without resort to BSIM-4 with limited accuracy for specified sample layouts. Finally, the actual intrinsic MOSFET models can be further integrated with our proprietary lossy substrate model to build up a full equivalent circuit model, which can accurately simulate the high frequency S-, Y- and noise parameters, prior to deembedding. Furthermore, the lossy substrate deembedding method can be applied to both 3T and 4T multi-finger MOSFETs as a reliable solution for accurate extraction of intrinsic RF noise, which can eliminate the problems of conventional noise correlation matrix method and successfully identify the layout dependent effects in the truly intrinsic RF noise for multi-finger MOSFETs optimization aimed at low noise circuits design.
Liang, Yu-Tang, and 梁育堂. "New Methods for Accurate Extraction of Intrinsic RF and AC Performance and Equivalent Circuit Models for High Frequency and RF Noise Simulation in Nanoscale MOSFETs with Various Layouts." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/5shvua.
Full text國立交通大學
電子研究所
106
In this thesis, one of our new proprietary structures, namely multi-finger field device has been designed and implemented in nanoscale CMOS processes like TN90GUTM and TN40G to realize direct and precise extraction of the gate sidewall and finger-end fringing capacitances, denoted as Cof and Cf(polyend). For the first time, the experimental Cof and Cf(polyend) can be achieved to serve as useful database for a serious calibration on the 3-D interconnect RC simulation like Raphael. Moreover, the multi-finger field devices can enable another innovative application, such as a truly clean deembedding of the Cof and Cf(polyend), namely field deembedding for the extraction of ideally intrinsic device parameters and high frequency performance parameters like fT and fMAX. For TN90GUTM and TN40G devices with gate length (Lg) pushed to the scales of 50 nm and 30nm, how to precisely separate and extract the intrinsic channel length (Lch) and source/drain extension (SDE) to gate overlap length (LSDE) becomes a very challenging work. Unfortunately, the original approach based on openM1 deembedding and Raphael simulation led to the abnormal results, such as signficant variation of LSDE and Lch associated with various finger width (WF), and the trend of shorter LSDE but longer Lch corresponding to the smaller WF i.e. the larger NF (finger number). In this thesis, the adoption of field deembedding method can eliminate the mentioned problem and achieve nearly constant LSDE among various WF and NF, i.e. nearly independent of WF and NF. It becomes an important progress to realize accurate extraction of the effective mobility associated with the intrinsic (inversion) channel and SDE (accumulation) regions, such as eff,ch and eff,acc, respectively. Furthermore, the ideal intrinsic Y- and H-parameters achieved after field deembedding can yield the ideally intrinsic gm, Cgg, and Cgd, and more importantly the ideal intrinsic fT and gate delay, int. For TN90GUTM nMOSFET, the ideal intrinsic peak fT can reach 227 GHz, which is around 27.5% higher than the actual intrinsic peak fT of 178 GHz. As For TN40G nMOSFET, there is around 75~100% enhancement of the peak fT compared to that of TN90GUTM, for actual and ideal intrinsic conditions. The ideal intrinsic peak fT can reach up to 473GHz, which is around 52% higher than the actual intrinsic peak fT of 312 GHz. The results reveal dramatic impact from the intrinsic parasitic RC on the high frequency performance and the impact increases in more advanced technology with further scaled devices. Multi-OD (MOD) MOSFETs have been designed and fabricated in TN90RF as a potential solution for effective reduction of STI compressive transverse stress ⊥ and source resistance (RS), aimed at the increase of eff and gm and eventually fT improvement compared to the multi-finger MOSFETs with the same channel width (WOD). In this thesis, a new extraction flow has been developed for MOD MOSFETs with various WOD and NOD at the same WF=WOD×NOD and NF as those of multi-finger MOSFETs. The new features specific to MOD MOSFETs can be summarized as a new component of gate sidewall fringing capacitance originated from the gate on STI between adjacent OD (Cof,STI) and steeper STI sidewall profile due to the minimum OD-OD space, i.e. STI width. The basic device parameters extracted from the MOD MOSFETs indicate major differences in Lg and W and apparently smaller W compared to that of multi-finger MOSFETs, which is very critical for accurate determination of effective channel width (Weff) and extraction of eff. Through an extensive DC and RF characterization, the MOD nMOSFETs demonstrate some attractive features, such as the higher eff, smaller RS, larger gm, and most importantly the higher fT compared with the multi-finger MOSFETs with the same WOD. However, the MOD MOSFETs reveal two major drawbacks, such as larger DIBL and lower fMAX in comparison with the multi-finger MOSFETs. The former can be understood through an analysis of the finger-end and inter-OD fringing capacitances, i.e. Cf(poly-end) and Cof,STI, achieved from Raphael simulation. The results indicate that the significant increase of Cf(poly-end)NF in multi-finger MOSFETs with large NF becomes the dominant factor responsible for the effective suppression of DIBL. In comparison, the MOD MOSFET even with the addition of Cof,STINODNF but the combination of Cf(poly-end)NF and Cof,STINODNF with NF fixed at the minimum always keeps smaller than Cf(poly-end)NF with much larger NF and it leads to less suppression of DIBL. As for the much lower fMAX suffered by MOD MOSFETs even with higher fT, it accounts for the critical impact from the significant increase of gate resistance (Rg) and tough challenge to simultaneous optimization of fT and fMAX. Full equivalent circuit models have been established with the actual intrinsic MOSFET models for multi-finger and MOD MOSFETs by adopting intrinsic parasitic RLC and lossy substrate RLC network for accurate simulation of high frequency characteristics and RF noise. The actual intrinsic MOSFET models including layout dependent device parameters and parasitic RLC with proven accuracy for various layouts can fix the problem of conventional compact model like BSIM-4 with limited accuracy for specific sample layouts in the PDK but severe deviation for the customer designed layouts beyond the PDK. RF noise simulation and intrinsic noise extraction appear as one more serious challenge to the conventional compact model. In this thesis, our developed equivalent circuit model can provide an effective solution for accurate simulation of the RF noise prior to deembedding and precise extraction of the actual intrinsic noise by using lossy substrate deembedding. Finally, the simulation by equivalent circuit model can facilitate the development of analytical models for quick calculation of intrinsic RF noise and assessment of layout dependent effects associated with multi-finger and MOD devices and impact from the parasitic RLC.
Song, Cheng-Yan, and 宋程硯. "Physical decomposition of intrinsic and extrinsic noises in biochemical networks." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/v2snfs.
Full text國立交通大學
物理研究所
104
It is rather often that intrinsic and extrinsic noises coexist in a biological system. A typical example is the transcription and translation of DNA. This raises numerous works devoting to decomposing these two effects. Apart from the previous definition of intrinsic and extrinsic noises from biological aspect, this work adopts the definition of van Kampen from physical aspect. Based on that definition, we perturb the chemical master equation and derive a physical version of decomposition formula for intrinsic and extrinsic noises. We apply this theory to the network model of Yi-Der Chen. The derived exact solutions and numerical studies on that model reveal the possibility of “suppressing intrinsic noise induced stochasticity by extrinsic noises”. The condition for this possibility is derived in a low dimensional network. This suppression indicates that the fluctuations could decline when intrinsic and extrinsic noises are added together, which is a bit counter-intuition. We compare this physical version of decomposition formula with the biological version of formula derived by Swain and analyze the common and distinct features between these two formulas.
Toutounji, Hazem. "Homeostatic Plasticity in Input-Driven Dynamical Systems." Doctoral thesis, 2015. https://repositorium.ub.uni-osnabrueck.de/handle/urn:nbn:de:gbv:700-2015022613091.
Full text