Academic literature on the topic 'Integreted Circuits'
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Journal articles on the topic "Integreted Circuits":
Singh, B. R., D. C. Dumka, R. C. Ramola, K. S. Yadav, S. Johri, and H. S. Kothari. "Optoelectronic Integreated Circuits for Photonic Systems." IETE Journal of Research 38, no. 2-3 (March 1992): 147–62. http://dx.doi.org/10.1080/03772063.1992.11437043.
Dissertations / Theses on the topic "Integreted Circuits":
Fontaine, Jonathan. "Optimisation de l’insertion de contre-mesures pour la sécurité des circuits intégrés." Electronic Thesis or Diss., Sorbonne université, 2024. http://www.theses.fr/2024SORUS058.
Over the last 75 years, the electronics industry has experienced a spectacular evolution, moving from manual design to an automated industry. This industrialization has led to increased complexity in circuits, requiring specialization in tasks during the design of electronic circuits. Various companies around the world have emerged to perform these tasks, with varying levels of trust assigned. From a designer's perspective, these actors pose several threats, such as the insertion of malicious functionalities, intellectual property theft, or circuit counterfeiting. These threats impact the economy of the semiconductor industry, amounting to billions of dollars in losses annually.One way to combat these threats is to lock the circuit with a key, preventing it from functioning correctly if the right key is not present. Logic locking is a method that involves logically locking a circuit using key gates and the corresponding digital key. Several implementations of logic locking have been developed. In these works, we focus on Strong Logic Locking. It locks the circuit by connecting XOR/XNOR gates to the digital key, inserted in circuit signals. Each insertion position has a different impact on security, which is the possibility of recovering the digital key. However, adding logic gates in a circuit increases power consumption, the circuit's area, and decreases performance. Strong logic locking aims to maximize the security of the lock by identifying positions that enhance security, regardless of the resulting impact.In this thesis, we seek to optimize security while considering the impact on circuit performance. We propose a new approach to solving strong logic locking. We start by formulating our security problem based on mathematical models that include security for optimally inserting key gates in the circuit. This formulation calculates the cliques of a subgraph representing the insertion positions. We establish a branch and bound solving algorithm for our problem and evaluate it. We then present a second mathematical models representing the impact on the delay from inserting key gates in the circuit. Finaly, we propose strategies to optimize security while limiting the impact on circuit performance. Our tools are integrated into the design flow, allowing us to validate them with numerical results obtained on circuits used by the electronic community
KAOU, LARBI NEILA. "Conception et realisation d'un dispositif en silicium permettant une connexion passive entre un circuit d'optique integree et un ruban de fibres optiques." Besançon, 1999. http://www.theses.fr/1999BESA2045.
Ratovelomanana, Frédéric. "Contribution à la réalisation de circuits intégrés optoélectroniques de commutation spatiale ou de transposition de longueur d'onde." Grenoble INPG, 1997. http://www.theses.fr/1997INPG0092.
Ortiz, Salvador. "Modélisation physique des effets électromagnetiques pour les interconnexions dans les circuits intégrés." Phd thesis, Grenoble 1, 2007. http://www.theses.fr/2007GRE10103.
Three problems dealing with the modeling of wires in integrated circuits are considered: (i) fast and efficient calculation for mutual inductance, using the dipole approximation; (ii) compact expansion of non-uniform currents in conductors at high frequencies, in terms of conduction modes; and (iii) accurate representation of frequency dependent resistance-inductance behavior with constant circuit parameters, in the form of Foster pairs. We propose and implement solutions and optimizations for these problems based on simple physical arguments. All three problems are integrated within Mentor Graphic's extraction tools
Ortiz, Salvador. "Modélisation physique des effets électromagnetiques pour les interconnexions dans les circuits intégrés." Phd thesis, Université Joseph Fourier (Grenoble), 2007. http://tel.archives-ouvertes.fr/tel-00165969.
Parpaleix, Jean. "Modelisation de la logique a injection i2l dans le procede a isolement par oxyde subilo n, application a l'optimisation des circuits." Caen, 1987. http://www.theses.fr/1987CAEN2051.
Chouteau, Stéphanie. "Intégration de la commande optique d'un commutateur microonde en technologie coplanaire sur silicium." Grenoble INPG, 1997. http://www.theses.fr/1997INPG0080.
Ho-Quoc, Anh. "Étude et réalisation de dispositifs tout-optiques pour le traitement de signaux rapides." Grenoble INPG, 1996. http://www.theses.fr/1996INPG0095.
Leroy, Arnaud. "Optimisation d'un duplexeur en ligne fonctionnant à 1,3 µm et à 1,55 µm." Grenoble INPG, 1998. http://www.theses.fr/1998INPG0140.
Ribot, Hervé. "Laser en quart de cercle couplé monolithiquement à un guide optique." Grenoble INPG, 1988. http://www.theses.fr/1988INPG0015.
This thesis is devoted to the monolithic integration of a quarter ring laser evanescently coupled to an optical waveguide, on a GaAs substrate