Dissertations / Theses on the topic 'Integrated services digital networks; ISDN; broadband communication'
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Pitsillides, Andreas, and Andreas Pitsillides@ucy ac cy. "Control structures and techniques for broadband-ISDN communication systems." Swinburne University of Technology, 1993. http://adt.lib.swin.edu.au./public/adt-VSWT20060321.132650.
Full textOmundsen, Daniel (Daniel Simon) Carleton University Dissertation Engineering Electrical. "A pipelined, multi-processor architecture for a connectionless server for broadband ISDN." Ottawa, 1992.
Find full textSekercioglu, Ahmet, and ahmet@hyperion ctie monash edu au. "Fuzzy logic control techniques and structures for Asynchronous Transfer Mode (ATM) based multimedia networks." Swinburne University of Technology, 1999. http://adt.lib.swin.edu.au./public/adt-VSWT20050411.130014.
Full textSmith, Quentin D. "AN EVOLUTIONARY APPROACHTO A COMMUNICATIONS INFRASTRUCTURE FOR INTEGRATED VOICE, VIDEO AND HIGH SPEED DATA FROM RANGETO DESKTOP USING ATM." International Foundation for Telemetering, 1993. http://hdl.handle.net/10150/608864.
Full textAs technology progresses we are faced with ever increasing volumes and rates of raw and processed telemetry data along with digitized high resolution video and the less demanding areas of video conferencing, voice communications and general LAN-based data communications. The distribution of all this data has traditionally been accomplished by solutions designed to each particular data type. With the advent of Asynchronous Transfer Modes or ATM, a single technology now exists for providing an integrated solution to distributing these diverse data types. This allows an integrated set of switches, transmission equipment and fiber optics to provide multi-session connection speeds of 622 Megabits per second. ATM allows for the integration of many of the most widely used and emerging low, medium and high speed communications standards. These include SONET, FDDI, Broadband ISDN, Cell Relay, DS-3, Token Ring and Ethernet LANs. However, ATM is also very well suited to handle unique data formats and speeds, as is often the case with telemetry data. Additionally, ATM is the only data communications technology in recent times to be embraced by both the computer and telecommunications industries. Thus, ATM is a single solution for connectivity within a test center, across a test range, or between ranges. ATM can be implemented in an evolutionary manner as the needs develop. This means the rate of capital investment can be gradual and older technologies can be replaced slowly as they become the communications bottlenecks. However, success of this evolution requires some planning now. This paper provides an overview of ATM, its application to test ranges and telemetry distribution. A road map is laid out which can guide the evolutionary changeover from today's technologies to a full ATM communications infrastructure. Special applications such as the support of high performance multimedia workstations are presented.
Serbest, Yetik. "Resource management of integrated services networks /." Digital version accessible at:, 2000. http://wwwlib.umi.com/cr/utexas/main.
Full textLin, Rui Carleton University Dissertation Engineering Electrical. "Multiplexing, cell loss and traffic controls in ATM networks." Ottawa, 1992.
Find full textMiller, W. "The design and application of power line carrier communication and remote meter reading for use in integrated services and broadband-integrated services digital networks." Thesis, Open University, 1997. http://oro.open.ac.uk/57707/.
Full textJiao, QingZhong. "Admission control and congestion control in ATM/CDMA network." Thesis, Connect to online version, 1995. http://0-wwwlib.umi.com.mercury.concordia.ca/cr/concordia/fullcit?pMQ90887.
Full textThuppal, Rajagopalan. "On pipelined multistage interconnection networks." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1998. http://www.collectionscanada.ca/obj/s4/f2/dsk2/tape17/PQDD_0002/MQ36185.pdf.
Full textYan, Zhaohui. "Performance Analysis of A Banyan Based ATM Switching Fabric with Packet Priority." PDXScholar, 1995. https://pdxscholar.library.pdx.edu/open_access_etds/5199.
Full textHachfi, Fakhreddine Mohamed. "Future of asynchronous transfer mode networking." CSUSB ScholarWorks, 2004. https://scholarworks.lib.csusb.edu/etd-project/2639.
Full text"Adaptation of variable-bit-rate compressed video for transport over a constant-bit-rate communication channel in broadband networks." Chinese University of Hong Kong, 1995. http://library.cuhk.edu.hk/record=b5888495.
Full textThesis (M.Phil.)--Chinese University of Hong Kong, 1995.
Includes bibliographical references (leaves 118-[121]).
Chapter 1 --- Introduction --- p.1
Chapter 1.1 --- Video Compression and Transport --- p.2
Chapter 1.2 --- VBR-CBR Adaptation of Video Traffic --- p.5
Chapter 1.3 --- Research Contributions --- p.7
Chapter 1.3.1 --- Spatial Smoothing: Video Aggregation --- p.8
Chapter 1.3.2 --- Temporal Smoothing: A Control-Theoretic Study。 --- p.8
Chapter 1.4 --- Organization of Thesis --- p.9
Chapter 2 --- Preliminaries --- p.13
Chapter 2.1 --- MPEG Compression Scheme --- p.13
Chapter 2.2 --- Problems of Transmitting MPEG Video --- p.17
Chapter 2.3 --- Two-layer Coding and Transport Strategy --- p.19
Chapter 2.3.1 --- Framework of MPEG-based Layering --- p.19
Chapter 2.3.2 --- Transmission of GS and ES --- p.20
Chapter 2.3.3 --- Problems of Two-layer Video Transmission --- p.20
Chapter 3 --- Video Aggregation --- p.24
Chapter 3.1 --- Motivation and Basic Concept of Video Aggregation --- p.25
Chapter 3.1.1 --- Description of Video Aggregation --- p.28
Chapter 3.2 --- MPEG Video Aggregation System --- p.29
Chapter 3.2.1 --- Shortcomings of the MPEG Video Bundle Scenario with Two-Layer Coding and Cell-Level Multiplexing --- p.29
Chapter 3.2.2 --- MPEG Video Aggregation --- p.31
Chapter 3.2.3 --- MPEG Video Aggregation System Architecture --- p.33
Chapter 3.3 --- Variations of MPEG Video Aggregation System --- p.35
Chapter 3.4 --- Experimental Results --- p.38
Chapter 3.4.1 --- Comparison of Video Aggregation and Cell-level Multi- plexing --- p.40
Chapter 3.4.2 --- Varying Amount of the Allocated Bandwidth --- p.48
Chapter 3.4.3 --- Varying Number of Sequences --- p.50
Chapter 3.5 --- Conclusion --- p.53
Chapter 3.6 --- Appendix: Alternative Implementation of MPEG Video Aggre- gation --- p.53
Chapter 3.6.1 --- Profile Approach --- p.54
Chapter 3.6.2 --- Bit-Plane Approach --- p.54
Chapter 4 --- A Control-Theoretic Study of Video Traffic Adaptation --- p.58
Chapter 4.1 --- Review of Previous Adaptation Schemes --- p.60
Chapter 4.1.1 --- A Generic Model for Adaptation Scheme --- p.60
Chapter 4.1.2 --- Objectives of Adaptation Controller --- p.61
Chapter 4.2 --- Motivation for Control-Theoretic Study --- p.64
Chapter 4.3 --- Linear Feedback Controller Model --- p.64
Chapter 4.3.1 --- Encoder Model --- p.65
Chapter 4.3.2 --- Adaptation Controller Model --- p.69
Chapter 4.4 --- Analysis --- p.72
Chapter 4.4.1 --- Stability --- p.73
Chapter 4.4.2 --- Robustness against Coding-mode Switching --- p.83
Chapter 4.4.3 --- Unit-Step Responses and Unit-Sample Responses --- p.84
Chapter 4.5 --- Implementation --- p.91
Chapter 4.6 --- Experimental Results --- p.95
Chapter 4.6.1 --- Overall Performance of the Adaptation Scheme --- p.97
Chapter 4.6.2 --- Weak-Control verus Strong-Control --- p.99
Chapter 4.6.3 --- Varying Amount of Reserved Bandwidth --- p.101
Chapter 4.7 --- Conclusion --- p.103
Chapter 4.8 --- Appendix I: Further Research --- p.103
Chapter 4.9 --- Appendix II: Review of Previous Adaptation Schemes --- p.106
Chapter 4.9.1 --- Watanabe. et. al.'s Scheme --- p.106
Chapter 4.9.2 --- MPEG's Scheme --- p.107
Chapter 4.9.3 --- Lee et.al.'s Modification --- p.109
Chapter 4.9.4 --- Chen's Adaptation Scheme --- p.110
Chapter 5 --- Conclusion --- p.116
Bibliography --- p.118
Sekercioglu, Y. Ahmet. "Fuzzy logic control techniques and structures for Asynchronous Transfer Mode (ATM) based multimedia networks /." 2000. http://adt.lib.swin.edu.au/public/adt-VSWT20050411.130014.
Full textSubmitted for the degree of Doctor of Philosophy, School of Biophysical Science & Electrical Engineering, 2000. Typescript. Includes bibliographical references (p. 133-145).
"Pipeline Banyan: design, analysis and VLSI implementation." Chinese University of Hong Kong, 1994. http://library.cuhk.edu.hk/record=b5895458.
Full textThesis (Ph.D.)--Chinese University of Hong Kong, 1994.
Includes bibliographical references (leaves 191-[201]).
Chapter 1 --- Introduction --- p.1
Chapter 1.1 --- Background --- p.1
Chapter 1.1.1 --- Broadband Integrated Services Network --- p.1
Chapter 1.1.2 --- ATM Switching Technology --- p.3
Chapter 1.2 --- Broadband ATM Switching ´ؤ A Review --- p.4
Chapter 1.2.1 --- Shared Memory Switches --- p.5
Chapter 1.2.2 --- Shared Medium Switches --- p.5
Chapter 1.2.3 --- Space-division Type Switches --- p.6
Chapter 1.3 --- Motivation and Contributions --- p.13
Chapter 1.4 --- Overview of the Thesis --- p.13
Chapter 2 --- Pipeline Banyan Switch Architecture --- p.15
Chapter 2.1 --- Switch Architecture --- p.15
Chapter 2.2 --- Switch Operation --- p.17
Chapter 2.3 --- Switch Design --- p.19
Chapter 2.4 --- "Priority, Broadcasting and Multicasting Mechanisms" --- p.21
Chapter 2.5 --- Switch Speed Reduction at the Control Plane --- p.23
Chapter 3 --- Performance Evaluation of Pipeline Banyan --- p.27
Chapter 3.1 --- Performance under Uniform and Independent Traffic Pattern --- p.27
Chapter 3.1.1 --- Analysis of Packet Loss Performance --- p.27
Chapter 3.1.2 --- Throughput Performance --- p.32
Chapter 3.1.3 --- Delay Performance --- p.36
Chapter 3.1.4 --- Comparison of Loss Performance of Banyan-type Networks --- p.37
Chapter 3.1.5 --- Output Queueing Capability --- p.41
Chapter 3.2 --- Performance of the Switch under Special Traffic Pattern --- p.45
Chapter 3.2.1 --- Performance under Bursty Traffic --- p.45
Chapter 3.2.2 --- Performance under Hot Spot Traffic --- p.48
Chapter 3.2.3 --- Performance under Point-to-Point Traffic --- p.51
Chapter 3.2.4 --- Performance under Permutation Traffic --- p.52
Chapter 3.3 --- Switch Complexity Discussion --- p.54
Chapter 4 --- Multi-Channel Pipeline Banyan (MCPB) --- p.57
Chapter 4.1 --- Background --- p.57
Chapter 4.2 --- Switch Architecture --- p.59
Chapter 4.3 --- Performance Evaluation --- p.64
Chapter 4.3.1 --- Packet loss probability --- p.64
Chapter 4.3.2 --- Throughput performance --- p.69
Chapter 4.3.3 --- Delay performance --- p.69
Chapter 4.4 --- Application of MCPB --- p.71
Chapter 4.4.1 --- ATM Cross-connect --- p.71
Chapter 4.4.2 --- Switch Interconnection Fabric --- p.71
Chapter 5 --- VLSI Implementation --- p.75
Chapter 5.1 --- Outline of a typical ATM switching system --- p.75
Chapter 5.1.1 --- Line Interface Module --- p.75
Chapter 5.1.2 --- System Manager Module --- p.77
Chapter 5.1.3 --- Switch Module --- p.78
Chapter 5.2 --- "VLSI Design Technology, Procedures and Tools" --- p.78
Chapter 5.2.1 --- Design Technology --- p.78
Chapter 5.2.2 --- Procedures and Tools --- p.79
Chapter 5.3 --- Logic Design of ATM Switch Module --- p.80
Chapter 5.3.1 --- Switching Element in Control Plane --- p.80
Chapter 5.3.2 --- Switching Element in Data Plane --- p.86
Chapter 5.3.3 --- Clock Generator for Synchronization --- p.93
Chapter 5.3.4 --- Schematic of Control Plane --- p.98
Chapter 5.3.5 --- Schematic of Data Plane --- p.98
Chapter 5.3.6 --- Timing Diagrams --- p.98
Chapter 5.4 --- Chip Summary --- p.107
Chapter 5.5 --- Experiences --- p.109
Chapter 5.5.1 --- Core Size Limitation --- p.109
Chapter 5.5.2 --- Pin Count Limitation --- p.110
Chapter 5.5.3 --- Speed Limitation --- p.111
Chapter 5.5.4 --- Other Design Considerations --- p.111
Chapter 5.6 --- Discussions --- p.112
Chapter 6 --- Dynamic Priority Schemes for Fast Packet Switches --- p.114
Chapter 6.1 --- Motivation --- p.114
Chapter 6.2 --- Switch Architecture --- p.118
Chapter 6.3 --- QCPD: Queueing Controlled Priority Discipline --- p.121
Chapter 6.3.1 --- Algorithm QCPD --- p.121
Chapter 6.4 --- BCPD: Blocking Controlled Priority Discipline --- p.122
Chapter 6.4.1 --- Algorithm BCPD_FT --- p.122
Chapter 6.4.2 --- Delay Guarantee by Algorithm BCPD_FT --- p.123
Chapter 6.4.3 --- Algorithm BCPD_DT --- p.126
Chapter 6.4.4 --- Delay Guarantee by Algorithm BCPD_DT --- p.128
Chapter 6.5 --- HCPD: Hybrid Controlled Priority Discipline --- p.134
Chapter 6.5.1 --- Algorithms HCPD_FT and HCPD_DT --- p.135
Chapter 6.6 --- Performance Studies --- p.136
Chapter 6.6.1 --- Performance Comparison of the Priority Schemes --- p.136
Chapter 6.6.2 --- Cell Loss Performance of HCPD_DT --- p.140
Chapter 6.6.3 --- Input Queue Distribution of HCPD_DT --- p.142
Chapter 6.6.4 --- Delay Bound of HCPD_DT --- p.144
Chapter 6.6.5 --- Performance of HCPD_DT under Priority Traffic --- p.148
Chapter 6.7 --- The use of HCPD_DT in Pipeline Banyan --- p.152
Chapter 6.8 --- Conclusion --- p.153
Chapter 7 --- Summary and Future Work --- p.155
Chapter 7.1 --- Summary --- p.155
Chapter 7.2 --- Future Work --- p.156
Chapter A --- Verilog HDL descriptions of 16x16 Pipeline Banyan --- p.158
Chapter B --- User's Guide of 16x16 Pipeline Banyan Chip Set --- p.182
Chapter B.l --- Specification --- p.182
Chapter B.2 --- Control Plane Chip and Data Plane Chip Pinout --- p.183
Chapter B.2.1 --- Control Plane Chip Pinout --- p.183
Chapter B.2.2 --- Data Plane Chip Pinout --- p.183
Chapter B.3 --- Signal Descriptions --- p.186
Chapter B.3.1 --- Signal Descriptions of Control Plane Chip --- p.186
Chapter B.3.2 --- Signal Descriptions of Data Plane Chip --- p.187
Chapter B.4 --- Connection Examples --- p.188
Bibliography --- p.191
"Non-blocking and distributed routing principles in ATM packet switching networks." 1997. http://library.cuhk.edu.hk/record=b6073066.
Full textThesis (Ph.D.)--Chinese University of Hong Kong, 1997.
Includes bibliographical references (p. 126).
Electronic reproduction. Hong Kong : Chinese University of Hong Kong, [2012] System requirements: Adobe Acrobat Reader. Available via World Wide Web.
Mode of access: World Wide Web.
"Distributed call set-up algorithms in BISDN environment." Chinese University of Hong Kong, 1992. http://library.cuhk.edu.hk/record=b5887753.
Full textThesis (M.Phil.)--Chinese University of Hong Kong, 1992.
Includes bibliographical references (leaves 125-131).
Chapter 1 --- Introduction --- p.1
Chapter 1.1 --- Background --- p.1
Chapter 1.2 --- Outline of the thesis --- p.6
Chapter 1.3 --- Current Art in Packet Switching --- p.9
Chapter 2 --- Management of Control Information --- p.17
Chapter 2.1 --- Inter-node Exchange of Link Congestion Status --- p.21
Chapter 2.2 --- Consistency of Control Information --- p.24
Chapter 2.3 --- Alternate Format of Control Information --- p.26
Chapter 3 --- Traffic Flow Control --- p.29
Chapter 3.1 --- Control of Traffic Influx into the Network --- p.29
Chapter 3.2 --- Control of Traffic Loading from the Node --- p.30
Chapter 3.3 --- Flow Control for Connection Oriented Traffic --- p.32
Chapter 3.4 --- Judgement of Link Status --- p.38
Chapter 3.5 --- Starvation-free and Deadlock-free --- p.42
Chapter 4 --- Call Set-up Algorithm Traffic Modelling --- p.47
Chapter 4.1 --- Basic Algorithm --- p.47
Chapter 4.2 --- Minimization of Bandwidth Overhead --- p.48
Chapter 4.3 --- Two-way Transmission --- p.51
Chapter 4.4 --- Traffic Modelling --- p.52
Chapter 4.4.1 --- Aggregate Traffic Models --- p.53
Chapter 4.4.2 --- Traffic Burstiness --- p.57
Chapter 5 --- Parameters Tuning and Analysis --- p.76
Chapter 5.1 --- Scheme I : Scout Pumping --- p.76
Chapter 5.2 --- Scheme II : Speed-up Scout Pumping --- p.85
Chapter 5.3 --- Blocking Probability --- p.90
Chapter 5.4 --- Scout Stream Collision --- p.92
Chapter 6 --- Simulation Modelling & Performance Evaluation --- p.96
Chapter 6.1 --- The Network Simulator --- p.96
Chapter 6.1.1 --- Simulation Event Scheduling --- p.97
Chapter 6.1.2 --- Input Traffic Regulation --- p.100
Chapter 6.1.3 --- Actual Offered Load --- p.101
Chapter 6.1.4 --- Static and Dynamic Parameters --- p.103
Chapter 6.2 --- Simulation Results --- p.107
Chapter 7 --- Conclusions --- p.123
Chapter A --- List of Symbols --- p.132
"A self-routing non-buffering ATM switch." Chinese University of Hong Kong, 1996. http://library.cuhk.edu.hk/record=b5895704.
Full textThesis (M.Phil.)--Chinese University of Hong Kong, 1996.
Includes bibliographical references.
Chapter 1. --- INTRODUCTION --- p.1
Chapter 2. --- ASYNCHRONOUS TRANSFER MODE SWITCHING --- p.4
Chapter 2.1 --- Transfer Modes --- p.4
Chapter 2.1.1 --- Circuit Switching --- p.4
Chapter 2.1.2 --- ATM Switching --- p.6
Chapter 2.1.3 --- Packet Switching --- p.8
Chapter 2.2 --- Different Types of ATM Switching System --- p.8
Chapter 2.2.1 --- Central Control Type --- p.9
Chapter 2.2.2 --- Self-Routing Type --- p.9
Chapter 2.3 --- Self-Routing Non-Buffering ATM Switching Node --- p.10
Chapter 3. --- FUNCTIONAL DESCRIPTION OF MODULE ´بA´ة --- p.16
Chapter 3.1 --- ATM Cell Format --- p.17
Chapter 3.2 --- Concentrator --- p.17
Chapter 3.3 --- Routing Cell --- p.19
Chapter 4. --- PHYSICAL STRUCTURE OF MODULE ´بA´ة --- p.23
Chapter 4.1 --- Clocking Scheme --- p.23
Chapter 4.2 --- Concentrator --- p.25
Chapter 4.2.1 --- 2-by-2 Sorter --- p.25
Chapter 4.2.2 --- Input Framer --- p.30
Chapter 4.2.3 --- Data Buffer --- p.38
Chapter 4.3 --- Routing Cell --- p.38
Chapter 4.3.1 --- Type I Router --- p.39
Chapter 4.3.2 --- Type II Router --- p.42
Chapter 4.4 --- Block By-Passed Function --- p.43
Chapter 5. --- SIMULATION AND TEST --- p.48
Chapter 5.1 --- Computer Simulation --- p.48
Chapter 5.2 --- Actual Chip Testing --- p.53
Chapter 5.3 --- Measurement Results --- p.55
Chapter 5.3.1 --- Functionality --- p.55
Chapter 5.3.2 --- Maximum Clock Frequency --- p.60
Chapter 5.3.3 --- Power Dissipation --- p.61
Chapter 6. --- CONCLUSION --- p.63
Chapter A. --- BRIEF HISTORY OF ATM SWITCH ARCHITECTURE DEVELOPMENT --- p.65
Chapter B. --- BIBLIOGRAPHY --- p.66
Chapter C. --- A N-WELL CMOS PROCESS --- p.70
Chapter D. --- CADENCE DESIGN FLOW --- p.73
Chapter E. --- YERILOG SIMULATION PROGRAMS --- p.77
Chapter F. --- SCHEMATIC DIAGRAMS --- p.100