Books on the topic 'Integrated circuits Very large scale integration Design and construction Data processing'

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1

Rubin, Steven. Computer aids for VLSI design. Reading, Mass: Addison-Wesley, 1987.

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2

Walker, Duncan Moore Henry. Yield simulation for integrated circuits. Boston: Kluwer Academic Publishers, 1987.

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3

Brackenbury, Linda E. M. Design of VLSI systems -: A practical introduction. London: Macmillan, 1987.

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4

Wong, D. F. Simulated annealing for VLSI design. Boston: Kluwer Academic, 1988.

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5

Lengauer, Thomas. Combinatorial algorithms for integrated circuit layout. Chichester: Wiley, 1990.

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6

1958-, Leeser M., Brown G. 1960-, and Cornell University. Mathematical Sciences Institute., eds. Hardware specification, verification, and synthesis: Mathematical aspects : proceedings. Berlin: Springer-Verlag, 1990.

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7

PSPICE and MATLAB for electronics: An integrated appraoch. Boca Raton, Fla: CRC Press, 2002.

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8

Fabricius, Eugene D. Introduction to VLSI design. New York: McGraw-Hill, 1990.

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9

Advanced Research Working Conference on Correct Hardware Design Methodologies (1995 Frankfurt/Main, Germany). Correct hardware design and verification methods: IFIP WG 10.5 advanced research working conference, CHARME '95, Frankfurt/Main, Germany, October 2-4, 1995 : proceedings. Berlin: Springer, 1995.

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10

Holden, Tony. Knowledge based CAD and microelectronics. Amsterdam: North-Holland, 1987.

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11

An artificial intelligence approach to VLSI routing. Boston: Kluwer Academic Publishers, 1986.

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12

PSPICE and MATLAB for electronics: An integrated approach. 2nd ed. Boca Raton: CRC Press, 2010.

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13

Ravikumār, C. P. Parallel methods for VLSI layout design. Norwood, N.J: Ablex, 1996.

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14

Cornell University. Mathematical Sciences Institute. Workshop. Hardware specification, verification, and synthesis: Mathematical aspects : proceedings. Berlin: Springer-Verlag, 1990.

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15

Trimberger, Stephen. An introduction to CAD for VLSI. Boston: Kluwer Academic Publishers, 1987.

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16

1943-, Elmasry Mohamed I., ed. Low-power digital VLSI design: Circuits and systems. Boston: Kluwer Academic Publishers, 1995.

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17

1959-, Nakhla Michel S., and Zhang Q. J, eds. Modeling and simulation of high speed VLSI interconnects. Boston: Kluwer Academic Publishers, 1994.

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18

1937-, Ruehli A. E., ed. Circuit analysis, simulation and design. Amsterdam: North-Holland, 1987.

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19

1937-, Ruehli A. E., ed. Circuit analysis, simulation, and design: Part 1. Amsterdam: North-Holland, 1986.

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20

1953-, Denyer P. B., ed. Serial-data computation. Boston: Kluwer Academic Publishers, 1988.

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21

Gabrièle, Saucier, and McLellan Paul Michael, eds. Logic and architecture synthesis for silicon compilers: Proceedings of the International Workshop onLogic and Architecture Synthesis for Silicon Compilers held in Grenoble, France, 25-27 May, 1988. Amsterdam: North-Holland, 1989.

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22

International Workshop on Logic and Architecture Synthesis for Silicon Compilers (1988 Grenoble, France). Logic and architecture synthesis for silicon compilers: Proceedings of the International Workshop on Logic and Architecture Synthesis for Silicon Compilers held in Grenoble, France, 25-27 May, 1988. Amsterdam: North-Holland, 1989.

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23

International Conference on VLSI Design (8th 1995 New Delhi, India). Proceedings of the 8th International Conference on VLSI Design, January 4-7, 1995, New Delhi, India. Los Alamitos, Calif: IEEE Computer Society Press, 1995.

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24

Great, Lakes Symposium on VLSI (1st 1991 Kalamazoo Mich ). Proceedings, First Great Lakes Symposium on VLSI, March 1-2, 1991, Kalamazoo, Michigan. Los Alamitos, Calif: IEEE Computer Society Press, 1991.

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25

Lamb, Peter Russell. Object-oriented techniques for mixed-mode circuit simulation. Konstanz: Hartung-Gorre, 1991.

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26

McCalla, William J. Fundamentals of computer-aided circuit simulation. Boston: Kluwer Academic Publishers, 1987.

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27

Stok, Leon. Architectural synthesis and optimization of digital systems / door Leon Stok. Helmond [Netherlands]: Wibro Dissertatiedrukkerij, 1991.

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28

IFIP WG 10.5 Advanced Research Working Conference CHARME '95 (1995 Frankfurt/Main, Germany). Correct hardware design and verification methods: IFIP WG 10.5 advanced research working conference, CHARME '95, Frankfurt/Main, Germany, October 2-4, 1995 : proceedings. Berlin: Springer, 1995.

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29

Advanced Research Working Conference on Correct Hardware Design Methodologies (1995 Frankfurt/Main, Germany). Correct hardware design and verification methods: IFIP WG10.5 advanced research working conference, CHARME 9̕5, Frankfurt/Main, Germany, October 2-4, 1995 : proceedings. Berlin: Springer, 1995.

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30

Healey, Steven Thomas. Abstract partitioning and routing of logic networks for custom module generation. Urbana, Ill. (1304 W. Springfield Ave., Urbana 61801-2987): Dept. of Computer Science, University of Illinois at Urbana-Champaign, 1987.

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31

Bürgin, Felix. Low-power circuit architectures and clocking strategies for digital hearing aids. Konstanz: Hartung-Gorre, 2008.

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32

VLSI chip design with the hardware description language VERILOG: An introduction based on a large RISC processor design. Berlin: Springer, 1996.

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33

Hill, Fredrick J. Computer aided logical design with emphasis on VLSI. 4th ed. New York: Wiley, 1993.

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34

Fabricius, Eugene D. Introduction to VLSI design. New York: McGraw-Hill, 1990.

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35

Stroobandt, Dirk. A priori wire length estimates for digital design. Boston: Kluwer Academic Publishers, 2001.

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36

1952-, Shanblatt Michael A., ed. ASIC system design with VHDL: A paradigm. Boston: Kluwer Academic Publishers, 1989.

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37

Planar processing primer. New York, N.Y: Van Nostrand Reinhold, 1990.

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38

H, Meng Teresa, and Malik Sharad, eds. Asynchronous circuit design for VLSI signal processing. Boston: Kluwer Academic, 1994.

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39

Semiconductor device processing: Technology trends in the VLSI era. Philadelphia, Pa., U.S.A: Gordon and Breach Science Publishers, 1993.

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40

1945-, Stroeve Pieter, and American Chemical Society. Division of Industrial and Engineering Chemistry., eds. Integrated circuits: Chemical and physical processing : developed from the winter symposium. Washington, D.C: American Chemical Society, 1985.

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41

1961-, Overhauser David, ed. Digital timing macromodeling for VLSI design verification. Boston: Kluwer Academic, 1995.

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42

Wassner, Jürgen. Data statistics and low-power digital VLSI. Konstanz: Hartung-Gorre, 2001.

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43

Minato, Shin-ichi. Binary decision diagrams and applications for VLSI CAD. Boston: Kluwer Academic Publishers, 1996.

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44

1961-, Hochet Bertrand, Acosta Antonio J. 1966-, and Bellido Manuel J. 1964-, eds. Integrated circuit design: Power and timing modeling, optimization and simulation ; 12th international workshop, PATMOS 2002, Seville, Spain, September 11-13, 2002 ; proceedings. Berlin: Springer, 2002.

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45

Legacy data: A structured methodology for device migration in DSM technology. Boston: Kluwer Academic Publishers, 2003.

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46

1964-, Ghosh Abhijit, and Keutzer Kurt William 1955-, eds. Logic synthesis. New York: McGraw-Hill, 1994.

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47

King, Brayton Robert, ed. Integrating functional and temporal domains in logic design: The false path problem and its implications. Boston: Kluwer Academic, 1991.

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48

Maheshwari, Naresh. Timing analysis and optimization of sequential circuits. Boston, Mass: Kluwer Academic, 1999.

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49

Progress in Computer Aided Vlsi Design: Implementations (Progress in Computer-Aided V L S I Design). Ablex Pub, 1990.

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50

Progress in Computer Aided Vlsi Design: Techniques (Progress in Computer-Aided V L S I Design). Ablex Publishing Corporation, 1990.

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