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Relevant bibliographies by topics / INMOS Transputer

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Academic literature on the topic 'INMOS Transputer'

Author: Grafiati

Published: 4 June 2021

Last updated: 11 February 2022

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Journal articles on the topic "INMOS Transputer"

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Willett, Peter. "Textual and chemical information processing using parallel computer hardware." Journal of Information Science 15, no. 4-5 (August 1989): 223–36. http://dx.doi.org/10.1177/016555158901500405.

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This paper discusses the use of parallel computer hardware to increase the efficiency of processing in databases of text and chemical structures. After a general introduction to parallelism, two types of parallel computer are described: the ICL Distrib uted Array Processor and the INMOS Transputer. Experimen tal results are presented of the use of the DAP for cluster analysis, of the transputer for chemical substructure and maxi mal common substructure searching, and of both machines for text retrieval.

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Caliskan, F. "Real-time implementation of an algorithm for self-repairing control systems based on LQG optimization." Proceedings of the Institution of Mechanical Engineers, Part I: Journal of Systems and Control Engineering 212, no. 1 (February 1, 1998): 27–35. http://dx.doi.org/10.1243/0959651981539262.

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In this paper a self-repairing real-time control (SRC) system based on LQG (Linear Quadratic Gaussian) optimization is proposed. Its transputer implementation and a real-time aircraft application are presented. The SRC system is composed of the monitoring of the control system, the detection and diagnosis of the failure and the reconfiguration of the control laws. The proposed SRC system is suitable for real-time operation because of the parallel nature of its architecture. The INMOS multitransputer implementation of the SRC applied to an aircraft model provides 56 per cent efficiency compared to a single-transputer implementation.

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Clarke, Lyndon, and Greg Wilson. "Tiny: An efficient routing harness for the Inmos transputer." Concurrency: Practice and Experience 3, no. 3 (June 1991): 221–45. http://dx.doi.org/10.1002/cpe.4330030307.

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Thomlinson, J., L. Adams, and R. Harboe-Sorensen. "The SEU and Total Dose Response of the INMOS Transputer." IEEE Transactions on Nuclear Science 34, no. 6 (1987): 1803–7. http://dx.doi.org/10.1109/tns.1987.4337559.

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Flammini, Michele. "On the Hardness of Devising Interval Routing Schemes." Parallel Processing Letters 07, no. 01 (March 1997): 39–47. http://dx.doi.org/10.1142/s0129626497000061.

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The k-Interval Routing Scheme (k-IRS) is a compact routing scheme on general networks. It has been studied extensively and recently been implemented on the latest generation of the INMOS transputer router chips. In this paper we investigate the time complexity of devising a minimal space k-IRS and we prove that the problem of deciding whether there exists a 2-IRS for any network G is NP-complete. This is the first hardness result for k-IRS where k is constant and the graph underlying the network is unweighted. Moreover, the NP-completeness holds also for linear and strict 2-IRS.

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le Roux, J. J., P. J. Bakkes, J. J. du plessis, and J. H. Cloete. "Execution of the NEC2 electromagnetic moment method code on the Inmos T800 Transputer." Electronics Letters 24, no. 16 (1988): 991. http://dx.doi.org/10.1049/el:19880674.

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Taylor, S., and R. Taylor. "A high-speed, multi-processor data acquisition and process control system using the Inmos transputer." IEEE Transactions on Nuclear Science 36, no. 5 (1989): 1719–24. http://dx.doi.org/10.1109/23.41136.

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Anderson, Alun. "Transputers: Inmos puts its head in the lion's mouth." Nature 317, no. 6038 (October 1985): 565. http://dx.doi.org/10.1038/317565a0.

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González, J. Solano, and D. I. Jonest. "Parallel computation of configuration space." Robotica 14, no. 2 (March 1996): 205–12. http://dx.doi.org/10.1017/s0263574700019111.

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SUMMARYMany motion planning methods use Configuration Space to represent a robot manipulator's range of motion and the obstacles which exist in its environment. The Cartesian to Configuration Space mapping is computationally intensive and this paper describes how the execution time can be decreased by using parallel processing. The natural tree structure of the algorithm is exploited to partition the computation into parallel tasks. An implementation programmed in the occam2 parallel computer language running on a network of INMOS transputers is described. The benefits of dynamically scheduling the tasks onto the processors are explained and verified by means of measured execution times on various processor network topologies. It is concluded that excellent speed-up and efficiency can be achieved provided that proper account is taken of the variable task lengths in the computation.

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Taylor, R., and S. Taylor. "A fully parallel, multi-processor software system using Inmos transputers and the occam programming language." IEEE Transactions on Nuclear Science 36, no. 5 (1989): 1590–96. http://dx.doi.org/10.1109/23.41110.

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Dissertations / Theses on the topic "INMOS Transputer"

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Cooper, C., and n/a. "Space subdivision and distributed databases in a multiprocessor raytracer." University of Canberra. Information Sciences & Engineering, 1991. http://erl.canberra.edu.au./public/adt-AUC20060629.145540.

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This thesis deals with computer generated images. The thesis begins with an overview of a generalised computer graphics system, including a brief survey of typical methods for generating photorealistic images. One such technique, ray tracing, is used as the basis for the work which follows. The overview section concludes with a statement of the aim which is to: Investigate the effective use of available processing power and effective utilisation of available memory by implementing a ray tracing programme which uses space subdivision, multiple processors and a distributed world model database. The problem formulation section describes the ray tracing principle and then introduces the main areas of study. The INMOS Transputer (a building block for concurrent systems) is used to implement the multiple process ray tracer. Space subdivision is achieved by repeated and regular subdivision of a world cube (which contains the scene to be ray traced) into named cubes, called octrees. The subdivision algorithm continues to subdivide space until no octree contains more than a specified number of objects, or until the practical limit of space subdivision is reached. The objects in the world model database are distributed in a round robin manner to the ray trace processes. During execution of the ray trace programme, information about each object is passed between processes by a message mechanism. The concurrent code for the transputer processes, written in OCCAM 2, was developed using timing diagrams and signal flow diagrams derived by analogy from digital electronics. Structure diagrams, modified to be consistent with OCCAM 2 processes, were derived from the timing diagrams and signal flow diagrams. These were used as a basis for the coding. The results show that space subdivision is an effective use of processor power because the number of trial intersections of rays with objects is dramatically reduced. In addition, distribution of the world model database avoids duplication of the database in the memory of each process and hence better utilisation of available memory is achieved. The programmes are supported by a menu driven interface (running on a PC AT) which enables the user to control the ray trace processes running on the transputer board housed in the PC.

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Peel, R. M. A. "High-throughput local area network access for INMOS transputers." Thesis, University of Surrey, 1995. http://epubs.surrey.ac.uk/770240/.

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This thesis presents the design of an Ethernet local-area network interface for embedded transputer systems. It is based upon parallel software which manages the TCP/IP family of protocols, passing packets between a single transputer, which connects to the network, and application processes which run on an arbitrary number of other transputers. The different layers of the protocol processing - Ethernet control, IP and TCP are all performed in separate parallel processes. Extra routing processors, arranged in a tree configuration, provide access to the lower IP and Ethernet layers from as many TCP and application processes as desired. Investigation of the processor utilisation and channel throughput of each of the parallel processes has led to the rejection of hardware-assistance in the form of a complex shared-memory, multi-processor architecture. Instead, a double pipeline of processes, running on a small pipeline of transputers, communicate exclusively using the transputers' serial links. This scheme is shown to provide good load balancing and to be a cost-effective way of exchanging traffic between a transputer application and a user process running on a high-performance workstation at data rates of over 950 kbytes/second - almost the entire available bandwidth of a 10 Mbit/sec Ethernet. All software is written in the occam programming language. As well as presenting the design of the protocol software, the thesis includes performance measurements and reports on two applications which were built upon the initial work. These are a networked implementation of the INMOS Iserver, which allows access to transputers from anywhere on the network, and an embedded instrumentation system which pre-processes data from an ion microbeam and passes part-analysed results to a conventional workstation for display, archiving and user control of the experiment.

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Liao, Chieh-horng, and 廖介宏. "Parallel Computer Architecture Simulator─Part I : Simulation of the CPU, INMOS Transputer T805." Thesis, 1995. http://ndltd.ncl.edu.tw/handle/96577457300165067172.

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碩士
淡江大學
資訊工程研究所
83
Simulation is extensively utilized for studying complex systems. The complexity of simulation models for physical systems is steadily increasing, and the requirement of real- time speed has become mandatory. This has all led to the use of massively parallel computer systems to support parallel simulation.This thesis emphasizes on the implementation of a CPU simulator. It's also the first part of the National Science Council project "Parallel Simulation on a Parallel Computer Architecture Simulator." Our objective is to simulate a T805 transputer CPU that can be easily used as a building block to construct a closely-couple transputer network. INMOS transputer family is designed and based on the OCCAM language that is a fulfillment of Hoare's Communicating Sequential Processes theory. Because of the network nature of transputer, each T805 CPU has a different structure from a traditional CPU. For instance, it is a stack-machine processor with 4K program memory and four communication links for direct connection to other transputers. Moreover, it has a microcoded scheduler that enables concurrent processing. We have used the discrete-event simulation technique to construct our CPU emulator. In addition, each message sending out through one of the links will be attached a timestamp that represents the simulating run-time.

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Books on the topic "INMOS Transputer"

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I, Beli͡a︡kov M., ed. Instrumentalʹnai͡a︡ mobilʹnai͡a︡ operat͡s︡ionnai͡a︡ sistema INMOS. Moskva: "Finansy i statistika", 1985.

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Book chapters on the topic "INMOS Transputer"

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Veronis, Andrew M. "Case Study: The Inmos Transputer." In Survey of Advanced Microprocessors, 179–99. Boston, MA: Springer US, 1991. http://dx.doi.org/10.1007/978-1-4615-3930-8_6.

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Thompson, Haydn A. "Controller and Engine Simulation Implementation on the Inmos Transputer." In Parallel Processing for Jet Engine Control, 29–61. London: Springer London, 1992. http://dx.doi.org/10.1007/978-1-4471-1972-2_3.

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Glemot, France. "Presentation of the Cubi9000: A Graphics System based on Inmos T800 Transputers." In Advances in Computer Graphics Hardware IV, 179–98. Berlin, Heidelberg: Springer Berlin Heidelberg, 1991. http://dx.doi.org/10.1007/978-3-642-76298-7_10.

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4

Craigen, Dan, Susan Gerhart, and Ted Ralston. "INMOS Transputer—Use of Formal Methods in Hardware Verification." In Industrial Applications of Formal Methods to Model, Design and Analyze Computer Systems, 242–54. Elsevier, 1995. http://dx.doi.org/10.1016/b978-0-8155-1362-9.50025-1.

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Kunovský, Jiří, Karel Mikulášek, and Lubomír Straka. "MODERN TAYLOR SERIES METHOD AND INMOS TRANSPUTERS." In Massively Parallel Processing Applications and Development, 431–38. Elsevier, 1994. http://dx.doi.org/10.1016/b978-0-444-81784-6.50055-5.

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Conference papers on the topic "INMOS Transputer"

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Li, Qiang, and T. Gary Yip. "An Implementation of Monitoring Systems Using Microprocessor Building Blocks." In ASME 1992 International Computers in Engineering Conference and Exposition. American Society of Mechanical Engineers, 1992. http://dx.doi.org/10.1115/cie1992-0066.

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Abstract This paper presents a cost-effective implementation of a sensor monitoring system based on microprocessor building blocks. The Inmost Transputer processor is selected as the building block model. Some possible configurations of the system is discussed. Since further detailed study is needed, the paper serves as a preliminary study report.

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Luce, Roger W., and Nick C. Buchholz. "Fiber optic link design for INMOS transputers." In Aerospace Sensing, edited by Eric R. Fossum. SPIE, 1992. http://dx.doi.org/10.1117/12.60517.

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