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Journal articles on the topic 'Injection locked VCO'

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Published: 7 July 2024

Last updated: 7 July 2024

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1

Jiang, Longkai, Changjun Liu, Shaoyue Wang, Xueman Sun, and Jie Wu. "A Weak Reverse Coupling Cascaded Injection-Locked VCO Array for Beam Scanning in Phased Arrays." Electronics 12, no. 10 (May 19, 2023): 2301. http://dx.doi.org/10.3390/electronics12102301.

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We propose a novel phase shifter for beam scanning in phased arrays using a cascaded injection-locked voltage-controlled oscillator (VCO) array with weak reverse coupling. We analyze the phase noise performance of a multi-signal injection-locked oscillator and establish a phase output model for the array, studying the effects of forward and reverse injection ratios on phase and phase noise at each stage. By decoupling and cascade locking VCO array elements through controlled injection ratios, we design a 2.45 GHz one-dimensional linear array of four VCOs that achieves a continuous fixed phase difference between adjacent oscillators from −180∘ to 180∘, enabling electronic tuning of phase shift and beam scanning. Finally, the beam scanning of the antenna array is realized by using the VCO array. Our theoretical and experimental results demonstrate the effectiveness of our proposed approach.

2

TSURU, Masaomi, Kengo KAWASAKI, Koji TSUTSUMI, and Eiji TANIGUCHI. "Adaptively Phase-Shift Controlled Self-Injection Locked VCO." IEICE Transactions on Electronics E98.C, no. 7 (2015): 677–84. http://dx.doi.org/10.1587/transele.e98.c.677.

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3

JANG, S. L., C. W. CHANG, S. C. WU, C. F. LEE, L. y. TSAI, and J. F. HUANG. "Quadrature Hartley VCO and Injection-Locked Frequency Divider." IEICE Transactions on Electronics E91-C, no. 8 (August 1, 2008): 1371–74. http://dx.doi.org/10.1093/ietele/e91-c.8.1371.

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4

Hao, Yuan, Li Cai Wang, Qing Lei Du, and Fei Cheng Wang. "Theory and Experiments of Injection-Locked Oscillator." Applied Mechanics and Materials 602-605 (August 2014): 2522–25. http://dx.doi.org/10.4028/www.scientific.net/amm.602-605.2522.

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Injection-locking technique is receiving increasing interest in industrial applications, which is especially suitable for smart antenna array, but relative experiments are complicated. The article focuses on the theory and experiment of the technique. Firstly, section 2 reviews the theory of injection-locking technique, and summarizes two useful conclusions on injection-locking bandwidth and phase difference adjusting bound of the phenomena. Secondly, section 3 describes experiments using commercial microwave integrated circuit (MMIC) voltage controlled oscillator (VCO), which is reduces the experimental conditions. Experiments results perform very well.

5

Lee, Shuenn-Yuh, Liang-Hung Wang, and Yu-Heng Lin. "A CMOS Quadrature VCO With Subharmonic and Injection-Locked Techniques." IEEE Transactions on Circuits and Systems II: Express Briefs 57, no. 11 (November 2010): 843–47. http://dx.doi.org/10.1109/tcsii.2010.2082990.

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6

Xue, Quan. "A subharmonically injection-locked dual-gate FET VCO frequency synthesizer." Microwave and Optical Technology Letters 26, no. 5 (2000): 294–96. http://dx.doi.org/10.1002/1098-2760(20000905)26:5<294::aid-mop6>3.0.co;2-z.

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7

Jang, S. L., Y. H. Chuang, S. H. Lee, L. R. Chi, and C. F. Lee. "An Integrated 5–2.5-GHz Direct-Injection Locked Quadrature $LC$ VCO." IEEE Microwave and Wireless Components Letters 17, no. 2 (February 2007): 142–44. http://dx.doi.org/10.1109/lmwc.2006.890343.

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8

Jang, Sheng-Lyang, S. S. Huang, Chien-Feng Lee, and M. H. Juang. "CMOS Quadrature VCO Implemented With Two First-Harmonic Injection-Locked Oscillators." IEEE Microwave and Wireless Components Letters 18, no. 10 (October 2008): 695–97. http://dx.doi.org/10.1109/lmwc.2008.2003476.

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9

Jang, S. L., S. H. Huang, C. C. Liu, and M. H. Juang. "CMOS Colpitts Quadrature VCO Using the Body Injection-Locked Coupling Technique." IEEE Microwave and Wireless Components Letters 19, no. 4 (April 2009): 230–32. http://dx.doi.org/10.1109/lmwc.2009.2015506.

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10

Jang, Sheng-Lyang, Cheng-Chen Liu, Shin-Hsin Huang, and Miin-Horng Juang. "Quadrature cross-coupled VCO implemented with body injection-locked frequency dividers." Microwave and Optical Technology Letters 51, no. 8 (May 13, 2009): 1918–21. http://dx.doi.org/10.1002/mop.24495.

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11

Abbas, Waseem, Zubair Mehmood, and Munkyo Seo. "A V-Band Phase-Locked Loop with a Novel Phase-Frequency Detector in 65 nm CMOS." Electronics 9, no. 9 (September 13, 2020): 1502. http://dx.doi.org/10.3390/electronics9091502.

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A 65–67 GHz phase-locked loop (PLL) with a novel low power phase-frequency detector (PFD) in 65 nm LP CMOS is presented. The PLL consists of a V-band voltage-controlled oscillator (VCO), a divide-by-two injection-locked frequency divider (ILFD), and a current-mode logic (CML) divider chain. A charge pump (CP) and a 2nd-order loop filter are used with PFD for VCO tuning. The PFD is implemented with 16 transistors with dead-zone-free capability. The measured locking range of the PLL is from 65.15 to 67.4 GHz, with −11.5 dBm measured output power at 66.05 GHz while consuming 88 mW. The measured phase noise at 1 MHz offset is −84.43 dBc/Hz. The chip area of the PLL is 0.84 mm2 including probing pads. The proposed PLL can be utilized as a frequency synthesizer for carrier signal generation in IEEE 802.11ad standard high data rate transceiver circuits.

12

Al-Tamimi, Karama M., Kamal El-Sankary, and Youcef Fouzar. "VCO-Based ADC With Built-In Supply Noise Immunity Using Injection-Locked Ring Oscillators." IEEE Transactions on Circuits and Systems II: Express Briefs 66, no. 7 (July 2019): 1089–93. http://dx.doi.org/10.1109/tcsii.2018.2875867.

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13

Lee, Hyunkyu, and Sanggeun Jeon. "A Q-Band CMOS Image-Rejection Receiver Integrated with LO and Frequency Dividers." Electronics 12, no. 14 (July 13, 2023): 3069. http://dx.doi.org/10.3390/electronics12143069.

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This paper presents a Q-band image-rejection receiver using a 65 nm CMOS technology. For a high image-rejection ratio (IMRR), the Q-band receiver employs the Hartley architecture which consists of a Q-band low-noise amplifier, two down-conversion mixers, a 90° hybrid coupler, and two IF baluns. In addition, a Q-band fundamental voltage-controlled oscillator (VCO) and a frequency divider chain divided by 256 are integrated into the receiver for LO. A charge injection technique is employed in the mixers to reduce the DC power while maintaining a high conversion gain and linearity. The VCO adopts a cross-coupled topology to secure stable oscillation with high output power in the Q-band. The frequency divider chain is composed of an injection-locked frequency divider (ILFD) and a multi-stage current-mode logic (CML) divider to achieve a high division ratio of 256, which facilitates the LO signal locking to an external phase-locked loop. An inductive peaking is employed in the ILFD to widen the locking range. The Q-band image-rejection receiver exhibits a peak conversion gain of 16.4 dB at 43 GHz. The IMRR is no less than 35.6 dBc at the IF frequencies from 1.5 to 5 GHz.

14

Lee, Sang Yeop, Hiroyuki Ito, Noboru Ishihara, and Kazuya Masu. "A Novel Direct Injection-Locked QPSK Modulator Based on Ring VCO in 180 nm CMOS." IEEE Microwave and Wireless Components Letters 24, no. 4 (April 2014): 269–71. http://dx.doi.org/10.1109/lmwc.2014.2299534.

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15

Jalalifar, Majid, and Gyung-Su Byun. "A $K$ -Band Divide-by-Five Injection-Locked Frequency Divider Using a Near-Threshold VCO." IEEE Microwave and Wireless Components Letters 24, no. 12 (December 2014): 881–83. http://dx.doi.org/10.1109/lmwc.2014.2360355.

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16

LEE, Sang_yeop, Norifumi KANEMARU, Sho IKEDA, Tatsuya KAMIMURA, Satoru TANOI, Hiroyuki ITO, Noboru ISHIHARA, and Kazuya MASU. "A Ring-VCO-Based Injection-Locked Frequency Multiplier with Novel Pulse Generation Technique in 65nm CMOS." IEICE Transactions on Electronics E95.C, no. 10 (2012): 1589–97. http://dx.doi.org/10.1587/transele.e95.c.1589.

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17

Liao, Dongyi, Yucai Zhang, Fa Foster Dai, Zhenqi Chen, and Yanjie Wang. "An mm-Wave Synthesizer With Robust Locking Reference-Sampling PLL and Wide-Range Injection-Locked VCO." IEEE Journal of Solid-State Circuits 55, no. 3 (March 2020): 536–46. http://dx.doi.org/10.1109/jssc.2019.2959513.

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18

Mazzan, A., and F. Svelto. "A 1.8-GHz injection-locked quadrature CMOS VCO with low phase noise and high phase accuracy." IEEE Transactions on Circuits and Systems I: Regular Papers 53, no. 3 (March 2006): 554–60. http://dx.doi.org/10.1109/tcsi.2005.858161.

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19

Künstner, Silvio, Anh Chu, Klaus-Peter Dinse, Alexander Schnegg, Joseph E. McPeak, Boris Naydenov, Jens Anders, and Klaus Lips. "Rapid-scan electron paramagnetic resonance using an EPR-on-a-Chip sensor." Magnetic Resonance 2, no. 2 (August 25, 2021): 673–87. http://dx.doi.org/10.5194/mr-2-673-2021.

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Abstract. Electron paramagnetic resonance (EPR) spectroscopy is the method of choice to investigate and quantify paramagnetic species in many scientific fields, including materials science and the life sciences. Common EPR spectrometers use electromagnets and microwave (MW) resonators, limiting their application to dedicated lab environments. Here, novel aspects of voltage-controlled oscillator (VCO)-based EPR-on-a-Chip (EPRoC) detectors are discussed, which have recently gained interest in the EPR community. More specifically, it is demonstrated that with a VCO-based EPRoC detector, the amplitude-sensitive mode of detection can be used to perform very fast rapid-scan EPR experiments with a comparatively simple experimental setup to improve sensitivity compared to the continuous-wave regime. In place of a MW resonator, VCO-based EPRoC detectors use an array of injection-locked VCOs, each incorporating a miniaturized planar coil as a combined microwave source and detector. A striking advantage of the VCO-based approach is the possibility of replacing the conventionally used magnetic field sweeps with frequency sweeps with very high agility and near-constant sensitivity. Here, proof-of-concept rapid-scan EPR (RS-EPRoC) experiments are performed by sweeping the frequency of the EPRoC VCO array with up to 400 THz s−1, corresponding to a field sweep rate of 14 kT s−1. The resulting time-domain RS-EPRoC signals of a micrometer-scale BDPA sample can be transformed into the corresponding absorption EPR signals with high precision. Considering currently available technology, the frequency sweep range may be extended to 320 MHz, indicating that RS-EPRoC shows great promise for future sensitivity enhancements in the rapid-scan regime.

20

Gonzalez Corredoiras, Marta, Samuel Ver-Hoeye, Miguel Fernandez-Garcia, Carlos Vazquez-Antuna, George Roberto Hotopan, Rene Camblor-Diaz, and Fernando Las Heras Andres. "NON-LINEAR OPTIMIZATION OF AN INJECTION LOCKED HIGH EFFICIENCY VCO WITH ARBITRARILY WIDTH MODULATED MICROSTRIP LINE NETWORKS." Progress In Electromagnetics Research 140 (2013): 491–508. http://dx.doi.org/10.2528/pier13042601.

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21

Liao, F. R., and S. S. Lu. "30 GHz transformer-coupled and reused injection-locked VCO/divider in 0.13 [micro sign]m CMOS process." Electronics Letters 44, no. 10 (2008): 625. http://dx.doi.org/10.1049/el:20080605.

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22

HUANG, Tzuen-Hsi, Yuan-Ru TSENG, and Shang-Hsun WU. "A 1-V, 6.72-mW, 5.8-GHz CMOS Injection-Locked Quadrature Local Oscillator with Stacked Transformer Feedback VCO." IEICE Transactions on Electronics E93-C, no. 4 (2010): 505–13. http://dx.doi.org/10.1587/transele.e93.c.505.

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23

Lee, Dong-Soo, SungHun Cho, SangYun Kim, JaeYong Lee, KeumCheol Hwang, Youngoo Yang, Mun-Kyo Seo, YoungGun Pu, and Kang-Yoon Lee. "A low phase noise 30-GHz frequency synthesizer with linear transconductance VCO and dual-injection-locked frequency divider." Analog Integrated Circuits and Signal Processing 86, no. 3 (January 20, 2016): 365–76. http://dx.doi.org/10.1007/s10470-016-0692-6.

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24

Lee, Dongil, Taeho Lee, Young-Ju Kim, and Lee-Sup Kim. "A 21%-Jitter-Improved Self-Aligned Dividerless Injection-Locked PLL With a VCO Control Voltage Ripple-Compensated Phase Detector." IEEE Transactions on Circuits and Systems II: Express Briefs 63, no. 8 (August 2016): 733–37. http://dx.doi.org/10.1109/tcsii.2016.2530098.

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25

Chang, Hong-Yeh, Chun-Ching Chan, Ian Yi-En Shen, Yen-Liang Yeh, and Shu-Yan Huang. "Design and Analysis of CMOS Low-Phase-Noise Low-Jitter Subharmonically Injection-Locked VCO With FLL Self-Alignment Technique." IEEE Transactions on Microwave Theory and Techniques 64, no. 12 (December 2016): 4632–45. http://dx.doi.org/10.1109/tmtt.2016.2623784.

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26

Yoo, Seyeon, Seojin Choi, Yongsun Lee, Taeho Seong, Younghyun Lim, and Jaehyouk Choi. "A Low-Jitter and Low-Reference-Spur Ring-VCO- Based Injection-Locked Clock Multiplier Using a Triple-Point Background Calibrator." IEEE Journal of Solid-State Circuits 56, no. 1 (January 2021): 298–309. http://dx.doi.org/10.1109/jssc.2020.2995326.

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27

Neda, Shilan, Ghader Yosefi, and Abdollah Eskandarian. "A 125 GHz millimeter-wave phase lock loop with improved VCO and injection-locked frequency divider in 65 nm CMOS process." Analog Integrated Circuits and Signal Processing 107, no. 3 (March 19, 2021): 483–96. http://dx.doi.org/10.1007/s10470-021-01822-1.

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28

Lee, Sanghun, Sunhwan Jang, and Cam Nguyen. "Low-Power-Consumption Wide-Locking-Range Dual-Injection-Locked 1/2 Divider Through Simultaneous Optimization of VCO Loaded $Q$ and Current." IEEE Transactions on Microwave Theory and Techniques 60, no. 10 (October 2012): 3161–68. http://dx.doi.org/10.1109/tmtt.2012.2209451.

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29

Choi, Seojin, Seyeon Yoo, Younghyun Lim, and Jaehyouk Choi. "A PVT-Robust and Low-Jitter Ring-VCO-Based Injection-Locked Clock Multiplier With a Continuous Frequency-Tracking Loop Using a Replica-Delay Cell and a Dual-Edge Phase Detector." IEEE Journal of Solid-State Circuits 51, no. 8 (August 2016): 1878–89. http://dx.doi.org/10.1109/jssc.2016.2574804.

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30

Wang, Binghui, Haigang Yang, and Yiping Jia. "A 1-to-3 GHz 5-to-512 Multiplier Adaptive Fast-Locking Self-Biased PLL in 28 nm CMOS." Electronics 11, no. 13 (June 22, 2022): 1954. http://dx.doi.org/10.3390/electronics11131954.

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Based on a self-biased architecture, this paper presents a novel adaptive fast-locking, wide operating range and low-jitter phase-locked loop (PLL). A current injection and adaptive bandwidth technology with minimum area overhead is employed to speed up the loop equilibrium acquisition process, without any adverse impact on the steady-state loop dynamics and the jitter performance. The proposed start-up circuit resets the loop to an appropriate initial state in order to shorten the initial ramp-up interval of the voltage-controlled oscillator (VCO), also resulting in cutting down the pull-in time. In addition, a proportional factor is introduced to give some kind of flexibility in the circuit design optimization. The proposed adaptive fast-locking self-biased PLL (AFL-SPLL) is designed and realized in a prototype based on TSMC 28 nm CMOS process, having a supply voltage of 0.9 V and an area of 0.0281 mm2. This PLL demonstrates a tuning range of 1 to 3 GHz and power consumptions from 0.91 mW at 1 GHz to 4.6 mW at 3 GHz operating frequency. The experimental results show that the capture process has been accelerated by up to 84.7% over large division ratios, yet the capture performance did not deteriorate at all for small division ratios. Meanwhile, the circuit implementation gave almost no area increase and yet achieved a reduction in the lock-in time of about 6.5 times, namely from 23.5 μs (without the adaptive locking) to only 3.6 μs (with the adaptive locking) on the maximum operation frequency condition of 3 GHz.

31

Ben Issa, Dalenda, and Mounir Samet. "Design and Optimization of Dual-Band Energy-Efficient OOK UWB Transmitter Via PSO Algorithm." Journal of Circuits, Systems and Computers 29, no. 11 (January 15, 2020): 2030009. http://dx.doi.org/10.1142/s0218126620300093.

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A CMOS ON–OFF-keying 3–10.6-GHz transmitter with low power consumption and low complexity used to Impulse Radio Ultra-Wide Band (IR-UWB) communication system is presented in this work. This architecture is designed and optimized via particle swarm optimization (PSO) algorithm. The IR-UWB transmitter is adapted to generate a high bandwidth frequency and it has a band switching capability. It consists of a switching inductance–capacitance voltage-controlled oscillator (LC_VCO), a pulse generator circuit, an injection-locked frequency divider (ILFD) circuit, a buffer and an antenna. The VCO is switched ON/OFF by the pulse signal produced by a generator circuit which is realized through synchronizing the received data by a clock signal. The used technique for transmitting a discontinuous signal is based on a complementary switch-mode ON–OFF LC_VCO, whose main advantage is to reduce power consumption. In this work, a best agreement between the results of the optimization technique and those of the simulation is obtained. The simulated results illustrate a signal of pulse width of 2.5 ns and a pulse repetition rate (PRR) of 200 MHz. The output spectra are centered at 4-GHz and 8-GHz frequencies with 1,332-MHz and 1,350-MHz bandwidths, respectively. The peak-to-peak amplitude of a UWB signal output is 154[Formula: see text]mV. The IR-UWB transmitter power consumption is 11.4[Formula: see text]mW which corresponds to the consumption energy of 28.5 pJ/pulse @ 200[Formula: see text]MHz. The power spectral densities (PSDs) of the output signals of both circuits viz. ON–OFF LC_VCO and ILFD are less than [Formula: see text][Formula: see text]dBm/MHz, which agreed well with the Federal Communication Commission (FCC) regulation. The transmitter design is well implemented using a TSMC 0.18-[Formula: see text]m CMOS process technology in an Advanced Design System (ADS).

32

JANG, Sheng-Lyang, Cheng-Chen LIU, Jhin-Fang HUANG, Yuan-Kai WU, and Jhao-Jhang CHEN. "Quadrature VCOs Using Single-Ended Injected Injection-Locked Frequency Dividers." IEICE Transactions on Electronics E92-C, no. 9 (2009): 1226–29. http://dx.doi.org/10.1587/transele.e92.c.1226.

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33

Jang, Sheng-Lyang, Cheng-Pin Liu, Chien-Feng Lee, and Ching-Wen Hsue. "Quadrature and eight-phase VCOs implemented with SiGe injection locked frequency dividers." Microwave and Optical Technology Letters 51, no. 2 (December 23, 2008): 395–99. http://dx.doi.org/10.1002/mop.24053.

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34

Zulkalnain, Mohd Khairi, and Yan Chiew Wong. "Current mismatch reduction in charge pumps using regulated current stealing-injecting transistors for PLLs." Indonesian Journal of Electrical Engineering and Computer Science 24, no. 1 (October 1, 2021): 61. http://dx.doi.org/10.11591/ijeecs.v24.i1.pp61-69.

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A charge pump for phase locked loops (PLL) with a novel current mismatch compensation technique is proposed. The proposed circuit uses a simple yet effective current stealing-injecting (CSI) technique and feedback to reduce mismatch between the negative-channel-metal-oxide (NMOS) and positive-channel-metal-oxide (PMOS) transistors. The current stealing transistor steals the current from a replica branch and mirrors it to the output where it is added to the output branch by the injecting transistor. A feedback mechanism is used to set the drain voltages of both branches to be equal and mitigate channel length modulation and ensure high accuracy. The proposed circuit was designed on Silterra 130nm technology and simulated using Cadence Spectre. The simulation results show that the proposed circuit yields a maximum of 0.107% and minimum of 0.00465% current mismatch while operating at a low supply voltage of 800mV for a range of 100mV to 700mV. The proposed design uses only one rail-to-rail op amp for compensating the mismatch and an addition of 4 transistors and utilizing 75% of the supply voltage for high voltage controlled oscillator (VCO) tuning range.

35

Solak, Krzysztof, Waldemar Rebizant, and Frank Mieske. "Development and Validation of the High-Voltage Direct-Current Modular Multilevel Converter (HVDC-MMC) Model for Converter Transformer Protection Studies." Sensors 24, no. 10 (May 14, 2024): 3126. http://dx.doi.org/10.3390/s24103126.

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The electrical protection of power networks with fault contribution from inverter-based power sources imposes new application challenges that have to be dealt with by protection engineers. This paper describes the development of a study case model of an HVDC-MMC link for testing the protection behaviour of connected converter transformers. The paper summarises the implementation and validation of the converter control as well as enhancements to provide Fault Ride-Through capability and fast fault current injection as required by the German Technical Connection Rules for HVDC. The grid code standard requires positive- and negative-sequence reactive current injection in the case of grid faults. A Doubled Decoupled Synchronous Reference Frame Phase Locked Loop (DDSRF-PLL) for Vector Current Control (VCC) is implemented. Additionally, a Fault Detection and Fault Ride-Through Reference Generator with a Current Limitation strategy is introduced. Though these techniques are well described in the literature, the DDSRF is improved for current control stability. The relationship between the parameters of the PLL and the control, as well as the behaviour of the protection system, are demonstrated. Grid faults with large voltage dips pose a significant challenge to the stability of the control system. Nevertheless, it is shown that with the developed model, it is possible to make general statements about the protection behaviour in an inverter-based environment.

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Kosaka, Hayato, Hiroki Iwata, Yudai Watariguchi, Riichiro Shirota, Yoshiteru Amemiya, Shinichiro Takatani, Tomoyuki Suwa, and Akinobu Teramoto. "GaN High Electron Mobility Transistor with Floating Gate for Accurate Threshold Voltage Control." ECS Meeting Abstracts MA2023-01, no. 32 (August 28, 2023): 1844. http://dx.doi.org/10.1149/ma2023-01321844mtgabs.

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Gallium nitride (GaN) high electron mobility transistors (HEMTs) have high electron mobility, high breakdown voltage, and low on-resistance, and are expected to operate as power devices. When GaN HEMTs are normally-on devices, drain current flow even for 0-gate-voltage. Thus, the normally-off operation is essentially required to the power devices from a fail-safe standpoint. Figure A shows a schematic of the structure, which is constructed with GaN HEMT including floating gate and the injection gate. The block oxide and tunnel oxide were formed between control gate and floating gate, and between injection gate and floating gate, respectively. It is impossible to inject electrons from the channel to the floating gate by the applying voltage to the substrate because AlGaN layer is located on the GaN layer. We introduced the injection gate for injecting electrons into the floating gate, and then the normally-off operation is obtained by the injecting electrons into the floating gate. The injecting electrons decrease the floating gate potential and form the depletion region under the gate oxide. Because the channel is the same as that of a conventional GaN HEMTs during on-operation, the high electron mobility of GaN HEMTs can be maintained, and then the on-operation behaviors are the same as conventional GaN HEMTs except threshold voltage. In this study, we demonstrate the normally-off operation of the fabricated GaN HEMTs with floating gate. Figure B shows the microscopy image of the fabricated device where the gate length, gate width and thickness of gate oxide are 2 μm, 110 μm and 20 nm, respectively. In floating gate device, the coupling ratio between the induced voltage of floating gate and the applied voltage of control gate is important. To increase the coupling ratio, we extended the overlap areas of floating gate and control gate to the drain side. The area of the control gate and the thickness of block oxide are set to be 3600 μm2 and 50 nm, respectively. Then, the coupling ratio becomes 91%, and then the induced voltage of floating gate is almost the same as the applied voltage of control gate. High-quality oxides are required in our devices for block oxide, tunnel oxide and gate oxide, however high-quality oxide films cannot be deposited by the thermal oxidation processes for GaN and polycrystalline Si. To form high-quality dielectric films, we used the microwave exited Plasma Enhanced Chemical Vapor Deposition (PECVD) [1][2][3]. The Id-Vcg characteristics before and after the electron injection into the floating gate are shown in figure C. To change the threshold voltage in positive value, the voltages of control gate and injection gate are determined for the electron injection. The threshold voltage before the electron injection is -10.7 V and the electron injection increases the threshold voltage, resulting in a positive threshold voltage of 3.2 V. This voltage is sufficiently high voltage for normally-off operation. The Id-Vd characteristics after electron injection are shown in the figure D. It is found that the electron mobility is 2100 cm2/Vs, which is the similar value of 1500~2250 cm2/Vs in the reported conventional GaN HEMT [4][5][6] and this indicates that the device can be maintained high electron mobility as same as the conventional GaN HEMT. We fabricated the GaN HEMTs with floating gate, which realize the normally-off and high electron mobility. The threshold voltage can be controlled to be 3.2 V and the electron mobility of 2100 cm2/Vs is achieved. It is indicated that normally-off GaN HEMT device with high electron mobility can be demonstrated. [1] T. Ohmi, et al., J. Phys. D: Appl. Phys., 39, p.R,2006. [2] H. Tanaka, et al., Jpn. J. Appl. Phys. 42, p. 1911, 2003. [3] H. Kambayashi, et al., Solid-State Electronics, 54, p. 660 [4] J.-T. Chen, et al., Appl. Phys. Lett. 106, 251601, 2015. [5] K. Shinohara et al., IEEE Trans. Electron Devices, 60, p. 2982, 2013. [6] X. Ding et al., CES Transaction on Electrical Machines and Systems, 3, p54. Figure 1

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Abd-Elnaeim, M., and M. M. Ali. "Arthroscopy of the fetlock joint of the dromedary camel." Veterinary and Comparative Orthopaedics and Traumatology 25, no. 03 (2012): 192–96. http://dx.doi.org/10.3415/vcot-10-11-0154.

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Abstract:

SummaryObjectives: To describe a technique for arthroscopy of the fetlock joint of the dromedary camel, and the problems that could occur during and after arthroscopy.Methods: Seven animals (4 cadaveric limbs and 3 living camels) were used in this study. Two dorsal arthroscopic portals (lateral and medial) and one palmaro-lateral portal were used. Distension of the joint capsule was effected by injecting Ringer's lactate solution into the joint cavity. Landmarks for the dorsal arthroscopic portals were located at the centre of the groove bounded by the lateral branch of the suspensory ligament and the large metacarpus at a point 1 cm proximal to the joint. The palmaro-lateral portal was located in a triangular area between the branch of the suspensory ligament, the large metacarpus, and the sesamoid bone, with insertion of the arthroscope in a 45° joint flexion angle.Results: Arthroscopy of the fetlock joint via the dorso-lateral portal allowed examination of the distal end of the large metacarpus and the proximal end of the first phalanx of the fourth digit. Arthroscopy via a dorso-medial approach allowed examination of the distal end of the large metacarpus and the proximal end of the first phalanx and the distal end of the third digit. The palmaro-lateral portal allowed examination of the sesamoid bones, the synovial membrane, and the synovial villi. The main complications recorded during arthroscopy were iatrogenic articular surface injury as well as obstruction of vision with the synovial villi.Clinical significance: This is the first work to describe the normal arthroscopy of the fetlock joint in the dromedary camel, the arthroscopic portals, and the complications that could occur during and after arthroscopy. Further studies are required for diagnosis of pathological changes in the fetlock joint of the dromedary camel and for arthroscopy of other joints in the dromedary camel.

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Cavalero, Thaís Mendes Sanches, Verônica Flores da Cunha Scheeren, Lucas Emanuel Ferreira Canuto, Lucas Troncarelli Rodrigues, and Frederico Ozanam Papa. "Novo protocolo utilizando ocitocina para induzir a ejaculação em garanhão penectomizado." Acta Scientiae Veterinariae 46 (October 24, 2018): 4. http://dx.doi.org/10.22456/1679-9216.88217.

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Background: Several reproductive diseases can prevent ejaculation by the traditional method of collection. Neoplasias as squamous cell carcinoma is the most common tumor of the external genitalia of horses and its lesions usually prevent copulation. The pharmacological induction of ejaculation is an important alternative technique to obtain and preserve the genetic material of stallions incapable of ejaculating by traditional methods of semen collection. However, the protocols currently used have shown questionable results and new protocols are needed in order to increase the success rates. The aim of this study is to report the success of a new protocol in inducing ejaculation when oral imipramine and intravenous oxytocin and detomidine were administrated in a Crioulo stallion.Case: A 9-year-old Crioulo stallion was admitted at the Veterinary Hospital of the São Paulo State University, FMVZUNESP, Botucatu, Brazil, with a history of a mass located on the glans and body of the penis. The histopathological exam confirmed the diagnostic of Squamous cell carcinoma and penectomy was performed. After 10 days of surgery the stallion was submitted to 5 different protocols with 3 days interval between the follow protocols: Imipramine+Xylazine; Imipramine+ Xylazine+Oxytocin; Imipramine+Detomidine and Imipramine+Detomidine+Oxytocin.Discussion: The traditional protocol of pharmacologically-induced ejaculation with imipramine hydrochloride (3 mg/kg/v.o) and xylazine hydrochloride (0.66 mg/kg/iv) was not successful even when oxytocin (20 UI/iv) was added to this protocol. Administration of imipramine hydrochloride (3 mg/kg/v.o) two hours prior to administration of detomidine hydrochloride (0.02 mg/kg/i.v) also did not result in ejaculation. However, administration of imipramine hydrochloride (3 mg/kg/v.o) 2 h prior to administration of detomidine hydrochloride (0.02 mg/kg/i.v) associated with oxytocin (20 U.I/i.v) resulted in ejaculation. The stallion was submitted to three seminal collections with a three-day interval between administration of the protocol and ejaculated in all the attempts after approximately 5 min of detomidine and oxytocin injection, presenting mean values of 50 mL of total volume (TV) and concentration of 80x106 spermatozoa/mL. The VT was higher and concentration was lower when compared to ejaculates obtained by pharmacological induction in previous studies, probably due to daily stimulation with estrus mare to induce penile exposure in order to allow antisepsis of the surgical wound. Thus, it is believed that the large amount of total volume of this stallion is due to the high production of gel by the accessory sex glands, with consequent reduction of ejaculate concentration. The sperm kinetics were evaluated by the computerized method CASA (HTMA-IVOS-12) with total motility (MT) of 84% and progressive (MP) of 38%, with 70% of rapid spermatozoa (RAP), being considered normal to the equine specie and similar to those observed by other authors in pharmacolocally-induced ejaculates. Post-thaw sperm kinetics presented 42% of MT, 21% of MP and 28% of RAP probably due to an intrinsic sensitivity of the stallion to the freezing process. Thus, this report concludes that the protocol associating imipramine, detomidine and oxytocin was efficient in the pharmacological induction of ejaculation, presenting normal and characteristic sperm parameters of the specie. Fresh and refrigerated semen presented good parameters for use in conventional artificial inseminations while frozen semen is indicated for deep horn inseminations or for use in intracytoplasmic sperm injection (ICSI) programs.

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SUN, Zheng, Hanli LIU, Dingxin XU, Hongye HUANG, Bangan LIU, Zheng LI, Jian PANG, Teruki SOMEYA, Atsushi SHIRANE, and Kenichi OKADA. "A Low-Jitter Injection-Locked Clock Multiplier Using 97-μW Transformer-Based VCO with 18-kHz Flicker Noise Corner." IEICE Transactions on Electronics, 2021. http://dx.doi.org/10.1587/transele.2020cdp0005.

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Fan, Chao, Ya Zhao, Yanlong Zhang, Jun Yin, Li Geng, and Pui-In Mak. "A 3.57-mW 2.88-GHz Multi-Phase Injection-Locked Ring-VCO with a 200-kHz 1/f3 Phase Noise Corner." IEEE Transactions on Circuits and Systems II: Express Briefs, 2022, 1. http://dx.doi.org/10.1109/tcsii.2022.3219447.

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Wang, Zhipeng, Kaixue Ma, Zonglin Ma, Hao Shi, Haipeng Fu, and Jiangtao Xu. "A Reconfigurable Injection-Locked LO Generator With a Wideband-Harmonic-Shaping Class-F$_{23}$ VCO for Multibands 5G mm-Wave." IEEE Transactions on Microwave Theory and Techniques, 2023, 1–14. http://dx.doi.org/10.1109/tmtt.2023.3251102.

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Ebrahimi, Emad. "A new tail-switching superharmonic multiphase LC-VCO." Circuit World ahead-of-print, ahead-of-print (August 3, 2020). http://dx.doi.org/10.1108/cw-07-2019-0080.

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Purpose Multiphase and quadrature voltage-controlled oscillators (QVCOs) play key roles in modern communication systems and their phase noise performance affects the performance of the overall system. Different studies are devoted to efficient quadrature signals generation. This paper aims to present a new low-phase noise superharmonic injection-locked QVCO. Design/methodology/approach The proposed QVCO is comprised of two identical inductor-capacitor circuit (LC)-voltage-controlled oscillators (VCOs) in which second harmonics, with 180° phase shift, are injected from one core VCO to the gate of tail current source of the other VCO via a coupling capacitor. Using second harmonics with high amplitude will switch the tail from the inversion to the accumulation, and therefore, flicker noise is reduced. Also, because of the use of lossless and noiseless coupling elements, that is, coupling capacitors, and also because of the existence of an inherent high-pass filter, the proposed LC-QVCO has a good phase noise performance. Findings The introduced technique is designed and simulated in a commercial 0.18 µm radio frequency complementary metal oxide semiconductor (RF-CMOS) technology and 10 dB improvement of close-in phase noise is achieved (compared to the conventional method). Simulation results show that the phase noise of the proposed QVCO is −130.3 dBc/Hz at 3 MHz offset from 5.76 GHz center frequency, while the total direct current (DC) current drawn from a 0.9-V power supply is 4.25 mA (figure of merit = −190.2 dBc). Monte Carlo simulation results show that the figure of merit of the circuit has a Gaussian distribution with mean value and standard deviation of −189.97 dBc and 0.183, respectively. Originality/value This technique provides a new simple but efficient superharmonic coupling and noise shaping method that reduces close-in phase noise of superharmonic multiphase VCOs by switching of tail transistors with 2 ω0 (second harmonic of oscillation frequency). No extra devices such as area-consuming transformer or additional power-hungry oscillator are used for coupling.

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Yasir, Umair, Xiuping Li, and Cheng Cao. "Low power ASK modulator based on direct injection‐locked current reuse VCO in 130‐nm CMOS technology for high data rate RFID applications." International Journal of Circuit Theory and Applications, September 21, 2021. http://dx.doi.org/10.1002/cta.3135.

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