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Journal articles on the topic 'High speed converters'

Author: Grafiati

Published: 10 January 2023

Last updated: 28 January 2023

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1

GHARBIYA, AHMED, TREVOR C. CALDWELL, and D. A. JOHNS. "HIGH-SPEED OVERSAMPLING ANALOG-TO-DIGITAL CONVERTERS." International Journal of High Speed Electronics and Systems 15, no. 02 (June 2005): 297–317. http://dx.doi.org/10.1142/s0129156405003211.

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This paper is mainly tutorial in nature and discusses architectures for oversampling converters with a particular emphasis on those which are well suited for high frequency input signal bandwidths. The first part of the paper looks at various architectures for discrete-time modulators and looks at their performance when attempting high speed operation. The second part of this paper presents some recent advancements in time-interleaved oversampling converters. The next section describes the design and challenges in continuous-time modulators. Finally, conclusions are made and a brief summary of the recent state of the art of high-speed converters is presented.

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2

Maloberti, F. "High-speed data converters for communication systems." IEEE Circuits and Systems Magazine 1, no. 1 (2001): 26–36. http://dx.doi.org/10.1109/7384.928307.

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3

Foster, M. P., H. I. Sewell, C. M. Bingham, D. A. Stone, D. Hente, and D. Howe. "High-speed analysis of resonant power converters." IEE Proceedings - Electric Power Applications 150, no. 1 (2003): 62. http://dx.doi.org/10.1049/ip-epa:20030057.

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4

Hsu, H. "High speed A/D converters: understanding data converters through spice [Book Review]." IEEE Circuits and Devices Magazine 18, no. 1 (January 2002): 26. http://dx.doi.org/10.1109/mcd.2002.981297.

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5

Jain, Ankesh, and Shanthi Pavan. "Characterization Techniques for High Speed Oversampled Data Converters." IEEE Transactions on Circuits and Systems I: Regular Papers 61, no. 5 (May 2014): 1313–20. http://dx.doi.org/10.1109/tcsi.2014.2309895.

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6

Liberali, Valentino, Simona Brigati, Fabrizio Francesconi, and Franco Maloberti. "Progress in high-speed and high-resolution CMOS data converters." Microelectronics Reliability 37, no. 9 (September 1997): 1411–20. http://dx.doi.org/10.1016/s0026-2714(97)00013-9.

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7

Shukla, Mohit. "A 13.42ps Resolution, Low-Power Time-to-Digital Converter and 0.519fJ Energy-Efficient Novel Voltage-to-Time Converter for High-Speed Time-Based ADC Application." Journal of University of Shanghai for Science and Technology 24, no. 02 (February 19, 2022): 1020–30. http://dx.doi.org/10.51201/jusst/21/10878.

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Voltage domain ADC architectures require high gain and high bandwidth opamps to amplify the signal for successive stages. The opamp design gets a bit challenging due to noise, small gain and lower overdrive voltage. Due to these limitations, the inclination shifted towards high-speed converters which don’t require opamps. Time based Analog to Digital Converters (TBADC) is one such category of circuits. TBADCs are constituted from VTC followed by TDC with an encoder in the end. This work is concerned around the design of a high-resolution time to digital converter (TDC) and proposing a novel high-speed, low power consuming voltage to time converter (VTC) circuit. Both the circuits were implemented in Cadence Virtuoso EDA tool version 6.1.7 and Spectre was employed for running the simulations. TDC circuits had resolution of 13.425 ps and consume power of 1.873 μW. Process corner analysis and Monte Carlo analysis were performed on VTC design to determine worst possible deviations in performance. The proposed VTC exhibited delay of 23.79 ps with power consumption of 21.83 μW at 1 Volt. The presented TDC and VTC circuits can be used to design high-speed time-based Analog to Digital Converters.

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Bruha, Martin, Kai Pietiläinen, and Axel Rauber. "High Speed Electrical Drives – Perspective of VFD Manufacturer." E3S Web of Conferences 178 (2020): 01006. http://dx.doi.org/10.1051/e3sconf/202017801006.

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This paper deals with high-speed electrical drives utilizing power electronic converters (commonly abbreviated as ASD, VFD or VSD). Existing solutions vary mainly on the motor side while the power electronic converter is very similar for all cases. Various advantages as well as technical challenges are discussed and illustrated. At certain stages comparisons between conventional and high-speed drives are made. The paper summarizes the experience of a VFD manufacturer based on state of the art technology in medium voltage and multi-megawatt power range. The authors believe that main complexity around high-speed drives is the motor design while the VFD requires only small adaptations or can sometimes be used directly without any modifications of standard design. The technology readiness is evaluated to be on a medium to high level.

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Takahashi, Tomomi, Takashi Oshima, and Taizo Yamawaki. "Novel Digitally Assisted High-Speed High-Resolution Analog-to-Digital Converters." Journal of The Institute of Image Information and Television Engineers 64, no. 2 (2010): 241–43. http://dx.doi.org/10.3169/itej.64.241.

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10

Boni, A., and C. Morandi. "Harmonic distortion in high-speed differential A/D converters." IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 45, no. 3 (March 1998): 403–6. http://dx.doi.org/10.1109/82.664250.

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11

KAWAHITO, S. "Low-Power Design of High-Speed A/D Converters." IEICE Transactions on Electronics E88-C, no. 4 (April 1, 2005): 468–78. http://dx.doi.org/10.1093/ietele/e88-c.4.468.

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12

Foster, M. P., H. I. Sewell, C. M. Bingham, D. A. Stone, D. Hente, and D. Howe. "Cyclic-averaging for high-speed analysis of resonant converters." IEEE Transactions on Power Electronics 18, no. 4 (July 2003): 985–93. http://dx.doi.org/10.1109/tpel.2003.813763.

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13

Bower, Patricia, and Ian Dedic. "High speed converters and DSP for 100G and beyond." Optical Fiber Technology 17, no. 5 (October 2011): 464–71. http://dx.doi.org/10.1016/j.yofte.2011.07.008.

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14

Antipov, V. N., A. D. Grozov, and A. V. Ivanova. "Prospective Metallic Glasses for High-Speed Electromechanical Energy Converters." Glass Physics and Chemistry 44, no. 2 (March 2018): 156–61. http://dx.doi.org/10.1134/s1087659618020025.

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15

De Clercq, Nico, Robin Theunis, Paul Leroux, Patrick Reynaert, and Wim Dehaene. "High-speed single cable synchronization system for data-converters." Analog Integrated Circuits and Signal Processing 90, no. 2 (December 21, 2016): 283–90. http://dx.doi.org/10.1007/s10470-016-0899-6.

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16

Lal, Vikrant, Milan L. Maanovi, Joseph A. Summers, Greg Fish, and Daniel J. Blumenthal. "Monolithic Wavelength Converters for High-Speed Packet-Switched Optical Networks." IEEE Journal of Selected Topics in Quantum Electronics 13, no. 1 (2007): 49–57. http://dx.doi.org/10.1109/jstqe.2006.884406.

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17

Romanczyk, R. J., and B. H. Leung. "BiCMOS circuits for high speed current mode D/A converters." IEEE Journal of Solid-State Circuits 30, no. 8 (1995): 923–34. http://dx.doi.org/10.1109/4.400435.

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18

Khorami, Ata, and Mohammad Sharifkhani. "High-speed low-power comparator for analog to digital converters." AEU - International Journal of Electronics and Communications 70, no. 7 (July 2016): 886–94. http://dx.doi.org/10.1016/j.aeue.2016.04.002.

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19

Gumenyuk, A. S., and Yu I. Bocharov. "Sample-and-hold circuits for high-speed A/D converters." Russian Microelectronics 36, no. 5 (September 2007): 342–52. http://dx.doi.org/10.1134/s1063739707050083.

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20

Emelyanov, V. M., P. V. Pokrovskiy, N. A. Kalyuzhnyy, M. V. Nakhimovich, and M. Z. Shvarts. "Capacitive Characteristics of High-Speed Photovoltaic Converters at Combined Lighting." Semiconductors 53, no. 14 (December 2019): 1959–63. http://dx.doi.org/10.1134/s1063782619140069.

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21

Skup, Konrad, Paweł Grudziński, and Piotr Orleański. "Application of Digital Control Techniques for Satellite Medium Power DC-DC Converters." International Journal of Electronics and Telecommunications 57, no. 1 (March 1, 2011): 77–83. http://dx.doi.org/10.2478/v10177-011-0011-1.

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Application of Digital Control Techniques for Satellite Medium Power DC-DC Converters The objective of this paper is to present a work concerning a digital control loop system for satellite medium power DC-DC converters that is done in Space Research Centre. The whole control process of a described power converter is based on a high speed digital signal processing. The paper presents a development of a FPGA digital controller for voltage and current mode stabilization that was implemented using VHDL. The described controllers are based on a classical digital PID controller. The converter used for testing is a 200 kHz, 750W buck converter with 50V/15A output. A high resolution digital PWM approach is presented. Additionally a simple and effective solution of filtering of an analog-to-digital converter output is presented.

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22

Kokilavani, V., K. Preethi, and P. Balasubramanian. "FPGA-Based Synthesis of High-Speed Hybrid Carry Select Adders." Advances in Electronics 2015 (May 27, 2015): 1–13. http://dx.doi.org/10.1155/2015/713843.

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Carry select adder is a square-root time high-speed adder. In this paper, FPGA-based synthesis of conventional and hybrid carry select adders are described with a focus on high speed. Conventionally, carry select adders are realized using the following: (i) full adders and 2 : 1 multiplexers, (ii) full adders, binary to excess 1 code converters, and 2 : 1 multiplexers, and (iii) sharing of common Boolean logic. On the other hand, hybrid carry select adders involve a combination of carry select and carry lookahead adders with/without the use of binary to excess 1 code converters. In this work, two new hybrid carry select adders are proposed involving the carry select and section-carry based carry lookahead subadders with/without binary to excess 1 converters. Seven different carry select adders were implemented in Verilog HDL and their performances were analyzed under two scenarios, dual-operand addition and multioperand addition, where individual operands are of sizes 32 and 64-bits. In the case of dual-operand additions, the hybrid carry select adder comprising the proposed carry select and section-carry based carry lookahead configurations is the fastest. With respect to multioperand additions, the hybrid carry select adder containing the carry select and conventional carry lookahead or section-carry based carry lookahead structures produce similar optimized performance.

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23

Frank, Steve. "Brief Introduction to High Speed Analog Failure Analysis." EDFA Technical Articles 5, no. 3 (August 1, 2003): 23–28. http://dx.doi.org/10.31399/asm.edfa.2003-3.p023.

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Abstract This article provides a high level overview of high speed analog circuits and associated failure analysis techniques. It discusses the failure modes and mechanisms of voltage reference circuits, high speed op amps, and digital-to-analog and analog-to-digital converters, the fundamental building blocks used to create high speed analog devices. It also explains how to deal with difficulties involving circuit node access, circuit loading, and performance.

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24

Vinay Kumar, C. H., G. Madhusudhana Rao, A. Raghu Ram, and Y. Prasanna Kumar. "Designing of Neuro-Fuzzy Controllers for Brushless DC Motor Drives Operating with Multiswitch Three-Phase Topology." Journal of Electrical and Computer Engineering 2022 (July 20, 2022): 1–12. http://dx.doi.org/10.1155/2022/7001448.

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Brushless DC motors are simple in construction, high efficiency, less noise, and high reliability, which are not replaceable motors in specific applications compared to other motor drives. It has a facility for its multivariable system, nonlinear control process, and powerful coupling system. This paper proposes to design the neuro-fuzzy controllers for its multiple converters switching to improve the power factor and minimize the BLDC motor switching losses. Compared with conventional controllers, this controller will develop the power factor and optimize the current ripples concerning time and torque. The working model of the BLDC motor may be presented here. A nonlinear load will be applied to the BLDC motor to determine the speed, current, and torque. The multiple switches designed with the proposed controllers are connected with the converter’s DC link to boost the voltage. The fuzzy logic controller is implanted to adjust the speed of the neural network and is also designed for the analysis of the stability of the system. The proposed controllers compare the rate at different speeds, torque, currents, and rotor angle positions. Finally, the proposed controller for multiple converter switches performs better than the conventional controllers.

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25

Yadav, Nandakishor, Youngbae Kim, Mahmoud Alashi, and Kyuwon Ken Choi. "Design of a Voltage to Time Converter with High Conversion Gain for Reliable and Secure Autonomous Vehicles." Electronics 9, no. 3 (February 26, 2020): 384. http://dx.doi.org/10.3390/electronics9030384.

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Automation of vehicles requires a secure, reliable, and real-time on-chip system. These systems also require very high-speed and compact on-chip analog to digital converters (ADC). The conventional ADC cannot fulfill this requirement. In this paper, we proposed a Darlington pair- and source biasing-based high speed, secure, and reliable voltage to time converter (VTC). It is a compact, high-speed design and gives high conversion gain. The source biasing also helps to increase the input voltage range. The conversion gain of the proposed circuit is 101.43ns/v, which is 52 times greater than the gain achieved by state-of-the-art design. It also shows less effect of process variation and bias temperature instability.

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26

Hegde, Shreekara S., and A. N. Nagashree. "Enhancement of Power Quality and Speed Regulation of a BLDC Motor Drive using Water Cycle Algorithm." Volume 5 - 2020, Issue 8 - August 5, no. 8 (August 26, 2020): 541–50. http://dx.doi.org/10.38124/ijisrt20aug382.

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Permanent magnet Brushless DC motors are used in several applications because of its advantages such as high reliability, high power output, constant torque, low maintenance cost, good heat dissipation and better efficiency. Also, rapidly decreasing cost of permanent magnets is an added advantage. Hence, BLDC motors are suitable for many variable-speed drive applications. Various DC-DC converters are used for driving the BLDC motor and Interleaved Boost converter is one of them. BLDC motor drive is fed through a diode bridge rectifier which lowers the power factor. Hence, power factor correction converters are necessary in such applications. In the present work, to improve the power quality of the AC mains and hence the power factor, Interleaved boost converter controlled by PI controller is used. The gains of the PI controller are decided by Water cycle algorithm (WCA) using Integral Time Absolute Error (ITAE) criterion. Speed control of the BLDC motor is done by controlling the output voltage of the converter which acts as a DC link voltage to the Three Phase Voltage Source Inverter (VSI). MATLAB SIMULINK software is used for the design and performance analysis of the BLDC.

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27

Wang, Wei, M. N. S. Swamy, M. O. Ahmad, and Yuke Wang. "A Parallel Residue-to-binary Converter for the Moduli Set {2m−1,220m+1,221m+1,…,22km+1}." VLSI Design 14, no. 2 (January 1, 2002): 183–91. http://dx.doi.org/10.1080/10655140290010097.

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In this paper, a high-speed parallel residue-to-binary converter is proposed for a recently introduced moduli set Sk={2m−1,220m+1,221m+1,…,22km+1} for a general value of k. The proposed converter uses simple cyclic shift and concatenation operations and does not require any multiplier. Individual converters for the cases of k=0 and k=1 are derived from the general architecture and compared with those existing in the literature. The converter for S0 is twice as fast requiring only one-half of the hardware, while that of S1 is three times as fast, but requiring only 60% of the hardware, as compared to the corresponding ones existing in the literature. Furthermore, the proposed converters are implemented using 0.5-micron CMOS VLSI technology. Based on S0 , the layouts for 8-bit, 16-bit, 32-bit and 64-bit converters are generated, and the corresponding simulation results obtained.

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28

Huang, Xing Fa, Rong Bin Hu, and Liang Li. "A CMOS Input Buffer for High-Resolution A/D Converters with High Sampling Rates." Applied Mechanics and Materials 678 (October 2014): 497–500. http://dx.doi.org/10.4028/www.scientific.net/amm.678.497.

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With respect to the application of high-speed, high-resolution A/D converter, the design and implementation of a CMOS input buffer is introduced. The buffer features high-speed and high-linearity. Its performances have been verified in a 14-bit 250MSPS pipelined A/D converter which is developed in 0.18um CMOS-based process technology. The simulation shows that the SFDR of the buffer is up to 104dB at an input clock of 250MHz with an input signal of 25MHz.

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29

Saravanan, R., and N. Chandrasekaran. "Comparative Analysis of Fixed Speed & Variable Speed Response of PFC Zeta Converter Fed PMSM Drive Using PI Controller." Applied Mechanics and Materials 573 (June 2014): 7–12. http://dx.doi.org/10.4028/www.scientific.net/amm.573.7.

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In several PWM DC-DC converter topologies, the controlling switches are operated in switch mode wherever they're needed to conduct the whole load current on and off throughout every switching cycle. Recently there is an enlarged interest within the use of resonant kind DC-DC converters due to the benefits of high efficiency, small size, lightweight, reduced Electro Magnetic Interference (EMI) and low component stresses. A novel PFC (Power factor Corrected) converter feeding a PMSM drive employing a single voltage sensing element is proposed for variable speed applications. It consists of single phase supply followed by uncontrolled bridge rectifier and a Zeta DC-DC converter is employed to regulate the voltage of a DC link capacitance that is lying between the Zeta converter and a VSI (Voltage source Inverter). The voltage of a dc-link capacitor of zeta converter is controlled to realize the speed control of PMSM Drive. The zeta converter is functioning as a front end device operating in DICM (Discontinuous inductor Current Mode) and therefore employing a voltage follower. Using MATLAB/ Simulink 7.13 environment the model can be simulated to achieve a wide range of speed control.

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30

HAN, Sang-Keun, KeeChan PARK, Young-Hyun JUN, and Bai-Sun KONG. "High-Speed Low-Power Boosted Level Converters for Dual Supply Systems." IEICE Transactions on Electronics E95.C, no. 11 (2012): 1824–26. http://dx.doi.org/10.1587/transele.e95.c.1824.

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31

Sundstrom, T., B. Murmann, and C. Svensson. "Power Dissipation Bounds for High-Speed Nyquist Analog-to-Digital Converters." IEEE Transactions on Circuits and Systems I: Regular Papers 56, no. 3 (March 2009): 509–18. http://dx.doi.org/10.1109/tcsi.2008.2002548.

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32

Santin, Edinei, Luis B. Oliveira, and Joao Goes. "Built-in self test of high speed analog-to-digital converters." IEEE Instrumentation & Measurement Magazine 22, no. 6 (December 2019): 4–10. http://dx.doi.org/10.1109/mim.2019.8917897.

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33

Turflinger, T. L., and M. V. Davey. "Transient radiation test techniques for high-speed analog-to-digital converters." IEEE Transactions on Nuclear Science 36, no. 6 (1989): 2356–61. http://dx.doi.org/10.1109/23.45448.

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34

KATO, Hirokazu. "Train-Draft-Cooling Power Converters for the SHINKANSEN High-Speed-Train." Journal of the Society of Mechanical Engineers 114, no. 1111 (2011): 450–51. http://dx.doi.org/10.1299/jsmemag.114.1111_450.

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35

Mahalakshmi, G., S. Kanthalakshmi, and K. Maharaja. "Performance Analysis of DC-DC converters for Solar PV fed Switched Reluctance motor for Electric Vehicle Applications." IOP Conference Series: Earth and Environmental Science 1055, no. 1 (July 1, 2022): 012003. http://dx.doi.org/10.1088/1755-1315/1055/1/012003.

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Abstract This paper describes the performance of a Solar PV-powered switched reluctance motor with low torque ripple in electric vehicle applications. The prominence of switched reluctance motors has become significant in the electric vehicle industry, because of its ineradicable characteristics like simple structure, absence of rotor windings, less maintenance and its self-starting capability. However, the limitation of SRM is its high torque ripple because of its nonlinear characteristics. The performance of a switched reluctance motor with various DC –DC converters is analysed in this work and the results are compared in terms of the speed of the motor and its torque ripple percentage. The switching time of the converter is controlled by the MPPT controller, which uses incremental conductance and the Integrator method. The converters presented in this work are the Boost converter and the Cuk converter. These two types of converters are designed in MATLAB software and their characteristics are analysed while supplying the switched reluctance motor. The suitability of the proposed system with the motor is analysed by simulation results. From the results, it is confirmed that the performance of the Solar PV fed Switched reluctance motor is improved in terms of speed and torque ripple by implementing this type of converter. Hence, it is suitable for electric vehicle applications, which require less torque ripple and mechanical vibrations.

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Brenna, M., F. Foiadelli, and D. Zaninelli. "The Influence of Controller Parameters on the Quality of the Train Converter Current." Advances in Power Electronics 2011 (June 9, 2011): 1–10. http://dx.doi.org/10.1155/2011/832737.

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This paper presents a stability analysis of train converters in order to evaluate how the controller parameters affect the absorbed current. The new dynamic model presented in this paper is capable of considering the time-variant nature of the system for the correct tuning of the feedback proportional-integral PI controller, applying a current controlled modulation technique never used in high-power traction converters. The reduction of the harmonic content of the current absorbed by a converter employed at the input stage onboard high-speed trains is really important, considering the interaction with the signaling system set up for traffic control. A computer model of the converter, considering both the power and the control structure, has also been implemented in order to deliver a validated tool for the developed theoretical analysis.

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ZHU, ZHANGMING, HONGBING WU, GUANGWEN YU, YANHONG LI, LIANXI LIU, and YINTANG YANG. "A LOW OFFSET HIGH SPEED COMPARATOR FOR PIPELINE ADC." Journal of Circuits, Systems and Computers 22, no. 04 (April 2013): 1350018. http://dx.doi.org/10.1142/s0218126613500187.

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A low offset and high speed preamplifier latch comparator is proposed for high-speed pipeline analog-to-digital converters (ADCs). In order to realize low offset, both offset cancellation techniques and kickback noise reduction techniques are adopted. Based on TSMC 0.18 μm 3.3 V CMOS process, Monte Carlo simulation shows that the comparator has a low offset voltage 1.1806 mV at 1 sigma at 125 MHz, with a power dissipation of 413.48 μW.

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Jagadish Kumar, B., and Dr Basavaraja Banakara. "Certain investigations on multi input –SEPIC-RE boost-system with enhanced-response." International Journal of Engineering & Technology 7, no. 4 (September 26, 2018): 2718. http://dx.doi.org/10.14419/ijet.v7i4.15678.

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Recent developments in converters have given pathway to high-gain-step up converter having low output voltage ripple. High-gain-step up converters can be found between Photovoltaic Voltage (PV) and Direct-Current (D-C) loads. The intention of this work is to identify multi converter system for multiple input sources and to improve time response of high-gain-step up-converter. Closed-loop Multi-Converter System (MCS) is utilized to regulate load voltage. This effort recommends suitable-controller for “closed-loop-controlled-SEPIC-REBOOST Converter fed DC motor”. The estimation of the yield in ‘open-loop’&‘closed- loop-circuit’ has been done using MATLAB or Simulink. Closed-loop-control of MCS with PI and FOPID-Controllers are investigated and their responses are evaluated in conditions of rise time, peak time, settling time and steady state error. It is seen that FOPID controlled MCS gives better time domain response in terms of motor speed. A ‘Prototype of MCS’ has been fabricated in the laboratory& the ‘experimental-results’ are authenticated with the simulation-results.

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Van den Bosch, A. "Modeling and realisation of high accuracy, high speed current-steering CMOS D/A converters." Measurement 28, no. 2 (September 2000): 123–38. http://dx.doi.org/10.1016/s0263-2241(99)00046-9.

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40

Song, Min-Sup, In-Ho Cho, and Jae-Bum Lee. "± 180° Discontinuous PWM for Single-Phase PWM Converter of High-Speed Railway Propulsion System." Energies 13, no. 7 (March 26, 2020): 1550. http://dx.doi.org/10.3390/en13071550.

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As high-capacity alternating current/direct current (ac/dc) power conversion systems, single-phase pulse-width modulation (PWM) converters used in high-speed railway propulsion systems adopt high-voltage Insulated-Gate Bipolar Transistors (IGBTs) as switching elements. Due to their high breakdown voltage characteristics, the switching dynamics are inferior to those of low-voltage IGBTs and switching losses are more dominant than conduction losses despite operating at relatively low switching frequencies of hundreds to several kHz. To solve this problem, this paper proposes ± 180° discontinuous PWM (DPWM) suitable for a single-phase circuit. With the simple addition of offset voltages, the proposed DPWM method can be implemented easily and switching losses can be reduced by half by clamping the switching legs of the H-bridge converter to the positive or negative dc rail during every half cycle. In addition, temperature deviation between the power stacks can be minimized by using selective application of clamping modes. The validity and effectiveness of the proposed DPWM are verified through simulations and experiments of a prototype converter.

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Simiyu, Patrobers, and I. E. Davidson. "MVDC Railway Traction Power Systems; State-of-the Art, Opportunities, and Challenges." Energies 14, no. 14 (July 9, 2021): 4156. http://dx.doi.org/10.3390/en14144156.

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Advances in voltage-source converters (VSCs), as well as their successful application in VSC-HVDC systems, have motivated growing interests and research in medium-voltage direct current (MVDC) traction power systems (TPSs) for high-speed rail (HSR) applications. As an emerging power-converter-based infrastructure, this study reviewed developments that shape two key evolving pieces of equipment—namely, high-power traction substation (TSS) converters, and power electronic transformers (PETs)—for MVDC TPS as well as prospects for smart grid (SG) applications in the future. It can be deduced that cost-effective and robust high-power TSS converters are available from hybrid modular multilevel converters (MMCs) for enhanced performance and fault-tolerance capability. In addition, silicon carbide (SiC) MMC-based PETs with input-series-output-parallel (ISOP) configuration are present for greater weight/size reduction and efficiency for MVDC rolling stock design. Finally, the implementation of a smart MVDC TPS incorporating a sophisticated railway energy management system (REM-S) based on the smart grid principles is feasible in the future, with numerous benefits. However, there are related challenges, like knowledge gaps on these technologies, the high costs involved, and lack of standardization to overcome to realize widespread future commercial deployment.

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Ibrahim, A. Dawood. "Line Current Harmonic Reduction in AC-DC PWM Converter Using Genetic Algorithm." International Journal of Students' Research in Technology & Management 3, no. 7 (October 29, 2015): 431. http://dx.doi.org/10.18510/ijsrtm.2015.377.

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In this paper, AC/DC converters are widely used to get regulated power supply for battery charging and DC motor speed control. SCR converters are preferred in the field of High voltage DC energy transmission, superconductor magnetic energy storage, etc. However these converters have low power factor and also result in higher order harmonics.This paper proposes the application of Genetic algorithms (GAs) to find the switching angles for line current harmonic reduction in AC/DC type converter. Harmonic reduction is redrafted as an optimization problem and GA is applied.The harmonic elimination methods used in AC/DC converters are similar to those employed in PWM inverters or in AC choppers. The solution is obtained using genetic algorithm tool in MATLAB. The dual objectives of harmonic elimination and output voltage regulation are reframed as an optimization task and the switching instances are identified through the steps of GA.

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Rao, S. Narasimha, and Elanseralathan Kasinathan. "Modeling of high frequency high voltage of waveforms on life of enamel insulation." Indonesian Journal of Electrical Engineering and Computer Science 23, no. 3 (September 1, 2021): 1331. http://dx.doi.org/10.11591/ijeecs.v23.i3.pp1331-1339.

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<p>In recent years it has been observed that insulation failure in electrical motors is caused by adjustable speed drives fed by power electronic converters. These converters produce impulse waveforms having a high slew rate generated by the high switching frequency of IGBTs. This paper focuses on high switching frequency stress in low voltage electrical motors for adjustable speeds. To examine the motor winding insulation under such stress twisted-pair samples were developed from enameled wires. A single-coated polyester of enamel with a thickness of 40 microns is used for this work. High-frequencies, high voltages of Square, and Square-rising, Square-spike waveforms of 10-30 kHz are used here. The test results show that the insulation fails earlier for the Square waveform compared to the Square-spike and Square-rising waveforms. In a nutshell, there is an analysis of PD formation in the insulation system at a higher switching frequency is analyzed. Electric field distributions between twisted pairs with various air gaps of the insulation system stressed by the Square and Square-rising waveforms up to 30 kHz are modeled using COMSOL software.</p>

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Monopoli, Vito Giuseppe, Pierluigi Sidella, and Francesco Cupertino. "Comparison of Efficiency Performance of Two Converters for High-Speed AC Drives." International Review of Electrical Engineering (IREE) 13, no. 1 (February 28, 2018): 1. http://dx.doi.org/10.15866/iree.v13i1.13808.

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Wang, Gang, Qiwei Weng, Xuelin Yang, and Weisheng Hu. "Recent Progress in High-Speed All-Optical Wavelength Converters Based on SOAs." Recent Patents on Electrical Engineeringe 4, no. 2 (May 1, 2011): 133–38. http://dx.doi.org/10.2174/1874476111104020133.

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Azarov, O. D., S. V. Bohomolov, and O. Y. Stahov. "MULTICHANNEL SPEED ADC-DAC SYSTEM BASED ON HIGH-LINE CURRENT-CURRENT CONVERTERS." Information technology and computer engineering 50, no. 1 (2021): 69–79. http://dx.doi.org/10.31649/1999-9941-2021-50-1-69-79.

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Ismagilov, F. R., I. Kh Khairullin, E. A. Polikhach, and V. E. Vavilov. "A study of magnetic rotor systems of high-speed electromechanical energy converters." Russian Electrical Engineering 87, no. 4 (April 2016): 194–98. http://dx.doi.org/10.3103/s1068371216040052.

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Romashov, V. V., K. A. Yakimenko, A. N. Doktorov, and I. D. Groshkov. "Radar hybrid signal generators based on high-speed digital-to-analog converters." Journal of Physics: Conference Series 1991, no. 1 (July 1, 2021): 012023. http://dx.doi.org/10.1088/1742-6596/1991/1/012023.

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Neff, R. R., P. R. Gray, and A. Sangiovanni-Vincentelli. "A module generator for high-speed CMOS current output digital/analog converters." IEEE Journal of Solid-State Circuits 31, no. 3 (March 1996): 448–51. http://dx.doi.org/10.1109/4.494207.

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Chekushkin, V. V., and S. V. Chekushkin. "High-speed digital functional converters for reproducing trigonometric sine and consine functions." Measurement Techniques 39, no. 6 (June 1996): 670–76. http://dx.doi.org/10.1007/bf02369835.

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