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1
Liu, Kwang-Hwa. "High-frequency quasi-resonant converter techniques." Diss., Virginia Polytechnic Institute and State University, 1986. http://hdl.handle.net/10919/74737.
Full textAbstract:
Two waveform-shaping techniques to reduce or eliminate the switching stresses and switching losses in switching-mode power conversion circuits are developed: the zero-current switching technique and the zero-voltage switching technique.
Based on these two techniques two new families of quasi-resonant converters are derived. Since the stresses on semiconductor switching devices are significantly alleviated, these quasi-resonant (QRC) converters are suitable for high-frequency operations with much improved performances and equipment power density.
Employing the duality principle, the duality relationship between these two families of quasi-resonant converters are derived. The establishment of the duality relationship provides a framework allowing the knowledge obtained from one converter family to be readily transferred to the other.
Further topological refinements are derived through the utilization of parasitic elements in the devices and the circuit. In particular, the two most significant parasitic elements, the leakage inductance of the transformer and the junction capacitances of the semiconductor switch, are incorporated as part of the resonant-tank circuit required by these quasi-resonant converters. Consequently, the detrimental effects due to these parasitic elements are eliminated, and the converters can be operated at very high frequencies.Ph. D.
2
Xu, Ping. "High-frequency Analog Voltage Converter Design." PDXScholar, 1994. https://pdxscholar.library.pdx.edu/open_access_etds/4891.
Full textAbstract:
For many high-speed, high-performance circuits, purely differential inputs are needed. This project focuses on building high-speed voltage converters which can transfer a single-ended signal to a purely differential signal, or a differential input signal to a single-ended signal. Operational transconductance amplifier (OTAs) techniques are widely used in high-speed continuous-time integrated analog signal processing (ASP) circuits because resistors, inductors, integrators, buffers, multipliers and filters can be built by OT As and capacitors. Taking advantage of OT As, very-high-speed voltage converters are designed in CMOS technology. These converters can work in a frequency range from DC (OHz) up to lOOMHz and higher, and keep low distortion over a± 0.5V input range. They can replace transformers so that designing fully integrated differential circuits becomes possible. The designs are based on a MOSIS 2μm n-well process. SPICE simulations of these designs are given. The circuit was laid out with MAGIC layout tools and fabricated through MOSIS. The chip was measured at PSU and Intel circuit labs and the experimental results show the correctness of the designs.
3
Balakrishnan, Anand Kumar. "Soft switched high frequency ac-link converter." [College Station, Tex. : Texas A&M University, 2008. http://hdl.handle.net/1969.1/ETD-TAMU-3156.
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LI, QUAN, and q. li@cqu edu au. "HIGH FREQUENCY TRANSFORMER LINKED CONVERTERS FOR PHOTOVOLTAIC APPLICATIONS." Central Queensland University. N/A, 2006. http://library-resources.cqu.edu.au./thesis/adt-QCQU/public/adt-QCQU20060830.110106.
Full textAbstract:
This thesis examines converter topologies suitable for Module Integrated Converters
(MICs) in grid interactive photovoltaic (PV) systems, and makes a contribution to
the development of the MIC topologies based on the two-inductor boost converter,
which has received less research interest than other well known converters.
The thesis provides a detailed analysis of the resonant two-inductor boost converter
in the MIC implementations with intermediate constant DC links. Under variable
frequency control, this converter is able to operate with a variable DC gain while
maintaining the resonant condition. A similar study is also provided for the resonant
two-inductor boost converter with the voltage clamp, which aims to increase the
output voltage range while reducing the switch voltage stress. An operating point
with minimized power loss can be also established under the fixed load condition.
Both the hard-switched and the soft-switched current fed two-inductor boost
converters are developed for the MIC implementations with unfolding stages. Nondissipative
snubbers and a resonant transition gate drive circuit are respectively
employed in the two converters to minimize the power loss.
The simulation study of a frequency-changer-based two-inductor boost converter is
also provided. This converter features a small non-polarised capacitor in a second
phase output to provide the power balance in single phase inverter applications.
Four magnetic integration solutions for the two-inductor boost converter have also
been presented and they are promising in reducing the converter size and power loss.
5
Si, Dang Huy Quoc. "A new implementation of high frequency, high voltage direct power converter." Thesis, University of Nottingham, 2006. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.430219.
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Ahmad, Nisar. "Design and Implementation of a High Frequency Flyback Converter." Thesis, Mittuniversitetet, Avdelningen för elektronikkonstruktion, 2014. http://urn.kb.se/resolve?urn=urn:nbn:se:miun:diva-24598.
Full textAbstract:
The power supply designers choose flyback topology due to its promising features of design simplicity, cost effectiveness and multiple outputs handling capability. The designed product based on flyback topology should be smaller in size, cost effective and energy efficient. Similarly, designers focus on reducing the circuit losses while operating at high frequencies that affect the converter efficiency and performance. Based on the above circumstances, an energy efficient open loop high frequency flyback converter is designed and operated in MHz frequency region using step down multilayer PCB planar transformer. The maximum efficiency of 84.75% is observed and maximum output power level reached is 22.8W. To overcome the switching losses, quasi-resonant soft switching technique is adopted and a high voltage CoolMOS power transistor is used.
7
Salazar, Nathaniel Jay Tobias. "High frequency AC power converter for low voltage circuits." Thesis, Massachusetts Institute of Technology, 2012. http://hdl.handle.net/1721.1/77026.
Full textAbstract:
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.Cataloged from PDF version of thesis.
Includes bibliographical references (p. 74-76).
This thesis presents a novel AC power delivery architecture that is suitable for VHF frequency (50-100MHz) polyphase AC/DC power conversion in low voltage integrated circuits. A complete AC power delivery architecture was evaluated demonstrating the benefits of delivering power across the interconnect at high voltage and lower current with on- or over-die transformation to low voltage and high current. Two approaches to polyphase matching networks in the transformation stage are compared: a 3-phase system with separate single-phase matching networks and individual full bridge rectifiers, and a 3-phase delta-to-wye matching network and a 3-phase rectifier bridge. In addition, a novel switch-capacitor rectifier capable of 3V, 1W output, was evaluated as an alternative circuit to the diode rectifiers. A 50MHz prototype of each version of the system was designed and built for a 12:1 conversion ratio with 24Vpp line-to-line AC input, 2V DC output and 0.7W output power. The measured overall system efficiency is about 63 % for the 3-phase delta system. Although the application is intended for an integrated CMOS implementation, this thesis primarily focuses on discrete PCB level realizations of the proposed architectures to validate the concept and provide insights for future designs.
by Nathaniel Jay Tobias Salazar.
M.Eng.
8
Van, Der Kogel André, and Niklas Österlund. "High frequency dc/dc power converter with galvanic isolation." Thesis, Linköpings universitet, Fysik och elektroteknik, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-128831.
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There is a steady demand to increase the efficiency and raise the power density of power converters. This trend is desired since it leads to reduced size of the converter. The purpose of this thesis is to investigate materials, topologies, core structure and then build a prototype to demonstrate the result. Two core materials have been compared, Fair-Rite material 68 and Ferroxcube 4F1. The goal was to have 50 V input and 30 V output with 80 % efficiency of the converter. The converter with the Fair-Rite material 68 accomplished a peak efficiency at 11 MHz with 54 % efficiency. The core material Ferroxcube 4F1, reached an efficiency of 52 % at 7 MHz. These results were however with 5 V input and 3 V output. The converter had a low efficiency at 50 V input, which lead to ripple in the circuit. One reason for this behaviour was because the design of the PCB was not optimized for MHz operation. The focus of the PCB was that it should be easy to work with instead of achieving peak performance. Also, from the beginning it was decided that no PCB should be made. The focus was instead on the theory and simulations of the converter so no thoroughly investigation of PCB design was done. The leakage inductance of the transformer core was about 10 % of the primary inductance for both materials. The high leakage inductance is believed to further reduce the efficiency of the converter.
9
Reusch, David Clayton. "High Frequency, High Power Density Integrated Point of Load and Bus Converters." Diss., Virginia Tech, 2012. http://hdl.handle.net/10919/26920.
Full textAbstract:
The increased power consumption and power density demands of modern technologies
combined with the focus on global energy savings have increased the demands on DC/DC power
supplies. DC/DC converters are ubiquitous in everyday life, found in products ranging from
small handheld electronics requiring a few watts to warehouse sized server farms demanding
over 50 megawatts. To improve efficiency and power density while reducing complexity and
cost the modular building block approach is gaining popularity. These modular building blocks
replace individually designed specialty power supplies, providing instead an optimized complete
solution. To meet the demands for lower loss and higher power density, higher efficiency and
higher frequency must be targeted in future designs. The objective of this dissertation is to
explore and propose methods to improve the power density and performance of point of load
modules ranging from 10 to 600W.Ph. D.
10
Davari, Pooya. "High frequency high power converters for industrial applications." Thesis, Queensland University of Technology, 2013. https://eprints.qut.edu.au/62896/1/Pooya_Davari_Thesis.pdf.
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The main contribution of this project was to investigate power electronics technology in designing and developing high frequency high power converters for industrial applications. Therefore, the research was conducted at two levels; first at system level which mainly encapsulated the circuit topology and control scheme and second at application level which involves with real-world applications. Pursuing these objectives, varied topologies have been developed and proposed within this research. The main aim was to resolving solid-state switches limited power rating and operating speed while increasing the system flexibility considering the application characteristics. The developed new power converter configurations were applied to pulsed power and high power ultrasound applications for experimental validation.
11
Li, Quan, and q. li@cqu edu au. "DEVELOPMENT OF HIGH FREQUENCY POWER CONVERSION TECHNOLOGIES FOR GRID INTERACTIVE PV SYSTEMS." Central Queensland University. School of Advanced Technologies & Processes, 2002. http://library-resources.cqu.edu.au./thesis/adt-QCQU/public/adt-QCQU20020807.152750.
Full textAbstract:
This thesis examines the development of DC-DC converters that are suitable for Module Integrated Converters, (MICs), in grid interactive photovoltaic (PV) systems, and especially concentrates on the study of the half bridge dual converter, which was previously developed from the conventional half bridge converter. Both hard-switched and soft-switched half bridge dual converters are constructed,
which are rated at 88W each and transform a nominal 17.6Vdc input to an output in the range from 340V to 360Vdc. An initial prototype converter operated at 100kHz and is used as a base line device to establish the operational behaviours of the converter. The second hard-switched converter operated at 250kHz and included a coaxial matrix transformer that significantly reduced the power losses related to the transformer leakage inductance. The soft-switched converter operated at 1MHz and is capable of absorbing the parasitic elements into the resonant tank. Extensive theoretical analysis, simulation and experimental results are provided for each converter. All three converters
achieved conversion efficiencies around 90%. The progressive increases in the operation frequency, while maintaining the conversion efficiency, will translate into the reduced converter size and weight. Finally different operation modes for the
soft-switched converter are established and the techniques for predicting the occurrence of those modes are developed. The analysis of the effects of the transformer winding capacitance also shows that soft switching condition applies for both the primary side mosfets and the output rectifier diodes.
12
Zhang, Zhemin. "High-frequency Quasi-square-wave Flyback Regulator." Diss., Virginia Tech, 2016. http://hdl.handle.net/10919/77434.
Full textAbstract:
Motivated by the recent commercialization of gallium-nitride (GaN) switches, an effort was initiated to determine whether it was feasible to switch the flyback converter at 5 MHz in order to improve the power density of this versatile isolated topology. Soft switching techniques have to be utilized to eliminate the switching loss to maintain high efficiency at multi-megahertz. Compared to the traditional modeling of zero-voltage-switching quasi-square-wave converters, a numerical methodology of parameters design is proposed based on the steady-state model of zero-voltage switching quasi-square-wave flyback converter. The magnetizing inductance is selected to guarantee zero-voltage switching for the entire input and load range with the trade-off design for conduction loss and turn-off loss.
A design methodology is introduced to select a minimum core volume for an inductor or coupled inductors experiencing appreciable core loss. The geometric constant Kgac = MLT/(Ac2WA) is shown to be a power function of the core volume Ve, where Ac is the effective core area, WA is the area of the winding window, and MLT is the mean length per turn for commercial toroidal, ER, and PQ cores, permitting the total loss to be expressed as a direct function of the core volume. The inductor is designed to meet specific loss or thermal constraints. An iterative procedure is described in which two- or three-dimensional proximity effects are first neglected and then subsequently incorporated via finite-element simulation. Interleaved and non-interleaved planar PCB winding structures were also evaluated to minimize leakage inductance, self-capacitance and winding loss. The analysis on the trade-off between magnetic size, frequency, loss and temperature indicated the potential for a higher density flyback converter.
A small-signal equivalent circuit of QSW converter was proposed to design the control loop and to understand the small-signal behavior. By adding a simple damping resistor on the traditional small-signal CCM model, it can predict the pole splitting phenomenon observed in QSW converter. With the analytical expressions of the transfer functions of QSW converters, the impact of key parameters including magnetizing inductance, dead time, input voltage and output power on the small-signal behavior can be analyzed. The closed-loop bandwidth can be pushed much higher with this modified model, and the transient performance is significantly improved.
With the traditional fix dead-time control, a large amount of loss during dead time occurred, especially for the eGaN FETs with high reverse voltage drop. An adaptive dead time control scheme was implemented with simple combinational logic circuitries to adjust the turn on time of the power switches. A variable deadtime control was proposed to further improve the performance of adaptive dead-time control with simplified sensing circuit, and the extra conduction loss caused by propagation delay in adaptive dead-time control can be minimized at multi-megahertz frequency.Ph. D.
13
Bai, Yuming. "Optimization of Power MOSFET for High-Frequency Synchronous Buck Converter." Diss., Virginia Tech, 2003. http://hdl.handle.net/10919/28915.
Full textAbstract:
Evolutions in microprocessor technology require the use of a high-frequency synchronous buck converter (SBC) in order to achieve low cost, low profile, fast transient response and high power density. However, high frequency also causes more power loss on MOSFETs. Optimization of the MOSFETs plays an important role in the system performance.
Circuit and device modeling is important in understanding the relationship between the device parameters and the power loss. The gate-to-drain charge (Qgd) is studied by a novel nonlinear model and compared with the simulation results. A new switching model is developed, which takes into account the effect of parasitic inductance on the switching process. Another model for dv/dt-induced false triggering-on relates the false-trigger-on voltage with the parasitic elements of the device and the circuits.
Some techniques are proposed to reduce the simulation time of FEA in the circuit simulation. Based on this approach, extensive simulations are performed to study the switching performance of the MOSFET with the effect of the parasitic elements. Directed by the analytical models and the experience acquired in the circuit simulation, the MOSFET optimization is realized using FEA. Different optimization algorithms are compared. The experimental results show that the optimized MOSFETs surpass the mainstream commercialized products in both cost and performance.Ph. D.
14
Ward, Gillian Anne. "Design of a multi-kilowatt, high frequency, DC-DC converter." Thesis, University of Birmingham, 2003. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.274596.
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Sagneri, Anthony (Anthony David). "Design of a Very High Frequency dc-dc boost converter." Thesis, Massachusetts Institute of Technology, 2007. http://hdl.handle.net/1721.1/38664.
Full textAbstract:
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007.Includes bibliographical references (p. 167-169).
Passive component volume is a perennial concern in power conversion. With new circuit architectures operating at extreme high frequencies it becomes possible to miniaturize the passive components needed for a power converter, and to achieve dramatic improvements in converter transient performance. This thesis focuses on the development of a Very High Frequency (VHF, 30 - 300 MHz) dc-dc boost converter using a MOSFET fabricated from a typical power process. Modeling and design studies reveal the possibility of building VHF dc-dc converters operable over the full automotive input voltage range (8 - 18 V) with transistors in a 50 V power process, through use of newly-developed resonant circuit topologies designed to minimize transistor voltage stress. Based on this, a study of the design of automotive boost converters was undertaken (e.g., for LED headlamp drivers at output voltages in the range of 22 - 33 V.) Two VHF boost converter prototypes using a [Phi]2 resonant boost topology were developed. The first design used an off the shelf RF power MOSFET, while the second uses a MOSFET fabricated in a BCD process with no special modifications.
(cont.) Soft switching and soft gating of the devices are employed to achieve efficient operation at a switching frequencies of 75 MHz in the first case and 50 MHz in the latter. In the 75 MHz case, efficiency ranges to 82%. The 50 MHz converter, has efficiencies in the high 70% range. Of note is low energy storage requirement of this topology. In the case of the 50 MHz converter, in particular, the largest inductor is 56 nH. Finally, closed-loop control is implemented and an evaluation of the transient characteristics reveals excellent performance.
by Anthony Sagneri.
S.M.
16
Neveu, Florian. "Design and implementation of high frequency 3D DC-DC converter." Thesis, Lyon, INSA, 2015. http://www.theses.fr/2015ISAL0133/document.
Full textAbstract:
L’intégration ultime de convertisseurs à découpage repose sur deux axes de recherche. Le premier axe est de développer les convertisseurs à capacités commutées. Cette approche est compatible avec une intégration totale sur silicium, mais limitée en terme de densité de puissance. Le second axe est l’utilisation de convertisseurs à inductances, qui pâtissent d’imposants composants passifs. Une augmentation de la fréquence permet de réduire les valeurs des composants passifs. Cependant une augmentation de la fréquence implique une augmentation des pertes par commutation, ce qui est contrebalancé par l’utilisation d’une technologie de fabrication plus avancée. Ces technologies plus avancées souffrent quant à elles de limitations au niveau de leur tension d’utilisation. Convertir une tension de 3,3V vers une tension de 1,2V apparait donc comme un objectif ambitieux, particulièrement dans le cas où les objectifs de taille minimale et de rendement supérieur à 90 % sont visés. Un assemblage 3D des composants actifs et passifs permet de minimiser la surface du système. Un fonctionnement à haute fréquence est aussi considéré, ce qui permet de réduire les valeurs requises pour les composants passifs. Dans le contexte de l’alimentation « on-chip », la technologie silicium est contrainte par les fonctions numériques. Une technologie 40 nm CMOS de type « bulk » est choisie comme cas d’étude pour une tension d’entrée de 3,3 V. Les transistors 3,3 V présentent une figure de mérite médiocre, les transistors 1,2 V sont donc choisis. Ce choix permet en outre de présenter une meilleure compatibilité avec une future intégration sur puce. Une structure cascode utilisant trois transistors en série est étudiée est confrontée à une structure standard à travers des simulations et mesures. Une fréquence de +100MHz est choisie. Une technologie de capacités en tranchées est sélectionnée, et fabriquée sur une puce séparée qui servira d’interposeur et recevra la puce active et les inductances. Les inductances doivent être aussi fabriquées de manière intégrée afin de limiter leur impact sur la surface du convertisseur. Ce travail fournit un objet contenant un convertisseur de type Buck à une phase, avec la puce active retournée (« flip-chip ») sur l’interposeur capacitif, sur lequel une inductance est rapportée. Le démonstrateur une phase est compatible pour une démonstration à phases couplées. Les configurations standard et cascode sont comparées expérimentalement aux fréquences de 100 MHz et 200 MHz. La conception de la puce active est l’élément central de ce travail, l’interposeur capacitif étant fabriqué par IPDiA et les inductances par Tyndall National Institute. L’assemblage des différents sous-éléments est réalisé via des procédés industriels. Un important ensemble de mesures ont été réalisées, montrant les performances du convertisseur DC-DC délivré, ainsi que ses limitations. Un rendement pic de 91,5 % à la fréquence de 100 MHz a été démontréUltimate integration of power switch-mode converter relies on two research paths. One path experiments the development of switched-capacitor converters. This approach fits silicon integration but is still limited in term of power density. Inductive DC-DC architectures of converters suffer by the values and size of passive components. This limitation is addressed with an increase in frequency. Increase in switching losses in switches leads to consider advanced technological nodes. Consequently, the capability with respect to input voltage is then limited. Handling 3.3 V input voltage to deliver an output voltage in the range 0.6 V to 1.2 V appears a challenging specification for an inductive buck converter if the smallest footprint is targeted at +90 % efficiency. Smallest footprint is approached through a 3D assembly of passive components to the active silicon die. High switching frequency is also considered to shrink the values of passive components as much as possible. In the context of on-chip power supply, the silicon technology is dictated by the digital functions. Complementary Metal-Oxide- Semiconductor (CMOS) bulk C40 is selected as a study case for 3.3 V input voltage. 3.3 V Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) features poor figure of merits and 1.2 V standard core, regular devices are preferred. Moreover future integration as an on-chip power supply is more compatible. A three-MOSFET cascode arrangement is experimented and confronted experimentally to a standard buck arrangement in the same technology. The coupled-phase architecture enables to reduce the switching frequency to half the operating frequency of the passive devices. +100MHz is selected for operation of passive devices. CMOS bulk C40 offers Metal-Oxide-Metal (MOM) and MOS capacitors, in density too low to address the decoupling requirements. Capacitors have to be added externally to the silicon die but in a tight combination. Trench-cap technology is selected and capacitors are fabricated on a separate die that will act as an interposer to receive the silicon die as well as the inductors. The work delivers an object containing a one-phase buck converter with the silicon die flip-chipped on a capacitor interposer where a tiny inductor die is reported. The one-phase demonstrator is suitable for coupled-phase demonstration. Standard and cascode configurations are experimentally compared at 100 MHz and 200 MHz switching frequency. A design methodology is presented to cover a system-to-device approach. The active silicon die is the central design part as the capacitive interposer is fabricated by IPDiA and inductors are provided by Tyndall National Institute. The assembly of the converter sub-parts is achieved using an industrial process. The work details a large set of measurements to show the performances of the delivered DC/DC converters as well as its limitations. A 91.5% peak efficiency at 100MHz switching frequency has been demonstrated
17
Li, Qiang. "Low-Profile Magnetic Integration for High-Frequency Point-of-Load Converter." Diss., Virginia Tech, 2011. http://hdl.handle.net/10919/28637.
Full textAbstract:
Today, every microprocessor is powered with a Voltage Regulator (VR), which is also known as a high current Point-of-Load converter (POL). These circuits are mostly constructed using discrete components, and populated on the motherboard. With this solution, the passive components such as inductors and capacitors are bulky. They occupy a considerable footprint on the motherboard. The problem is exacerbated with the current trend of reducing the size of all forms of portable computing equipment from laptop to netbook, increasing functionalities of PDA and smart phones. In order to solve this problem, a high power density POL needs to be developed. An integration solution was recently proposed to incorporate passive components, especially magnetic components, with active components in order to realize the needed power density for the POL. Todayâ s discrete VR only has around 100W/in3 power density. The 3D integration concept is widely used for low current integrated POL. With this solution, a very low profile planar inductor is built as a substrate for the active components of the POL. By doing so, the POL footprint can be dramatically saved, and the available space is also fully utilized. This 3D integrated POL can achieve 300-1000W/in3 power density, however, with considerably less current. This might address the needs of small hand-held equipment such as PDA and Smart phone type of applications. It does not, however, meet the needs for such applications as netbook, laptop, desk-top and server applications where tens and hundreds of amperes are needed. So, although the high density integrated POL has been demonstrated at low current level, magnetic integration is still one of the toughest barriers for integration, especially for high current POL.
In order to alleviate the intense thirst from the computing and telecom industry for high power density POL, the 3D integration concept needs be extended from low current applications to high current applications. The key technology for 3D integration is the low profile planar inductor design. Before this research, there was no general methodology to analyze and design a low profile planar inductor due to its non-uniform flux distribution, which is totally different as a conventional bulky inductor. A Low Temperature Co-fired Ceramic (LTCC) inductor is one of the most promising candidates for 3D integration for high current applications. For the LTCC inductor, besides the non-uniform flux, it also has non-linear permeability, which makes this problem even more complicated. This research focuses on penetrating modeling and design barriers for planar magnetic to develop high current 3D integrated POL with a power density dramatically higher than todayâ s industry products in the same current level.
In the beginning, a general analysis method is proposed to classify different low profile inductor structures into two types according to their flux path pattern. One is a vertical flux type; another one is a lateral flux type. The vertical flux type means that the magnetic flux path plane is perpendicular with the substrate. The lateral flux type means that the magnetic flux path plane is parallel with the substrate. This analysis method allows us to compare different inductor structures in a more general way to reveal the essential difference between them. After a very thorough study, it shows that a lateral flux structure is superior to a vertical flux structure for low profile high current inductor design from an inductance density point of view, which contradicts conventional thinking. This conclusion is not only valid for the LTCC planar inductor, which has very non-linear permeability, but is also valid for the planar inductor with other core material, which has constant permeability.
Next, some inductance and loss models for a planar lateral flux inductor with a non-uniform flux are also developed. With the help of these models, different LTCC lateral flux inductor structures (single-turn structure and multi-turn structures) are compared systematically. In this comparison, the inductance density, winding loss and core loss are all considered. The proposed modeling methodology is a valuable extension of previous uniform flux inductor modeling, and can be used to solve other modeling problems, such as non-uniform flux transformer modeling.
After that, a design method is proposed for the LTCC lateral flux inductor with non-uniform flux distribution. In this design method, inductor volume, core thickness, winding loss, core loss are all considered, which has not been achieved in previous conventional inductor design methods. With the help of this design method, the LTCC lateral flux inductor can be optimized to achieve small volume, small loss and low profile at the same time. Several LTCC inductor substrates are also designed and fabricated for the 3D integrated POL. Comparing the vertical flux inductor substrate with the lateral flux inductor substrate, we can see a savings of 30% on the footprint, and a much simpler fabrication process. A 1.5MHz, 5V to 1.2V, 15A 3D integrated POL converter with LTCC lateral flux inductor substrate is demonstrated with 300W/in3 power density, which has a factor of 3 improvements when compared to todayâ s industry products.
Furthermore, the LTCC lateral flux coupled inductor is proposed to further increase power density of the 3D integrated POL converter. Due to the DC flux cancelling effect, the size of LTCC planar coupled inductor can be dramatically reduced to only 50% of the LTCC planar non-coupled inductor. Compared to previous vertical flux coupled inductor prototypes, a lateral flux coupled inductor prototype is demonstrated to have a 50% core thickness reduction. A 1.5MHz, 5V to 1.2V, 40A 3D integrated POL converter with LTCC lateral flux coupled inductor substrate is demonstrated with 700W/in3 power density, which has a factor of 7 improvements when compared to today's industry POL products in the same current level.
In conclusion, this research not only overcame some major academia problems about analysis and design for planar magnetic components, but also made significant contributions to the industry by successfully scaling the integrated POL from today's 1W-5W case to a 40W case. This level of integration would significantly save the cost, and valuable motherboard real estate for other critical functions, which may enable the next technological innovation for the whole computing and telecom industry.Ph. D.
18
Pilawa-Podgurski, Robert C. N. "Design and evaluation of a very high frequency dc/dc converter." Thesis, Massachusetts Institute of Technology, 2007. http://hdl.handle.net/1721.1/41545.
Full textAbstract:
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007.This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
Includes bibliographical references (p. 139-143).
This thesis presents a resonant boost topology suitable for very high frequency (VHF, 30-300 MHz) dc-dc power conversion. The proposed design is a fixed frequency, fixed duty ratio resonant converter featuring low device stress, high efficiency over a wide load range, and excellent transient performance. A 110 MHz, 23 W experimental converter has been built and evaluated. The input voltage range is 8-16 V (14.4 V nominal), and the selectable output voltage is between 22-34 V (33 V nominal). The converter achieves higher than 87% efficiency at nominal input and output voltages, and maintains efficiency above 80% for loads as small as 5% of full load. Furthermore, efficiency is high over the input and output voltage range. In addition, a resonant gate drive scheme suitable for VHF operation is presented, which provides rapid startup and low-loss operation. The converter regulates the output using high-bandwidth on-off hysteretic control, which enables fast transient response and efficient light load operation. The low energy storage requirements of the converter allow the use of coreless inductors, thereby eliminating magnetic core loss and introducing the possibility of integration. The target application of the converter is the automotive industry, but the design presented here can be used in a broad range of applications where size, cost, and weight are important, as well as high efficiency and fast transient response.
by Robert C.N. Pilawa-Podgurski.
M.Eng.
19
Burkhart, Justin (Justin Michael). "Design of a very high frequency resonant boost DC-DC converter." Thesis, Massachusetts Institute of Technology, 2010. http://hdl.handle.net/1721.1/60157.
Full textAbstract:
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2010.Includes bibliographical references (p. 163-164).
THIS thesis explores the development of a very high frequency DC-DC resonant boost converter. The topology examined features low parts count and fast transient response but suffers from higher device stresses compared to other topologies that use a larger number of passive components. A new design methodology for the proposed converter topology is developed. This design procedure - unlike previous design methodologies for similar topologies - is based on direct analysis of the topology and does not rely on lengthy time-domain simulation sweeps across circuit parameters to identify good designs. Additionally, a method to design semiconductor devices that are suitable for use in the proposed VHF power converter is presented. When the main semiconductor switch is fabricated in a integrated power process where the designer has control over the device layout, large performance gains can be achieved by considering parasitics and loss mechanisms that are important to operation at VHF when designing the device. A method to find the optimal device for a particular converter design is presented. The new design methodology is combined with the device optimization technique to enable the designer to rapidly find the optimal combination of converter and device design for a given specification. To validate the proposed converter topology, design methodology, and device optimization, a 75 MHz prototype converter is designed and experimentally demonstrated. The performance of the prototype closely matches that predicted by the design procedure, and achieves good efficiency over a wide input voltage range.
by Justin Burkhart.
S.M.
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Musabeyoglu, Ahmet Can. "A zero-voltage switching technique for high frequency buck converter ICs." Thesis, Massachusetts Institute of Technology, 2017. http://hdl.handle.net/1721.1/113122.
Full textAbstract:
Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017.This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
Cataloged from student-submitted PDF version of thesis.
Includes bibliographical references (pages 59-60).
This thesis explores a zero-voltage switching (ZVS) method that can be used to decrease the frequency dependent losses in a buck converter. The specific application for this thesis was a buck converter IC with an input voltage of up to 42V. The method utilizes the addition of an auxiliary circuit composed of a helper inductor and two helper power MOSFETs that compliment the switching transition of a conventional synchronous buck converter topology. It is shown in this thesis that by using the described topology, the switching losses of the high-side power MOSFET in a synchronous buck converter can be reduced by up to 45%. Furthermore, it is shown that a similar helper circuit could be used to reduce the gate drive losses for both power MOSFETs in a synchronous buck converter by up to 60%. Since the method requires the use of an additional helper inductor with a small value (10-50 nH), various methods to integrate this inductor into an IC package are investigated. 0.35[mu]m BiCMOS technology was used to simulate and analyze the merits of the described topology and compare it to the LT8697, a hard-switched synchronous buck converter IC.
by Ahmet Can Musabeyoglu.
M. Eng.
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Vulovic, Marko. "Digital Control of a High Frequency Parallel Resonant DC-DC Converter." Thesis, Virginia Tech, 2010. http://hdl.handle.net/10919/35934.
Full textAbstract:
A brief analysis of the nonresonant-coupled parallel resonant converter is performed. The converter is modeled and a reference classical analog controller is designed and simulated. Infrastructure required for digital control of the converter (including anti-aliasing filters and a modulator) is designed and a classical digital controller is designed and simulated, yielding a ~30% degradation in control bandwidth at the worst-case operating point as compared with the analog controller. Based on the strong relationship observed between low-frequency converter gain and operating point, a gain-scheduled digital controller is proposed, designed, and simulated, showing 4:1 improved worst-case control bandwidth as compared with the analog controller. A complete prototype is designed and built which experimentally validates the results of the gain-scheduled controller simulation with good correlation. The three approaches that were investigated are compared and conclusions are drawn. Suggestions for further research are presented.Master of Science
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Su, Yipeng. "High Frequency, High Current 3D Integrated Point-of-Load Module." Diss., Virginia Tech, 2015. http://hdl.handle.net/10919/51248.
Full textAbstract:
Point-of-load (POL) converters have been used extensively in IT products. Today, almost every microprocessor is powered by a multi-phase POL converter with high output current, which is also known as voltage regulator (VR). In the state-of-the-art VRs, the circuits are mostly constructed with discrete components and situated on the motherboard, where it can occupy more than 1/3 of the footprint of the motherboard. A compact POL is desirable to save precious space on motherboards to be used for some other critical functionalities. Recently, industry has released many modularized POL converters, in which the bulky inductor is integrated with the active components to increase the power density. This concept has been demonstrated at current levels less than 5A and power density around 600-1000W/in3. This might address the needs of small hand-held equipment such as smart phones, but it is far from meeting the needs for the applications such as laptops, desktops and servers, where tens and hundreds of amperes are needed.
A 3D integrated POL module with an output current of tens of ampere has been successfully demonstrated at the Center for Power Electronic Systems (CPES), Virginia Tech. In this structure, the inductor is elaborated with low temperature co-fire ceramic (LTCC) ferrite, as a substrate where the active components are placed. The lateral flux inductor is proposed to
achieve both a low profile and high power density. Generally, the size of the inductor can be continuously shrunk by raising the switching frequency. The emerging gallium-nitride (GaN) power devices enable the creation and use of a multi-MHz, high efficiency POL converter. This dissertation firstly explores the LTCC inductor substrate design in the multi-MHz range for a high-current POL module with GaN devices. The impacts of different frequencies and different LTCC ferrite materials on the inductor are also discussed. Thanks to the DC flux cancellation effect, the inverse coupled inductor further improves the power density of a 20A, 5MHz two-phase POL module to more than 1kW/in3. An FEA simulation model is developed to study the core loss of the lateral flux coupled inductor, which shows the inverse coupling is also beneficial for core loss reduction.
The ceramic-based 3D integrated POL module, however, is not widely adopted in industrial products because of the relatively high cost of the LTCC ferrite material and complicated manufacturing process. To solve that problem, a printed circuit board (PCB) inductor substrate with embedded alloy flake composite core is proposed. The layerwise magnetic core is laminated into a multi-layer PCB, and the winding of the inductor then is formed by the copper layers and conventional PCB vias. As a demonstration of system integration, a 20A, 1.5MHz integrated POL module is designed and fabricated based on a 4-layer PCB with embedded flake core, which realizes more than 85% efficiency and 600W/in3 power density. The application of standardized PCB processes reduces the cost for manufacturing the integrated modules due to the easy automation and the low temperature manufacturing process. Combining the PCB-embedded coupled inductor substrate and advanced control strategy, the two-phase 40A POL modules are elaborated as a complete integrated laptop VR solution. The coupled inductor structure is slightly modified to improve its transient performance. The nonlinearity of the inductance is controlled by adding either air slots or low permeability magnetic slots into the leakage flux path of the coupled inductor. Then the leakage flux, which determines the transient response of the coupled inductor, can be well controlled. If we directly replace the discrete VR solution with the proposed integrated modules, more than 50% of the footprint on the motherboard can be saved.
Although the benefits of the lateral flux inductor have been validated in terms of its high power density and low profile, the planar core is excited under very non-uniform flux. Some parts of the core are even pushed into the saturation region, which totally goes against the conventional sense of magnetic design. The final part of this dissertation focuses on evaluating the performance of the planar core with variable flux. The counterbalance between DC flux and AC flux is revealed, with which the AC flux and the core loss density are automatically limited in the saturated core. The saturation is essentially no longer detrimental in this special structure. Compared with the conventional uniform flux design, the variable flux structure extends the operating point into the saturation region, which gives better utilization of the core. In addition, the planar core with variable flux also provides better thermal management and more core loss reduction under light load.
As conclusions, this research first challenges the conventional magnetic design rules, which always assumes uniform flux. The unique characteristics and benefits of the variable flux core are proved. As an example of taking advantages of the lateral flux inductor, the PCB integrated POL modules are proposed and demonstrated as a high-density VR solution. The integrated modules are cost-effective and ready to be commercialized, which could enable the next technological innovation for the whole computing and telecom industry.Ph. D.
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Ji, Shu. "High Frequency, High Power Density GaN-Based 3D Integrated POL Modules." Thesis, Virginia Tech, 2013. http://hdl.handle.net/10919/19286.
Full textAbstract:
The non-isolated POL converters are widely used in computers, telecommunication systems, portable electronics, and many other applications. These converters are usually constructed using discrete components, and operated at a lower frequency around 200 ~ 600 kHz to achieve a decent efficiency at the middle of 80\'s%. The passive components, such as inductors and capacitors, are bulky, and they occupy a considerable foot-print. As the power demands increase for POL converters and the limited real estate of the mother board, the POL converters must be made significantly smaller than what they have demonstrated to date. To achieve these goals, two things have to happen simultaneously. The first is a significant increase in the switching frequency to reduce the size and weight of the inductors and capacitors. The second is to integrate passive components, especially magnetics, with active components to realize the needed power density.Today, this concept has been demonstrated at a level less than 5A and a power density around 300-700W/in3 by using silicon-based power semiconductors. This might address the need of small hand-held equipment such as PDAs and smart phones. However, it is far from meeting the needs for applications, such as netbook, notebook, desk-top and server applications where tens and hundreds of amperes are needed.
After 30 years of silicon MOSFET development, the silicon has approached its theoretical limits. The recently emerged GaN transistors as a possible candidate to replace silicon devices in various power conversion applications. GaN devices are high electron mobility transistors (HEMT) and have higher band-gap, higher electron mobility, and higher electron velocity than silicon devices, and offer the potential benefits for high frequency power conversions. By implementing the GaN device, it is possible to build the POL converter that can achieve high frequency, high power density, and high efficiency at the same time. GaN technology is in its early stage; however, its significant gains are projected in the future. The first generation GaN devices can outperform the state-of-the-art silicon devices with superior FOM and packaging.
The objective of this work is to explore the design of high frequency, high power density 12 V input POL modules with GaN devices and the 3D integration technique. This work discusses the fundamental differences between the enhancement mode and depletion mode GaN transistors, the effect of parasitics on the performance of the high frequency GaN POL, the 3D technique to integrate the active layer with LTCC magnetic substrate, and the thermal design of a high density module using advanced substrates with improved thermal conductivity.
The hardware demonstrators are two 12 V to 1.2 V highly integrated 3D POL modules, the single phase 10 A module and two phase 20 A module, all built with depletion mode GaN transistors and low profile LTCC inductors.
Master of Science
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Asgarifar, Hajarossadat. "Application of high voltage, high frequency pulsed electromagnetic field on cortical bone tissue." Thesis, Queensland University of Technology, 2012. https://eprints.qut.edu.au/53105/1/Hajarossadat_Asgarifar_Thesis.pdf.
Full textAbstract:
Over the last few decades, electric and electromagnetic fields have achieved important role as stimulator and therapeutic facility in biology and medicine. In particular, low magnitude, low frequency, pulsed electromagnetic field has shown significant positive effect on bone fracture healing and some bone diseases treatment. Nevertheless, to date, little attention has been paid to investigate the possible effect of high frequency, high magnitude pulsed electromagnetic field (pulse power) on functional behaviour and biomechanical properties of bone tissue.
Bone is a dynamic, complex organ, which is made of bone materials (consisting of organic components, inorganic mineral and water) known as extracellular matrix, and bone cells (live part). The cells give the bone the capability of self-repairing by adapting itself to its mechanical environment. The specific bone material composite comprising of collagen matrix reinforced with mineral apatite provides the bone with particular biomechanical properties in an anisotropic, inhomogeneous structure.
This project hypothesized to investigate the possible effect of pulse power signals on cortical bone characteristics through evaluating the fundamental mechanical properties of bone material. A positive buck-boost converter was applied to generate adjustable high voltage, high frequency pulses up to 500 V and 10 kHz.
Bone shows distinctive characteristics in different loading mode. Thus, functional behaviour of bone in response to pulse power excitation were elucidated by using three different conventional mechanical tests applying three-point bending load in elastic region, tensile and compressive loading until failure. Flexural stiffness, tensile and compressive strength, hysteresis and total fracture energy were determined as measure of main bone characteristics. To assess bone structure variation due to pulse power excitation in deeper aspect, a supplementary fractographic study was also conducted using scanning electron micrograph from tensile fracture surfaces.
Furthermore, a non-destructive ultrasonic technique was applied for determination and comparison of bone elasticity before and after pulse power stimulation. This method provided the ability to evaluate the stiffness of millimetre-sized bone samples in three orthogonal directions.
According to the results of non-destructive bending test, the flexural elasticity of cortical bone samples appeared to remain unchanged due to pulse power excitation. Similar results were observed in the bone stiffness for all three orthogonal directions obtained from ultrasonic technique and in the bone stiffness from the compression test. From tensile tests, no significant changes were found in tensile strength and total strain energy absorption of the bone samples exposed to pulse power compared with those of the control samples. Also, the apparent microstructure of the fracture surfaces of PP-exposed samples (including porosity and microcracks diffusion) showed no significant variation due to pulse power stimulation. Nevertheless, the compressive strength and toughness of millimetre-sized samples appeared to increase when the samples were exposed to 66 hours high power pulsed electromagnetic field through screws with small contact cross-section (increasing the pulsed electric field intensity) compare to the control samples. This can show the different load-bearing characteristics of cortical bone tissue in response to pulse power excitation and effectiveness of this type of stimulation on smaller-sized samples.
These overall results may address that although, the pulse power stimulation can influence the arrangement or the quality of the collagen network causing the bone strength and toughness augmentation, it apparently did not affect the mineral phase of the cortical bone material. The results also confirmed that the indirect application of high power pulsed electromagnetic field at 500 V and 10 kHz through capacitive coupling method, was athermal and did not damage the bone tissue construction.
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STEPHANE, YANNICK NJIOMOUO. "3D High Frequency Modelling of Motor Converter and Cables in Propulsion Systems." Thesis, KTH, Elektroteknisk teori och konstruktion, 2014. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-160637.
Full textAbstract:
The use of the power converters in railway traction systems introduces high frequency electromagnetic interference (EMI) in the propulsion system, which causes electromagnetic compatibility (EMC) problems. These high frequency phenomena come from fast variations of current and voltage during the switching operations in the power converter. The high frequency currents generate Electromagnetic (EM) disturbances that could distort the smooth functionality of the electrical drive system. In fact, power and audio frequency emissions could disturb track signaling and the control systems, while high frequency currents injected into cable screens could damage the cables. In order to ensure compatibility to conducted and radiated EMC requirements, and related infrastructure signaling specications, it is necessary to perform 3D modelling of the drive system to predict the EM emission during the design phase of the propulsion system. CST, an electromagnetic analysis tool, is used to create the 3D model of the converter module and the cables. The model allows for the inclusion of the parasitic characteristics of the IGBTs, the bus-bars, and the motor cables. Inuence of dierent grounding schemes is analyzed. The model predicts the EM eld distribution at points inside the converter module and in the vicinity.Anvandningen av kraftomvandlare i jarnvagstraktionssystem introducerar hogfrekvens elektromagnetisk interferens (EMI) i framdrivningssystemet, vilket orsakar elektromagnetiska kompatibilitetsproblem (EMC). Dessa hogfrekvensfenomen orsakas av snabba variationer i strom och spanning under omkopplingsoperationer i kraftomvandlare. Hogfrekvensstrommarna alstrar elektromagnetiska (EM) storningar, som kan paverka funktionaliteten hos det elektriska drivsystemet. Storningar vid kraft- och ljudfrekvenser kan paverka signal- och kontrollsystemen, medan hogfrekventa strommar injiceras i kabelskarmar kan skada kablarna. For att sakerstalla kompatibiliteten mellan EMC-kraven, vad galler ledningsbundna och utsanda storningar, och specikationerna for signalsystemets infrastruktur ar det nodvandigt att utfora 3D-modellering av drivsystemet, for att redan under designfasen av framdrivningssystemet kunna forutsaga de elektromagnetiska storningarna. CST, som ar ett elektromagnetiskt analysverktyg, anvands for att skapa 3D-modellen av omriktarmodulen och kablarna. Modellen gor det mojligt att ta med de parasitiska egenskaperna hos IGBT, ledningsmoduler och motorkablar. Inverkan av olika jordningssystemen analyseras. Modellen forutsager det elektromagnetiska faltet vid olika punkter inuti omriktarmodulen och i dess narhet.
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Cliffe, Robert J. "High power high frequency DC-DC converter topologies for use in off-line power supplies." Thesis, Loughborough University, 1996. https://dspace.lboro.ac.uk/2134/7305.
Full textAbstract:
The development of a DC-DC converter for use in a proposed range of one to ten kilowatt off-line power supplies is presented. The converter makes good use of established design practices and recent technical advances. The thesis begins with a review of traditional design practices, which are used in the design of a 3kW, 48V output DC-DC converter, as a bench-mark for evaluation of recent technical advances. Advances evaluated include new converter circuits, control techniques, components, and magnetic component designs. Converter circuits using zero voltage switching (ZVS) transitions offer significant advantages for this application. Of the published converters which have ZVS transitions the phase shift controlled full bridge converter is the most suitable, and assessments of variations on this circuit are presented. During the course of the research it was realised that the ZVS range of one leg of the phase shift controlled full bridge converter could be extended by altering the switching pattern, and this new switching pattern is proposed. A detailed analysis of phase shift controlled full bridge converter operation uncovers a number of operational findings which give a better and more complete understanding of converter operation than hitherto published. Converter design equations and guidelines are presented and the effects of the new improvement are investigated by an approximate analysis. Computer simulations using PSPICE2 are carried out to predict converter performance. A prototype converter design, construction details and test results are given. The results obtained compare well to the predicted performance and confirm the advantages of the new switching pattern.
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Tao, Fengfeng. "Advanced High-Frequency Electronic Ballasting Techniques for Gas Discharge Lamps." Diss., Virginia Tech, 2001. http://hdl.handle.net/10919/25978.
Full textAbstract:
Small size, light weight, high efficacy, longer lifetime and controllable output are the main advantages of high-frequency electronic ballasts for gas discharge lamps. However, power line quality and electromagnetic interference (EMI) issues arise when a simple peak rectifying circuit is used. To suppress harmonic currents and improve power factor, input-current-shaping (ICS) or power-factor-correction (PFC) techniques are necessary.
This dissertation addresses advanced high-frequency electronic ballasting techniques by using a single-stage PFC approach. The proposed techniques include single-stage boost-derived PFC electronic ballasts with voltage-divider-rectifier front ends, single-stage PFC electronic ballasts with wide range dimming controls, single-stage charge-pump PFC electronic ballasts with lamp voltage feedback, and self-oscillating single-stage PFC electronic ballasts.
Single-stage boost-derived PFC electronic ballasts with voltage-divider-rectifier front ends are developed to solve the problem imposed by the high boost conversion ratio required by commonly used boost-derived PFC electronic ballast. Two circuit implementations are proposed, analyzed and verified by experimental results.
Due to the interaction between the PFC stage and the inverter stage, extremely high bus-voltage stress may exist during dimming operation. To reduce the bus voltage and achieve a wide-range dimming control, a novel PFC electronic ballast with asymmetrical duty-ratio control is proposed. Experimental results show that wide stable dimming operation is achieved with constant switching frequency.
Charge-pump (CP) PFC techniques utilize a high-frequency current source (CS) or voltage source (VS) or both to charge and discharge the so-called charge-pump capacitor in order to achieve PFC. The bulky DCM boost inductor is eliminated so that this family of PFC circuits has the potential for low cost and small size. A family of CPPFC electronic ballasts is investigated. A novel VSCS-CPPFC electronic ballast with lamp-voltage feedback is proposed to reduce the bus-voltage stress. This family of CPPFC electronic ballasts are implemented and evaluated, and verified by experimental results.
To further reduce the cost and size, a self-oscillating technique is applied to the CPPFC electronic ballast. Novel winding voltage modulation and current injection concepts are proposed to modulate the switching frequency. Experimental results show that the self-oscillating CS-CPPFC electronic ballast with current injection offers a more cost-effective solution for non-dimming electronic ballast applications.Ph. D.
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Wen, Yangyang. "MODELING AND DIGITAL CONTROL OF HIGH FREQUENCY DC-DC POWER CONVERTERS." Doctoral diss., University of Central Florida, 2007. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/3671.
Full textAbstract:
The power requirements for leading edge digital integrated circuits have become increasingly demanding. Power converter systems must be faster, more flexible, more precisely controllable and easily monitored. Meanwhile, in addition to control process, the new functions such as power sequencing, communication with other systems, voltage dynamic programming,load line specifications, phase current balance, protection, power status monitoring and system diagnosis are going into today's power supply systems. Digital controllers, compared withanalog controllers, are in a favorable position to provide basic feedback control as well as those power management functions with lower cost and great flexibility. The dissertation gives an overview of digital controlled power supply systems bycomparing with conventional analog controlled power systems in term of system architecture,modeling methods, and design approaches. In addition, digital power management, as one of the most valuable and "cheap" function, is introduced in Chapter 2. Based on a leading-edge digital controller product, Chapter 3 focuses on digital PID compensator design methodologies, design issues, and optimization and development of digital controlled single-phase point-of-load (POL)dc-dc converter. Nonlinear control is another valuable advantage of digital controllers over analogcontrollers. Based on the modeling of an isolated half-bridge dc-dc converter, a nonlinear control method is proposed in Chapter 4. Nonlinear adaptive PID compensation scheme is implemented based on digital controller Si8250. The variable PID coefficient during transients improves power system's transient response and thus output capacitance can be reduced to save cost. In Chapter 5, another nonlinear compensation algorithm is proposed for asymmetric flybackforward half bridge dc-dc converter to reduce the system loop gain's dependence on the input voltage, and improve the system's dynamic response at high input line. In Chapter 6, a unified pulse width modulation (PWM) scheme is proposed to extend the duty-cycle-shift (DCS) control, where PWM pattern is adaptively generated according to the input voltage level, such that the power converter's voltage stress are reduced and efficiency is improved. With the great flexibility of digital PWM modulation offered by the digital controller Si8250, the proposed control scheme is implemented and verified. Conclusion of the dissertation work and suggestions for future work in related directions are given in final Chapter.Ph.D.
School of Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering PhD
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Qiu, Yang. "High-Frequency Modeling and Analyses for Buck and Multiphase Buck Converters." Diss., Virginia Tech, 2005. http://hdl.handle.net/10919/29804.
Full textAbstract:
Future microprocessor poses many challenges to its dedicated power supplies, the voltage regulators (VRs), such as the low voltage, high current, fast load transient, etc. For the VR designs using multiphase buck converters, one of the results from these stringent challenges is a large amount of output capacitors, which is undesired from both a cost and a motherboard real estate perspective. In order to save the output capacitors, the control-loop bandwidth must be increased. However, the bandwidth is limited in the practical design. The influence from the switching frequency on the control-loop bandwidth has not been identified, and the influence from multiphase is not clear, either. Since the widely-used average model eliminates the inherent switching functions, it is not able to predict the converter's high-frequency performance. In this dissertation, the primary objectives are to develop the methodology of high-frequency modeling for the buck and multiphase buck converters, and to analyze their high-frequency characteristics.
First, the nonlinearity of the pulse-width modulator (PWM) scheme is identified. Because of the sampling characteristic, the sideband components are generated at the output of the PWM comparator. Using the assumption that the sideband components are well attenuated by the low-pass filters in the converter, the conventional average model only includes the perturbation-frequency components. When studying the high-frequency performance, the sideband frequency is not sufficiently high as compared with the perturbation one; therefore, the assumption for the average model is not good any more. Under this condition, the converter response cannot be reflected by the average model. Furthermore, with a closed loop, the generated sideband components at the output voltage appear at the input of the PWM comparator, and then generate the perturbation-frequency components at the output. This causes the sideband effect to happen. The perturbation-
frequency components and the sideband components are then coupled through the comparator. To be able to predict the converter's high-frequency performance, it is necessary to have a model that reflects the sampling characteristic of the PWM comparator. As the basis of further research, the existing high-frequency modeling approaches are reviewed. Among them, the harmonic balance approach predicts the high-frequency performance but it is too complicated to utilize. However, it is promising when simplified in the applications with buck and multiphase buck converters. Once the nonlinearity of the PWM comparator is identified, a simple model can be obtained because the rest of the converter system is a linear function.
With the Fourier analysis, the relationship between the perturbation-frequency components and the sideband components are derived for the trailing-edge PWM comparator. The concept of multi-frequency modeling is developed based on a single-phase voltage-mode-controlled buck converter. The system stability and transient performance depend on the loop gain that is affected by the sideband component. Based on the multi-frequency model, it is mathematically indicated that the result from the sideband effect is the reduction of magnitude and phase characteristics of the loop gain. With a higher bandwidth, there are more magnitude and phase reductions, which, therefore, cause the sideband effect to pose limitations when pushing the bandwidth.
The proposed model is then applied to the multiphase buck converter. For voltage-mode control, the multiphase technique has the potential to cancel the sideband effect around the switching frequency. Therefore, theoretically the control-loop bandwidth can be pushed higher than the single-phase design. However, in practical designs, there is still magnitude and phase reductions around the switching frequency in the measured loop gain. Using the multi-frequency model, it is clearly pointed out that the sideband effect cannot be fully cancelled with unsymmetrical phases, which results in additional reduction of the phase margin, especially for the high-bandwidth design. Therefore, one should be extremely careful to push the bandwidth when depending on the interleaving to cancel the sideband effect.
The multiphase buck converter with peak-current control is also investigated. Because of the current loop in each individual phase, there is the sideband effect that cannot be canceled with the interleaving technique. For higher bandwidths and better transient performances, two schemes are presented to reduce the influence from the current loop: the external ramps are inserted in the modulators, and the inductor currents are coupled, either through feedback control or by the coupled-inductor structure. A bandwidth around one-third of the switching frequency is achieved with the coupled-inductor buck converter, which makes it a promising circuit for the VR applications.
As a conclusion, the feedback loop results in the sideband effect, which limits the bandwidth and is not included in the average model. With the proposed multi-frequency model, the high-frequency performance for the buck and multiphase buck converters can be accurately predicted.Ph. D.
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Tolstoy, Georg. "High-Efficiency SiC Power Conversion : Base Drivers for Bipolar Junction Transistors and Performance Impacts on Series-Resonant Converters." Doctoral thesis, KTH, Elektrisk energiomvandling, 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-168163.
Full textAbstract:
This thesis aims to bring an understanding to the silicon carbide (SiC) bipolar junction transistor (BJT). SiC power devices are superior to the silicon IGBT in several ways. They are for instance, able to operate with higher efficiency, at higher frequencies, and at higher junction temperatures. From a system point of view the SiC power device could decrease the cost and complexity of cooling, reduce the size and weight of the system, and enable the system to endure harsher environments. The three main SiC power device designs are discussed with a focus on the BJT. The SiC BJT is compared to the SiC junction field-effect transistor (JFET) and the metal-oxide semiconductor field-effect transistor (MOSFET). The potential of employing SiC power devices in applications, ranging from induction heating to high-voltage direct current (HVDC), is presented. The theory behind the state-of-the-art dual-source (2SRC) base driver that was presented by Rabkowski et al. a few years ago is described. This concept of proportional base drivers is introduced with a focus on the discretized proportional base drivers (DPBD). By implementing the DPBD concept and building a prototype it is shown that the steady-state consumption of the base driver can be reduced considerably. The aspects of the reverse conduction of the SiC BJT are presented. It is shown to be of importance to consider the reduced voltage drop over the base-emitter junction. Last the impact of SiC unipolar and bipolar devices in series-resonant (SLR) converters is presented. Two full-bridges are designed and constructed, one with SiC MOSFETs utilizing the body diode for reverse conduction during the dead-time, and the second with SiC BJTs with anti-parallel SiC Schottky diodes. It is found that the SiC power devices, with their absence of tail current, are ideal devices to fully utilize the soft-switching properties that the SLR converters offer. The SiC MOSFET benefits from its possibility to utilize reverse conduction with a low voltage drop. It is also found that the size of capacitance of the snubbers can be reduced compare to state-of-the-art silicon technology. High switching frequencies of 200 kHz are possible while still keeping the losses low. A dead-time control strategy for each device is presented. The dual control (DuC) algorithm is tested with the SiC devices and compared to frequency modulation (FM). The analytical investigations presented in this thesis are confirmed by experimental results on several laboratory prototype converters.QC 20150529
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Van, Rhyn P. D. "High voltage DC-DC converter using a series stacked topology." Thesis, Link to the online version, 2006. http://hdl.handle.net/10019/1269.
Full text
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Sun, Bingyao. "High-Frequency Oriented Design of Gallium-Nitride (GaN) Based High Power Density Converters." Diss., Virginia Tech, 2018. http://hdl.handle.net/10919/85054.
Full textAbstract:
The wide-bandgap (WBG) devices, like gallium nitride (GaN) and silicon carbide (SiC) devices have proven to be a driving force of the development of the power conversion technology. Thanks to their distinct advantages over silicon (Si) devices including the faster switching speed and lower switching losses, WBG-based power converter can adopt a higher switching frequency and pursue higher power density and higher efficiency.
As a trade-off of the advantages, there also exist the high-frequency-oriented challenges in the adoption of the GaN HEMT under research, including narrow safe gate operating area, increased switching overshoot, increased electromagnetic interference (EMI) in the gate loop and the power stages, the lack of the modules of packages for high current application, high gate oscillation under parallel operation. The dissertation is developed to addressed the all the challenges above to fully explore the potential of the GaN HEMTs.
Due to the increased EMI emission in the gate loop, a small isolated capacitor in the gate driver power supply is needed to build a high-impedance barrier in the loop to protect the gate driver from interference. A 2 W dual-output gate driver power supply with ultra-low isolation capacitor for 650 V GaN-based half bridge is presented, featuring a PCB-embedded transformer substrate, achieving 85% efficiency, 1.6 pF isolation capacitor with 72 W/in3 power density. The effectiveness of the EMI reduction using the proposed power supply is demonstrated.
The design consideration to build a compact 650 V GaN switching cell is presented then to address the challenges in the PCB layout and the thermal management. With the switching cell, a compact 1 kW 400 Vdc three-phase inverter is built and can operate with 500 kHz switching frequency. With the inverter, the high switching frequency effects on the inverter efficiency, volume, EMI emission and filter design are assessed to demonstrate the tradeoff of the adoption of high switching frequency in the motor drive application. In order to reduce the inverter CM EMI emission above 10 MHz, an active gate driver for 650 V GaN HEMT is proposed to control the dv/dt during turn-on and turn-off independently. With the control strategy, the penalty from the switching loss can be reduced.
To build a high current power converter, paralleling devices is a normal approach. The dissertation comes up with the switching cell design using paralleled two and four 650 V GaN HEMTs with minimized and symmetric gate and power loop. The commutation between the paralleled HEMTs is analyzed, based on which the effects from the passive components on the gate oscillation are quantified. With the switching cell using paralleled GaN HEMTs, a 10 kW LLC resonant converter with the integrated litz-wire transformer is designed, achieving 97.9 % efficiency and 131 W/in3 power density. The design consideration to build the novel litz-wire transformer operated at 400 kHz switching frequency is also presented.
In all, this work focuses on providing effective solutions or guidelines to adopt the 650 V GaN HEMT in the high frequency, high power density, high efficiency power conversion and demonstrates the advance of the GaN HEMTs in the hard-switched and soft-switched power converters.Ph. D.
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Chu, Alex. "Evaluation and Design of a SiC-Based Bidirectional Isolated DC/DC Converter." Thesis, Virginia Tech, 2018. http://hdl.handle.net/10919/81994.
Full textAbstract:
Galvanic isolation between the grid and energy storage unit is typically required for bidirectional power distribution systems. Due to the recent advancement in wide-bandgap semiconductor devices, it has become feasible to achieve the galvanic isolation using bidirectional isolated DC/DC converters instead of line-frequency transformers.
A survey of the latest generation SiC MOSFET is performed. The devices were compared against each other based on their key parameters. It was determined that under the given specifications, the most suitable devices are X3M0016120K 1.2 kV 16 mohm and C3M0010090K 900 V 10 mohm SiC MOSFETs from Wolfspeed.
Two of the most commonly utilized bidirectional isolated DC/DC converter topologies, dual active bridge and CLLC resonant converter are introduced. The operating principle of these converter topologies are explained. A comparative analysis between the two converter topologies, focusing on total device loss, has been performed. It was found that the CLLC converter has lower total device loss compared to the dual active bridge converter under the given specifications. Loss analysis for the isolation transformer in the CLLC resonant converter was also performed at different switching frequencies. It was determined that the total converter loss was lowest at a switching frequency of 250 kHz
A prototype for the CLLC resonant converter switching at 250 kHz was then designed and built. Bidirectional power delivery for the converter was verified for power levels up to 25 kW. The converter waveforms and efficiency data were captured at different power levels. Under forward mode operation, a peak efficiency of 98.3% at 15 kW was recorded, along with a full load efficiency value of 98.1% at 25 kW. Under reverse mode operation, a peak efficiency of 98.8% was measured at 17.8 kW. The full load efficiency at 25 kW under reverse mode operation is 98.5%.Master of Science
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Jiao, Yang. "High Power High Frequency 3-level NPC Power Conversion System." Diss., Virginia Tech, 2015. http://hdl.handle.net/10919/56653.
Full textAbstract:
The high penetration of renewable energy and the emerging concept of micro-grid system raises challenges to the high power conversion techniques. Multilevel converter plays the key role in such applications and is studied in detail in the dissertation.
The topologies and modulation techniques for multilevel converter are categorized at first by a thorough literature survey. The pros and cons for various multilevel topologies and modulation techniques are discussed. The 3-level neutral point clamped (NPC) topology is selected to build a 200kVA, 20 kHz power conversion system.
The modularized phase leg building block of the converter is carefully designed to achieve low loss and stress for high frequency and high power operation. The switching characteristics for all the commutation loops of 3-level phase leg are evaluated by double pulse tests. The switching performance is optimized for loss and stress tradeoff. A detailed loss model is built for system loss distribution and loss breakdown calculation. Loss and stress for the phase leg and 3-phase system are quantified at all power factors.
The space vector modulation (SVM) for 3-level NPC converter is investigated to achieve loss reduction, neutral voltage balance and noise reduction. The loss model and simulation model provides a quantitative analysis for loss and neutral voltage ripple tradeoff. An improved SVM method is proposed to reduce NP imbalance and switching loss simultaneously. This method also ensures an evenly distributed device loss in each phase leg and gives a constant system efficiency under different power factors.
Based on the improved modulation strategy, a new modulation scheme is then proposed with largely reduced conduction loss and switching stress. Moreover, the device loss and stress distribution on a phase leg is more even. This scheme also features on the simplified implementation. The improved switching characteristics for the proposed method are verified by double pulse tests. Also the system loss breakdown and the phase leg loss distribution analysis shows the loss reduction and redistribution result.
The harmonic filter for the grid interface converter is designed with LCL topology. A detailed inductor current ripple analysis derives the maximum inductor current ripple and the ripple distribution in a line cycle. The inverter side inductor is designed with the optimum loss and size trade-off. The grid side inductor is designed based on grid code attenuation requirement. Different damping circuits for LCL filter are evaluated in detail. The filter design is verified by both simulation and hardware experiment.
The average model for the 3-level NPC converter and its equivalent circuit is derived with the consideration of damping circuit in both ABC and d-q frame. The modeling and control loop design is verified by transfer function measurement on real hardware. The control loops design is also tested and verified on real hardware.
The interleaved DC/DC chopper is introduced at last. The different interleaving methods and their current ripple are analyzed in detail with the coupled and non-coupled inductor. An integrated coupled inductor based on 3-dimentional core structure is proposed to achieve high power density and provide both CM and DM impedance for the inductor current and output current.Ph. D.
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Song, Yu Jin. "Analysis and design of high frequency link power conversion systems for fuel cell power conditioning." Diss., Texas A&M University, 2004. http://hdl.handle.net/1969.1/2678.
Full textAbstract:
In this dissertation, new high frequency link power conversion systems for the fuel cell power conditioning are proposed to improve the performance and optimize the cost, size, and weight of the power conversion systems. The first study proposes a new soft switching technique for the phase-shift controlled bi-directional dc-dc converter. The described dc-dc converter employs a low profile high frequency transformer and two active full-bridge converters for bidirectional power flow capability. The proposed new soft switching technique guarantees soft switching over wide range from no load to full load without any additional circuit components. The load range for proposed soft switching technique is analyzed by mathematical approach with equivalent circuits and verified by experiments. The second study describes a boost converter cascaded high frequency link direct dc-ac converter suitable for fuel cell power sources. A new multi-loop control for a boost converter to reduce the low frequency input current harmonics drawn from the fuel cell is proposed, and a new PWM technique for the cycloconverter at the secondary to reject the low order harmonics in the output voltages is presented. The performance of the proposed scheme is verified by the various simulations and experiments, and their trade-offs are described in detail using mathematical evaluation approach. The third study proposes a current-fed high frequency link direct dc-ac converter suitable for residential fuel cell power systems. The high frequency full-bridge inverter at the primary generates sinusoidally PWM modulated current pulses with zero current switching (ZCS), and the cycloconverter at the secondary which consists of only two bidirectional switches and output filter capacitors produces sinusoidally modulated 60Hz split single phase output voltage waveforms with near zero current switching. The active harmonic filter connected to the input terminal compensates the low order input current harmonics drawn from the fuel cell without long-term energy storage devices such as batteries and super capacitors.
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Hou, Dongbin. "Very High Frequency Integrated POL for CPUs." Diss., Virginia Tech, 2017. http://hdl.handle.net/10919/77608.
Full textAbstract:
Point-of-load (POL) converters are used extensively in IT products. Every piece of the integrated circuit (IC) is powered by a point-of-load (POL) converter, where the proximity of the power supply to the load is very critical in terms of transient performance and efficiency. A compact POL converter with high power density is desired because of current trends toward reducing the size and increasing functionalities of all forms of IT products and portable electronics. To improve the power density, a 3D integrated POL module has been successfully demonstrated at the Center for Power Electronic Systems (CPES) at Virginia Tech. While some challenges still need to be addressed, this research begins by improving the 3D integrated POL module with a reduced DCR for higher efficiency, the vertical module design for a smaller footprint occupation, and the hybrid core structure for non-linear inductance control.
Moreover, as an important category of the POL converter, the voltage regulator (VR) serves an important role in powering processors in today's electronics. The multi-core processors are widely used in almost all kinds of CPUs, ranging from the big servers in data centers to the small smartphones in almost everyone's pocket. When powering multiple processor cores, the energy consumption can be reduced dramatically if the supply voltage can be modulated rapidly based on the power demand of each core by dynamic voltage and frequency scaling (DVFS). However, traditional discrete voltage regulators (VRs) are not able to realize the full potential of DVFS since they are not able to modulate the supply voltage fast enough due to their relatively low switching frequency and the high parasitic interconnect impedance between the VRs and the processors. With these discrete VRs, DVFS has only been applied at a coarse timescale, which can scale voltage levels only in tens of microseconds (which is normally called a coarse-grained DVFS). In order to get the full benefit of DVFS, a concept of an integrated voltage regulator (IVR) is proposed to allow fine-grained DVFS to scale voltage levels in less than a microsecond. Significant interest from both academia and industry has been drawn to IVR research.
Recently, Intel has implemented two generations of very high frequency IVR. The first generation is implemented in Haswell processors, where air core inductors are integrated in the processor's packaging substrate and placed very closely to the processor die. The air core inductors have very limited ability in confining the high frequency magnetic flux noise generated by the very high switching frequency of 140MHz. In the second generation IVR in Broadwell processors, the inductors are moved away from the processor substrate to the 3DL PCB modules in the motherboard level under the die.
Besides computers, small portable electronics such as smartphones are another application that can be greatly helped by IVRs. The smartphone market size is now larger than 400 billion US dollars, and its power consumption is becoming higher and higher as the functionality of smartphones continuously advances. Today's multi-phase VR for smartphone processors is built with a power management integrated circuit (PMIC) with discrete inductors. Today's smartphone VRs operate at 2-8MHz, but the discrete inductor is still bulky, and the VR is not close enough to the processor to support fine-grained DVFS. If the IVR solution can be extended to the smartphone platform, not only can the battery life be greatly improved, but the total power consumption of the smartphone (and associated charging time and charging safety issues) can also be significantly reduced. Intel's IVR may be a viable solution for computing applications, but the air core inductor with un-confined high-frequency magnetic flux would cause very severe problems for smartphones, which have even less of a space budget. This work proposes a three-dimensional (3D) integrated voltage regulator (IVR) structure for smartphone platforms. The proposed 3D IVR will operate with a frequency of tens of MHz. Instead of using an air core, a high-frequency magnetic core without an air gap is applied to confine the very high frequency flux. The inductor is designed with an ultra-low profile and a small footprint to fit the stringent space requirement of smartphones.
A major challenge in the development of the very high frequency IVR inductor is to accurately characterize and compare magnetic materials in the tens of MHz frequency range. Despite the many existing works in this area, the reported measured properties of the magnetics are still very limited and indirect. In regards to permeability, although its value at different frequencies is often reported, its saturation property in real DC-biased working conditions still lacks investigation. In terms of loss property, the previous works usually show the equivalent resistance value only, which is usually measured with small-signal excitation from an impedance/network analyzer and is not able to represent the real magnetic core loss under large-signal excitation in working conditions. The lack of magnetic properties in real working conditions in previous works is due to the significant challenges in the magnetic characterization technique at very high frequencies, and it is a major obstacle to accurately designing and testing the IVR inductors. In this research, an advanced core loss measurement method is proposed for very high frequency (tens of MHz) magnetic characterization for the IVR inductor design. The issues of and solutions for the permeability and loss measurement are demonstrated. The LTCC and NEC flake materials are characterized and compared up to 40MHz for IVR application.
Based on the characterized material properties, both single-phase and multi-phase integrated inductor are designed, fabricated and experimentally tested in 20MHz buck converters, featuring a simple single-via winding structure, small size, ultra-low profile, ultra-low DCR, high current-handling ability, air-gap-free magnetics, multi-phase integration within one magnetic core, and lateral non-uniform flux distribution. It is found that the magnetic core operates at unusually high core loss density, while it is thermally manageable. The PCB copper can effectively dissipate inductor heat with 3D integration. In addition, new GaN device drivers and magnetic materials are evaluated and demonstrated with the ability to increase the IVR frequency to 30MHz and realize a higher density with a smaller loss.
In summary, this research starts with improving the 3D integrated POL module, and then explores the use of the 3D integration technique along with the very high frequency IVR concept to power the smartphone processor. The challenges in a very high frequency magnetic characterization are addressed with a novel core loss measurement method capable of 40MHz loss characterization. The very high frequency multi-phase inductor integrated within one magnetic component is designed and demonstrated for the first time. A 20MHz IVR platform is built and the feasibility of the concept is experimentally verified. Finally, new GaN device drivers and magnetic materials are evaluated and demonstrated with the ability to increase the IVR frequency to 30MHz and realize higher density with smaller loss.Ph. D.
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Gilham, David Joel. "Packaging of a High Power Density Point of Load Converter." Thesis, Virginia Tech, 2013. http://hdl.handle.net/10919/19325.
Full textAbstract:
Due to the power requirements for today\'s microprocessors, point of load converter packaging is becoming an important issue. Traditional thermal management techniques involved in removing heat from a printed circuit board are being tested as today\'s technologies require small footprint and volume from all electrical systems. While heat sinks are traditionally used to spread heat, ceramic substrates are gaining in popularity for their superior thermal qualities which can dissipate heat without the use of a heat sink. 3D integration techniques are needed to realize a solution that incorporates the active and components together. The objective of this research is to explore the packaging of a high current, high power density, high frequency DC/DC converter using ceramic substrates to create a low profile converter to meet the needs of current technologies.One issue with current converters is the large volume of the passive components. Increasing the switching frequency to the megahertz range is one way to reduce to volume of these components. The other way is to fundamentally change the way these inductors are designed. This work will explore the use of low temperature co-fired ceramic (LTCC) tapes in the magnetic design to allow a low profile planar inductor to be used as a substrate. LTCC tapes have excellent properties in the 1-10 MHz range that allow for a high permeability, low loss solution. These tapes are co-fired with a silver paste as the conductor. This paper looks at ways to reduce dc resistance in the inductor design through packaging methods which in turn allow for higher current operation and better heavy load efficiency. Fundamental limits for LTCC technologies are pushed past their limits during this work. This work also explores fabrication of LTCC inductors using two theoretical ideas: vertical flux and lateral flux. Issues are presented and methods are conceived for both types of designs. The lateral flux inductor gives much better inductance density which results in a much thinner design.
It is found that the active devices must be shielded from the magnetic substrate interference so active layer designs are discussed. Alumina and Aluminum Nitride substrates are used to form a complete 3D integration scheme that gives excellent thermal management even in natural convection. This work discusses the use of a stacked power technique which embeds the devices in the substrate to give double sided cooling capabilities. This fabrication goes away from traditional photoresist and solder-masking techniques and simplifies the entire process so that it can be transferred to industry. Time consuming sputtering and electroplating processes are removed and replaced by a direct bonded copper substrate which can have up to 8 mil thick copper layers allowing for even greater thermal capability in the substrate. The result is small footprint and volume with a power density 3X greater than any commercial product with comparable output currents. A two phase coupled inductor version using stacked power is also presented to achieve even higher power density.
As better device technologies come to the marketplace, higher power density designs can be achieved. This paper will introduce a 3D integration design that includes the use of Gallium Nitride devices. Gallium Nitride is rapidly becoming the popular device for high frequency designs due to its high electron mobility properties compared to silicon. This allows for lower switching losses and thus better thermal characteristics at high frequency. The knowledge learned from the stacked power processes gives insight into creating a small footprint, high current ceramic substrate design. A 3D integrated design is presented using GaN devices along with a lateral flux inductor. Shielded and Non-Shielded power loop designs are compared to show the effect on overall converter efficiency. Thermal designs and comparisons to PCB are made using thermal imaging. The result is a footprint reduction of 40% from previous designs and power densities reaching close to 900W/in3.
Master of Science
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Li, Bin. "High Frequency Bi-directional DC/DC Converter with Integrated Magnetics for Battery Charger Application." Diss., Virginia Tech, 2018. http://hdl.handle.net/10919/97874.
Full textAbstract:
Due to the concerns regarding increasing fuel cost and air pollution, plug-in electric vehicles (PEVs) are drawing more and more attention. PEVs have a rechargeable battery that can be restored to full charge by plugging to an external electrical source. However, the commercialization of the PEV is impeded by the demands of a lightweight, compact, yet efficient on-board charger system. Since the state-of-the-art Level 2 on-board charger products are largely silicon (Si)-based, they operate at less than 100 kHz switching frequency, resulting in a low power density at 3-12 W/in3, as well as an efficiency no more than 92 - 94%
Advanced power semiconductor devices have consistently proven to be a major force in pushing the progressive development of power conversion technology. The emerging wide bandgap (WBG) material based power semiconductor devices are considered as game changing devices which can exceed the limit of Si and be used to pursue groundbreaking high frequency, high efficiency, and high power density power conversion.
Using wide bandgap devices, a novel two-stage on-board charger system architecture is proposed at first. The first stage, employing an interleaved bridgeless totem-pole AC/DC in critical conduction mode (CRM) to realize zero voltage switching (ZVS), is operated at over 300 kHz. A bi-directional CLLC resonant converter operating at 500 kHz is chosen for the second stage. Instead of using the conventional fixed 400 V DC-link voltage, a variable DC-link voltage concept is proposed to improve the efficiency within the entire battery voltage range. 1.2 kV SiC devices are adopted for the AC/DC stage and the primary side of DC/DC stage while 650 V GaN devices are used for the secondary side of the DC/DC stage. In addition, a two-stage combined control strategy is adopted to eliminate the double line frequency ripple generated by the AC/DC stage.
The much higher operating frequency of wide bandgap devices also provides us the opportunity to use PCB winding based magnetics due to the reduced voltage-second. Compared with conventional litz-wire based transformer. The manufacture process is greatly simplified and the parasitic is much easier to control. In addition, the resonant inductors are integrated into the PCB transformer so that the total number of magnetic components is reduced. A transformer loss model based on finite element analysis is built and used to optimize the transformer loss and volume to get the best performance under high frequency operation.
Due to the larger inter-winding capacitor of PCB winding transformer, common mode noise becomes a severe issue. A symmetrical resonant converter structure as well as a symmetrical transformer structure is proposed. By utilizing the two transformer cells, the common mode current is cancelled within the transformers and the total system common mode noise can be suppressed.
In order to charge the battery faster, the single-phase on-board charger concept is extended to a higher power level. By using the three-phase interleaved CLLC resonant converter, the charging power is pushed to 12.5 kW. In addition, the integrated PCB winding transformer in single phase is also extended to the three phase. Due to the interleaving between each phase, further integration is achieved and the transformer size is further reduced.PHD
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Xiong, Yali. "MODELING AND ANALYSIS OF POWER MOSFETS FOR HIGH FREQUENCY DC-DC CONVERTERS." Doctoral diss., University of Central Florida, 2008. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/3589.
Full textAbstract:
Evolutions in integrated circuit technology require the use of a high-frequency synchronous buck converter in order to achieve low cost, low profile, fast transient response and high power density. However, high frequency operation leads to increased power MOSFET switching losses. Optimization of the MOSFETs plays an important role in improving converter performance. This dissertation focuses on revealing the power loss mechanism of power MOSFETs and the relationship between power MOSFET structure and its power loss. The analytical device model, combined with circuit modeling, cannot reveal the relationship between device structure and its power loss due to the highly non-linear characteristics of power MOSFETs. A physically-based mixed device/circuit modeling approach is used to investigate the power losses of the MOSFETs under different operating conditions. The physically based device model, combined with SPICE-like circuit simulation, provides an expeditious and inexpensive way of evaluating and optimizing circuit and device concepts. Unlike analytical or other SPICE models of power MOSFETs, the numerical device model, relying little on approximations or simplifications, faithfully represents the behavior of realistic power MOSFETs. The impact of power MOSFET parameters on efficiency of synchronous buck converters, such as gate charge, on resistance, reverse recovery, is studied in detail in this thesis. The results provide a good indication on how to optimize power MOSFETs used in VRMs. The synchronous rectifier plays an important role in determining the performance of the synchronous buck converter. The reverse recovery of its body diode and the Cdv/dt induced false trigger-on are two major mechanisms that impact SyncFET's performance. This thesis gives a detailed analysis of the SyncFET operation mechanism and provides several techniques to reduce its body-diode influence and suppress its false Cdv/dt trigger-n. This thesis also investigates the influence of several circuit level parameters on the efficiency of the synchronous buck converter, such as input voltage, circuit parasitic inductance, and gate resistance to provide further optimization of synchronous buck converter design.Ph.D.
School of Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering PhD
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Anton, Gagner, and Nino Hebib. "FPGA Software Development for Control Purposes of High-Frequency Switching Power Converters." Thesis, Linköpings universitet, Fysik och elektroteknik, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-133213.
Full textAbstract:
FPGA stands for Field Programmable Gate Array and it is a technology that has been on the rise the last decades. With a decrease in size of the logic elements commercially available products have started to have more built-in functionality in one package and by being reprogrammable makes the system a powerful competitor among its neighbors. FPGA technology in comparison with Digital Signal Processing technology is generally interesting because of the parallelism of the programming that can be made. This allows for more operations in less time. In this thesis a system is developed to control power converters with control signals in high frequency. A previous project is used as a base and a toolchain of new components are implemented to create a new, more generic system. The previous system is evaluated and a new protocol for communication is developed. The toolchain with the necessary control blocks is implemented in Quartus II that includes a timer block, a pulse width modulation block, a PID controller block and a FIR-filter block. The system is used to control a power converter and the result is evaluated.
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Fei, Chao. "Microcontroller (MCU) Based Simplified Optimal Trajectory Control (SOTC) for High-Frequency LLC Resonant Converters." Thesis, Virginia Tech, 2015. http://hdl.handle.net/10919/78117.
Full textAbstract:
The LLC resonant converter has been widely used as a DC-DC converter due to its high efficiency, high power density and hold-up capability in power supplies for communication systems, computers and consumer electronics. Use of the high-frequency LLC converter has also been increasing in recent years due to its high power density and integrated magnetics, which reduce the total cost. With the fast development of wideband gap devices and novel magnetic materials, the trend of pushing switching frequency higher continues.
However, the control characteristics of the LLC resonant converter are much more complex than that of the PWM converter due to the dynamics of the resonant tank. This paper employs state-trajectory analysis to describe and analyze the behavior of the resonant tank. Control methods based on state-trajectory analysis were used to solve the challenges in the control of the LLC resonant converter, including unpredictable dynamics, burst mode for light-load efficiency, soft start-up and short circuit protection.
Additionally, digital controllers are gradually taking the place of analog controllers in the control of the LLC resonant converter due to the advantages of the digital controllers over the analog controllers, such as their ability to be flexible and re-configurable, capable of non-linear control, and able to communicate with other controllers. Among the digital controllers, cost-effective microcontrollers (MCU) are preferred for industrial applications. Because of the advantages of the state-trajectory control and the industrial preference in the cost-effective digital controllers, it would be of great benefit to apply state-trajectory control to high-frequency LLC converters with cost-effective digital controllers.
This thesis investigates the impact of digital delay on state-trajectory control. Simplified Optimal Trajectory Control (SOTC) for LLC converters is further simplified so that SOTC can be achieved with cost-effective digital controllers. Furthermore, the limitations caused by digital controller are explained in detail, and methods are proposed to apply the SOTC to high frequency LLC converter is proposed. A detailed analysis of fast load transient response, soft start-up, burst mode for light-load efficiency and synchronous rectification (SR) driving is provided.
Multi-step SOTC for fast load transient response is proposed to apply cost-effective digital controllers to high-frequency LLC converters; SOTC for soft start-up with only sensing Vo is proposed to minimized the impact of digital delay on state-trajectory control; SOTC for burst mode with multi-step is proposed to eliminate the limitation of minimum off-time caused by digital controllers in constant burst-on time control; a generalized adaptive SR driving method using the ripple counter concept is proposed to significantly reduce controller resource utilization for the SR control of high-frequency LLC converters.
The whole control system is demonstrated on a 500kHz 1kW 400V/12V LLC converter with a 60MHz MCU, which integrates all the proposed control methods.Master of Science
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Sheng, Honggang. "A High Power Density Three-level Parallel Resonant Converter for Capacitor Charging." Diss., Virginia Tech, 2009. http://hdl.handle.net/10919/37667.
Full textAbstract:
This dissertation proposes a high-power, high-frequency and high-density three-level parallel resonant converter for capacitor charging. DC-DC pulsed power converters are widely used in military and medical systems, where the power density requirement is often stringent. The primary means for reducing the power converter size has been to reduce loss for reduced cooling systems and to increase the frequency for reduced passive components. Three-level resonant converters, which combine the merits of the three-level structure and resonant converters, are an attractive topology for these applications. The three-level configuration allows for the use of lower-voltage-rating and faster devices, while the resonant converter reduces switching loss and enhances switching capability.
This dissertation begins with an analysis of the influence of variations in the structure of the resonant tank on the transformer volume, with the aim of achieving a high power density three-level DC-DC converter. As one of the most bulky and expensive components in the power converter, the different positions of the transformer within the resonant tank cause significant differences in the transformerâ s volume and the voltage and current stress on the resonant elements. While it does not change the resonant converter design or performance, the improper selection of the resonant tank structure in regard to the transformer will offset the benefits gained by increasing the switching frequency, sometimes even making the power density even worse than the power density when using a low switching frequency. A methodology based on different structural variations is proposed for a high-density design, as well as an optimized charging profile for transformer volume reduction.
The optimal charging profile cannot be perfectly achieved by a traditional output-voltage based variable switching frequency control, which either needs excess margin to guarantee ZVS, or delivers maximum power with the danger of losing ZVS. Moreover, it cannot work for widely varied input voltages. The PLL is introduced to overcome these issues. With PLL charging control, the power can be improved by 10% with a narrow frequency range.
The three-level structure in particular suffers unbalanced voltage stress in some abnormal conditions, and a fault could easily destroy the system due to minimized margin. Based on thoroughly analysis on the three-level behaviors for unbalanced voltage stress phenomena and fault conditions, a novel protection scheme based on monitoring the flying capacitor voltage is proposed for the three-level structure, as well as solutions to some abnormal conditions for unbalanced voltage stresses. A protection circuit is designed to achieve the protection scheme.
A final prototype, built with a custom-packed MOSFET module, a SiC Schottky diode, a nanocrystalline core transformer with an integrated resonant inductor, and a custom-designed oil-cooled mica capacitor, achieves a breakthrough power density of 140W/in3 far beyond the highest-end power density reported (<100 W/in3) in power converter applications.Ph. D.
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Wen, Hao. "High-Efficiency and High-Frequency Resonant Converter Based Single-Stage Soft-Switching Isolated Inverter Design and Optimization with Gallium-Nitride (GaN)." Diss., Virginia Tech, 2021. http://hdl.handle.net/10919/105134.
Full textAbstract:
Isolated inverter can provide galvanic isolation which is necessary for some applications with safety regulations. Traditionally, a two-stage configuration is widely applied with isolated dc-dc stage and a sinusoidal pulse-width-modulated (SPWM) dc-ac stage. However, this two-stage configuration suffers from more components count, more complex control and tend to have lower efficiency and lower power density. Meanwhile, a large dc bus capacitor is needed to attenuate the double line frequency from SPWM for two-stage configuration. Therefore, the single-stage approach including an isolated dc-rectified sine stage and a line frequency unfolder is preferable. Since the unfolder circuit is at line frequency being almost lossless, the isolated dc-rectified sine stage becomes critical.
However, the relevant research for the single-stage isolated inverter is limited. People either utilize PWM based converter as dc-rectified sine stage with duty cycle adjustment or apply SRC or LLC resonant converter for better soft switching characteristics. For PWM based converter, hard switching restricts the overall inverter efficiency, while for SRC/LLC, enough wide voltage gain range and full range ZVS are the major issues.
This dissertation aims to provide solutions for a high-efficiency, high-frequency resonant converter based single-stage soft-switching isolated inverter design. The LLC and LCLCL resonant converters are applied as the isolated dc-rectified sine stage with variable frequency modulation (VFM). Therefore, the rectified sine wave generation consists of many dc-dc conversion with different switching frequencies and an efficient dc-rectified sine stage design needs each dc-dc conversion to be with high efficiency.
This dissertation will first propose the optimization methods for LLC converter dc-dc conversion. ZVS models are derived to ensure fully ZVS performance for primary side GaN devices. As a large part in loss breakdown, the optimization for transformer is essential. The LLC converter can achieve above 99% efficiency with proposed optimization approach. Moreover, the channel turn-off energy model is presented for a more accurate loss analysis.
With all the design and optimization considerations, a MHz LLC converter based isolated inverter is designed and a hybrid modulation method is proposed, which includes full bridge (FB) VFM for output high line region and half bridge (HB) VFM for output low line region. By changing from FB to HB, the output voltage gain is reduced to half to have a wider voltage gain range. However, the total harmonic distortion (THD) of output voltage at light load will be impacted since the voltage gain will be higher with lighter load at the maximum switching frequency.
A MHz LCLCL converter based isolated inverter is proposed for a better output voltage THD at light load conditions. The paralleled LC inside the LCLCL resonant tank can naturally create a zero voltage gain point at their resonant frequency, which shows superior performance for rectified sine wave generation. Besides the better THD performance, the LCLCL converter based isolated inverter also features for easier control, better ZVS performance and narrower switching frequency range.
Meanwhile, the LCLCL based inverter topology has bi-directional power flow capability as well. With variable frequency modulation for ac-dc, this topology is still a single-stage solution compared to the traditional two-stage solution including PFC + LLC configuration.Doctor of Philosophy
Inverters can convert dc voltage to ac voltage and typically people use two-stage approach with isolated dc-dc stage and dc-ac stage. However, this two-stage configuration suffers from more components count, more complex control and tend to have lower efficiency and lower power density. Therefore, the single-stage solution with dc-rectified sine wave stage and a line frequency unfolder becomes appealing. The unfolder circuit is to unfold the rectifier sine wave to an ac sine wave at the output. Since the unfolder is at line frequency and can be considered lossless, the key design is for the dc-rectified sine stage. The resonant converter featured for soft switching seems to be a good candidate. However, the inverter needs soft switching for the whole range and an enough wide voltage gain, which makes the design difficult, especially the target is high efficiency for the overall inverter. This dissertation aims to provide solutions for a high-efficiency, high-frequency resonant converter based single-stage soft-switching isolated inverter design. The LLC and LCLCL resonant converters are applied as the isolated dc-rectified sine stage with variable frequency modulation (VFM). Therefore, the rectified sine wave generation consists of many dc-dc conversion with different switching frequencies and an efficient dc-rectified sine stage design needs each dc-dc conversion to be with high efficiency. The design considerations and optimization methods for the LLC dc-dc conversion are firstly investigated. Based on these approaches, a MHz LLC converter based isolated inverter is designed with proposed hybrid modulation method. To further improve the light load performance, a MHz LCLCL converter based isolated inverter topology is proposed. The paralleled LC inside the LCLCL resonant tank can naturally create a zero voltage gain point which shows superior characteristics for rectified sine wave generation. Moreover, the LCLCL resonant converter based topology has bi-directional capability as well so it can work well for ac voltage to dc voltage conversion.
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Yan, Ning. "High-frequency Current-transformer Based Auxiliary Power Supply for SiC-based Medium Voltage Converter Systems." Thesis, Virginia Tech, 2020. http://hdl.handle.net/10919/101507.
Full textAbstract:
Auxiliary power supply (APS) plays a key role in ensuring the safe operation of the main circuit elements including gate drivers, sensors, controllers, etc. in medium voltage (MV) silicon carbide (SiC)-based converter systems. Such a converter requires APS to have high insulation capability, low common-mode coupling capacitance (Ccm ), and high-power density. Furthermore, considering the lifetime and simplicity of the auxiliary power supply system design in the MV converter, partial discharge (PD) free and multi-load driving ability are the additional two factors that need to be addressed in the design. However, today’s state-of-the-art products have either low power rating or bulky designs, which does not satisfy the demands. To improve the current designs, this thesis presents a 1 MHz isolated APS design using gallium nitride (GaN) devices with MV insulation reinforcement.
By adopting LCCL-LC resonant topology, the proposed APS is able to supply multiple loads simultaneously and realize zero voltage switching (ZVS) at any load conditions. Since high reliability under faulty load conditions is also an important feature for APS in MV converter, the secondary side circuit of APS is designed as a regulated stage. To achieve MV insulation (> 20 kV) as well as low Ccm value (< 5 pF), a current-based transformer with a single turn structure using MV insulation wire is designed. Furthermore, by introducing different insulated materials and shielding structures, the APS is capable to achieve different partial discharge inception voltages (PDIV). In this thesis, the transformer design, resonant converter design, and insulation strategies will be detailly explained and verified by experiment results.
Overall, this proposed APS is capable to supply multiple loads simultaneously with a maximum power of 120 W for the sending side and 20 W for each receiving side in a compact form factor. ZVS can be realized regardless of load conditions. Based on different insulation materials, two different receiving sides were built. Both of them can achieve a breakdown voltage of over 20 kV. The air-insulated solution can achieve a PDIV of 6 kV with Ccm of 1.2 pF. The silicone-insulated solution can achieve a PDIV of 17 kV with Ccm of 3.9 pF.M.S.
Recently, 10 kV silicon carbide (SiC) MOSFET receives strong attention for medium voltage applications. Asit can switch at very high speed, e.g. > 50 V/ns, the converter system can operate at higher switching frequency condition with very small switching losses compared to silicon (Si) IGBT [8]. However, the fast dv/dt noise also creates the common mode current via coupling capacitors distributed inside the converter system, thereby introducing lots of electromagnetic interference (EMI) issues. Such issues typically occur within the gate driver power supplies due to the high dv/dt noises across the input and output of the supply. Therefore, the ultra-small coupling capacitor (<5 pF) of a gate driver power supply is strongly desired.[37] To satisfy the APS demands for high power modular converter system, a solution is proposed in this thesis. This work investigates the design of 1 MHz isolated APS using gallium nitride (GaN) devices with medium voltage insulation reinforcement. By increasing switching frequency, the overall converter size could be reduced dramatically. To achieve a low Ccm value and medium voltage insulation of the system, a current-based transformer with a single turn on the sending side is designed. By adopting LCCL-LC resonant topology, a current source is formed as the output of sending side circuity, so it can drive multiple loads importantly with a maximum of 120 W. At the same time, ZVS can use realized with different load conditions. The receiving side is a regulated stage, so the output voltage can be easily adjusted and it can operate in a load fault condition. Different insulation solutions will be introduced and their effect on Ccm will be discussed. To further reduce Ccm, shielding will be introduced. Overall, this proposed APS can achieve a breakdown voltage of over 20 kV and PDIV up to 16.6 kV with Ccm<5 pF. Besides, multi-load driving ability is able to achieve with a maximum of 120 W. ZVS can be realized. In the end, the experiment results will be provided.
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Sinyan, Ensa. "Modeling of Resonances in a Converter Module including Characterization of IGBT Parasitics." Thesis, KTH, Elektrisk energiomvandling, 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-133354.
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Fast switching operations in IGBTs generate electromagnetic field disturbances, which might cause EMI and functionality issues. For higher frequency characterization, the parasitic inductances and capacitances have to be considered. The characterization of the electromagnetic field disturbances in- and around the converter module could be predicted early in the design. The study involves a high frequency characterization of electric fields (Efield), magnetic fields (H-fields) and the surface currents distribution in a converter module. The high frequency electromagnetic software (CST) was used for the analysis. A given 3D CAD model of an AC/DC converter module was analyzed in CST. The CAD contained IGBT bus-bars interconnections, converter casing, heat sink and other metallic structures. The ACside has six IGBTs and the DC-side has a chopper which has two switches. The IGBTs ONstate and OFF state was modeled with lumped elements. The DC link capacitor was just modeled as lumped elements, while the metallic capacitor casing was included in the 3D model for analyzing the field distribution inside the converter casing. To check the model accuracy, CST models were compared with PEEC (Partial Element Equivalent Circuit) models for simple antenna cases. Using the converter geometry, CST estimates the parasitics and the eventual current, voltage and electromagnetic field distributions for a given excitation signal. The DC-link was excited with a step pulse and the fields were computed. With consideration of specific design details, the modeling approach developed in this study, could be used to construct high frequency models of converter modules for different projects.
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Iuravin, Egor. "Transformer Design For Dual Active Bridge Converter." Miami University / OhioLINK, 2018. http://rave.ohiolink.edu/etdc/view?acc_num=miami1532601248778308.
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Danekar, Abhishek V. "Analysis and Design of High-Frequency Soft-Switching DC-DC Converter for Wireless Power Charging Applications." Wright State University / OhioLINK, 2017. http://rave.ohiolink.edu/etdc/view?acc_num=wright1493990400812363.
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Sun, Keyao. "Protection, Control, and Auxiliary Power of Medium-Voltage High-Frequency SiC Devices." Diss., Virginia Tech, 2021. http://hdl.handle.net/10919/103743.
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Due to the superior characteristics compared to its silicon (Si) counterpart, the wide bandgap (WBG) semiconductor enables next-generation power electronics systems with higher efficiency and higher power density. With higher blocking voltage available, WBG devices, especially the silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET), have been widely explored in various medium-voltage (MV) applications in both industry and academia. However, due to the high di/dt and high dv/dt during the switching transient, potential overcurrent, overvoltage, and gate failure can greatly reduce the reliability of implementing SiC MOSFETs in an MV system.
By utilizing the parasitic inductance between the Kelvin- and the power-source terminal, a short-circuit (SC) and overload (OL) dual-protection scheme is proposed for overcurrent protection. A full design procedure and reliability analysis are given for SC circuit design. A novel OL circuit is proposed to protect OL faults at the gate-driver level. The protection procedure can detect an SC fault within 50 nanoseconds and protect the device within 1.1 microsecond. The proposed method is a simple and effective solution for the potential overcurrent problem of the SiC MOSFET.
For SiC MOSFETs in series-connection, the unbalanced voltages can result in system failure due to device breakdown or unbalanced thermal stresses. By injecting current during the turn-off transient, an active dv/dt control method is used for voltage balancing. A 6 kV phase-leg using eight 1.7 kV SiC MOSFETs in series-connection has been tested with voltage balanced accurately. Modeling of the stacked SiC MOSFET with active dv/dt control is also done to summarize the design methodology for an effective and stable system. This method provides a low-loss and compact solution for overvoltage problems when MV SiC MOSFETs are connected in series.
Furthermore, a scalable auxiliary power network is proposed to prevent gate failure caused by unstable gate voltage or EMI interference. The two-stage auxiliary power network (APN) architecture includes a wireless power transfer (WPT) converter supplied by a grounded low voltage dc bus, a high step-down-ratio (HSD) converter powered from dc-link capacitors, and a battery-based mini-UPS backup power supply. The auxiliary-power-only pre-charge and discharge circuits are also designed for a 6 kV power electronics building block (PEBB). The proposed architecture provides a general solution of a scalable and reliable auxiliary power network for the SiC-MOSFET-based MV converter.
For the WPT converter, a multi-objective optimization on efficiency, EMI mitigation, and high voltage insulation capability have been proposed. Specifically, a series-series-CL topology is proposed for the WPT converter. With the optimization and new topology, a 120 W, 48 V to 48 V WPT converter has been tested to be a reliable part of the auxiliary power network.
For the HSD converter, a novel unidirectional voltage-balancing circuit is proposed and connected in an interleaved manner, which provides a fully modular and scalable solution. A ``linear regulator + buck" solution is proposed to be an integrated on-board auxiliary power supply. A 6 kV to 45 V, 100 W converter prototype is built and tested to be another critical part of the auxiliary power network.Doctor of Philosophy
The wide bandgap semiconductor enables next-generation power electronics systems with higher efficiency and higher power density which will reduce the space, weight, and cost for power supply and conversion systems, especially for renewable energy. However, by pushing the system voltage level higher to medium-voltage of tens of kilovolts, although the system has higher efficiency and simpler control, the reliability drops. This dissertation, therefore, focusing on solving the possible overcurrent, overvoltage, and gate failure issues of the power electronics system that is caused by the high voltage and high electromagnetic interference environment. By utilizing the inductance of the device, a dual-protection method is proposed to prevent the overcurrent problem. The overcurrent fault can be detected within tens of nanoseconds so that the device will not be destroyed because of the huge fault current. When multiple devices are connected in series to hold higher voltage, the voltage sharing between different devices becomes another issue. The proposed modeling and control method for series-connected devices can balance the shared voltage, and make the control system stable so that no overvoltage problem will happen due to the non-evenly distributed voltages. Besides the possible overcurrent and overvoltage problems, losing control of the devices due to the unreliable auxiliary power supply is another issue. This dissertation proposed a scalable auxiliary power network with high efficiency, high immunity to electromagnetic interference, and high reliability. In this network, a wireless power transfer converter is designed to provide enough insulation and isolation capability, while a switched capacitor converter is designed to transfer voltage from several kilovolts to tens of volts. With the proposed overcurrent protection method, voltage sharing control, and reliable auxiliary power network, systems utilizing medium-voltage wide-bandgap semiconductor will have higher reliability to be implemented for different applications.
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Zhao, Shishuo. "High Frequency Isolated Power Conversion from Medium Voltage AC to Low Voltage DC." Thesis, Virginia Tech, 2017. http://hdl.handle.net/10919/74969.
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Modern data center power architecture developing trend is analyzed, efficiency improvement method is also discussed. Literature survey of high frequency isolated power conversion system which is also called solid state transformer is given including application, topology, device and magnetic transformer. Then developing trend of this research area is clearly shown following by research target.
State of art wide band gap device including silicon carbide (SiC) and gallium nitride (GaN) devices are characterized and compared, final selection is made based on comparison result. Mostly used high frequency high power DC/DC converter topology dual active bridge (DAB) is introduced and compared with novel CLLC resonant converter in terms of switching loss and conduction loss point of view. CLLC holds ZVS capability over all load range and smaller turn off current value. This is beneficial for high frequency operation and taken as our candidate. Device loss breakdown of CLLC converter is also given in the end.
Medium voltage high frequency transformer is the key element in terms of insulation safety, power density and efficiency. Firstly, two mostly used transformer structures are compared. Then transformer insulation requirement is referred for 4160 V application according to IEEE standard. Solid insulation material are also compared and selected. Material thickness and insulation distance are also determined. Insulation capability is preliminary verified in FEA electric field simulation. Thirdly two transformer magnetic loss model are introduced including core loss model and litz wire winding loss model. Transformer turn number is determined based on core loss and winding loss trade-off. Different core loss density and working frequency impact is carefully analyzed. Different materials show their best performance among different frequency range. Transformer prototype is developed following designed parameter. We test the developed 15 kW 500 kHz transformer under 4160 V dry type transformer IEEE Std. C57.12.01 standard, including basic lightning test, applied voltage test, partial discharge test.
500 kHz 15 kW CLLC converter gate drive is our design challenge in terms of symmetry propagation delay, cross talk phenomenon elimination and shoot through protection. Gate drive IC is carefully selected to achieve symmetrical propagation delay and high common mode dv/dt immunity. Zero turn off resistor is achieved with minimized gate loop inductance to prevent cross talk phenomenon. Desaturation protection is also employed to provide shoot through protection. Finally 15 kW 500 kHz CLLC resonant converter is developed based on 4160V 500 kHz transformer and tested up to full power level with 98% peak efficiency.Master of Science
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Yang, Liyu. "Modeling and Characterization of a PFC Converter in the Medium and High Frequency Ranges for Predicting the Conducted EMI." Thesis, Virginia Tech, 2003. http://hdl.handle.net/10919/35226.
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This thesis presents the conducted electro-magnetic interference (EMI) prediction results for a continuous conduction mode (CCM) power factor correction (PFC) converter as well as the theoretical analysis for the noise generation and propagation mechanisms.
In this thesis, multiple modeling and characterization techniques in the medium and high frequency ranges are developed for the circuit components that are important contributors to the EMI noise, so that a detailed simulation circuit for EMI prediction can be constructed.
The conducted EMI noise prediction from the simulation circuit closely matches the measurement results obtained by a spectrum analyzer. Simulation time step and noise separator selection are two important issues for the noise simulation and measurement. These two issues are addressed and the solutions are proposed.
The conducted EMI generation and propagation mechanisms are analyzed in a systematic way. Two loop models are proposed to explain the EMI noise behavior. The effects of the PFC inductor, the parasitic capacitance between the device and the heatsink, the rising/falling time of the MOSFET VDS voltage, and the input wires are studied to verify the validity of the loop models.Master of Science