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Journal articles on the topic 'Hardware Security'

Author: Grafiati
Published: 4 June 2021
Last updated: 25 May 2024

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1

Polian, Ilia. "Hardware-oriented security." it - Information Technology 61, no. 1 (February 25, 2019): 1–2. http://dx.doi.org/10.1515/itit-2019-0008.

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2

Hunter, Philip. "Hardware-based security." Computer Fraud & Security 2004, no. 2 (February 2004): 11–12. http://dx.doi.org/10.1016/s1361-3723(04)00029-6.

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3

Sengupta, Anirban. "Hardware Security of CE Devices [Hardware Matters]." IEEE Consumer Electronics Magazine 6, no. 1 (January 2017): 130–33. http://dx.doi.org/10.1109/mce.2016.2614552.

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4

Jin, Yier. "Introduction to Hardware Security." Electronics 4, no. 4 (October 13, 2015): 763–84. http://dx.doi.org/10.3390/electronics4040763.

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5

Koushanfar, Farinaz, and Miodrag Potkonjak. "What is hardware security?" ACM SIGDA Newsletter 40, no. 9 (September 2010): 1. http://dx.doi.org/10.1145/1866978.1866979.

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6

Fox, Dirk. "Hardware Security Module (HSM)." Datenschutz und Datensicherheit - DuD 33, no. 9 (September 2009): 564. http://dx.doi.org/10.1007/s11623-009-0145-9.

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7

Guin, Ujjwal, Navid Asadizanjani, and Mark Tehranipoor. "Standards for Hardware Security." GetMobile: Mobile Computing and Communications 23, no. 1 (July 24, 2019): 5–9. http://dx.doi.org/10.1145/3351422.3351424.

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8

Sidhu, Simranjeet, Bassam J. Mohd, and Thaier Hayajneh. "Hardware Security in IoT Devices with Emphasis on Hardware Trojans." Journal of Sensor and Actuator Networks 8, no. 3 (August 10, 2019): 42. http://dx.doi.org/10.3390/jsan8030042.

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Security of IoT devices is getting a lot of attention from researchers as they are becoming prevalent everywhere. However, implementation of hardware security in these devices has been overlooked, and many researches have mainly focused on software, network, and cloud security. A deeper understanding of hardware Trojans (HTs) and protection against them is of utmost importance right now as they are the prime threat to the hardware. This paper emphasizes the need for a secure hardware-level foundation for security of these devices, as depending on software security alone is not adequate enough. These devices must be protected against sophisticated attacks, especially if the groundwork for the attacks is already laid in devices during design or manufacturing process, such as with HTs. This paper will discuss the stealthy nature of these HT, highlight HT taxonomy and insertion methods, and provide countermeasures.
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9

Adlkofer, Hans. "Safety and Security Need Hardware." ATZelectronics worldwide 16, no. 10 (October 2021): 66. http://dx.doi.org/10.1007/s38314-021-0699-3.

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10

D.S, Suresh, and V. Udayashankara. "External Hardware Security for Steganography." i-manager's Journal on Future Engineering and Technology 2, no. 2 (January 15, 2007): 17–22. http://dx.doi.org/10.26634/jfet.2.2.874.

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11

Kitsos, P., N. Sklavos, K. Papadomanolakis, and O. Koufopavlou. "Hardware implementation of bluetooth security." IEEE Pervasive Computing 2, no. 1 (January 2003): 21–29. http://dx.doi.org/10.1109/mprv.2003.1186722.

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12

Labrado, Carson, and Himanshu Thapliyal. "Hardware Security Primitives for Vehicles." IEEE Consumer Electronics Magazine 8, no. 6 (November 1, 2019): 99–103. http://dx.doi.org/10.1109/mce.2019.2941392.

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13

Perez, Ronald, Leendert van Doorn, and Reiner Sailer. "Virtualization and Hardware-Based Security." IEEE Security & Privacy Magazine 6, no. 5 (September 2008): 24–31. http://dx.doi.org/10.1109/msp.2008.135.

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14

Pang, Yachuan, Bin Gao, Bohan Lin, He Qian, and Huaqiang Wu. "Memristors for Hardware Security Applications." Advanced Electronic Materials 5, no. 9 (April 24, 2019): 1800872. http://dx.doi.org/10.1002/aelm.201800872.

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15

Edwards, Chris. "Automation Key to Hardware Security." New Electronics 55, no. 10 (October 2022): 28–29. http://dx.doi.org/10.12968/s0047-9624(23)60439-0.

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16

Zhang, Zhiming, and Qiaoyan Yu. "Towards Energy-Efficient and Secure Computing Systems." Journal of Low Power Electronics and Applications 8, no. 4 (November 27, 2018): 48. http://dx.doi.org/10.3390/jlpea8040048.

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Countermeasures against diverse security threats typically incur noticeable hardware cost and power overhead, which may become the obstacle for those countermeasures to be applicable in energy-efficient computing systems. This work presents a summary of energy-efficiency techniques that have been applied in security primitives or mechanisms to ensure computing systems’ resilience against various security threats on hardware. This work also uses examples to discuss practical methods for securing the hardware for computing systems to achieve energy efficiency.
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17

Souren, Joseph. "Security by design: hardware-based security in Windows 8." Computer Fraud & Security 2013, no. 5 (May 2013): 18–20. http://dx.doi.org/10.1016/s1361-3723(13)70046-0.

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18

IKEDA, Makoto. "Secure LSI Design: Solutions to Hardware Security and Hardware Vulnerability." IEICE ESS Fundamentals Review 12, no. 2 (October 1, 2018): 126–32. http://dx.doi.org/10.1587/essfr.12.2_126.

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19

Hu, Wei, Armaiti Ardeshiricham, and Ryan Kastner. "Hardware Information Flow Tracking." ACM Computing Surveys 54, no. 4 (May 2021): 1–39. http://dx.doi.org/10.1145/3447867.

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Information flow tracking (IFT) is a fundamental computer security technique used to understand how information moves through a computing system. Hardware IFT techniques specifically target security vulnerabilities related to the design, verification, testing, manufacturing, and deployment of hardware circuits. Hardware IFT can detect unintentional design flaws, malicious circuit modifications, timing side channels, access control violations, and other insecure hardware behaviors. This article surveys the area of hardware IFT. We start with a discussion on the basics of IFT, whose foundations were introduced by Denning in the 1970s. Building upon this, we develop a taxonomy for hardware IFT. We use this to classify and differentiate hardware IFT tools and techniques. Finally, we discuss the challenges yet to be resolved. The survey shows that hardware IFT provides a powerful technique for identifying hardware security vulnerabilities, as well as verifying and enforcing hardware security properties.
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20

Gunn, Lachlan J., N. Asokan, Jan-Erik Ekberg, Hans Liljestrand, Vijayanand Nayani, and Thomas Nyman. "Hardware Platform Security for Mobile Devices." Foundations and Trends® in Privacy and Security 3, no. 3-4 (2022): 214–394. http://dx.doi.org/10.1561/3300000024.

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21

Yoshida, Kota, and Takeshi Fujino. "Hardware Security on Edge AI Devices." IEICE ESS Fundamentals Review 15, no. 2 (October 1, 2021): 88–100. http://dx.doi.org/10.1587/essfr.15.2_88.

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22

Yang, Kun, Haoting Shen, Domenic Forte, Swarup Bhunia, and Mark Tehranipoor. "Hardware-Enabled Pharmaceutical Supply Chain Security." ACM Transactions on Design Automation of Electronic Systems 23, no. 2 (January 24, 2018): 1–26. http://dx.doi.org/10.1145/3144532.

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23

Nightingale, Edmund B., Daniel Peek, Peter M. Chen, and Jason Flinn. "Parallelizing security checks on commodity hardware." ACM SIGARCH Computer Architecture News 36, no. 1 (March 25, 2008): 308–18. http://dx.doi.org/10.1145/1353534.1346321.

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24

Nightingale, Edmund B., Daniel Peek, Peter M. Chen, and Jason Flinn. "Parallelizing security checks on commodity hardware." ACM SIGOPS Operating Systems Review 42, no. 2 (March 25, 2008): 308–18. http://dx.doi.org/10.1145/1353535.1346321.

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25

Nightingale, Edmund B., Daniel Peek, Peter M. Chen, and Jason Flinn. "Parallelizing security checks on commodity hardware." ACM SIGPLAN Notices 43, no. 3 (March 25, 2008): 308–18. http://dx.doi.org/10.1145/1353536.1346321.

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26

Gong, Yanping, Fengyu Qian, and Lei Wang. "Probabilistic Evaluation of Hardware Security Vulnerabilities." ACM Transactions on Design Automation of Electronic Systems 24, no. 2 (March 21, 2019): 1–20. http://dx.doi.org/10.1145/3290405.

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27

Granado-Criado, José M., Miguel A. Vega-Rodríguez, Juan M. Sánchez-Pérez, and Juan A. Gómez-Pulido. "Hardware security platform for multicast communications." Journal of Systems Architecture 60, no. 1 (January 2014): 11–21. http://dx.doi.org/10.1016/j.sysarc.2013.11.007.

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28

Casinghino, Chris. "A Language for Programmable Hardware Security." ACM SIGAda Ada Letters 39, no. 1 (January 10, 2020): 71. http://dx.doi.org/10.1145/3379106.3379115.

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29

Gilmont, T., J. D. Legat, and J. J. Quisquater. "Hardware security for software privacy support." Electronics Letters 35, no. 24 (1999): 2096. http://dx.doi.org/10.1049/el:19991424.

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30

Stiles, Doug. "The Hardware Security Behind Azure Sphere." IEEE Micro 39, no. 2 (March 1, 2019): 20–28. http://dx.doi.org/10.1109/mm.2019.2898633.

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31

Siriwardana, S. M. D. N. "Hardware Security and Trust: Trends, Challenges, and Design Tools." International Research Journal of Innovations in Engineering and Technology 08, no. 01 (2024): 119–27. http://dx.doi.org/10.47001/irjiet/2024.801016.

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Hardware security in the cyber security domain had become a more of a controversial topic over the past decade due to the introduction of new design technologies in semiconductors and expansion of global supplier chains. In proportion to the technological advancement of hardware production, the success rate of the existing hardware attacks had also evolved over the time with a significantly high rate of emergence of new attacking techniques and methods. Computing hardware is becoming a more and more attractive attack surface due to several reasons. The technology of analyzing the hardware components is becoming more and more affordable and accessible to the general public than before. Also due to the influx of IoT devices in the market, trend of simplifying the design structure to decrease the power consumption and maximizing the processing speed has become the theme of modern hardware implementations rather than the security of the devices. When considering the market demand and user requirements, it is more obvious for the computer manufacturers to give priority to user requirements rather than stressing more on the security aspects of their designs and devices. But there could be some catastrophic outcomes if the security aspects of these hardware tends to fail in a critical infrastructure, because these semiconductors are used in devices ranging from simple IoT devices to more complex systems like SCADA systems. Therefore, it is always a better approach to find a balance ground between the user requirement as well as the security of the hardware, without compromising either of both in the design and development. In this article, it presents an overall insight to trends in Hardware Security domain, specifically related to modern computer hardware design and manufacturing processes, distribution, usage, their disposal and recycling. These various stages are analyzed under Three main objectives of exposing the threats to computer hardware, suggesting countermeasures to minimize or eliminate those threats and discussing about the utilization of various design tools that can assist in the way to securing these computer hardware systems in their day-to-day applications.
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32

Popat, Jayesh, and Usha Mehta. "Hardware Security in Case of Scan Based Attack on Crypto Hardware." International Journal of VLSI Design & Communication Systems 9, no. 2 (April 30, 2018): 01–10. http://dx.doi.org/10.5121/vlsic.2018.9201.

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33

Kalathil Nandalal, Devika, and Ramesh Bhakthavatchalu. "Design of programmable hardware security modules for enhancing blockchain based security framework." International Journal of Electrical and Computer Engineering (IJECE) 13, no. 3 (June 1, 2023): 3178. http://dx.doi.org/10.11591/ijece.v13i3.pp3178-3191.

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Globalization of the chip design and manufacturing industry has imposed significant threats to the hardware security of integrated circuits (ICs). It has made ICs more susceptible to various hardware attacks. Blockchain provides a trustworthy and distributed platform to store immutable records related to the evidence of intellectual property (IP) creation, authentication of provenance, and confidential data storage. However, blockchain encounters major security challenges due to its decentralized nature of ledgers that contain sensitive data. The research objective is to design a dedicated programmable hardware security modules scheme to safeguard and maintain sensitive information contained in the blockchain networks in the context of the IC supply chain. Thus, the blockchain framework could rely on the proposed hardware security modules and separate the entire cryptographic operations within the system as stand-alone hardware units. This work put forth a novel approach that could be considered and utilized to enhance blockchain security in real-time. The critical cryptographic components in blockchain secure hash algorithm-256 (SHA-256) and the elliptic curve digital signature algorithm are designed as separate entities to enhance the security of the blockchain framework. Physical unclonable functions are adopted to perform authentication of transactions in the blockchain. Relative comparison of designed modules with existing works clearly depicts the upper hand of the former in terms of performance parameters.
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34

Zhang, Qian, Sujay Charania, Stefan Rothe, Nektarios Koukourakis, Niels Neumann, Dirk Plettemeier, and Juergen W. Czarske. "Multimode Optical Interconnects on Silicon Interposer Enable Confidential Hardware-to-Hardware Communication." Sensors 23, no. 13 (July 1, 2023): 6076. http://dx.doi.org/10.3390/s23136076.

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Following Moore’s law, the density of integrated circuits is increasing in all dimensions, for instance, in 3D stacked chip networks. Amongst other electro-optic solutions, multimode optical interconnects on a silicon interposer promise to enable high throughput for modern hardware platforms in a restricted space. Such integrated architectures require confidential communication between multiple chips as a key factor for high-performance infrastructures in the 5G era and beyond. Physical layer security is an approach providing information theoretic security among network participants, exploiting the uniqueness of the data channel. We experimentally project orthogonal and non-orthogonal symbols through 380 μm long multimode on-chip interconnects by wavefront shaping. These interconnects are investigated for their uniqueness by repeating these experiments across multiple channels and samples. We show that the detected speckle patterns resulting from modal crosstalk can be recognized by training a deep neural network, which is used to transform these patterns into a corresponding readable output. The results showcase the feasibility of applying physical layer security to multimode interconnects on silicon interposers for confidential optical 3D chip networks.
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35

Henkel, Jorg. "Top Picks in Hardware and Embedded Security." IEEE Design & Test 38, no. 3 (June 2021): 4. http://dx.doi.org/10.1109/mdat.2021.3077859.

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36

Tanjidur Rahman, M., and Navid Asadizanjani. "Failure Analysis for Hardware Assurance and Security." EDFA Technical Articles 21, no. 3 (August 1, 2019): 16–24. http://dx.doi.org/10.31399/asm.edfa.2019-3.p016.

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Abstract This article presents a comprehensive study of physical inspection and attack methods, describing the approaches typically used by counterfeiters and adversaries as well as the risks and threats created. It also explains how physical inspection methods can serve as trust verification tools and provides practical guidelines for making hardware more secure.
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37

Lamparth, Oliver, and Frank Bähren. "Hardware and Software Security in Infotainment Systems." Auto Tech Review 4, no. 12 (December 2015): 24–27. http://dx.doi.org/10.1365/s40112-015-1050-2.

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38

Mathew, Jimson, Rajat Subhra Chakraborty, Durga Prasad Sahoo, Yuanfan Yang, and Dhiraj K. Pradhan. "A Novel Memristor-Based Hardware Security Primitive." ACM Transactions on Embedded Computing Systems 14, no. 3 (May 21, 2015): 1–20. http://dx.doi.org/10.1145/2736285.

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39

Stitt, Greg, Robert Karam, Kai Yang, and Swarup Bhunia. "A Uniquified Virtualization Approach to Hardware Security." IEEE Embedded Systems Letters 9, no. 3 (September 2017): 53–56. http://dx.doi.org/10.1109/les.2017.2679183.

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40

Lotz, V., V. Kessler, and G. H. Walter. "A formal security model for microprocessor hardware." IEEE Transactions on Software Engineering 26, no. 8 (2000): 702–12. http://dx.doi.org/10.1109/32.879809.

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41

Jäppinen, Pekka, and Mikko Lampi. "Hardware Cost Measurement of Lightweight Security Protocols." Wireless Personal Communications 71, no. 2 (October 20, 2012): 1479–86. http://dx.doi.org/10.1007/s11277-012-0886-x.

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42

Lamparth, Oliver, and Frank Bähren. "Hardware and Software Security in Infotainment Systems." ATZelektronik worldwide 10, no. 3 (May 30, 2015): 34–37. http://dx.doi.org/10.1007/s38314-015-0522-0.

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43

Mannan, Mohammad, and N. Asokan. "Confronting the Limitations of Hardware-Assisted Security." IEEE Security & Privacy 18, no. 5 (September 2020): 6–7. http://dx.doi.org/10.1109/msec.2020.3015413.

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44

Huffmire, Ted, Timothy Levin, Thuy Nguyen, Cynthia Irvine, Brett Brotherton, Gang Wang, Timothy Sherwood, and Ryan Kastner. "Security Primitives for Reconfigurable Hardware-Based Systems." ACM Transactions on Reconfigurable Technology and Systems 3, no. 2 (May 2010): 1–35. http://dx.doi.org/10.1145/1754386.1754391.

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45

Smith, S. "Magic boxes and boots: security in hardware." Computer 37, no. 10 (October 2004): 106–9. http://dx.doi.org/10.1109/mc.2004.170.

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46

Zic, John J., Martin de Groot, Dongxi Liu, Julian Jang, and Chen Wang. "Hardware Security Device Facilitated Trusted Energy Services." Mobile Networks and Applications 17, no. 4 (March 14, 2012): 564–77. http://dx.doi.org/10.1007/s11036-012-0363-5.

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47

Kitsos, P., N. Sklavos, and O. Koufopavlou. "UMTS security: system architecture and hardware implementation." Wireless Communications and Mobile Computing 7, no. 4 (2007): 483–94. http://dx.doi.org/10.1002/wcm.367.

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48

Kumar, Niraj, Vishnu Mohan Mishra, and Adesh Kumar. "Smart grid security with AES hardware chip." International Journal of Information Technology 12, no. 1 (April 11, 2018): 49–55. http://dx.doi.org/10.1007/s41870-018-0123-2.

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49

John, Lizy Kurian. "Hardware Security and Privacy: Threats and Opportunities." IEEE Micro 43, no. 5 (September 2023): 4–5. http://dx.doi.org/10.1109/mm.2023.3304091.

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50

Barua, Anomadarshi, and Mohammad Abdullah Al Faruque. "Hardware/Software Co-Design for Sensor Security." Computer 56, no. 5 (May 2023): 122–25. http://dx.doi.org/10.1109/mc.2023.3248779.

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