Log in

Relevant bibliographies by topics / Hardware Security Primitives

Contents

Journal articles
Dissertations / Theses
Books
Book chapters
Conference papers

Academic literature on the topic 'Hardware Security Primitives'

Author: Grafiati

Published: 23 February 2024

Create a spot-on reference in APA, MLA, Chicago, Harvard, and other styles

Select a source type:

Consult the lists of relevant articles, books, theses, conference reports, and other scholarly sources on the topic 'Hardware Security Primitives.'

Next to every source in the list of references, there is an 'Add to bibliography' button. Press on it, and we will generate automatically the bibliographic reference to the chosen work in the citation style you need: APA, MLA, Harvard, Chicago, Vancouver, etc.

You can also download the full text of the academic publication as pdf and read online its abstract whenever available in the metadata.

Journal articles on the topic "Hardware Security Primitives"

1

Labrado, Carson, and Himanshu Thapliyal. "Hardware Security Primitives for Vehicles." IEEE Consumer Electronics Magazine 8, no. 6 (November 1, 2019): 99–103. http://dx.doi.org/10.1109/mce.2019.2941392.

Full text

APA, Harvard, Vancouver, ISO, and other styles

2

Huffmire, Ted, Timothy Levin, Thuy Nguyen, Cynthia Irvine, Brett Brotherton, Gang Wang, Timothy Sherwood, and Ryan Kastner. "Security Primitives for Reconfigurable Hardware-Based Systems." ACM Transactions on Reconfigurable Technology and Systems 3, no. 2 (May 2010): 1–35. http://dx.doi.org/10.1145/1754386.1754391.

Full text

APA, Harvard, Vancouver, ISO, and other styles

3

Gordon, Holden, Jack Edmonds, Soroor Ghandali, Wei Yan, Nima Karimian, and Fatemeh Tehranipoor. "Flash-Based Security Primitives: Evolution, Challenges and Future Directions." Cryptography 5, no. 1 (February 4, 2021): 7. http://dx.doi.org/10.3390/cryptography5010007.

Full text

Abstract:

Over the last two decades, hardware security has gained increasing attention in academia and industry. Flash memory has been given a spotlight in recent years, with the question of whether or not it can prove useful in a security role. Because of inherent process variation in the characteristics of flash memory modules, they can provide a unique fingerprint for a device and have thus been proposed as locations for hardware security primitives. These primitives include physical unclonable functions (PUFs), true random number generators (TRNGs), and integrated circuit (IC) counterfeit detection. In this paper, we evaluate the efficacy of flash memory-based security primitives and categorize them based on the process variations they exploit, as well as other features. We also compare and evaluate flash-based security primitives in order to identify drawbacks and essential design considerations. Finally, we describe new directions, challenges of research, and possible security vulnerabilities for flash-based security primitives that we believe would benefit from further exploration.

APA, Harvard, Vancouver, ISO, and other styles

4

Zhang, Zhiming, and Qiaoyan Yu. "Towards Energy-Efficient and Secure Computing Systems." Journal of Low Power Electronics and Applications 8, no. 4 (November 27, 2018): 48. http://dx.doi.org/10.3390/jlpea8040048.

Full text

Abstract:

Countermeasures against diverse security threats typically incur noticeable hardware cost and power overhead, which may become the obstacle for those countermeasures to be applicable in energy-efficient computing systems. This work presents a summary of energy-efficiency techniques that have been applied in security primitives or mechanisms to ensure computing systems’ resilience against various security threats on hardware. This work also uses examples to discuss practical methods for securing the hardware for computing systems to achieve energy efficiency.

APA, Harvard, Vancouver, ISO, and other styles

5

Bi, Yu, Kaveh Shamsi, Jiann-Shiun Yuan, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Xunzhao Yin, X. Sharon Hu, Michael Niemier, and Yier Jin. "Emerging Technology-Based Design of Primitives for Hardware Security." ACM Journal on Emerging Technologies in Computing Systems 13, no. 1 (December 6, 2016): 1–19. http://dx.doi.org/10.1145/2816818.

Full text

APA, Harvard, Vancouver, ISO, and other styles

6

Dubrova, Elena. "Energy-efficient cryptographic primitives." Facta universitatis - series: Electronics and Energetics 31, no. 2 (2018): 157–67. http://dx.doi.org/10.2298/fuee1802157d.

Full text

Abstract:

Our society greatly depends on services and applications provided by mobile communication networks. As billions of people and devices become connected, it becomes increasingly important to guarantee security of interactions of all players. In this talk we address several aspects of this important, many-folded problem. First, we show how to design cryptographic primitives which can assure integrity and confidentiality of transmitted messages while satisfying resource constrains of low-end low-cost wireless devices such as sensors or RFID tags. Second, we describe countermeasures which can enhance the resistance of hardware implementing cryptographic algorithms to hardware Trojans.

APA, Harvard, Vancouver, ISO, and other styles

7

Venkataraman, Anusha, Eberechukwu Amadi, and Chris Papadopoulos. "Molecular-Scale Hardware Encryption Using Tunable Self-Assembled Nanoelectronic Networks." Micro 2, no. 3 (June 21, 2022): 361–68. http://dx.doi.org/10.3390/micro2030024.

Full text

Abstract:

Nanomaterials are promising alternatives for creating hardware security primitives that are considered more robust and less susceptible to physical attacks compared to standard CMOS-based approaches. Here, nanoscale electronic circuits composed of tunable ratios of molecules and colloidal nanoparticles formed via self-assembly on silicon wafers are investigated for information and hardware security by utilizing device-level physical variations induced during fabrication. Two-terminal electronic transport measurements show variations in current through different parts of the nanoscale network, which are used to define electronic physically unclonable functions. By comparing different current paths, arrays of binary bits are generated that can be used as encryption keys. Evaluation of the keys using Hamming inter-distance values indicates that performance is improved by varying the ratio of molecules to nanoparticles in the network, which demonstrates self-assembly as a potential path toward implementing molecular-scale hardware security primitives. These nanoelectronic networks thus combine facile fabrication with a large variety of possible network building blocks, enabling their utilization for hardware security with additional degrees of freedom that is difficult to achieve using conventional systems.

APA, Harvard, Vancouver, ISO, and other styles

8

Tsantikidou, Kyriaki, and Nicolas Sklavos. "Hardware Limitations of Lightweight Cryptographic Designs for IoT in Healthcare." Cryptography 6, no. 3 (September 1, 2022): 45. http://dx.doi.org/10.3390/cryptography6030045.

Full text

Abstract:

Security is an important aspect of healthcare applications that employ Internet of Things (IoT) technology. More specifically, providing privacy and ensuring the confidentiality, integrity and authenticity of IoT-based designs are crucial in the health domain because the collected data are sensitive, and the continuous availability of the system is critical for the user’s wellbeing. However, the IoT consists of resource-constrained devices that increase the difficulty of implementing high-level-security schemes. Therefore, in the current paper, renowned lightweight cryptographic primitives and their most recent architecture, to the best of the authors’ knowledge, are investigated. Their security, architecture characteristics and overall hardware limitations are analyzed and collected in tables. Finally, all the algorithms are compared based on their effectiveness in securing healthcare applications, the utilized device and the overall implementation efficiency.

APA, Harvard, Vancouver, ISO, and other styles

9

Tomecek, Jozef. "Hardware optimizations of stream cipher rabbit." Tatra Mountains Mathematical Publications 50, no. 1 (December 1, 2011): 87–101. http://dx.doi.org/10.2478/v10127-011-0039-8.

Full text

Abstract:

ABSTRACT Stream ciphers form part of cryptographic primitives focused on privacy. Synchronous, symmetric and software-oriented stream cipher Rabbit is member of final portfolio of European Union's eStream project. Although it was designed to perform well in software, employed operations seem to compute efficiently in hardware. 128-bit security, with no known security weaknesses is claimed by Rabbit's designers. Since hardware performance of Rabbit was only estimated in the proposal of algorithm, comparison of direct and optimized FPGA implementations of Rabbit stream cipher is presented, identifying algorithm bottlenecks, discussing optimization techniques applied to algorithm computations, along with key area/time trade-offs.

APA, Harvard, Vancouver, ISO, and other styles

10

Preetisudha Meher, Lukram Dhanachandra Singh,. "Advancing Hardware Security: A Review and Novel Design of Configurable Arbiter PUF with DCM-Induced Metastability for Enhanced Resource Efficiency and Unpredictability." Tuijin Jishu/Journal of Propulsion Technology 45, no. 01 (February 16, 2024): 3804–16. http://dx.doi.org/10.52783/tjjpt.v45.i01.4934.

Full text

Abstract:

As the Internet of Things (IoT) and Blockchain technologies continue to assert their dominance in the technical landscape, the demand to enhance security measures becomes foremost. In this context, Physical Unclonable Functions (PUFs) are widely used hardware security primitives that can be used to solve a wide range of security issues. To support hardware security solutions, this paper presents an extensive overview and analysis of the existing Physical Unclonable Functions (PUFs) used as True Random Number Generators (TRNGs). Recognizing the shortcomings of current PUF designs, we propose a configurable Arbiter PUF design employing Digital Clock Manager (DCM)-induced metastability as an entropy source, presenting a robust solution for evolving hardware security. To mitigate the adverse consequences of metastability, the proposed Arbiter PUF includes a Carry Chain primitive with four Flip-Flop clones. Acknowledging the constantly evolving IoT and Blockchain environment, the suggested configurable Arbiter PUF is made to satisfy the highest security standards. By exploiting the inherent variations in FPGA technology, we aim to reduce system resource and area consumption, aligning with the efficiency criteria of modern applications. The system's performance is additionally enhanced by an on-chip post-processing based on DSP. Simulation results demonstrate successful implementation on a Xilinx Basys-3 FPGA board, offering a scalable and efficient solution. The generated sequences of the proposed PUF undergo rigorous testing, including National Institute of Standards and Technology (NIST) statistical tests for uniqueness, reliability, and randomness. This holistic approach aims to improve the PUF's performance and security.

APA, Harvard, Vancouver, ISO, and other styles

More sources

Dissertations / Theses on the topic "Hardware Security Primitives"

1

Basak, Abhishek. "INFRASTRUCTURE AND PRIMITIVES FOR HARDWARE SECURITY IN INTEGRATED CIRCUITS." Case Western Reserve University School of Graduate Studies / OhioLINK, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=case1458787036.

Full text

APA, Harvard, Vancouver, ISO, and other styles

2

Ma, Yao. "Quantum Hardware Security and Near-term Applications." Electronic Thesis or Diss., Sorbonne université, 2023. https://accesdistant.sorbonne-universite.fr/login?url=https://theses-intra.sorbonne-universite.fr/2023SORUS500.pdf.

Full text

Abstract:

Les primitives de sécurité matérielle sont des composants et des mécanismes fondamentaux basés sur le matériel et utilisés pour améliorer la sécurité des systèmes informatiques modernes en général. Ces primitives fournissent des éléments de base pour la mise en œuvre des fonctions de sécurité et la protection contre les menaces afin de garantir l'intégrité, la confidentialité et la disponibilité des informations et des ressources. Avec le développement à grande vitesse de l'informatique quantique et du traitement de l'information, la construction de primitives de sécurité matérielle avec des systèmes mécaniques quantiques présente un énorme potentiel. Parallèlement, il devient de plus en plus important de traiter les vulnérabilités potentielles du point de vue du matériel pour garantir les propriétés de sécurité des applications quantiques. La thèse se concentre sur les primitives de sécurité matérielles pratiques en analogie quantique, qui se réfèrent à la conception et à la mise en œuvre de fonctions de sécurité matérielles avec des systèmes mécaniques quantiques contre diverses menaces et attaques. Notre recherche s'articule autour de deux questions: Comment les systèmes mécaniques quantiques peuvent-ils améliorer la sécurité des primitives de sécurité matérielle existantes? Et comment les primitives de sécurité matérielle peuvent-elles protéger les systèmes d'informatique quantique? Nous apportons les réponses en étudiant deux types de primitives de sécurité matérielle avec des systèmes mécaniques quantiques, de la construction à l'application: Physical Unclonable Function (PUF) et Trusted Execution Environments (TEE). Nous proposons tout d'abord des constructions hybrides classiques-quantiques de PUF appelées HPUF et HLPUF. Alors que les PUF exploitent les propriétés physiques propres à chaque dispositif matériel individuel pour générer des clés ou des identifiants spécifiques, nos constructions intègrent des technologies de traitement quantique de l'information et mettent en œuvre des protocoles d'authentification et de communication sécurisés avec des clés quantiques réutilisables. Deuxièmement, inspirés par les TEE qui obtiennent des propriétés d'isolation par un mécanisme matériel, nous proposons la construction de QEnclave avec des systèmes mécaniques quantiques. L'idée est de fournir des environnements d'exécution isolés et sécurisés au sein d'un système informatique quantique plus large en utilisant des enclaves/processeurs sécurisés pour protéger les opérations sensibles d'un accès non autorisé ou d'une altération avec des hypothèses de confiance minimales. Il en résulte une construction de QEnclave assez simple de manière opérationnelle, avec l'exécution de rotations sur des qubits uniques. Nous montrons que QEnclave permet un calcul quantique aveugle délégué sur le serveur en nuage avec un utilisateur classique distant dans le cadre des définitions de sécurité
Hardware security primitives are hardware-based fundamental components and mechanisms used to enhance the security of modern computing systems in general. These primitives provide building blocks for implementing security features and safeguarding against threats to ensure integrity, confidentiality, and availability of information and resources. With the high-speed development of quantum computation and information processing, a huge potential is shown in constructing hardware security primitives with quantum mechanical systems. Meanwhile, addressing potential vulnerabilities from the hardware perspective is becoming increasingly important to ensure the security properties of quantum applications. The thesis focuses on practical hardware security primitives in quantum analogue, which refer to designing and implementing hardware-based security features with quantum mechanical systems against various threats and attacks. Our research follows two questions: How can quantum mechanical systems enhance the security of existing hardware security primitives? And how can hardware security primitives protect quantum computing systems? We give the answers by studying two different types of hardware security primitives with quantum mechanical systems from constructions to applications: Physical Unclonable Function (PUF) and Trusted Execution Environments (TEE). We first propose classical-quantum hybrid constructions of PUFs called HPUF and HLPUF. When PUFs exploit physical properties unique to each individual hardware device to generate device-specific keys or identifiers, our constructions incorporate quantum information processing technologies and implement quantum-secure authentication and secure communication protocols with reusable quantum keys. Secondly, inspired by TEEs that achieve isolation properties by hardware mechanism, we propose the QEnclave construction with quantum mechanical systems. The idea is to provide an isolated and secure execution environment within a larger quantum computing system by utilising secure enclaves/processors to protect sensitive operations from unauthorized access or tampering with minimal trust assumptions. It results in an operationally simple enough QEnclave construction with performing rotations on single qubits. We show that QEnclave enables delegated blind quantum computation on the cloud server with a remote classical user under the security definitions

APA, Harvard, Vancouver, ISO, and other styles

3

Sabt, Mohamed. "Outsmarting smartphones : trust based on provable security and hardware primitives in smartphones architectures." Thesis, Compiègne, 2016. http://www.theses.fr/2016COMP2320.

Full text

Abstract:

Le paysage du monde des téléphones mobiles a changé avec l’introduction des ordiphones (de l’anglais smartphones). En effet, depuis leur avènement, les ordiphones sont devenus incontournables dans des différents aspects de la vie quotidienne. Cela a poussé de nombreux fournisseurs de services de rendre leurs services disponibles sur mobiles. Malgré cette croissante popularité, l’adoption des ordiphones pour des applications sensibles n’a toujours pas eu un grand succès. La raison derrière cela est que beaucoup d’utilisateurs, de plus en plus concernés par la sécurité de leurs appareils, ne font pas confiance à leur ordiphone pour manipuler leurs données sensibles. Cette thèse a pour objectif de renforcer la confiance des utilisateurs en leur mobile. Nous abordons ce problème de confiance en suivant deux approches complémentaires, à savoir la sécurité prouvée et la sécurité ancrée à des dispositifs matériels. Dans la première partie, notre objectif est de montrer les limitations des technologies actuellement utilisées dans les architectures des ordiphones. À cette fin, nous étudions deux systèmes largement déployés et dont la sécurité a reçu une attention particulière dès la conception : l’entrepôt de clés d’Android, qui est le composant protégeant les clés cryptographiques stockées sur les mobiles d’Android, et la famille des protocoles sécurisés SCP (de l’anglais Secure Channel Protocol) qui est définie par le consortium GlobalPlatform. Nos analyses se basent sur le paradigme de la sécurité prouvée. Bien qu’elle soit perçue comme un outil théorique voire abstrait, nous montrons que cet outil pourrait être utilisé afin de trouver des vulnérabilités dans des systèmes industriels. Cela atteste le rôle important que joue la sécurité prouvée pour la confiance en étant capable de formellement démontrer l’absence de failles de sécurité ou éventuellement de les identifier quand elles existent. Quant à la deuxième partie, elle est consacrée aux systèmes complexes qui ne peuvent pas être formellement vérifiés de manière efficace en termes de coût. Nous commençons par examiner l’approche à double environnement d’exécution. Ensuite, nous considérons le cas où cette approche est instanciée par des dispositifs matériels particuliers, à savoir le ARM TrustZone, afin de construire un environnement d’exécution de confiance (TEE de l’anglais Trusted Execution Environment). Enfin, nous explorons deux solutions palliant quelques limitations actuelles du TEE. Premièrement, nous concevons une nouvelle architecture du TEE qui en protège les données sensibles même quand son noyau sécurisé est compromis. Cela soulage les fournisseurs des services de la contrainte qui consiste à faire pleinement confiance aux fournisseurs du TEE. Deuxièmement, nous proposons une solution dans laquelle le TEE n’est pas uniquement utilisé pour protéger l’exécution des applications sensibles, mais aussi pour garantir à des grands composants logiciels (comme le noyau d’un système d’exploitation) des propriétés de sécurité plus complexes, à savoir l’auto-protection et l’auto-remédiation
The landscape of mobile devices has been changed with the introduction of smartphones. Sincetheir advent, smartphones have become almost vital in the modern world. This has spurred many service providers to propose access to their services via mobile applications. Despite such big success, the use of smartphones for sensitive applications has not become widely popular. The reason behind this is that users, being increasingly aware about security, do not trust their smartphones to protect sensitive applications from attackers. The goal of this thesis is to strengthen users trust in their devices. We cover this trust problem with two complementary approaches: provable security and hardware primitives. In the first part, our goal is to demonstrate the limits of the existing technologies in smartphones architectures. To this end, we analyze two widely deployed systems in which careful design was applied in order to enforce their security guarantee: the Android KeyStore, which is the component shielding users cryptographic keys in Android smartphones, and the family of Secure Channel Protocols (SCPs) defined by the GlobalPlatform consortium. Our study relies on the paradigm of provable security. Despite being perceived as rather theoretical and abstract, we show that this tool can be handily used for real-world systems to find security vulnerabilities. This shows the important role that can play provable security for trust by being able to formally prove the absence of security flaws or to identify them if they exist. The second part focuses on complex systems that cannot cost-effectively be formally verified. We begin by investigating the dual-execution-environment approach. Then, we consider the case when this approach is built upon some particular hardware primitives, namely the ARM TrustZone, to construct the so-called Trusted Execution Environment (TEE). Finally, we explore two solutions addressing some of the TEE limitations. First, we propose a new TEE architecture that protects its sensitive data even when the secure kernel gets compromised. This relieves service providers of fully trusting the TEE issuer. Second, we provide a solution in which TEE is used not only for execution protection, but also to guarantee more elaborated security properties (i.e. self-protection and self-healing) to a complex software system like an OS kernel

APA, Harvard, Vancouver, ISO, and other styles

4

Ouattara, Frédéric. "Primitives de sécurité à base de mémoires magnétiques." Thesis, Montpellier, 2020. http://www.theses.fr/2020MONTS072.

Full text

Abstract:

Les mémoires magnétiques (MRAM) font partie des technologies de mémoires non volatiles émergentes ayant connu un développement rapide cette dernière décennie. Un des avantages de cette technologie réside dans les domaines d’applications variées dans lesquelles elle peut intervenir. En plus de sa fonction principale de stockage d’information, la MRAM est utilisée de nos jours dans des applications de type capteurs, récepteur RF et sécurité matérielle. Dans cette thèse, nous nous sommes intéressés à l’utilisation des MRAM dans la conception des primitives de sécurité matérielle élémentaires. Dans un premier temps, une exploration dans la conception de TRNG (True Random Number Generator) basée sur des mémoires de type STT-MRAM (Spin Transfert Torque MRAM) a été menée dans le but de réaliser un démonstrateur et de prouver son efficacité pour les applications sécurisées. Les méthodes d’extraction d’aléa dans les mémoires STT et TAS (Thermally Assisted Switching) sont présentées. Nous avons ainsi évalué ces mémoires magnétiques dans le cadre des TRNG mais également pour la génération de PUF (Physically Unclonable Functions) sur des dispositifs physiques
Magnetic memories (MRAM) are one of the emerging non-volatile memory technologies that have experienced rapid development over the past decade. One of the advantages of this technology lies in the varied fields of application in which it can be used. In addition to its primary function of storing information, MRAM is nowadays used in applications such as sensors, RF receivers and hardware security. In this thesis, we are interested in the use of MRAMs in the design of elementary hardware security primitives. Initially, an exploration in the design of TRNG (True Random Number Generator) based on STT-MRAM (Spin Transfert Torque MRAM) type memories was carried out with the aim of producing a demonstrator and proving its effectiveness for secure applications. Random extraction methods in STT and TAS (Thermally Assisted Switching) memories are presented. We have thus evaluated these magnetic memories within the framework of TRNGs but also for the generation of PUFs (Physically Unclonable Functions) on physical devices

APA, Harvard, Vancouver, ISO, and other styles

5

Wild, Alexander [Verfasser], Tim [Gutachter] Güneysu, and Amir [Gutachter] Moradi. "Structure-aware design of security primitives on reconfigurable hardware / Alexander Wild ; Gutachter: Tim Güneysu, Amir Moradi ; Fakultät für Elektrotechnik und Informationstechnik." Bochum : Ruhr-Universität Bochum, 2018. http://d-nb.info/1152077902/34.

Full text

APA, Harvard, Vancouver, ISO, and other styles

6

Juliato, Marcio. "Fault Tolerant Cryptographic Primitives for Space Applications." Thesis, 2011. http://hdl.handle.net/10012/5876.

Full text

Abstract:

Spacecrafts are extensively used by public and private sectors to support a variety of services. Considering the cost and the strategic importance of these spacecrafts, there has been an increasing demand to utilize strong cryptographic primitives to assure their security. Moreover, it is of utmost importance to consider fault tolerance in their designs due to the harsh environment found in space, while keeping low area and power consumption. The problem of recovering spacecrafts from failures or attacks, and bringing them back to an operational and safe state is crucial for reliability. Despite the recent interest in incorporating on-board security, there is limited research in this area. This research proposes a trusted hardware module approach for recovering the spacecrafts subsystems and their cryptographic capabilities after an attack or a major failure has happened. The proposed fault tolerant trusted modules are capable of performing platform restoration as well as recovering the cryptographic capabilities of the spacecraft. This research also proposes efficient fault tolerant architectures for the secure hash (SHA-2) and message authentication code (HMAC) algorithms. The proposed architectures are the first in the literature to detect and correct errors by using Hamming codes to protect the main registers. Furthermore, a quantitative analysis of the probability of failure of the proposed fault tolerance mechanisms is introduced. Based upon an extensive set of experimental results along with probability of failure analysis, it was possible to show that the proposed fault tolerant scheme based on information redundancy leads to a better implementation and provides better SEU resistance than the traditional Triple Modular Redundancy (TMR). The fault tolerant cryptographic primitives introduced in this research are of crucial importance for the implementation of on-board security in spacecrafts.

APA, Harvard, Vancouver, ISO, and other styles

Books on the topic "Hardware Security Primitives"

1

Tehranipoor, Mark, Nitin Pundir, Nidish Vashistha, and Farimah Farahmandi. Hardware Security Primitives. Cham: Springer International Publishing, 2023. http://dx.doi.org/10.1007/978-3-031-19185-5.

Full text

APA, Harvard, Vancouver, ISO, and other styles

2

Pundir, Nitin, Nidish Vashishta, Mark Tehranipoor, and Farimah Farahmandi. Hardware Security Primitives. Springer International Publishing AG, 2022.

Find full text

APA, Harvard, Vancouver, ISO, and other styles

Book chapters on the topic "Hardware Security Primitives"

1

Tehranipoor, Mark, Nitin Pundir, Nidish Vashistha, and Farimah Farahmandi. "Analog Security." In Hardware Security Primitives, 245–60. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_14.

Full text

APA, Harvard, Vancouver, ISO, and other styles

2

Tehranipoor, Mark, Nitin Pundir, Nidish Vashistha, and Farimah Farahmandi. "Intrinsic Racetrack PUF." In Hardware Security Primitives, 1–16. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_1.

Full text

APA, Harvard, Vancouver, ISO, and other styles

3

Tehranipoor, Mark, Nitin Pundir, Nidish Vashistha, and Farimah Farahmandi. "Fault Injection Resistant Cryptographic Hardware." In Hardware Security Primitives, 333–46. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_19.

Full text

APA, Harvard, Vancouver, ISO, and other styles

4

Tehranipoor, Mark, Nitin Pundir, Nidish Vashistha, and Farimah Farahmandi. "Hybrid Extrinsic Radio Frequency PUF." In Hardware Security Primitives, 81–95. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_6.

Full text

APA, Harvard, Vancouver, ISO, and other styles

5

Tehranipoor, Mark, Nitin Pundir, Nidish Vashistha, and Farimah Farahmandi. "Tamper Detection." In Hardware Security Primitives, 261–79. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_15.

Full text

APA, Harvard, Vancouver, ISO, and other styles

6

Tehranipoor, Mark, Nitin Pundir, Nidish Vashistha, and Farimah Farahmandi. "Side-Channel Protection in Cryptographic Hardware." In Hardware Security Primitives, 319–32. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_18.

Full text

APA, Harvard, Vancouver, ISO, and other styles

7

Tehranipoor, Mark, Nitin Pundir, Nidish Vashistha, and Farimah Farahmandi. "Direct Intrinsic Characterization PUF." In Hardware Security Primitives, 33–47. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_3.

Full text

APA, Harvard, Vancouver, ISO, and other styles

8

Tehranipoor, Mark, Nitin Pundir, Nidish Vashistha, and Farimah Farahmandi. "Lightweight Cryptography." In Hardware Security Primitives, 213–27. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_12.

Full text

APA, Harvard, Vancouver, ISO, and other styles

9

Tehranipoor, Mark, Nitin Pundir, Nidish Vashistha, and Farimah Farahmandi. "Package-Level Counterfeit Detection and Avoidance." In Hardware Security Primitives, 301–17. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_17.

Full text

APA, Harvard, Vancouver, ISO, and other styles

10

Tehranipoor, Mark, Nitin Pundir, Nidish Vashistha, and Farimah Farahmandi. "Virtual Proof of Reality." In Hardware Security Primitives, 229–43. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_13.

Full text

APA, Harvard, Vancouver, ISO, and other styles

Conference papers on the topic "Hardware Security Primitives"

1

Du, Nan, Mahdi Kiani, Xianyue Zhao, Danilo Burger, Oliver G. Schmidt, Ramona Ecke, Stefan E. Schulz, Heidemarie Schmidt, and Ilia Polian. "Electroforming-free Memristors for Hardware Security Primitives." In 2019 IEEE 4th International Verification and Security Workshop (IVSW). IEEE, 2019. http://dx.doi.org/10.1109/ivsw.2019.8854394.

Full text

APA, Harvard, Vancouver, ISO, and other styles

2

Rose, Garrett S., Mesbah Uddin, and Md Badruddoja Majumder. "A Designer's Rationale for Nanoelectronic Hardware Security Primitives." In 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). IEEE, 2016. http://dx.doi.org/10.1109/isvlsi.2016.114.

Full text

APA, Harvard, Vancouver, ISO, and other styles

3

Singh, Simranjeet, Furqan Zahoor, Gokul Rajendran, Sachin Patkar, Anupam Chattopadhyay, and Farhad Merchant. "Hardware Security Primitives Using Passive RRAM Crossbar Array." In ASPDAC '23: 28th Asia and South Pacific Design Automation Conference. New York, NY, USA: ACM, 2023. http://dx.doi.org/10.1145/3566097.3568348.

Full text

APA, Harvard, Vancouver, ISO, and other styles

4

Pugazhenthi, Anugayathiri, Nima Karimian, and Fatemeh Tehranipoor. "DLA-PUF: deep learning attacks on hardware security primitives." In Autonomous Systems: Sensors, Processing and Security for Vehicles & Infrastructure 2019, edited by Michael C. Dudzik and Jennifer C. Ricklin. SPIE, 2019. http://dx.doi.org/10.1117/12.2519257.

Full text

APA, Harvard, Vancouver, ISO, and other styles

5

Xu, Xiaolin, Vikram Suresh, Raghavan Kumar, and Wayne Burleson. "Post-Silicon Validation and Calibration of Hardware Security Primitives." In 2014 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). IEEE, 2014. http://dx.doi.org/10.1109/isvlsi.2014.80.

Full text

APA, Harvard, Vancouver, ISO, and other styles

6

Anandakumar, N. Nalla, Somitra Kumar Sanadhya, and Mohammad S. Hashmi. "Design, Implementation and Analysis of Efficient Hardware-Based Security Primitives." In 2020 IFIP/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC). IEEE, 2020. http://dx.doi.org/10.1109/vlsi-soc46417.2020.9344097.

Full text

APA, Harvard, Vancouver, ISO, and other styles

7

Aramoon, Omid, Gang Qu, and Aijiao Cui. "Building Hardware Security Primitives Using Scan-based Design-for-Testability." In 2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS). IEEE, 2022. http://dx.doi.org/10.1109/mwscas54063.2022.9859460.

Full text

APA, Harvard, Vancouver, ISO, and other styles

8

Rajesh, E., and Udit Sapra. "Design, build, and analyse hardware-based security primitives that work well." In 2022 International Interdisciplinary Humanitarian Conference for Sustainability (IIHC). IEEE, 2022. http://dx.doi.org/10.1109/iihc55949.2022.10060075.

Full text

APA, Harvard, Vancouver, ISO, and other styles

9

Thapliyal, Himanshu, and S. Dinesh Kumar. "Energy-recovery based hardware security primitives for low-power embedded devices." In 2018 IEEE International Conference on Consumer Electronics (ICCE). IEEE, 2018. http://dx.doi.org/10.1109/icce.2018.8326326.

Full text

APA, Harvard, Vancouver, ISO, and other styles

10

Shrivastava, Ayush, Pai-Yu Chen, Yu Cao, Shimeng Yu, and Chaitali Chakrabarti. "Design of a reliable RRAM-based PUF for compact hardware security primitives." In 2016 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 2016. http://dx.doi.org/10.1109/iscas.2016.7539050.

Full text

APA, Harvard, Vancouver, ISO, and other styles

We offer discounts on all premium plans for authors whose works are included in thematic literature selections. Contact us to get a unique promo code!