Dissertations / Theses on the topic 'GaN Power and THz Devices'

Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017.
This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
Cataloged from student-submitted PDF version of thesis.
Includes bibliographical references (pages 163-170).
Power electronics based on Gallium Nitride (GaN) is expected to significantly reduce the losses in power conversion circuits and increase the power density. This makes GaN devices very exciting candidates for next-generation power electronics, for the applications in electric vehicles, data centers, high-power and high-frequency communications. Currently, both lateral and vertical structures are considered for GaN power devices. In particular, vertical GaN power devices have attracted significant attention recently, due to the potential for achieving high breakdown voltage and current levels without enlarging the chip size. In addition, these vertical devices show superior thermal performance than their lateral counterparts. This PhD thesis addresses several key obstacles in developing vertical GaN power devices. The commercialization of vertical GaN power devices has been hindered by the high cost of bulk GaN. The first project in this PhD thesis demonstrated the feasibility of making vertical devices on a low-cost silicon (Si) substrate for the first time. The demonstrated high performance shows the great potential of low-cost vertical GaN-on-Si devices for 600-V level high-current and high-power applications. This thesis has also studied the origin of the off-state leakage current in vertical GaN pn diodes on Si, sapphire and GaN substrates, by experiments, analytical calculations and TCAD simulations. Variable-range-hopping through threading dislocations was identified as the main off-state leakage mechanism in these devices. The design space of leakage current of vertical GaN devices has been subsequently derived. Thirdly, a novel GaN vertical Schottky rectifier with trench MIS structures and trench field rings was demonstrated. The new structure greatly enhanced the reverse blocking characteristics while maintaining a Schottky-like good forward conduction. This new device shows great potential for using advanced vertical Schottky rectifiers for high-power and high-frequency applications. Finally, we investigated a fundamental and significant challenge for GaN power devices: the lack of reliable and generally useable patterned pn junctions. Two approaches have been proposed to make lateral patterned pn junctions. Two devices, junction barrier Schottky devices and super-junction devices, have been designed and optimized. Preliminary experimental results were also demonstrated for the feasibility of making patterned pn junctions and fabricating novel power devices.
by Yuhao Zhang.
Ph. D.

Recent emergence of data-driven and computation hungry algorithms has fuelled the demand for energy and processing power at an unprecedented rate. Semiconductor industry is, therefore, under constant pressure towards developing energy efficient devices. A Shift towards materials with higher figure-of-merit compared to Si, such as GaN for power conversion is one of the options currently being pursued. A minimisation in parasitic and static power losses in GaN can be brought about by realising on-chip CMOS based gate drivers for GaN power devices. At present, p-channel MOSHFETs in GaN show poor performance due to the low mobility and the severe trade-off between |ION| and |Vth|. For the first time, it is shown that despite a poor hole mobility, it is possible to improve the on-current as well as minimise |ION| - |Vth| trade-off, by adopting a combination of techniques: using an AlGaN cap, biased two-dimensional electron gas, and shrinking source-gate and gate-drain access region and channel lengths. As part of this work, a novel vertical p-channel heterojunction tunnel FET (TFET) utilising polarisation induced tunnel junction (PITJ) is also explored, which unlike common TFETs, shows non-ambipolar transfer characteristics and a better electrostatic control over the tunneling region via the gate. Meeting the ever-increasing demand for computation would require continuous scaling of transistor physical dimensions and supply voltage. While a further reduction in physical dimension is expected to come from adopting a vertical integration scheme, scaling in supply voltage would require achieving sub-60 mV/dec of subthreshold swing. The two common approaches to achieve this are TFETs and negative capacitance (NC) FETs, where the NC operation is commonly associated with ferroelectric materials. This work develops a model to explain sub-60 mV/dec, observed in Ta2O5/ZnO thin-film-transistors, which is governed by the motion of oxygen ions inside Ta2O5, leading to NC under dynamic gate bias sweep.

Les matériaux semi-conducteurs à grand gap tels que le carbure de silicium (SiC) et le nitrure de gallium (GaN) sont utilisés pour fabriquer des composants semi-conducteurs de puissance, qui vont jouer un rôle très important dans le développement des futurs systèmes de conversion d'énergie. L'objectif est de réaliser des convertisseurs avec de meilleurs rendements énergétiques et fonctionnant à haute température. Pour atteindre cet objectif, il est donc nécessaire de bien connaître les caractéristiques de ces nouveaux composants afin de développer des modèles qui seront utilisés lors de la conception des convertisseurs. Cette thèse est donc dédiée à la caractérisation et la modélisation des composants à grand gap, mais également l'étude des dispositifs de mesure des courants des commutations des composants rapides. Afin de déterminer les caractéristiques statiques des composants semi-conducteurs, une méthode de mesure en mode pulsé est présentée. Dans le cadre de cette étude, une diode SiC et un JFET SiC "normally-off" sont caractérisés à l'aide de cette méthode. Afin de mesurer les capacités inter-électrodes de ces composants, une nouvelle méthode basée sur l'utilisation des pinces de courant est proposée. Des modèles comportementaux d'une diode Si et d'un JFET SiC sont proposés en utilisant les résultats de caractérisation. Le modèle de la diode obtenu est validé par des mesures des courants au blocage (recouvrement inverse) dans différentes conditions de commutation. Pour valider le modèle du JFET SiC, une méthode de mesure utilisant une pince de courant de surface est proposée
Compared to traditional silicon (Si) semiconductor material, wide bandgap (WBG) materials like silicon carbide (SiC) and gallium nitride are gradually applied to fabricate power semiconductor devices, which are used in power converters to achieve high power efficiency, high operation temperature and high switching frequency. As those power devices are relatively new, their characterization and modeling are important to better understand their characteristics for better use. This dissertation is mainly focused on those WBG power semiconductor devices characterization, modeling and fast switching currents measurement. In order to measure their static characteristics, a single-pulse method is presented. A SiC diode and a "normally-off" SiC JFET is characterized by this method from ambient temperature to their maximal junction temperature with the maximal power dissipation around kilowatt. Afterwards, in order to determine power device inter-electrode capacitances, a measurement method based on the use of multiple current probes is proposed and validated by measuring inter-electrode capacitances of power devices of different technologies. Behavioral models of a Si diode and the SiC JFET are built by using the results of the above characterization methods, by which the evolution of the inter-electrode capacitances for different operating conditions are included in the models. Power diode models are validated with the measurements, in which the current is measured by a proposed current surface probe

Thesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2010.
ENGLISH ABSTRACT: The main focus of this thesis is to document the formulation, extraction and validation of nonlinear models for the on-wafer gallium nitride (GaN) high-electron mobility (HEMT) devices manufactured at the Interuniversity Microelectronics Centre (IMEC) in Leuven, Belgium. GaN semiconductor technology is fast emerging and it is expected that these devices will play an important role in RF and microwave power amplifier applications. One of the main advantages of the new GaN semiconductor technology is that it combines a very wide band-gap with high electron mobility, which amounts to higher levels of gain at very high frequencies. HEMT devices based on GaN, is a fairly new technology and not many nonlinear models have been proposed in literature. This thesis details the design of hardware and software used in the development of the nonlinear models. An intermodulation distortion (IMD) measurement setup was developed to measure the second and higher-order derivative of the nonlinear drain current. The derivatives are extracted directly from measurements and are required to improve the nonlinear model IMD predictions. Nonlinear model extraction software was developed to automate the modelling process, which was fundamental in the nonlinear model investigation. The models are implemented in Agilent’s Advanced Design System (ADS) and it is shown that the models are capable of accurately predicting the measured S-parameters, large-signal singletone and two-tone behaviour of the GaN devices.
AFRIKAANSE OPSOMMING: Die hoofdoel van hierdie tesis is om die formulering, ontrekking en validasie van nie-lineêre modelle vir onverpakte gallium nitraat (GaN) hoë-elektronmobilisering transistors (HEMTs) te dokumenteer. Die transistors is vervaaardig by die Interuniversity Microelectronics Centre (IMEC) in Leuven, België. GaN-halfgeleier tegnologie is besig om vinnig veld te wen en daar word voorspel dat hierdie transistors ʼn belangrike rol gaan speel in RF en mikrogolf kragversterker toepassings. Een van die hoof voordele van die nuwe GaN-halfgeleier tegnologie is dat dit 'n baie wyd band-gaping het met hoë-elektronmobilisering, wat lei tot hoë aanwins by mikrogolf frekwensies. GaN HEMTs is 'n redelik nuwe tegnologie en nie baie nie-lineêre modelle is al voorgestel in literatuur nie. Hierdie tesis ondersoek die ontwerp van die hardeware en sagteware soos gebruik in die ontwikkeling van nie-lineêre modelle. 'n Intermodulasie distorsie-opstelling (IMD-opstelling) is ontwikkel vir die meting van die tweede en hoër orde afgeleides van die nie-lineêre stroom. Die afgeleides is direk uit die metings onttrek en moet die nie-lineêre IMD-voorspellings te verbeter. Nie-lineêre onttrekking sagteware is ontwikkel om die modellerings proses te outomatiseer. Die modelle word geïmplementeer in Agilent se Advanced Design System (ADS) en bewys dat die modelle in staat is om akkurate afgemete S-parameters, grootsein enkeltoon en tweetoon gedrag van die GaN-transistors te kan voorspel.

GaN-based devices have emerged as a promising solution for power management applications. The intrinsic physical properties of the Gallium Nitride are exploited in order to considerably improve the efficiency and to reduce the volume of the next generation power switching converters. The wide energy gap allows to fabricate high voltage-rate devices with a reduced area consumption, whereas the high mobility guarantees a considerably low on-Resistance of the transistor. Moreover, thanks to the reduced parasitic capacitances, the operating frequency of the devices can be higher than conventional Silicon based transistors. In order to ensure a wide spreading of Gallium Nitride technology in the power transistors market, the price of the devices needs to be kept as low as possible. The costs of native substrates for the fabrication of GaN transistors are nowadays prohibitive, so that the epitaxial growth of Gallium Nitride on Silicon substrates has been developed. GaN-on-Silicon is the most suitable technology to fabricate GaN-based devices on a cheap and large area wafers (up to 200 mm), resulting in a significant reduction of the production costs. On the other hand, growing GaN on a foreign substrate results in high dislocation and defect densities which could affect the performance of the devices in terms of both losses and reliability issues. A so-called “buffer decomposition experiment” allowed to evaluate the role of the different layers which compose the vertical stack of a GaN-on-Silicon wafer by characterizing samples obtained by stopping the epitaxial growth at different stages of the process. It is demonstrated that both the thickness and the composition of the epitaxial stack, beside enhancing the breakdown voltage, improve the material quality by limiting the propagation of defects and dislocations. Moreover, a study on the reliability of the Aluminum Nitride layer grown on silicon is presented, showing that the AlN fails due to a wear-out process following a Weibull distribution. Furthermore, an extensive analysis on the reliability of the GaN-on-Silicon vertical stack is presented, as well as a systematic study on the failure statistic. It is shown that the time to failure of the GaN-on-Silicon stack is Weibull distributed, and, although it is weakly temperature-activated, it exponentially depends on the applied voltage. Moreover, the expected lifetime of the tested devices at the operating voltage is extracted. Aiming to further improve the performance of lateral High Electrons Mobility Transistors (HEMTs) in terms of vertical robustness and losses reduction, the impact of the resistivity of the silicon substrates has been evaluated. It is shown that highly resistive p-doped substrate results in a plateau region in the IV characteristic which considerably increases the vertical breakdown voltage of the devices. Nevertheless, the existence of a trade-off between the vertical robustness and the stability of the threshold voltage is demonstrated. A set of electrical characterization ascribes the threshold voltage shift to the positive backgating effect possibly related to the capacitive coupling of the partially depleted substrate which only occurs if lowly p-doped silicon is used. The origin of the plateau region is further investigated by means of a set of TCAD simulations, allowing to develop a two-diodes model which confirms the hypothesis on the substrate depletion. Even if stable and reliable lateral HEMTs are commercially available, their operating voltage is limited to ~ 900 V. In order to expand the applications field of the GaN-based devices to higher operating voltage, different device concepts have been developed so far. A promising solution is represented by (semi-)vertical trench gate devices, which are characterized by a thick drift layer where the OFF-state electric field spreads vertically in a bulky region, thus avoiding surface effects. Thanks to the vertical architecture, the OFF-state breakdown only depends on the thickness of the epitaxial stack, thus allowing to reach high breakdown voltages with a limited area consumption. Since the carriers must flow vertically, the gate of the devices lies in an etched trench, and it consists of a Metal Oxide Semiconductor (MOS) system. Within this thesis the gate leakage is deeply studied on devices with different gate dielectric, by means of electrical characterizations performed with different connection configurations and different bias polarities. Moreover, the gate capacitance is analytically calculated, and the experimental behavior observed for the Gate-Source and Gate-Drain capacitances over the applied voltage is discussed and modeled considering the GaN bias condition close to the dielectric interface. Lastly, a preliminary dielectric trap characterization is performed by evaluating the capacitance hysteresis induced by the electric field within different gate oxide materials. The last section of this work presents a custom setup developed for the characterization of the threshold voltage variations over the time. The stability of the threshold voltage is fundamental for allowing a device to operate properly in a switching converter. Standard pulsed systems used for the characterization of the threshold voltage allow to evaluate the impact of the bias level on the threshold variation, but no details on the time evolution can be obtained. The presented threshold transient setup monitors the threshold voltage variation over a wide time-interval, ranging from 10 µs to 100 s, allowing the analysis of the trapping and detrapping kinetics. Moreover, by monitoring the transient variation as a function of the temperature it is possible to full characterize (energy level and cross section) the traps involved in the observed instabilities.

The recent application of semiconductor materials, such as GaN, to power electronics has led to the development of a new generation of devices, which promise lower losses, higher operating frequencies and reductions in equipment size. The aim of this research is to study the capabilities of emerging GaN power devices, to understand their advantages, drawbacks, the challenges of their implementation and their potential impact on the performance of power converters. The thesis starts by presenting the development of a simple model for the switching transients of a GaN cascode device under inductive load conditions. The model enables accurate predictions to be made of the switching losses and provides an understanding of the switching process and associated energy flows within the device. The model predictions are validated through experimental measurements. The model reveals the suitability of the cascode device to soft-switching converter topologies. Two GaN cascode transistors are characterised through experimental measurement of their switching parameters (switching speed and switching loss). The study confirms the limited effect of the driver voltage and gate resistance on the turn-off switching process of a cascode device. The performance of the GaN cascode devices is compared against state-of-the-art super junction Si transistors. The results confirm the feasibility of applying the GaN cascode devices in half and full-bridge circuits. Finally, GaN cascode transistors are used to implement a 270V - 28V, 1.5kW, 1 MHz phase-shifted full-bridge isolated converter demonstrating the use of the devices in soft-switching converters. Compared with a 100 kHz silicon counterpart, the magnetic component weight is reduced by 69% whilst achieving a similar efficiency of 91%.

This manuscript describes the design, development, and implementation of a linear high efficiency power amplifier. The symmetrical Doherty power amplifier utilizes TriQuint's 2nd Generation Gallium Nitride (GaN) on Silicon Carbide (SiC) High Electron Mobility Transistor (HEMT) devices (T1G6001032-SM) for a specified design frequency of 3.6 GHz and saturated output power of 40 dBm. Advanced Design Systems (ADS) simulation software, in conjunction with Modelithic's active and passive device models, were used during the design process and will be evaluated against the final measured results. The use of these device models demonstrate a successful first-pass design, putting less dependence on classical load pull analysis, thereby decreasing the design-cycle time. The Doherty power amplifier is a load modulated amplifier containing two individual amplifiers and a combiner network which provides an impedance inversion on the path between the two amplifiers. The carrier amplifier is biased for Class-AB operation and works as a conventional linear amplifier. The second amplifier is biased for Class-C operation, and acts as the peaking amplifier that turns on after a certain instantaneous power has been reached. When this power transition is met the carrier amplifier's drain voltage is already approaching saturation. If the input power is further increased, the peaking amplifier modulates the load seen by the carrier amplifier, such that the output power can increase while maintaining a constant drain voltage on the carrier amplifier. The Doherty power amplifier can improve the efficiency of a power amplifier when the input power is backed-off, making this architecture particularly attractive for high peak-to-average ratio (PAR) environments. The design presented in this manuscript is tuned to achieve maximum linearity at the compromise of the 6dB back-off efficiency in order to maintain a carrier-to- intermodulation ratio greater than 30 dB under a two-tone intermodulation distortion test with 5 MHz tone spacing. Other key figures of merit (FOM) used to evaluate the performance of this design include the power added efficiency (PAE), transducer power gain, scattering parameters, and stability. The final design is tested with a 20 MHz LTE waveform without digital pre-distortion (DPD) to evaluate its linearity reported by its adjacent channel leakage ratio (ACLR). The dielectric substrate selected for this design is 15 mil Taconic RF35A2 and was selected based on its low losses and performance at microwave frequencies. The dielectric substrate and printed circuit board (PCB) design were also modeled using ADS simulation software, to accurately predict the performance of the Doherty power amplifier. The PCB layout was designed so that it can be mounted to an existing 4" x 4" aluminum heat sink to dissipate the heat generated by the transistors while the part is being driven. The performance of the 3.6 GHz symmetrical Doherty power amplifier was measured in the lab and reported a maximum PAE of 55.1%, and a PAE of 48.5% with the input power backed-off by 6dB. These measured results closely match those reported by design simulations and demonstrate the models' effectiveness for creating a first-pass functional design.

This thesis reports the main reliability results and failure mechanisms analysis on Gallium Nitride High Electron Mobility Transistors (GaN-HEMTs) obtained during the three years of PhD activity. The activity has been focused (i) on the main reliability issues of GaN HEMTs for both high frequency applications, like telecommunication or satellite applications, and high power applications, like high-power switching, (ii) on the failure analysis study of the critical device degradation under high electric-field bias conditions, (iii) and on the deep analysis of few parasitic effects that influence the static and dynamic behaviour of this technology. The work has followed the ending of the European project KorriGaN and few research collaborations with European research centers and private companies, exploiting the possibility of understanding what critical issues are actually considered the main threat of each specific application, with the opportunity of using the acquired knowledge on the other GaN transistor's operating fields. The first part of the thesis reports all the activity performed inside the last task of the reliability sub-project of the European project KorriGaN (Key ORganisation for Research on Integrated circuit in GaN technology), called Task-Force project. The purpose was to define the most critical working conditions over the last set of devices developed with the knowledge acquired along the project, and to study the failure mechanisms that reduce the main performances on short and long time period, on devices with different substrate quality. OFF-state reliability tests have shown the improved robustness of the technology with critical failure voltages beyond 100V, much better than older devices developed during the previous batches of KorriGaN project, underlining the great influence of a good device processing which can overcome poor quality of the epitaxial or the substrate layers. Looking at the possible dominant failure mechanisms in on-state conditions, and the related degradation accelerating factors of this robust technology, further analysis have highlighted a failure mechanism accelerated by hot-electron effects in the on-state medium-term reliability, with a negligible effect of the temperature. This result is one of the first reported study where the hot electrons clearly accelerate the performance degradation of GaN-HEMT devices. Similar reliability activities have been performed within the research collaboration with the European Space Agency. In particular, the work has been accomplished both with the activity performed inside the Padova microelectronic laboratories and with 5 cumulative months of placement at the ESA-ESTEC research center in the Netherlands. The studies on a quite stable technology of GaN-HEMT devices suitable for space applications have highlighted a good stability of the main static and RF performances with temperature. From the storage and the reliability analysis, the following results have been observed: good thermal stability of all the main parameters up to a quite critical temperature (T=350°C), beyond which diode degradation happens even during the first hours of test; optimal robustness capabilities above 100V of drain voltage during short-term tests at ambient temperature and at higher temperatures; stable behaviour of the space-designed devices even during high junction-temperature long-term DC stress. Following previous activities carried out on older devices of KorriGaN project, the next part of the thesis describes a deep analysis on the off-state reliability of GaN devices. Many efforts have been spent to better understand the failure mechanisms involved on the critical gate degradation of previous technologies of AlGaN/GaN HEMTs, due to some open questions that literature has still not completely explained. Despite the common acceptance of the last years on the "critical voltage" definition, some different results have been obtained testing the gate reverse-bias behaviour of GaN HEMTs, suggesting a failure mechanism correlated with the initial defectivity of the device under test. Further analysis with fixed negative gate bias have shown the same failure mechanism even below the estimated critical voltage. Failure analysis tools, guided by the electroluminescence emission images (EL), have been used for a deeper investigation on the physical evolution of the damage, following few failure analysis studies reported in the literature. Results have allowed to verify the presence of pre-existent defects and only sometimes to identify the appearance of stress-induced defects, highlighting the big difficulty and sometimes the impossibility to locate material cracks with nanometer-scale size on the semiconductor, at least at the early stages of the device degradation. On the last part of the thesis, some deep investigations on parasitic effects have been reported, with a special focus on the kink effect and on the current collapse effect. These activities have been performed inside the "Preliminary deep levels characterization in materials and test structures" work-package of the European project MANGA (Manufacturable GaN). Studying devices coming from old technologies, it has been possible to correlate the presence of the kink effect with a parasitic EL increase of the emission spectrum in the range of the yellow-red band, even correlated with a yellow broad-band peak founded during cathodoluminescence measurements (CL). These results well support a previous work that assumes the channel electrons interaction with two parasitic levels inside the GaN energy-gap as the origin of the kink effect. Studying AlGaN/GaN devices with different composition and doping of the barrier and the buffer layer respectively, it has been possible to correlate the presence of iron doping in the GaN buffer layer with an increase of the current collapse effect at the high electric-field quiescent points, identifying the activation energy of the trap responsible of this dynamic degradation. Furthermore, the combined use of Secondary Ion Mass Spectroscopy measurements (SIMS) and numerical simulations have allowed to provide a better physical demonstration of the experimental trend, confirming the measured results obtained on both the current collapse measurements and the trap activation-energy analysis.
Questa tesi riassume i principali risultati ottenuti nello studio dell'affidabilità e dei principali meccanismi di guasto nei transistor ad alta mobilità basati su Nitruro di Gallio (GaN-HEMT). L'attività di ricerca dei tre anni di dottorato è stata incentrata (i) sulle principali problematiche affidabilistiche degli HEMT su GaN adatti sia alle applicazioni ad alta frequenza, come il campo delle telecomunicazioni o satellitare, sia alle applicazioni ad alta potenza, come il campo degli switch per alta potenza, (ii) sull'analisi fisica del degrado causato dall'applicazione di alti campi elettrici, (iii) e sull'analisi approfondita di alcuni effetti parassiti che influenzano le caratteristiche statiche e dinamiche di tale tecnologia. Il lavoro ha seguito le ultime fasi del progetto europeo KorriGaN e alcune collaborazioni con centri di ricerca europei e aziende private, integrando la possibilità di capire quali possano essere le problematiche attualmente considerate più critiche in ogni specifica applicazione degli HEMT su GaN, con l'opportunità di trasferire le conoscenze acquisite anche all'interno degli altri campi operativi. La prima parte della tesi riassume tutta l'attività svolta all'interno del progetto Task-Force, attività conclusiva del settore affidabilità del progetto europeo KorriGaN (Key ORganisation for Research on Integrated circuit in GaN technology). Scopo del progetto era individuare le condizioni di funzionamento più critiche nell'ultimo set di dispositivi sviluppati a partire dai risultati ottenuti durante i precedenti anni di progetto, dando particolare importanza ai meccanismi di guasto responsabili della riduzione delle principali prestazioni nel breve e nel medio periodo, e ai diversi comportamenti indotti dalle diverse qualità dei substrati utilizzati nella crescita di tali dispositivi. I test di affidabilità a canale chiuso hanno dimostrato un significativo miglioramento della robustezza rispetto ai dispositivi sviluppati nei precedenti anni di progetto, con tensioni critiche di rottura oltre i 100V. Tali risultati sono stati confermati in tutti i wafer, indipendentemente dalla qualità del substrato, sottolineando come un buon processing dei dispositivi possa completamente mascherare la scarsa qualità dell'epitassia o dei substrati utilizzati. A canale aperto invece, l'analisi dei principali meccanismi di guasto e dei fattori di accelerazione del degrado ha mostrato un particolare meccanismo di degradazione accelerato dagli elettroni caldi (hot electrons) presenti all'interno del canale, con una trascurabile influenza della temperatura di test. Questo risultato è uno dei primi che mostra chiaramente l'influenza degli elettroni caldi nei meccanismi di degrado degli HEMT basati su Nitruro di Gallio. Analoghi studi su affidabilità e meccanismi di guasto sono stati eseguiti all'interno dell'attività di collaborazione con l'Agenzia Spaziale Europea. In particolare, l'attività è stata sviluppata sia all'interno dei laboratori di microelettronica di Padova, sia presso il centro di ricerca dell'Agenzia Spaziale ESA-ESTEC in Olanda, per un periodo complessivo di mobilità di 5 mesi. Gli studi sono stati eseguiti su una tecnologia di dispositivi ormai abbastanza consolidata, adattata alle esigenze specifiche delle applicazioni satellitari. I risultati hanno mostrato una buona stabilità delle principali perfomance DC e RF dei dispositivi al variare delle temperatura, e una buona stabilità nei test di storage fino ai 350°C, temperatura critica alla quale i diodi di gate cominciano rapidamente a degradare. Una significativa affidabilità è stata inoltre rilevata sia nei test a breve termine, con ottima stabilità oltre i 100V di tensione di drain a temperatura ambiente e ad alte temperature, sia nei test a lungo termine, eseguiti sui dispositivi designati per l'applicazione spaziale con test ad elevate temperature di giunzione. La successiva parte della tesi tratta un'analisi approfondita dell'affidabilità a canale chiuso dei transistor su GaN, seguendo precedenti lavori volti allo stesso scopo. Molti studi sono stati eseguiti per comprendere meglio quali siano i meccanismi di guasto coinvolti nella degradazione del gate delle precedenti tecnologie di GaN-HEMT, a causa di alcune questioni ancora irrisolte sulle quali la letteratura non ha ancora dato una completa chiarificazione. Nonostante la definizione di "critical voltage" (tensione critica) ormai comunemente accettata, alcuni test sul comportamento del gate in polarizzazione inversa hanno evidenziato risultanti contrastanti, suggerendo un diverso meccanismo di guasto correlato alla difettosità iniziale del campione. Altre analisi in polarizzazione costante hanno mostrato lo stesso meccanismo di guasto a tensioni di gate ben al di sotto della tensione critica. In seguito, su alcuni campioni sono state eseguite approfondite indagini di guasto per meglio comprendere l'evoluzione fisica del meccanismo di rottura, seguendo alcuni studi recentemente riportati in letteratura. Guidati dalle misure di elettroluminescenza (EL) precedentemente ottenute, tali analisi hanno permesso di verificare la presenza di difetti pre-esistenti e solo in certi casi di identificare la comparsa di alcuni difetti indotti dallo stress, evidenziando l'enorme difficoltà e talvolta l'impossibilità di localizzare dei difetti con dimensioni di scala nanometrica nei diversi strati di semiconduttore (cracks), almeno durante le prime fasi di degrado del campione. L'ultima parte della tesi riporta alcune indagini approfondite su specifici effetti parassiti presenti negli HEMT su GaN, in particolar modo analizzando l'effetto kink e il collasso di corrente (current collapse). Questi studi sono stati svolti all'interno del progetto europeo MANGA (Manufacturable GaN), nel settore dedicato all'indagine dei livelli energetici responsabili degli effetti parassiti. Studiando alcuni dispositivi appartenenti a tecnologie meno recenti, è stato possibile correlare la presenza dell'effetto kink con un aumento inusuale dello spettro di elettro-luminescenza nel range della banda rosso-gialla, a sua volta correlato con un largo picco di emissione nel giallo rilevato durante misure di catodo-luminescenza negli stessi dispositivi. Tali studi confermano un precedente lavoro in cui si assume che l'effeto kink sia originato dall'interazione degli elettroni nel canale con due livelli energetici parassiti presenti all'interno dell'energy gap del GaN. Studiando invece alcuni dispositivi HEMT basati sull'eterostruttura AlGaN/GaN, ma con differenti composizioni dello strato barriera e drogaggio dello strato buffer, è stato possibile correlare la concentrazione del ferro, usato come drogante all'interno del buffer, con un incremento del current collapse nei punti di polarizzazione a maggior campo elettrico, identificando poi l'energia di attivazione della trappola responsabile di tale degrado delle caratteristiche dinamiche. L'uso combinato di misure SIMS (Secondary Ion Mass Spectroscopy) e simulazioni numeriche hanno permesso di dare una dimostrazione fisica dell'effetto osservato nelle misure di laboratorio, confermando sia i risultati ottenuti in termini di collasso di corrente, sia la valutazione sperimentale dell'energia di attivazione della trappola.

Le projet industriel français MEGaN vise le développement de module de puissance à base de compostant HEMT en GaN. Une des application industrielle concerne l’aéronautique avec une forte contrainte en isolation galvanique (>100 kV/s) et en température ambiante (200°C). Le travail de thèse a été concentré sur une brique module de puissance (bras d’onduleur 650 V 30 A). L’objectif est d’atteindre un prototype de facteur de forme peu épais, 30 cm2 et embarquant l’ensemble des fonctions driver, alimentation de driver, la capacité de bus et capteur de courant phase. Cet objectif implique un fort rendement énergétique, et le respect de l’isolation galvanique alors que la contrainte en surface est forte. Le manuscrit, outre l’état de l’art relatif au module de puissance et notamment celui à base de transistor GaN HEMT, aborde une solution d’isolation de signaux de commande à base de micro-transformateur. Des prototypes de micro-transformateur ont été caractérisés et vieillis pendant 3000 H pour évaluer la robustesse de la solution. Les travaux ont contribué à la caractérisation de plusieurs composants GaN afin de mûrir des modèles pour la simulation circuit de topologie de convertisseur. Au sein du travail collaboratif MEGaN, notre contribution ne concernait pas la conception du circuit intégré (driver de grille), tout en ayant participé à la validation des spécifications, mais une stratégie d’alimentation du driver de grille. Une première proposition d’alimentation isolée pour le driver de grille a privilégié l’utilisation de composants GaN basse-tension. La topologie Flyback résonante avec clamp permet de tirer le meilleur parti de ces composants GaN mais pose la contrainte du transformateur de puissance. Plusieurs technologies pour la réalisation du transformateur ont été validées expérimentalement et notamment une proposition originale enfouissement du composant magnétique au sein d’un substrat polymère haute-température. En particulier, un procédé de fabrication peu onéreux permet d’obtenir un dispositif fiable (1000 H de cyclage entre - 55 ; + 200°C), avec un rendement intrinsèque de 88 % pour 2 W transférés. La capacité parasite d’isolation est réduite par rapport aux prototypes précédent. Deux prototypes d’alimentations à forte intégration utilisent soit les transistors GaN basse tension (2.4 MHz, 2 W, 74 %, 6 cm2), soit un circuit intégré dédié en technologie CMOS SOI, conçu pour l’application (1.2 MHz, 2 W, 77 %, 8.5 cm2). Le manuscrit propose par la suite une solution intégrable de mesure de courant de phase du bras de pont, basé sur une magnétorésistance. La comparaison expérimentale vis à vis d’une solution à résistance de shunt. Enfin, deux prototypes de convertisseur sont décrits, dont une a pu faire l’objet d’une validation expérimentale démontrant des pertes en commutation réduites
The french industrial project MEGaN targets the development of power module based on GaN HEMT transistors. One of the industrial applications is the aeronautics field with a high-constraint on the galvanic isolation (>100 kV/s) and ambient temperature (200°C). The intent of this work is the power module block (3 phases inverter 650 V 30 A). The goal is to obtain a small footprint module, 30 cm2, with necessary functions such as gate driver, gate driver power supply, bulk capacitor and current phase sensor. This goal implies high efficiency as well as respect of the constraint of galvanic isolation with an optimized volume. This dissertation, besides the state of the art of power modules and especially the GaN HEMT ones, addressed a control signal isolation solution based on coreless transformers. Different prototypes based on coreless transformers were characterized and verified over 3000 hours in order to evaluate their robustness. The different studies realized the characterization of the different market available GaN HEMTs in order to mature a circuit simulation model for various converter topologies. In the collaborative work of the project, our contribution did not focus on the gate driver chip design even if experimental evaluation work was made, but a gate driver power supply strategy. The first gate driver isolated power supply design proposition focused on the low-voltage GaN HEMT conversion. The active-clamp Flyback topology allows to have the best trade-off between the GaN transistors and the isolation constraint of the transformer. Different transformer topolgies were experimentally performed and a novel PCB embedded transformer process was proposed with high-temperature capability. A lamination process was proposed for its cost-efficiency and for the reliability of the prototype (1000 H cycling test between - 55; + 200°C), with 88 % intrinsic efficiency. However, the transformer isolation capacitance was drastically reduced compared to the previous prototypes. 2 high-integrated gate driver power supply prototypes were designed with: GaN transistors (2.4 MHz, 2 W, 74 %, 6 cm2), and with a CMOS SOI dedicated chip (1.2 MHz, 2 W, 77 %, 8.5 cm2). In the last chapter, this dissertation presents an easily integrated solution for a phase current sensor based on the magnetoresistance component. The comparison between shunt resistor and magnetoresistance is experimentally performed. Finally, two inverter prototypes are presented, with one multi-level gate driver dedicated for GaN HEMT showing small switching loss performance

GaN has the potential to revolutionize the high power electronics industry, enabling high voltage applications and better power conversion efficiency due to its intrinsic material properties and newly available high purity bulk substrates. However, unintentional impurity incorporation needs to be reduced. This reduction can be accomplished by reducing the source of contamination and exploration of extreme growth conditions which reduce the incorporation of these contaminants. Newly available bulk substrates with low threading dislocations allow for better study of material properties, as opposed to material whose properties are dominated by structural and chemical defects. In addition, very thick films can be grown without cracking due to exact lattice and thermal expansion coefficient match. Through chemical and electrical measurements, this work aims to find growth conditions which reduces contamination without a severe impact on growth rate, which is an important factor from an industry standpoint. The proposed thicknesses of these devices are on the order of one hundred microns and requires tight control of the intentional dopants.
Doctor of Philosophy
GaN is a compound semiconductor which has the potential to revolutionize the high power electronics industry, enabling new applications and energy savings due to its inherent material properties. However, material quality and purity requires improvement. This improvement can be accomplished by reducing contamination and growing under extreme conditions. Newly available bulk substrates with low defects allow for better study of material properties. In addition, very thick films can be grown without cracking on these substrates due to exact lattice and thermal expansion coefficient match. Through chemical and electrical measurements, this work aims to find optimal growth conditions for high purity GaN without a severe impact on growth rate, which is an important factor from an industry standpoint. The proposed thicknesses of these devices are on the order of one hundred microns and requires tight control of impurities.

Auxiliary power supply (APS) plays a key role in ensuring the safe operation of the main circuit elements including gate drivers, sensors, controllers, etc. in medium voltage (MV) silicon carbide (SiC)-based converter systems. Such a converter requires APS to have high insulation capability, low common-mode coupling capacitance (Ccm ), and high-power density. Furthermore, considering the lifetime and simplicity of the auxiliary power supply system design in the MV converter, partial discharge (PD) free and multi-load driving ability are the additional two factors that need to be addressed in the design. However, today’s state-of-the-art products have either low power rating or bulky designs, which does not satisfy the demands. To improve the current designs, this thesis presents a 1 MHz isolated APS design using gallium nitride (GaN) devices with MV insulation reinforcement. By adopting LCCL-LC resonant topology, the proposed APS is able to supply multiple loads simultaneously and realize zero voltage switching (ZVS) at any load conditions. Since high reliability under faulty load conditions is also an important feature for APS in MV converter, the secondary side circuit of APS is designed as a regulated stage. To achieve MV insulation (> 20 kV) as well as low Ccm value (< 5 pF), a current-based transformer with a single turn structure using MV insulation wire is designed. Furthermore, by introducing different insulated materials and shielding structures, the APS is capable to achieve different partial discharge inception voltages (PDIV). In this thesis, the transformer design, resonant converter design, and insulation strategies will be detailly explained and verified by experiment results. Overall, this proposed APS is capable to supply multiple loads simultaneously with a maximum power of 120 W for the sending side and 20 W for each receiving side in a compact form factor. ZVS can be realized regardless of load conditions. Based on different insulation materials, two different receiving sides were built. Both of them can achieve a breakdown voltage of over 20 kV. The air-insulated solution can achieve a PDIV of 6 kV with Ccm of 1.2 pF. The silicone-insulated solution can achieve a PDIV of 17 kV with Ccm of 3.9 pF.
M.S.
Recently, 10 kV silicon carbide (SiC) MOSFET receives strong attention for medium voltage applications. Asit can switch at very high speed, e.g. > 50 V/ns, the converter system can operate at higher switching frequency condition with very small switching losses compared to silicon (Si) IGBT [8]. However, the fast dv/dt noise also creates the common mode current via coupling capacitors distributed inside the converter system, thereby introducing lots of electromagnetic interference (EMI) issues. Such issues typically occur within the gate driver power supplies due to the high dv/dt noises across the input and output of the supply. Therefore, the ultra-small coupling capacitor (<5 pF) of a gate driver power supply is strongly desired.[37] To satisfy the APS demands for high power modular converter system, a solution is proposed in this thesis. This work investigates the design of 1 MHz isolated APS using gallium nitride (GaN) devices with medium voltage insulation reinforcement. By increasing switching frequency, the overall converter size could be reduced dramatically. To achieve a low Ccm value and medium voltage insulation of the system, a current-based transformer with a single turn on the sending side is designed. By adopting LCCL-LC resonant topology, a current source is formed as the output of sending side circuity, so it can drive multiple loads importantly with a maximum of 120 W. At the same time, ZVS can use realized with different load conditions. The receiving side is a regulated stage, so the output voltage can be easily adjusted and it can operate in a load fault condition. Different insulation solutions will be introduced and their effect on Ccm will be discussed. To further reduce Ccm, shielding will be introduced. Overall, this proposed APS can achieve a breakdown voltage of over 20 kV and PDIV up to 16.6 kV with Ccm<5 pF. Besides, multi-load driving ability is able to achieve with a maximum of 120 W. ZVS can be realized. In the end, the experiment results will be provided.

Il y a actuellement un intérêt croissant pour la construction des dispositifs électroniques à semiconducteur pour les applications domotiques. La technologie des semiconducteurs de puissance a été essentiellement limitée au silicium. Récemment, de nouveaux matériaux ayant des propriétés supérieures sont étudiés en tant que remplaçants potentiels, en particulier : le nitrure de gallium et le carbure de silicium. L'état actuel de développement de la technologie 4H-SiC est beaucoup plus mature que pour le GaN. Cependant, l'utilisation de 4H-SiC n’est pas une solution économiquement rentable pour la réalisation des redresseurs Schottky 600 V. Les progrès récents dans le développement des couches épitaxiées de GaN de type n sur substrat Si offrent de nouvelles perspectives pour le développement des dispositifs de puissance à faible coût. C’est dans ce cadre que ma thèse s’inscrit pour réaliser avec ce type de substrat, un redresseur Schottky de puissance avec un calibre en tension de l’ordre de 600V. Deux architectures de redresseurs sont exposées. La première est une architecture pseudo-verticale proposée dans le cadre du projet G2ReC et la deuxième est une architecture latérale à base d’hétérojonction AlGaN/GaN obtenue à partir d'une structure de transistor HEMT. L’optimisation de ces deux dispositifs en GaN est issue de simulation par la méthode des éléments finis. Dans ce cadre, une adaptation des modèles de simulation à partir des paramètres physiques du GaN extraits depuis la littérature a été effectuée. Ensuite, une étude d’influence des paramètres géométriques et technologiques sur les propriétés statiques en direct et en inverse des redresseurs a été réalisée. Enfin, des structures de tests ont été fabriquées et caractérisées afin d’évaluer et d’optimiser le caractère prédictif des simulations par éléments finis. Ces études nous ont conduit à identifier l'origine des limites des structures de première génération et de définir de nouvelles structures plus performantes
There is increasing interest in the fabrication of power semiconductor devices in home automation applications. Power semiconductor technology has been essentially confined to Si. Recently, new materials with superior properties are being investigated as potential replacements, in particular silicon carbide (SiC) and gallium nitride (GaN). The current state of development of SiC technology is much more mature than for GaN. However, the use of 4H-SiC is not a cost effective solution for realizing a medium and high voltage Schottky diode. Recent advances on the development of thick n-type GaN epilayers on Si substrate offer new prospects for the development of a low-cost Schottky rectifiers for at least medium voltage range 600 V. In the context of our thesis, two types of GaN based rectifier architectures have been studied. The first one is a pseudo-vertical architecture proposed during previous G2ReC project. The second one has a lateral structure with AlGaN/GaN heterojunction, derived from a HEMT structure. The optimization of the Schottky rectifiers has been achieved by finite element simulations. As a first step, the models are implemented in the software and adjusted with the parameters described in the literature. The influence of the geometrical and physical parameters on the specific on-resistance and on the breakdown voltage has been analysed. Finally, the test devices have been realized and characterized to optimize and to validate the parameters of these models. These studies lead to identify the limits of the structures and create a new generation of powerful structures

Today, the investigation of fuel economy improvements in internal combustion engines (ICEs) has become the most significant research interest among the automobile manufacturers and researchers. The scarcity of natural resources, progressively increasing oil prices, carbon dioxide taxation and stringent emission regulations all make fuel economy research relevant and compelling. The enhancement of engine performance solely using incylinder techniques is proving increasingly difficult and as a consequence the concept of exhaust energy recovery has emerged as an area of considerable interest. Three main energy recovery systems have been identified that are at various stages of investigation. Vapour power bottoming cycles and turbo-compounding devices have already been applied in commercially available marine engines and automobiles. Although the fuel economy benefits are substantial, system design implications have limited their adaptation due to the additional components and the complexity of the resulting system. In this context, thermo-electric (TE) generation systems, though still in their infancy for vehicle applications have been identified as attractive, promising and solid state candidates of low complexity. The performance of these devices is limited to the relative infancy of materials investigations and module architectures. There is great potential to be explored. The initial modelling work reported in this study shows that with current materials and construction technology, thermo-electric devices could be produced to displace the alternator of the light duty vehicles, providing the fuel economy benefits of 3.9%-4.7% for passenger cars and 7.4% for passenger buses. More efficient thermo-electric materials could increase the fuel economy significantly resulting in a substantially improved business case. The dynamic behaviour of the thermo-electric generator (TEG) applied in both, main exhaust gas stream and exhaust gas recirculation (EGR) path of light duty and heavy duty engines were studied through a series of experimental and modelling programs. The analyses of the thermo-electric generation systems have highlighted the need for advanced heat exchanger design as well as the improved materials to enhance the performance of these systems. These research requirements led to the need for a systems evaluation technique typified by hardware-in-the-loop (HIL) testing method to evaluate heat exchange and materials options. HIL methods have been used during this study to estimate both the output power and the exhaust back pressure created by the device. The work has established the feasibility of a new approach to heat exchange devices for thermo-electric systems. Based on design projections and the predicted performance of new materials, the potential to match the performance of established heat recovery methods has been demonstrated.

Dihydro-1,2,4,5-tetrazine-3,6-dicarboxylate was introduced into the chemically stable UiO-66 structure by a postsynthetic linker exchange reaction to create an optical sensor material for the detection of oxidative agents such as nitrous gases. The incorporated tetrazine unit can be reversibly oxidized and reduced, which is accompanied by a drastic colour change from yellow to pink and vice versa. The high stability of the framework during redox reaction was proven by powder X-ray diffraction and nitrogen physisorption measurements.

Silicon-based transistors such as MOSFETs have been the preferred choice for decades now for both power as well as high-frequency device applications. The meteoric rise of Silicon was fuelled by the quest for a highly efficient and low-cost switching device. However, the rate of performance improvement in Silicon-based devices is levelling off over the past few years due to underlying theoretical limits set by fundamental physics. It has become extremely challenging to deliver the performance standards at declining costs consistently. GaN has risen as the most promising alternative to traditional Silicon-based technology. The wide bandgap and ability to conduct carriers at very high mobility infuses a positive momentum to the Moor’s law. The fundamental high electric field strength of the material ensures a significant reduction in device size for a given on-resistance and breakdown voltage. It directly translates to lower effective costs per chip. The existing commercial products with 5-10 times enhanced performance compared to Silicon theoretical limits is a strong motivation to further optimize GaN-based devices for power and RF applications. Silicon-based devices have long enjoyed the luxury of an established technology development process, which has been optimized over the years via several iterations and efforts. TCAD based design is the stepping-stone for any technology realization. Employing theoretical knowledge and visualizing the physics in real-time for device design or optimization is the heart of the Silicon Industry. The amount of design cost and time saved by following a consistent CAD design to fabrication approach is enormous. On the contrary, GaN-based devices have unique properties and associated design parameters. The conventional Silicon device design knowledge cannot be extrapolated to GaN-based devices. A wide gap exists between the theoretical and reported performance of GaN-based power and RF devices. A systematic design approach is needed, which involves both simulation and experimental analysis. In this thesis, we have developed a consistent design framework extending from TCAD modelling, device fabrication, experimental analyses to circuit-level feasibility. The co-design approach has enabled the exploration of accurate physical behaviour and helped identify the critical design parameters for GaN-based devices [1,2]. This thesis has been divided into the following threads: In the first part of the work, insights into GaN-based high electron transistors (HEMT) for power and mm-wave applications have been developed. Field Plate technology is the most widely adopted technique for increasing the breakdown voltage in HEMT. In order to achieve optimum performance, it is imperative to scale down the device without compromising the breakdown voltage. However, the conventional lateral field plate configuration is limited by the drift region or gate to drain distance of the device. This issue becomes more severe as the device is scaled down to enhance the on-state performance. This translates to a narrower design window for field plate implementation, which requires more complex and precise lithography alignment. Notably, in the case of RF applications, where the design rules for the lateral device dimensions are rather stringent, the use of a lateral field plate becomes less feasible. Besides, as the device scales down, the contribution of the field plate induced parasitic miller capacitance begins to dominate, resulting in degradation in RF performance parameters such as power gain and cut-off frequency. In order to circumvent these issues, in this thesis, we have proposed two novel field plate architecture- vertical field plate and dual field plate [3,4]. The proposed designs show superior DC, small-signal, and large-signal performance compared to conventional field plate architectures. In addition, various field plate designs have been reported in the past to improve the breakdown performance, namely- source connected, gate connected, and drain connected field plate configurations. However, there is no consensus on the criteria for field plate implementation. The field plate design in HEMT is dependent on the spatial electric field distribution in the channel. Since the electric field is a function of charge distribution across the entire system, the interplay of various charge sources and its implications on field and breakdown voltage must be explored in detail from the device design point of view. Subsequently, we have revealed the interplay of charges (Surface, Polarization and Buffer) and their relative concentrations across the AlGaN/GaN epi-stack governing the electric field distribution and the breakdown mechanism in HEMTs [5]. The investigations are carried out for Schottky, MIS, and p-GaN gate stacks while accounting for possible GaN buffer types (Fe-doped and C-doped). These insights will help to design efficient surface passivation schemes and resolve ambiguities, often observed in experiments, in terms of location of peak electric field (drain side, or gate side, or both) as well as OFF-state conduction and breakdown mechanism (gate injection, or punch-through, or parasitic conduction through buffer or avalanche generation). Besides, these learnings are used to develop unified field plate design guidelines for various scenarios [6]. Attributed to several design/technology/growth parameters to engineer, the design of RF HEMT has become a multi-dimensional engineering problem, which is non-trivial to address from the experimental design of experiments. In this thesis, we have developed an approach for maximizing RF figures of merit parameters of HEMTs, while accounting for design - performance - nonlinearity trade-offs [7,8]. We have investigated the RF performance of a partially recessed architecture by carrying out thorough comparative analyses of design parameters such as barrier type, lateral scaling, and contact resistance. The modelling of mm-wave HEMT enables performance optimization in these devices by employing CAD analysis. The optimized partially recessed architecture has been demonstrated in an RF class A and class AB power amplifier configuration operating from 0.25Thz to 0.6 THz frequency range. It confirms the feasibility of the optimized RF device for various circuit applications [9]. The other key component in any power electronic circuit or THz/mmW system is a Schottky barrier diode. GaN-based heterostructure Schottky Barrier Diodes (SBD), owing to its ability to sustain high electric fields and high temperature while offering exceptionally high current density, low cut-in voltage, has attracted tremendous attention for high power switching applications. In the second part of the thesis, comprehensive TCAD and experimental co-design strategies have been proposed for high power and THz SBD. The critical part of the SBD diode design involves modelling the non-idealities at the Schottky interface and designing physics based process experiments to fix these non-idealities. The fabrication process-induced dangling bonds and interface traps substantially affect the forward and reverse diode performance. These dangling bonds alter the localized energy band level and impact the carrier transport. We have modelled the anode contact interface by accounting for - (1) thin (∼ 5A˚ ) interfacial oxide layer, (2) discrete energy levels in energy band gap due to Nitrogen vacancies, and (3) continuum of trap states due to surface dangling bonds. The trap characteristics such as type, energy levels, and concentration determine the reverse leakage and breakdown voltage. Using the developed physical insights, we then reported (experimentally) an interface engineering technique to reverse the adverse impact of donor interface states on device performance [10]. In this thesis, we also discovered that the impact of Schottky interface quality has a strong correlation to anode recess depth. The Breakdown mechanisms in SBD for unintentionally doped (UID) buffer, Fe-doped buffer, and C-doped buffer are studied. In addition to the impact of anode termination on breakdown voltage, we have also investigated the repercussions of field plate design on other performance figures of merit parameters such as diode current collapse, reverse recovery time, reverse current overshoot, and electro-thermal behaviour [11]. Using the systematic device design approach, we have experimentally demonstrated high power SBD with 15A forward current at 5.5V while having reverse blocking greater than 500V. SBD diode also finds a wide range of applications in THz frequency detection, frequency multiplication, and mixing. The design metrics for THz SBD vastly differs from the one used for high power applications. It is imperative to account for the impact of associated device parasitic elements at high-frequency operating conditions. The planer, multi-finger SBD topology looks most promising due to the ease of integration and high cut-off frequencies demonstrated. This thesis presents the first report on the design and engineering of multi-finger THz SBD [12]. The study investigates the design metrics of AlN/GaN-based multi-finger, lateral SBD and proposes guidelines to maximize THz operation performance.

博士
國立清華大學
電子工程研究所
102
This thesis focuses on high performance AlGaN/GaN heterojunction devices on Si substrate for high power and high frequency applications. For high voltage applications, the contact engineering was investigated to improve device off-state characteristics in GaN on Si devices by using two different approaches, including a selective Si diffusion structure for AlGaN/GaN SBDs and a hybrid Schottky-Ohmic drain electrode structure for AlGaN/GaN HEMTs. Both two approaches are proposed to alleviate the E-field peaks at the alloy spikes and further enhance the breakdown voltage by manipulating the E-field around Ohmic contact. First, a selective Si diffusion approach is proposed to reduce Schottky onset voltage from 1.3 V to 1.0 V and enhance the reverse blocking capability up to 20%simultaneously. With Si diffused layer underneath cathode, a low and stable contact resistance and relatively smooth ohmic metal morphology can be obtained. Second, a hybrid drain device shows nearly zero drain onset voltage and reduces drain leakage current by one order of magnitude, comparing with that of traditional ohmic drain devices. Both the gate-drain and buffer breakdown can be improved. We also investigated the impact of Schottky extension length Lext on device characteristics. After optimizing Lext, the breakdown voltage can be enhanced up to 60% without clear on-resistance RON degradation. For high frequency applications, we proposed a method to directly extract the more convergent results for parasitic substrate resistance and capacitance in small signal model of GaN-on-Si HEMTs by using derivative method. The model is verified by in-house 200-nm T-gate AlGaN/GaN HEMTs. Also, the simulation is performed to analyze the impact of substrate effect on device high frequency characteristics.

碩士
國立中央大學
電機工程學系
105
Gallium Nitride (GaN) power transistors exist better material properties than Si-based transistors such as higher electron mobility, higher breakdown voltage, higher current density, lower on-state resistance, lower gate charge and smaller output capacitance. It is particularly suitable to function as high speed switches for power electronic circuit applications. The thesis aims to design a circuit module to measure three electrical parameters of depletion-mode GaN power transistors in order to provide information for power electronic circuit design. Three major parameters include switching time, gate charge, and DC-IV curve. A detailed description of the designed circuits is given and measurement results are compared to the estimation model. The measurement error is about 32% because of design issues of the circuit module.

博士
國立交通大學
機械工程系所
106
Work on wide band gap materials and devices has been going on for many years. One of the important wide band gap materials showing great promise for the future for both switching and power applications is Gallium Nitride (GaN). Heteroepitaxial GaN devices on Si is restricted to lateral device structures. The most common lateral device structure is the HEMT (High Electron Mobility Transistor). Wide band gap and high critical field give GaN an advantage when high power is a key desirable device feature. However, the relatively poor thermal conductivity of GaN makes heat management for GaN devices a challenge for system designers to contend with. This study presents the packaging development of high power AlGaN/GaN HEMTs on Si substrate. By foremost carrying out electro-thermal simulation with Silvaco TCAD and related thermal measurements with infrared thermography and Raman spectroscopy for basic 5 mm GaN HEMTs, the location of hot spot in operating device can be obtained. Based on the outcome, further packaged GaN HEMT is analyzed. The packaging structure is designed on the device periphery surface for enhancing Si substrate thermal dissipation. The effects of structure design and fabrication processes on the device performance were studied. In addition, this study investigates the thermal performance of packaged normally-on multi-finger AlGaN/GaN HEMTs that are cascaded with a low-voltage MOSFET and a SiC Schottky barrier diode (SBD). The analytical results are confirmed by comparing them with the infrared thermographic measurements and numerical results obtained from simulation using Ansys Icepak. To increase the output power, the GaN HEMTs are connected in parallel and the related researches are also displayed. Finally, the packaged GaN devices are applied in power conversion systems.

Dottorato in Tecnologie dell’informazione e della comunicazione, Ciclo XXXI
The wide spectrum of power electronics applications, including their role in renewable energy conversion and energy saving, require the innovation from conventional Silicon (Si) technology into new materials and architectures that allow the fabrication of increasingly lightweight, compact, efficient and reliable devices. However, the trade-off between long lifetime, high performance and low cost in the emerging technologies represents a huge limitation that has gained the attention of different research groups in the last years. Gallium Nitride (GaN) is a wide-bandgap semiconductor (WBGS) that constitutes an excellent candidate for high-power and high-frequency applications due to its remarkable features such as high operating temperature, high dielectric strength, high current density, high switching speed, and low on-resistance. Compared with its Silicon counterpart, GaN is superior in terms of high breakdown field ( 3 MV/cm), exceptional carrier mobility, and power dissipation. By taking into account other WBG materials such as SiC, GaN grown on Si substrates promises similar performance but at a much lower cost in the low to mid power and high-frequency range. Since GaN allows size and weight device reduction due to a better relationship between on-resistance and breakdown voltage, it is suitable for a variety of applications such as RF power amplifiers, power switching systems, sensors, detectors, etc. Especially, in the field of energy efficiency, GaN technology appears as a future successor of Si in power conversion circuits. However, some drawbacks related to technology cost, integration, and long-term reliability have to be overcome for its wide adoption in the power applications market. One of the worst inconveniences of AlGaN/GaN High Electron Mobility Transistors (HEMTs) is the normally-ON operation. Since a two-dimensional electron gas (2DEG) channel is formed at the AlGaN/GaN interface due to inherent material properties, a negative bias has to be applied at the gate to switch the device off. Among the proposed solutions to fabricate normally-OFF devices, the metaloxide/ insulator-semiconductor (MOS/MIS) structure with different insulators has shown remarkable improvements in gate leakage reduction and drain current increase. Also in AlGaN/GaN Schottky Barrier Diodes (SBDs), the introduction of a MOS structure to create a gated edge termination (GET) at the anode area has resulted in significant improvements in reverse diode leakage and forward diode voltage. Nevertheless, the improvement in the device performance by the introduction of a dielectric could seriously affect the device long-term reliability since additional degradation in this layer and at its interfaces with AlGaN or GaN occurs. In the case of conversion systems, power devices are continuously switched from an OFF-state condition at high drain bias to an ON-state condition at large drain current. Therefore, the reliability of GaN-based devices has to be proven for the complete ON/OFF operation. This dissertation focuses on providing a more comprehensive analysis of two main reliability issues related to the dielectric insertion under the gate/anode stacks by analyzing the use of different dielectric materials and device architectures. The first issue is the positive bias temperature instability (PBTI), which is related to the degradation of electrical parameters when high gate voltages and temperatures are applied and is especially observed during the ON-state operation of the transistor. By using MOS-HEMT structures with different gate dielectrics (SiO2, Al2O3, and AlN/Al2O3), the impact of the stress voltage, recovery voltage and temperature on the device reliability is analyzed including the role of oxide traps and the interface states to provide physical insights into this mechanism. The second phenomenon discussed in this thesis is the time-dependent dielectric breakdown (TDDB) observed on GET-SBDs during its OFF-operation. The percolation model and Weibull distribution are used to understand this degradation mechanism. As a result, it has been demonstrated that the time to breakdown tBD is influenced by the GET structure (single vs. double), the passivation thickness, the preclean process at the anode region before the GET dielectric deposition and the capping layer. Finally, by using 2D TCAD simulations, the long-term reliability improvement has been related to the reduction of the electric fie
University of Calabria

Efficient power conversion is essential to face the continuously increasing energy consumption of our society. GaN based vertical power field effect transistors provide excellent performance figures for power-conversion switches, due to their capability of handling high voltages and current densities with very low area consumption. This work focuses on a vertical trench gate metal oxide semiconductor field effect transistor (MOSFET) with conceptional advantages in a device fabrication preceded GaN epitaxy and enhancement mode characteristics. The functional layer stack comprises from the bottom an n+/n- drift/p body/n+ source GaN layer sequence. Special attention is paid to the Mg doping of the p-GaN body layer, which is a complex topic by itself. Hydrogen passivation of magnesium plays an essential role, since only the active (hydrogen-free) Mg concentration determines the threshold voltage of the MOSFET and the blocking capability of the body diode. Fabrication specific challenges of the concept are related to the complex integration, formation of ohmic contacts to the functional layers, the specific implementation and processing scheme of the gate trench module and the lateral edge termination. The maximum electric field, which was achieved in the pn- junction of the body diode of the MOSFET is estimated to be around 2.1 MV/cm. From double-sweep transfer measurements with relatively small hysteresis, steep subthreshold slope and a threshold voltage of 3 - 4 V a reasonably good Al2O3/GaN interface quality is indicated. In the conductive state a channel mobility of around 80 - 100 cm2/Vs is estimated. This obtained value is comparable to device with additional overgrowth of the channel. Further enhancement of the OFF-state and ON-state characteristics is expected for optimization of the device termination and the high-k/GaN interface of the vertical trench gate, respectively. From the obtained results and dependencies key figures of an area efficient and competitive device design with thick drift layer is extrapolated. Finally, an outlook is given and advancement possibilities as well as technological limits are discussed.:1 Motivation and boundary conditions 1.1 A comparison of competitive semiconductor materials 1.2 Vertical GaN device concepts 1.3 Target application for power switches 2 The vertical GaN MOSFET concept 2.1 Incomplete ionization of dopants 2.2 The pseudo-vertical approach 2.3 Considerations for the device OFF-state 2.3.1 The pn-junction in reverse operation 2.3.2 The gate trench MIS-structure in OFF-state 2.3.3 Dimensional constraints and field plates 2.4 Static ON-state and switching considerations 2.4.1 The pn-junction in forward operation 2.4.2 Resistance contributions 2.4.3 Device model and channel mobility 2.4.4 Threshold voltage and subthreshold slope 2.4.5 Interface and dielectric trap states in wide band semiconductors 2.4.6 The body bias effect 3 Fabrication and characterisation 3.1 Growth methods for GaN substrates and layers 3.2 Substrates and the desired starting material 3.2.1 Physical and micro-structural characterisation 3.2.2 Dislocations and impurities 3.3 Pseudo- and true-vertical MOSFET fabrication 3.3.1 Processing routes 3.3.2 Inductively-coupled plasma etching 3.3.3 Process flow modification 3.4 Electrical characterisation, structures and process control 3.4.1 Current voltage characterisation 3.4.2 C(V) measurements and charge carrier profiling 3.4.3 Cooperative characterisation structures 4 Properties of the functional layers 4.1 Morphology of the MOVPE grown layers 4.2 Hydrogen out-diffusion treatment 4.3 Morphology of the n+-source layer grown by MBE 4.4 N-type doping of the functional layers 4.5 P-type GaN by magnesium doping 4.6 Structural properties after the etching and gate module formation 4.7 Electrical layer characterization 4.7.1 Gate dielectric and interface evaluation 5 Pseudo- and true vertical device operation 5.1 Influences of the metal-line sheet resistance 5.2 Formation and characterisation of ohmic contacts 5.2.1 Ohmic contacts to n-type GaN 5.2.2 Ohmic contacts to p-GaN 5.3 The pn- body diode 5.4 MOSFET operation 5.4.1 ON-state and turn-ON operation 5.4.2 The body bias effect on the threshold voltage 5.4.3 Device OFF-state 6 Summary and conclusion 6.1 Device performance 6.2 Current limits of the vertical device technology 6.3 Possibilities for advancements Bibliography A Appendix A.1 Deduction: Forward diffusion current of the pn-diode A.2 Deduction: Operation regions in the EKV model Figures Tables Abbreviations Symbols Postamble and Acknowledgement

Today's world is digital world or we can say electronics world. So basically technology goes on increasing day by day simultaneously the backbone of technology that is the semiconductor devices also plays important role to develop the technology world. But if we examine development of technology with the development of transistors are proportional to each others where as the transistors size is inversely proportional mean transistors size goes on decreasing which is terms as scaling which obeys the Moore's law. So the transistors size become smaller and smaller and the connection becomes shorter and shorter. Basically what happen if size of transistors goes on decreasing the capacitance decreases which decrease the delay to circuit so what will happen if delay will decrease no doubt speed will increase. So in order to develop a model for high speed, high frequency, high gain, high power and low noise a device was developed which is named as High Electron Mobility Transistors (HEMT). So as the technology demands goes on increase the importance of Silicon devices becomes elevated, that is why researchers developed a semiconductor device which is the mixture of group 111-V elements (GaAS, GaN etc.). So may question arise why researcher go for combination of group 111-V element because if we compare with Silicon then GaN has the material properties like bandgap energy, electron/hole mobility, electric background field, thermal conductivity, 2DEG density etc are much more greater than the silicon. In this paper we examined the DC characteristics of Aluminium gallium nitride and gallium nitride (AlGaN/GaN) HEMT by placing double oxide layers that are H f02/ Si02 in beneath of metal gate above AlGaN barrier layer. Also we compared the DC characteristics of AlGaN/GaN HEMT with Metal oxide semiconductor high electron mobility transistor (MOSHEMT). The DC characteristics of newly simulated MOSHEMT shows the superior performance as comparison to AlGaN/GaN HEMT. We simulated both the devices by using Synopsys Technology Computer Aided Design (TCAD) software. Various parameters were extracted from both the devices and came to conclusion that MOSHEMT shows enhanced performance over AlGaN/GaN HEMT.

博士
國立清華大學
電子工程研究所
107
In this study, MOCVD is used to grow GaN epitaxy layers on conventional sapphire substrate (CSS) and patterned Sapphire Substrate (PSS) of different size. Quasi-vertical GaN PIN diodes are made, edges of devices are protected by the PECVD grown SiO2 layer. After confirming the edge of the device is well-protected, characterization study is made. Study includes I-V, Ron (on resistance), C-V (capacitance-voltage), and DLTS measurement and analysis. The result shows that PSS is helpful to get a lower trap concentration in I-layer, and the size of PSS is also an important impact factor.

碩士
國立臺北科技大學
電機工程系
107
The main theme of this thesis is design and implement a Totem-pole PFC with GaN power devices. The inducutor current is in continuous-conduction mode which is suitable for medium and high power application. The power device which is operated in high frequency requires or no less reverse recovery time to avoid short circuit and larger short-circuit current losses and even circuit damage. In this thesis, GaN power components are used, which has almost no reverse recovery current, thereby overcoming this problem. And use high frequency switch soft start technology to reduce the current spike, which occur at the zero cross point of input current. The specifications of the converter include: output power 800 W, input voltage 230 V/60 Hz, output voltage 380 VDC, switching frequency 100 kHz. Experimental results show: full load efficiency is 98.86 %, power factor is 0.974, and THDi is 6.921 %, the harmonics meet the requirement of IEC61000-3-2 Class A. By loss analysis, the total switching loss of high frequency switch is the highest.

博士
國立交通大學
材料科學與工程學系所
107
Gallium nitride-based metal–insulator–semiconductor high electron mobility transistors (GaN MIS-HEMTs) are highly attractive for next-generation high-efficiency and high-voltage power applications. For the MIS-HEMT, dielectric materials play an important role in GaN-based heterojunction lateral devices as they are essential in surface passivation and gate stack. First, we improved the electrical performances of AlGaN/GaN MIS-HEMTs with high quality Al2O3 gate dielectric deposited by plasma enhanced atomic layer deposition (PEALD) using both H2O and remote O2 plasma as oxygen sources, indicating that incorporating remote O2 plasma in the ALD-Al2O3 deposition process is an effective and simple way to provide high quality gate dielectric. Then, we demonstrate the quaternary InAlGaN/GaN MIS-HEMTs with high quality SiNx gate dielectric and surface passivation layer deposited by low pressure chemical vapor deposition (LPCVD) at 780°C. The LPCVD-SiNx/InAlGaN/GaN MIS-HEMT device exhibited very high output current density, large gate voltage swing, low leakage current, high breakdown voltage, and low specific ON-resistance (RON,sp), yielding a high figure of merit (FOM) of 737 MW/cm^2. Furthermore, GaN-based HEMTs also have great potential in high power microwave applications owing to the superior material properties. We demonstrate the output power density at S-band for two different sizes of 0.2 mm and 1.2 mm AlGaN/GaN HEMTs on 4-inch SiC substrate.

博士
國立臺灣大學
電機工程學研究所
105
The gallium nitride (GaN) cascode switch has received much attention recently for line-operated medium-high frequency (200 kHz to 500 kHz) applications. Because of its device structure, there are two package options available with regard to the tab internal connection; either the drain terminal or the source terminal is electrically connected to the metallic plate of the device package, unlike the conventional vertical power Si based MOSFET in which the drain terminal can be connected to the device metallic plate. It is proposed in the dissertation that taking advantage of the unique feature of GaN devices packages mentioned above and using a proper combination of the GaN devices in a converter circuit converter common mode noise can be reduced. As a result, the converter conducted EMI can be reduced. The theory is explained and the rule for proper package selection are described in the dissertertation. A 240-Watt LLC power converter with a front-end power-factor-correction (PFC) circuit was built for experimental verification. In the experiment, significant reduction in the conducted EMI was observed. The proposed strategy can be applied to other converter or inverter configurations. GaN devices provide an option, unavailable in power MOSFET devices to significantly reduce the converter conducted EMI.

碩士
國立交通大學
機械工程系所
107
Compared with the conventional silicon-based transistors, the AlGaN/GaN power transistor has the characteristics of high electron mobility and high breakdown voltage. , The AlGaN/GaN power transistor is also suitable for operation at high power and high frequency condition, and is one of the trends of semiconductors in the future. However, due to defects in the process and failure mechanism during operation, it is necessary to explore the reliability related issues and further improve performance of transistors effectively. There are many literatures on the reliability of traditional GaN-HEMTs, but the research on GaN MIS-HEMT (Metal-Insulator-Semiconductor High-IElectron-Mobility Transistor) has only gradually increased in recent years, while the reliability of traditional electronic power transistors It takes thousands of hours for the experiment to converge. Our laboratory has a considerable reliability study for GaN MIS-HEMT, and establishes a mathematical model for dynamic resistance (Dynamic RON) and life evaluation; therefore, this study will continue the experience of the predecessors, for the component's response performance and threshold voltage VTH (threshold voltage) offset and Gate-Lag effect on package device for more in-depth research. However, in the Gate-Lag experiment, a phenomenon was unintentionally discovered. When the pulse signal was used to measure the characteristic curve (pulse IV) of the package device, changing the pulse substrate caused a significant decrease in the channel current of the semiconductor device, and estimated it through various experiments. It exists in various semiconductors today, but it has not been found in the literature search. It is hereby established a chapter to explain the process of this phenomenon and compare it with commercially available device.

碩士
國立交通大學
國際半導體產業學院
107
In this thesis, a research of the application to the high power GaN metal-insulator-semiconductor HEMT (MIS-HEMT) was done. The result indicated that by using plasma enhanced ALD (PEALD) AlN as a stack layer deposition between oxide layer and semiconductor, the composite passivation structure could not only reach a higher current density, transconductance, and breakdown voltage, but also have the effect of suppressing leakage current and improving time-dependent dielectric breakdown (TDDB) reliability. We use ALD to deposit four kinds of passivation layer: Al2O3(12nm), HfO2(12nm), Al2O3+AlN(10+2nm), and HfO2+AlN(10+2nm), basing on the same AlGaN/GaN HEMTs epitaxial structure on Si, and we also discussed the difference between etching the passivation layer under the gate electrode or not. By comparing the DC characteristics, breakdown voltage, on-state and off-state leakage current ratio, CV measurement, and TDDB reliability between different passivation materials, we found that Al2O3 has the problem of insufficient effective dielectric constant, while HfO2 meets the difficulty in poor deposition quality. Both of the shortcomings could be traded-off by depositing a PEALD-AlN stack layer prior to the oxygen-related passivation, which is attributed to the quality improvement by nitrogen-related passivation effect and the high density positive fixed charges induced by PEALD-AlN.

Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2006.
Source: Dissertation Abstracts International, Volume: 67-11, Section: B, page: 6611. Adviser: Kyekyoon (Kevin) Kim. Includes bibliographical references (leaves 106-117) Available on microfilm from Pro Quest Information and Learning.

碩士
國立交通大學
機械工程系所
103
AlGaN/GaN high electron mobility transistors（HEMTs）are one of the prospective candidates for high switching frequency power electronics applications thanks to its wide band gap（3.4eV）, high breakdown voltage, large critical electric field, high carrier mobility, and the inherent high speed characteristics. With the high power densities that AlGaN/GaN HEMTs are capable of reaching, heat dissipation is a crucial issue. This research presents an in depth thermal study of packaged GaN on Si power devices. The device is attached in a V-groove copper base, to enhance Si substrate thermal dissipation. The effects of structure design and fabrication processes on the device performance were studied. To improve the reliability and the performance of GaN power-HEMT devices, thermal management is one of the most critical aspects. Micro-Raman spectroscopy and Infrared（IR）thermography were used to identify temperature profiles and the hot spots of the devices. For the purpose of more precise temperature measurements, temperature vs. Raman shift curve fitting of experimental data of our device is illustrated. The measurements of longitudinal temperature have been acquired, so that the position of the hottest layer（2DEG）is realized. Then, Raman area temperature map measured over the lateral hottest layer depicted in this study. The comparison between Raman/IR experiment results and finite-element electro and thermal simulation has been shown.

碩士
國立臺灣大學
工程科學及海洋工程學研究所
106
In this paper, wide-bandgap (WBG) gallium nitride (GaN)-based power devices were used to replace the traditional silicon power device to increase the switching speed of the power device and reduce the switching loss and conduction loss of the three-phase inverter. Therefore, we can use gallium nitride (GaN)-based power devices to increase the power conversion efficiency of the permanent magnet synchronous motor control system and improve the heat dissipation of the three-phase inverter. LTspice circuit simulation software were used to analyze the three-phase inverter circuits with traditional silicon power devices and gallium nitride (GaN) power devices. Gallium nitride (GaN) power devices can reduce switch on-time and switch-off time by 90%, and it also reduce the switching loss of 89% in the inverter when the load current is 8(A). By using MATLAB / Simulink, space vector pulse width modulation (SVPWM), vector control, permanent magnet synchronous machine (PMSM) and control system were combined to simulate the system response such as motor speed, voltage and current waveform of permanent magnet synchronous motor control system. We also use micro-control board and gallium nitride (GaN) power module to implement the permanent magnet synchronous motor control system. Verify that wide-bandgap (WBG) gallium nitride (GaN)-based power devices can be applied to the permanent magnet synchronous motor control system. We also compare the different between the GaN and Si motor control system. The GaN motor control system reduce the total power loss of 1440mW and up to 85.27% efficiency when the motor load is 0.2Nm. The GaN inverter also achieve 95.116% efficiency. Finally, the permanent magnet synchronous motor control system with higher switching speed and better power conversion efficiency is built.

碩士
國立交通大學
機械工程系所
106
AlGaN/GaN power transistor, compared to conventional silicon-based transistors, have characteristics of high electron mobility, high breakdown voltage, suitable for operating at high power and high frequency conditions. Due to the defects in the manufacturing process and the failure mechanism while the operation, it is necessary to discuss the reliability to improve the performance of the device effectively. If the buffer layer of the device is poorly insulated, some of the electrons can flow through the buffer layer to the Drain, the current which is not controlled by the Gate voltage is regarded as the leakage current. Therefore, the quality of buffer layer and the property of insulation would affect the cut-off characteristic of the device. It is known from the paper that GaN device will have Gate leakage current during operation and it would lead to the reduction of the efficiency. In order to reduce the leakage current, the device of this study insert the insulator (Si3N4) between the Gate and AlGaN layer to form MIS-HEMT (Metal-Insulator-Semiconductor High Electron Mobility Transistor) structure. In order to discuss the failure mechanism and structural degradation, this study defines the Critical Voltage as the voltage while the occurrence of significant electrical degradation. The 4-inch wafer was measured directly by probe station, and the electrical parameter were measured by Step-stress method, and the possibility and the reasons of failure mechanism will be defined. Additionally, the failure mechanism of Deep-Level-Transient of Dynamic-RON have been proposed by switch mode. The lifetime of the power transistor is also worth discussing, the lifetime evaluation and the choise of failure time, will use TDDB (time-dependent dielectric breakdown) method for the final step of the reliability experiment. Using the methods of statistics to analyze the data. The use of Weibull plot, curve fitting and other post-processing, can find the safely operating voltage for twenty years.

碩士
國立交通大學
機械工程系所
105
The high power dissipation for AlGaN/GaN HEMT power device can result in a substantial self-heating effect on topside surface due to the lateral topologies, which will reduce the performance reliability. This paper proposes the fast static and transient thermal method which evaluates the thermal resistance constitution in the heat flow path. The method is based on the transient heating curve by the thermo-sensitive electrical parameters measurement for the cascode AlGaN/GaN HEMTs. The method is simple, non-invasive and not restricts by the device layout, package and geometry. With the help of structure function, the proposed process extracts the chip-level and junction to case thermal resistances. Furthermore, the thermal property of each package layer including contact thermal resistance is clearly shown in the graphical representation. This study also develops the short time transient measurement process which will tremendously reduce the measurement time comparing to the standard cooling curve method. Finally, the power cycle capability of Cascode GaN is investigated and use the structure function to reveal changes or failure in the thermal interface.

碩士
輔仁大學
電機工程學系碩士在職專班
104
The thesis presents a technology that based on single-stage flyback converter with coupling inductance, switch-capacitor and diode-capacitor (DC) snubber. Using secondary side the transformer leakage inductance and secondary side DC snubber make to L-C series resonance for obtained the zero current switching and voltage clamped. Therefore this converter can increase at least five times voltage gains. Moreover, the total output power can increase and reduce ripple by using the interleaved converter method for four phase module. Also , this thesis presents the analysis of power semiconductor devices, components selection, transformer design and magnetic flux density calculation for the proposed converters. This can use material properties to achieve good performance, reduce PCB board size, save cost and achieve the best performance of converter. Finally, simulation and experimental results are employed to verify feasibility of the proposed converter under the different devices.

abstract: In this work, an advanced simulation study of reliability in millimeter-wave (mm-wave) GaN Devices for power amplifier (PA) applications is performed by means of a particle-based full band Cellular Monte Carlo device simulator (CMC). The goal of the study is to obtain a systematic characterization of the performance of GaN devices operating in DC, small signal AC and large-signal radio-frequency (RF) conditions emphasizing on the microscopic properties that correlate to degradation of device performance such as generation of hot carriers, presence of material defects and self-heating effects. First, a review of concepts concerning GaN technology, devices, reliability mechanisms and PA design is presented in chapter 2. Then, in chapter 3 a study of non-idealities of AlGaN/GaN heterojunction diodes is performed, demonstrating that mole fraction variations and the presence of unintentional Schottky contacts are the main limiting factor for high current drive of the devices under study. Chapter 4 consists in a study of hot electron generation in GaN HEMTs, in terms of the accurate simulation of the electron energy distribution function (EDF) obtained under DC and RF operation, taking into account frequency and temperature variations. The calculated EDFs suggest that Class AB PAs operating at low frequency (10 GHz) are more robust to hot carrier effects than when operating under DC or high frequency RF (up to 40 GHz). Also, operation under Class A yields higher EDFs than Class AB indicating lower reliability. This study is followed in chapter 5 by the proposal of a novel π-Shaped gate contact for GaN HEMTs which effectively reduces the hot electron generation while preserving device performance. Finally, in chapter 6 the electro-thermal characterization of GaN-on-Si HEMTs is performed by means of an expanded CMC framework, where charge and heat transport are self-consistently coupled. After the electro-thermal model is validated to experimental data, the assessment of self-heating under lateral scaling is considered.
Dissertation/Thesis
Doctoral Dissertation Electrical Engineering 2018

博士
國立交通大學
材料科學與工程學系
99
GaN-based semiconductors are promising candidates for RF high frequency wireless, power electronics, and optoelectronics applications. This thesis focuses GaN-based High Electron Mobility Transistors (HEMTs) for high frequency and high power application. First of all, the characteristics of unpassivated AlGaN/GaN HEMTs under uniaxial tensile strain were investigated. Mechanical stress can produce additional charges resulting in the change of HEMT channel current. This phenomenon depends on gate orientation, and may be the result of the piezoelectric effect and changes in electron mobility due to the applied uniaxial stress. Additionally, results show that tensile strain reduces the transient current, which is likely due to the additional donor-like surface states created through the piezoelectric effect. Secondly, a 100-nm gate-recessed n-GaN/AlGaN/GaN HEMT with low noise properties at 30 GHz is demonstrated. The recessed GaN HEMT exhibits a low ohmic-contact resistance of 0.28?n?!!!@#8226;mm, and a low gate leakage current of 0.9 μA/mm when biased at VGS = −3 V and VDS = 10 V. At the same bias point, a minimum noise figure of 1.6 dB at 30 GHz and an associated gain of 5dB are achieved. To the best of our knowledge, this is the first and the best noise performance reported at 30 GHz for gate-recessed AlGaN/GaN HEMTs. Finally, a normally-off operation AlGaN/GaN HEMT with high threshold voltage is developed utilizing a Fluorine-based treatment technique combined with a metal-oxide-semiconductor gate architecture. Threshold voltage as high as 5.1 V was achieved using a 16-nm-thick Al2O3 gate oxide film. Additionally, the device performed a drain current density of 500 mA/mm and a peak transconductance of 100 mS/mm. These performances are comparable to the conventional normally-on devices.

碩士
中華大學
電機工程學系碩士班
99
In recent years, with the public demand for wireless products is growing, thus creating a high-power semiconductor device on the required output is also higher, although the traditional substrate materials have a process to produce cheap price stability and overall advantages of total . However, the elements subject to their own characteristics, the performance is not high-power family of elements with a few components compared to the material which is currently popular AlGaN / GaN transistors formed. GaN has a high power, high temperature, high breakdown voltage, high current density, high-frequency characteristics of good performance, wireless transmission products now required for high-power amplifier has great appeal. GaN transistors in the substrate self-heating caused by poor heat dissipation problems, resulting in reduced transistor performance. GaN transistors with different substrate materials such as SiC, Si, Sapphire for the combination can improve the heat dissipation and have different performance characteristics. The advantage of SiC substrate using a high heat capacity, the thermal conductivity of 4.9 W / cm K is three time for the GaN (1.5W/cm K). The temperature can up to 400°C or more. However, SiC substrates is too expensive. The silicon substrate is good candidate for GaN transistors due to its low cost, large area and high electrical conductivity (heat). GaN transistors with high-power, High temperature, high breakdown voltage and high current density on different substrate can further develop high efficiency, large area, low cost devices in the next generation. In this thesis, we used SiC and Si substrate to study the selft heating effect of GaN. Pulse IV and Load Pull measurements also be used to analysis the self heating effect and electrical degradation of GaN devices.

博士
國立交通大學
材料科學與工程學系所
104
The integration of GaN-based High Electron Mobility Transistors (HEMTs) and a large diameter Si substrate are promising candidates for next-generation high power device applications owing to the high current, high breakdown, and low fabrication cost. This thesis focuses GaN-based HEMTs on Si with low current collapse by high quality gate insulator and development of gold free gate structure with high thermal stability. First of all, the stable electrical properties of Al2O3/AlN/AlGaN/GaN metal-insulator-semiconductor (MIS-HEMTs) by using an Al2O3/AlN stack layer as the gate insulator layer were investigated. The device exhibits a small threshold voltage hysteresis of ~200mV. Additionally, no obvious changes in the drain current were observed for the device during the drain voltage stress of 100V for 15 h. Secondly, a gate recessed normally-OFF Al2O3/AlN/AlGaN/GaN MIS-HEMT with low threshold voltage hysteresis is demonstrated. The device exhibits a threshold voltage of +1.5 V, with current density of 420mA/mm, an OFF-state breakdown voltage of 600V and high ON/OFF drain current ratio of ~109. Finally, a GaN HEMT with WNX/Cu gate for high power application is developed. The direct current (DC) characteristics of the device are comparable to a conventional Ni/Au gated GaN HEMT. The results of a high voltage stress test indicated that the device was stable after 200 V stress was applied for 42 hours. Additionally, the WNX/Cu gated GaN HEMTs exhibits no obvious change for DC characteristics and Schottky barrier height before and after 2500C annealing for 1 hour.

碩士
國立交通大學
光電系統研究所
103
GaN has high mobility, high breakdown and low on-resistance, comparing with other electron device. It is more suitable for high power application. However, GaN is a piezoelectric material. It would create an inverse piezoelectric effect, which lead to current degradation further. This study applies a field plate structure to enhance the electric characteristics and reliability of device. DC measurement results are used to compare with conventional device. The results indicated that the field-plate HEMT has higher breakdown voltage, better threshold voltage Vth). It successfully reduced the current degradation and exhibited stable dynamic on-resistance (Ron). Besides, the small signal equivalent circuits are used to extract variation of the intrinsic capacitance. It can prove the mechanism of current degradation and reliability. These results would help solve the problem of current degradation in GaN high power devices.