Academic literature on the topic 'Front-end IC'
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Journal articles on the topic "Front-end IC"
Kwon, Kibaek, Chankyu Bae, Myunsik Kim, Jiwon Son, Hein Kim, Heuikwan Yang, and Joongho Choi. "Analog Front-End IC Design for Vehicle Ultrasonic Sensor." Journal of the Institute of Electronics and Information Engineers 58, no. 9 (September 30, 2021): 13–19. http://dx.doi.org/10.5573/ieie.2021.58.9.13.
Full textBanuaji, Aditya, and Hyouk-Kyu Cha. "A Highly-Integrated Analog Front-End IC for Medical Ultrasound Imaging Systems." Journal of the Institute of Electronics Engineers of Korea 50, no. 12 (December 25, 2013): 49–55. http://dx.doi.org/10.5573/ieek.2013.50.12.049.
Full textSong, Haryong, Yunjong Park, Hyungseup Kim, and Hyoungho Ko. "Fully Integrated Biopotential Acquisition Analog Front-End IC." Sensors 15, no. 10 (September 30, 2015): 25139–56. http://dx.doi.org/10.3390/s151025139.
Full textKim, Hyuntae, and Bertan Bakkaloglu. "CMOS Analog Front-End IC for Gas Sensors." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2011, DPC (January 1, 2011): 001761–96. http://dx.doi.org/10.4071/2011dpc-wp25.
Full textMeyer, R. G., and W. D. Mack. "A 1-GHz BiCMOS RF front-end IC." IEEE Journal of Solid-State Circuits 29, no. 3 (March 1994): 350–55. http://dx.doi.org/10.1109/4.278360.
Full textCha, Hyouk-Kyu. "A Low-Voltage Low-Power Analog Front-End IC for Neural Recording Implant Devices." Journal of the Institute of Electronics and Information Engineers 53, no. 10 (October 25, 2016): 34–39. http://dx.doi.org/10.5573/ieie.2016.53.10.034.
Full textBauwelinck, J., E. De Backer, C. Mélange, E. Matei, P. Ossieur, X. Z. Qiu, J. Vandewege, and S. Horvath. "High dynamic range 60 MHz powerline front-end IC." Electronics Letters 44, no. 5 (2008): 348. http://dx.doi.org/10.1049/el:20083198.
Full textTeng, Shin-Lian, Robert Rieger, and Yu-Bin Lin. "Programmable ExG Biopotential Front-End IC for Wearable Applications." IEEE Transactions on Biomedical Circuits and Systems 8, no. 4 (August 2014): 543–51. http://dx.doi.org/10.1109/tbcas.2013.2285567.
Full textKramer, R. "A bus controlled clock generator IC (for TV front end)." IEEE Transactions on Consumer Electronics 37, no. 3 (1991): 531–36. http://dx.doi.org/10.1109/30.85563.
Full textSon, Jin-Young, and Hyouk-Kyu Cha. "An Ultra Low-power ECoG Signal Recording Analog Front-end IC." Journal of the Institute of Electronics and Information Engineers 57, no. 8 (August 31, 2020): 37–47. http://dx.doi.org/10.5573/ieie.2020.57.8.37.
Full textDissertations / Theses on the topic "Front-end IC"
Tsui, Hau Yiu. "A 5 GHz integrated low-power CMOS RF front-end IC design /." View abstract or full-text, 2004. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202004%20TSUI.
Full textDurand, Cédric. "Développement de résonateurs électromécaniques en technologie Silicon On Nothing, à détection capacitive et amplifiée par transistor MOS, en vue d'une co-intégration permettant d'adresser une application de référence de temps." Phd thesis, Université des Sciences et Technologie de Lille - Lille I, 2009. http://tel.archives-ouvertes.fr/tel-00375804.
Full textDans ce contexte, nous proposons de développer des résonateurs électromécaniques en vue d'une intégration « front-end », pour la réalisation d'oscillateurs intégrés. Ainsi, nous avons fabriqué des démonstrateurs à partir des briques de base de la technologie CMOS Silicon On Nothing, en phase de R&D à STMicroelectronics. Du fait de la petite taille des composants, nous avons utilisé un transistor à grille résonante pour amplifier la détection de la résonance. Ainsi, des développements technologiques spécifiques ont permis de fabriquer les résonateurs et leur transistor de détection. La conception des dispositifs a été réalisée à partir du développement d'un modèle électromécanique des résonateurs. Ce modèle est compatible avec les outils de design et peut alors aider à la conception de l'oscillateur MEMS. Nous avons ensuite montré le bon fonctionnement des résonateurs fabriqués, ainsi que celui de l'amplification induite par la
détection MOS. Cette démonstration constitue une première, prouvant la fonctionnalité de la détection MOS pour un composant de petite taille, vibrant dans le plan du substrat. Enfin, nous avons validé le modèle électromécanique à partir d'autres modèles ainsi qu'avec les mesures des composants fabriqués.
En termes de perspectives, le recours à diverses améliorations permettrait d'obtenir des dispositifs
compatibles avec la réalisation d'un oscillateur performant et co-intégré.
Huang, Yu-Ting, and 黃瑜婷. "A multi-function biomedical analog front end IC." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/93407066082979072037.
Full text國立臺灣大學
電機工程學研究所
97
With the advancement and maturation of semiconductor technology, the digital and analog circuit has been integrated on the same chip. In recent years, because of the demand on biomedicine, CMOS bio-sensors have already realized successfully with CMOS technique, achieving miniature, low noise, low power and low cost biomedical systems. In addition, analog front-end circuit with the function of signal arrangement is a critical component in the biomedical system. In this thesis, the main three pieces of circuit are instrumentation amplifier (IA), second-order LPF and a programmable gain amplifier (PGA). They are fabricated in TSMC 0.35μm CMOS 2P4M process. The first stage of the system is based on IA which had accomplished by our laboratory and through the digital control switch and feedback loop to carry out the circuit system with the function of adjusting different intensity signal. Then, using a two-order LPF ( Sallen-key circuit ) to suppress the spikes from the clock feedthrough and charge injection caused by nonideality of the chopper switches. Finally, the signal is further amplified by programmable gain amplifier in the last stage. In order to let the whole system to deal with a wide range of biomedical signals and attain appropriate adjustment according to different kind of small signal sources, the design relies on a switch on/off devise to achieve these multi-functions. The die area is 1.8mm x 1.35mm and the power consumption is 944.2uW from a 3V voltage supply.
Lin, Chin-Chun, and 林慶鈞. "A CMOS FM Broadcast Receiver Front-End IC." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/48519119206244712909.
Full text國立成功大學
電機工程學系碩博士班
92
This thesis describes a single-chip CMOS receiver for FM Stereo Radio system working in the 88~108-MHz range. Low-power single-cell fully-featured radio receivers, with a minimum of external components are hard to find. For a monolithic implementation, the use of the Low-IF architecture alleviates the necessity of off-chip components, used for image-reject passive filtering. At the same time, DC-offset and self-mixing problems arising from direction-conversion architecture are avoided. This CMOS FM receiver frond-end is a quadrature low-IF receiver consisting of a differential-ended low noise amplifier (LNA) connected to Hartley image-rejection mixer, which comprises Inphase/Quadrature interference mixers, second-order filters, and phase shifter, followed by tenth-order switched-capacitor bandpass filter. The frond-end converts the RF signal to differential I and Q signals, centered at 225-kHz. Degrading of image interference characteristic can be avoided by I/Q IF mixers and phase shift network. The receiver fabricated in a 0.18μm 1P6M mixed-signal CMOS mixed-mode process, achieve peak SNDR of 44.3 dB, peak SNR of 45.3 dB and dynamic range of 70dB with signal frequency of 88~108 MHz and signal bandwidth of 200 kHz. The combination draws 63 mW from a 1.8-V supply. The total chip area including bonding pads is 0.93mm�e1mm where the active area is 0.57mm�e0.62mm.
"A CMOS Analog Front-End IC for Gas Sensors." Doctoral diss., 2011. http://hdl.handle.net/2286/R.I.8911.
Full textDissertation/Thesis
Ph.D. Electrical Engineering 2011
余介恩. "A CMOS Mixed-Signal Front-End IC for Portable." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/84569107517998067224.
Full text國立交通大學
電機與控制工程系所
97
Due to properties of low-amplitude and non-stationary, most of biomedical signals are easily influenced by examined persons, measured environment, and electronic devices. A novel analog circuit design is proposed in this thesis, which is suitable for various biomedical signal acquisitions. In addition to the consideration of low power and low noise, the multi-channel mixed-signal front-end integrated circuit (MSFEIC) is designed. This circuit is realized into a single chip without any external component. It can not only reduce the number of outer components, but also enhance a better signal-to-noise ratio enormously. In addition, to select system gain and bandwidth corresponding to different amplitude and frequency of biomedical signals, the controllable digital interface is also designed and integrated into MSFEIC. In this thesis, MSFEIC design is composed of four chopper-stabilized instrumentation amplifiers (CHS-IA), a switched-capacitor variable gain amplifier (SC-VGA), a switched-capacitor low-pass filter (SC-LPF), a non-overlapping clock generator, and a cascaded 2-1-1 tri-level sigma-delta analog-to-digital converter (MASH 2-1-1 tri-level ΣΔ ADC). These circuits have been integrated into a single chip of the total area of 1.9198×1.9198mm2 by using TSMC 0.18μm CMOS Mixed-Signal RF General purpose MiM Al 1P6M 1.8&3.3V process. For the simulation results, the proposed chip can achieve 90 dB of SNR, 16-bit resolution at 1024Hz. The total power consumption is about 998�巰 under 1.8V supply.
Kao, Min-Sheng, and 高旻聖. "CMOS Analog Front-end Transceiver IC for Wireline Communications." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/68305604504950596777.
Full text國立清華大學
通訊工程研究所
99
This study proposes several circuit design techniques to achieve high performance CMOS transceiver chipset for wire-line communication. The circuit concepts are demonstrated by a 20-Gb/s CMOS 0.13-μm laser/modulator driver design and a 10-Gb/s CMOS 0.18-μm limiting amplifier design. The performance evaluation are as good as the advanced expensive III-V compound technology and the fabricated CMOS circuits are suitable for further integration with SERDES, CDR, and CODEC ICs for wire-line communication due to the small die size and low power consumption. The proposed 20-Gb/s laser/modulator driver is fabricated in 0.13-µm mixed-signal 1.2/2.5V 1P8M CMOS process. This work consists of a shunt-series inductor peaking pre-driver stage and a pre-emphasis output driver stage with source de-generation configuration including inductive local feedback network to enhance the operation bandwidth. The data rate is measured up to 20-Gb/s with 3.5VPP S.E. output amplitude in driving 50-Ω output load when the input amplitude is less than 0.15VPP and the rise/fall time of output waveform is less than 22-ps. The total power consumption is 900-mW with 1.2/4.0V dual supply and the chip die size is 900×800-µm2. The proposed 10-Gb/s current mode logic (CML) limiting amplifier is fabricated in 0.18-µm 1P6M CMOS process. This work consists of input equalizer, CML output buffer and gain stages with active-load inductive peaking, duty cycle correction (DCC) and gain control features. The circuit techniques include active load inductive peaking, source de-generation peaking and active feedback with current buffer in Cherry-Hooper topology to enhance operation bandwidth. The proposed design provides 600-mVpp differential voltage swing in driving 50-Ω output loads, 40-dB input dynamic range, 40-dB voltage gain and 8-mVpp input sensitivity. The total power consumption is 85-mW with 1.8V supply and the chip die size is 700×400-µm2.
Huang, Yi shan, and 黃意善. "Design of IEEE802.11a CMOS 5.8 GHz Receiver Front-End IC." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/vsf3r3.
Full text國立臺北科技大學
電機工程系研究所
98
The thesis is divided into two major parts. One is to designed a high linearity direct conversion RF front-end for 5.8 GHz IEEE802.11/a WIMAX fabricated TSMC 0.18μm 1P6M standard CMOS process.The proposed RF front-end consists a the folded mixer, a differential current reused low-noise amplifier (LNA) and a matching network. The folded mixer is implemented with the PMOS device in the switching stage of mixer and a resonating inductor for to that a low flicker noise. The simulation results show that the power consumption, conversion gain, third-order intercept point (IIP3),and 1-dB compression point (P1dB) are 15.2mW, 21.8 dB, -5.2dBm, -18 dBm, respectively. This indicates that the proposed front-end works with good linearity.By using PMOS device and the folded technique, low flicker noise of 6.4dB is achieved, which is suitable for using as a direct conversion receiver for narrow bandwidth. The chip size is about 1.22×1.25mm2.The other one is to develop a 5.9 GHz image rejection CMOS low noise amplifier using current-reused for superheterodyne architecture. The image-rejection (IR) fliter usually is an external circuit with expensive and large-size components, which is not suit for integration.The destination of this study is to design a image rejection CMOS low noise amplifier with an LC tank to achieve an image rejection function and to have a low power dissipation. The simulation results show that the power consumption, gain, S11, NF, IIP3, P1dB are 5.07 mW, 18 dB at frequency of 5.9 GHz, whereas the gain of -11.9 dB at 7.3GHz, -15dB, 2.6 dB, -17 dBm, and -25 dBm, respectivey.
Lee, Chih-Wei, and 李誌偉. "Front-End Readout IC for Portable Blood Pressure Sensing System." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/63034757293414152678.
Full text國立交通大學
電控工程研究所
102
Individualized medical health care is the trend of medical development, specially in the wearable and non-invasive physiological sensing applications. A novel readout circuit for blood pressure sensing system is proposed in this thesis. It is divided into two parts. The first part is conventional structure, including a sensing circuit, an amplification circuit and an analog-to-digital converter (ADC) .The other part is innovative structure which consists of a sensing circuit, an amplification, a peak-sensing circuit and a counter. The designed circuit is accomplished by Taiwan Semiconductor Manufacturing Company (TSMC) 0.18μm 1P6M 1.8V mixed‐signal CMOS process. The proposed chips with the die area of 1.35×1.13mm2 and 1.37×1.37mm2 are fabricated by National Applied Study Laboratories National Chip Implementation Center (NARL NCIC). The front-end readout IC is simulated and experimented. The result shows that a sensing system is feasible for portable medical devices.
Chen, Yi-Chia, and 陳誼家. "Microwatt Dual-Mode Front-End IC for Electrochemical Sensing Applications." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/x4y8zu.
Full text國立交通大學
電機工程學系
107
With the advanced CMOS process, single-chip integration technology has made electrochemical sensing systems more miniaturized, making them suitable for fast and cost-effective medical screening and environmental monitoring systems. However, low power consumption and low noise are still the biggest challenges of current electrochemical sensing systems. In order to cope with future clinical analysis, the integrated IC must achieve low-power, small-volume, fast and multi-information sensing mechanisms for accurate and convenient electrochemical sensing. In this thesis, a microwatt electrochemical sensing chip with an integrated current-reducer pattern generator and a current-mirror based low-noise chopper-stabilization potentiostat circuit is presented. The pattern generator, utilizing the current reducer technique, creates a sub-Hz ramp signal for the cyclic voltammetry (CV) measurement without large-size passive components. The proposed design adopts the chopper-stabilization and low-noise biasing technique for the potentiostat and a counter-based time-to-digital converter to reduce the amplitude noise effects and to convert the sensing current signal to digital codes for further data processing. The design is fabricated using a 0.18-μm CMOS process and achieves a 41pA current resolution in the current range of ± 5μA while maintaining the R2 linearity of 0.998. The system consumes 16μW from a 1.2V supply when a maximum 5μA sensing current is detected. The power efficiency of the readout interface is 0.31, and the sensing current dynamic range is 108dB. The design is fully integrated into a single chip and is successfully tested in the dual-mode (CA/CV) measurements with commercial gold electrodes in a potassium ferricyanide solution and nanowire sensor in the dopamine solution in sub-millimolar and femto-molar concentrations, respectively.
Books on the topic "Front-end IC"
Dickinson, Samantha. PD70100/PD70200 IEEE® 802. 3af/at PD Front End IC Datasheet. Microchip Technology Incorporated, 2020.
Find full textBook chapters on the topic "Front-end IC"
Cai, Jinhe, Yang Li, Jinyong Zhang, Shi Huang, Nikolas Gaio, and Lei Wang. "A Portable Low-Power 7-Lead ECG Recorder with a New Analogue Front-End IC." In IFMBE Proceedings, 100–104. Cham: Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-03005-0_26.
Full textDo, Aaron V. T., Chirn Chye Boon, Manthena Vamshi Krishna, Anh Manh Do, and Kiat Seng Yeo. "A 1-V CMOS Ultralow-Power Receiver Front End for the IEEE 802.15.4 Standard Using Tuned Passive Mixer Output Pole." In VLSI-SoC: Forward-Looking Trends in IC and Systems Design, 1–21. Berlin, Heidelberg: Springer Berlin Heidelberg, 2012. http://dx.doi.org/10.1007/978-3-642-28566-0_1.
Full text"Front-End IC Fabrication Operations." In Integrated Circuit Quality and Reliability, 49–120. CRC Press, 2018. http://dx.doi.org/10.1201/9781315274041-9.
Full textMarzuki, Arjuna. "Inventions of Monolithic Microwave Integrated Circuits." In Advances in Monolithic Microwave Integrated Circuits for Wireless Systems, 240–332. IGI Global, 2012. http://dx.doi.org/10.4018/978-1-60566-886-4.ch010.
Full textConference papers on the topic "Front-end IC"
Moschytz, George S. "New IC filters for the analog front end." In 2010 4th International Symposium on Communications, Control and Signal Processing (ISCCSP). IEEE, 2010. http://dx.doi.org/10.1109/isccsp.2010.5463418.
Full textYamaner, F. Yalcin, Linga Reddy Cenkeramaddi, and Ayhan Bozkurt. "Front-end IC design for intravascular ultrasound imaging." In 2008 Ph.D. Research in Microelectronics and Electronics (PRIME). IEEE, 2008. http://dx.doi.org/10.1109/rme.2008.4595774.
Full textXiangming Long, Huanhuan Song, and Kai Shuang. "DFRS: A Distributed Front-end Routing System in cloud environment." In Multimedia Technology (IC-BNMT 2010). IEEE, 2010. http://dx.doi.org/10.1109/icbnmt.2010.5705222.
Full textFiedler, H. L., G. Zimmer, H. W. Renz, and K. Wahl. "An Analog / Digital Front - End CMOS IC for ISDN." In 11th European Solid State Circuits Conference. IEEE, 1985. http://dx.doi.org/10.1109/esscirc.1985.5468034.
Full textHorn, George W. "Towards Lean Front End IC Manufacturing (with AMHS Implants)." In 2022 China Semiconductor Technology International Conference (CSTIC). IEEE, 2022. http://dx.doi.org/10.1109/cstic55103.2022.9856748.
Full textStojanovic, Tatjana, and Sasa Lazarevic. "The Expert System for Generating Front-End Code." In 2019 International Conference on Artificial Intelligence: Applications and Innovations (IC-AIAI). IEEE, 2019. http://dx.doi.org/10.1109/ic-aiai48757.2019.00027.
Full textHerrera, A. "RF front-end for V-SCADA communication networks." In IEE Colloquium on RF and Microwave Circuits for Commercial Wireless Applications. IEE, 1997. http://dx.doi.org/10.1049/ic:19970164.
Full textKeaveney, M., J. Morrissey, P. Walsh, M. Tuthill, M. Chanca, I. Collins, and P. Hendriks. "A high performance RF front-end for UHF RFID applications." In IET Seminar on RF and Microwave IC Design. IEE, 2008. http://dx.doi.org/10.1049/ic:20080105.
Full textDiCarlo, P., S. Boerman, H. C. Chung, D. Evans, M. Gerard, J. Gering, I. Khayo, et al. "A highly integrated quad-band GSM TX-front-end-module." In GaAs IC Symposium. 25th Annual Technical Digest 2003. IEEE, 2003. http://dx.doi.org/10.1109/gaas.2003.1252411.
Full textLee, Taeju, and Minkyu Je. "A Reconfigurable Neural Recording Front-End IC for Multimodal Operation." In 2019 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS). IEEE, 2019. http://dx.doi.org/10.1109/apccas47518.2019.8953078.
Full text