Academic literature on the topic 'Filtre Gm-C'

An analysis of modern automated integrated analog circuits design methods and their use in integrated filter design is done. Current modern analog circuits automated tools are based on optimization algorithms and/or new circuit generation methods. Most automated integrated filter design methods are only suited to gmC and switched current filter topologies. Here, an algorithm for an active RC integrated filter design is proposed, that can be used in automated filter designs. The algorithm is tested by designing an integrated active RC filter in a 65 nm CMOS technology. Atlikta naujausių integrinių analoginių grandynų automatizuotojo projektavimo metodų ir jų taikymo projektuojant integrinius filtrus analizė. Modernios analoginių grandynų automatizavimo priemonės yra grindžiamos esamos topologijos optimizacijos algoritmais ir/arba naujų elektroninių principinių schemų generavimo būdais. Didžioji dauguma literatūroje aprašytų automatizuotojo integrinių filtrų projektavimo metodų yra skirti tik gm-C arba perjungiamos srovės/talpos topologijos filtrams. Darbe siūlomas naujas integrinių aktyviųjų RC filtrų projektavimo algoritmas, įvertinantis integrinių technologijų elementų nuokrypius. Jis patikrintas suprojektavus integrinį aktyvųjį RC filtrą taikant 65 nm KMOP technologiją ir Cadence programinį paketą.

Design methodology of a voltage-mode programmable biquadratic filter using minimum components is proposed in this paper. Multifunction second-order filter has been implemented using two first-order filter sections. The proposed biquadratic filter has been realized with operational transconductance amplifier (OTA). Cut-off frequency and [Formula: see text]-factor of the biquadratic are controlled by the transconductance of the OTAs. The proposed design technique keeps all the sensitivities to lower values. The biquadratic filter operates at high frequency. The proposed structure is transformed into a third-order multifunction filter by adding minimum component, a single capacitor. Design of higher order filter using the proposed second-order function also has been investigated. The proposed synthesis is validated with SPICE simulation in 0.13[Formula: see text][Formula: see text]m technology. Total harmonic distortion, output noise, corner simulations, Monte Carlo analysis due to the circuit parameter and process parameter variation have been studied.

A low-power, high linearity Gm-C filter is presented and designed.The input transistors of Gm is biased in linear region, and drain-source voltage is constant through feedback loop. The filter is designed in SMIC 0.18μm Mixed Signal CMOS PDK (Process Design Kit) with cutoff frequency 15.74 MHz, Passband ripple less than 0.2dB,while dissipating 2.5mW. It can be used as Baseband filter in RF system.

Systems such as Gm-C filters are ideally designed to exhibit linear characteristics. However, their components – especially transconductors – are intrinsically nonlinear. Although there exist many approaches that aim at reducing nonlinear effects while dealing with practical design problems, nonlinear distortion cannot be canceled out completely. Thus, it is important to estimate a degradation of filter performance caused by nonlinearities. In this paper we propose a simple and general method to perform a transient analysis of any Gm-C filter structure based on a matrix description and macro-modeling of transconductors. An analytical description of general Gm-C filters with nonlinear transconductors is introduced. A differential system that determines dynamics of a general structure of Gm-C filter is formulated. This allows us to carry out an effective and fast transient analysis of any Gm-C filter using standard numerical methods. The approach can be applied to investigate any non-linear effects in filters. The noise analysis of Gm-C filters in general setting is also presented. The accuracy of the proposed methods is confirmed by comparison with SPICE simulation. Example of application for performance optimization of 4th order Chebyshev filter is given.

This paper describes a new single-input multiple-output (SIMO) mixed-mode universal biquad [Formula: see text]–[Formula: see text] filter. It can realize all kinds of filter responses including high-pass, band-pass, low-pass, band-stop and all-pass filters, simultaneously. Moreover, in this structure, all of these filters in all states of voltage mode, current mode, transresistance mode and transconductance mode are achieved by the same topology without any convertor. The proposed filter employs three operational transconductance amplifiers (OTAs) with four inputs and one output, three fully differential OTAs and two grounded capacitors. In other words, this filter is composed of six [Formula: see text] blocks and two grounded capacitors. The grounded capacitors are suitable for integrated circuit implementation. In order to reduce the power consumption, the OTAs are biased in subthreshold region. In addition, sensitivity analysis is included to show the low active and passive sensitivity performances of the filter. This filter is designed and simulated in HSPICE with 0.18[Formula: see text][Formula: see text]m model CMOS technology parameters. The simulation results show that the filter consumes only 75[Formula: see text][Formula: see text]W and operates at 1.5[Formula: see text]MHz with [Formula: see text]0.5[Formula: see text]V supply voltages and capacitors [Formula: see text][Formula: see text]pF.

In this Paper, a 4th-Order Low-Pass Gm-C Filter is Presented. for the Design of Operational Tranconductance Amplifier(OTA), it Adopts the Techniques of Current Division and Current Cancellation. these Techniques can Help to Achieve a Low Transconductance Value. for the Architecture of the 4th-Order Gm-C Filter, it Consists of Two Biquads. the Two Biquads are Cascade Connected. the Gm-C Low-Pass Filter has been Implemented under 0.5 μm CMOS Process Model. the Final Simulation Results Show the Cutoff Frequency of the Filter is 100Hz and the Stop-Band Attenuation is Larger than 60dB. the Power Consumption is Lower than 1mW and the Total Harmonic Distortion(THD) is -55dB.

The present manuscript studies the limitations and the opportunities resulting in using fully-active circuits as an alternative to classical passive solutions for the realization of an RF filtering for TV tuners. This RF filtering has to be frequency tunable, selective and high performances in terms of noise and linearity. After the study of the state-of-the-art, two structures of filter are studied in details and simulated on a second order bandpass topology which best fulfills the required specifications. Proposed Gm-C filters have interesting performances but are limited by the gyrator which is the main source of degradation of the RF signal in this structure. A Rauch filter is also proposed with the purpose of designing a highly linear filter to increase the dynamic range. An original feedback allows using this filter with a good selectivity – gain trade-off, as well as high RF performances. This filter has been integrated on silicon and measured in laboratory, leading to perfect agreement with simulations. Proposed Gm-C and Rauch structures are compared to state-of-the-art results from the literature by means of an innovative figure-of-merit. An interesting perspective to this work is proposed though the study of N-path filters which exhibit encouraging results but may require important changes in the TV tuner architecture to be used at full potential
La présente thèse étudie les limitations et les opportunités résultant de l’utilisation de circuits purement actifs comme alternative aux circuits passifs classiques pour la réalisation d’un filtrage RF pour récepteur TV. Ce filtrage RF doit être accordable en fréquence, sélectif et à hautes performances en termes de bruit et de linéarité. Après étude de l’état de l’art, deux structures de filtres ont été étudiées plus en détails et simulées, sur une topologie passe bande du second ordre qui est celle qui répond le mieux à nos spécifications. Les filtres Gm-C propose��s ont des performances intéressantes mais limitées car le gyrateur dégrade le signal RF. Un filtre de Rauch est proposé par ailleurs avec le but de créer un filtre hautement linéaire pour augmenter la dynamique. Une rétroaction originale permet l’utilisation de ce filtre avec un bon compromis sélectivité – amplification, ainsi que de très bonnes performances RF. Ce filtre a été réalisé sur silicium et mesuré en laboratoire, menant à une très bonne corrélation des résultats. Enfin, les deux structures proposées ont été comparées à l’état de l’art de la littérature grâce à une figure de mérite. Une perspective intéressante à ce travail est également introduite à travers les filtres N-path, qui fournissent des résultats encourageants mais qui nécessitent un remaniement de l’architecture du récepteur TV

This work analyzes tuning capabilities of different fully integrated active filter topologies. Work only deals with continuous time active filters. Topologies described in this work differ in type of active element and in method of frequency tuning. Techniques of tunning are proved on second order low pass filter. Filter topologies are compared from tunning capabilities and from point of total harmonic distortion. The main building block of all filters is integrator.

This master thesis deals with the problematics of CT filters and focuses on Gm – C filter. Three linearisation techniques are listed and compared in terms of linear input range, distortion and retuning. In the practical part – second - order low – pass filter is designed and its tuning capabilities are examined.

This master’s thesis deals with the design of tuneable frequency second order filter in CMOS technology. The thesis describes the design of a transconductor and its utilization for tunable gm-C filter. The design and all simulations were made in Cadence Spectre and Virtuoso software. Limitedly Orcad Pspice and SNAP were also used.

L'objectif est d'étudier un bloc de terminal RF pour lequel la demande de reconfigurabilité est parmi les plus prononcées, dans le cadre des télécommunications mobiles des générations futures et dans l'optique de l'évolution des terminaux vers des systèmes multi-standards. Il s'agit du filtre actif analogique passe-bas en bande de base dans une chaîne de réception homodyne, qui doit s'adapter aux besoins du standard, au moins en terme d'ordre, de fréquence de coupure, de rapport signal à bruit et de linéarité. La philosophie de cette étude vise à obtenir un bloc de filtrage analogique reconfigurable à volonté. Après une description du contexte et un état de l'art extensif, nous proposons l'introduction d'une nouvelle figure de mérite qui permet de tenir compte du caractère singulier du contexte des radiocommunications mobiles multinormes, notamment en terme de flexibilité des structures et de l'appréciation du compromis bruit/linéarité au sein de ces systèmes. La configurabilité de systèmes de filtrages est ici abordée selon une approche double: - une première approche consiste à relâcher les contraintes d'accordabilité en utilisant la commutation d'éléments actifs, permettant alors de segmenter un large domaine en plusieurs sousdomaines plus accessibles en terme de spécifications électriques. La faisabilité d'un tel système est démontrée dans une technologie BiCMOS 0. 25µm - nous proposons ensuite une technique de construction de structures de filtres Gm-C configurable en topologie (type et ordre du filtre). Une architecture de contrôle numérique de la fréquence de coupure est par ailleurs proposée. Le démonstrateur du système est développé dans une technologie CMOS 0. 13 µm.

This thesis deals with the design, layout, fabrication, testing and characterization of a second-order filter (biquad) using the transconductance-C (gm-C) technique. The biquad was designed to realize the four filter functions - lowpass, highpass, bandpass and notch - by appropriate choice of input and output terminals and element values. The tunable range of frequencies for the biquad was designed to be 18-59MHz. The quality factor of the biquad was designed to be tunable from approximately 1/3 to 3. The filter was designed in LEVEL2 SPICE, laid out using MAGIC, and the circuit was fabricated using MOSIS's 2μm CMOS analog (n-well) process. The circuit board for testing the chip was designed using the PCB design system -PADS-PCB. The chip was tested using the Network Analyzer HP 4195A. The performance of the filter was then compared with the design objectives and simulation results. Both the pole frequency and the quality factor were found to be tunable by the same factor as the design. Noise analysis showed the output noise to be less than -65dB. The notch function could not be experimentally verified due to high sensitivity of this function to component tolerances and process variations. Power dissipation of the filter was found to be 6m W.

Orientadores: Jacobus Willibrordus Swart, Jader Alves de Lima Filho
Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de Computação
Made available in DSpace on 2018-08-18T14:24:01Z (GMT). No. of bitstreams: 1 Pimenta_WallaceAlane_M.pdf: 1696709 bytes, checksum: 2f32b6a38a0f8cb824562743faee308d (MD5) Previous issue date: 2011
Resumo: Este trabalho envolve o estudo de uma nova arquitetura para filtros integrados com freqüência de corte em sub-hertz, orientado para aplicações na área biomédica, possuindo requisitos como baixo consumo e baixa tensão de operação. Devido a sua aplicação também em sistemas implantáveis, o circuito deve operar com tensão de alimentação variando de 0,9V até 1,6V. Para as aplicações envolvendo circuitos implantáveis, as variações de temperatura não são críticas, embora o circuito tenha sido projetado para uma variação de 0°C até 100°C. Este estudo engloba análise, projeto, simulação, fabricação e caracterização experimental do filtro, sendo também testado com um modelo de sinal de eletrocardiograma (ECG). O filtro proposto é do tipo gm-C e se utiliza do controle da impedância vista pela fonte de um transistor NMOS para o ajuste da freqüência de corte. Comparativamente a outras topologias, possui vantagens como o simples controle da freqüência de corte, além da facilidade de imposição de uma tensão de modo-comum. Em termos de desvantagens, uma das principais está no fato de haver distorções significativas para sinais de alta amplitude (tipicamente acima de algumas dezenas de mili-volts). Na maioria das aplicações biomédicas, ou mesmo, por exemplo, sinais de origem sísmica, onde ambos possuem componentes de freqüência bem baixas, as amplitudes são de baixa magnitude. O principal parâmetro testado no circuito foi a freqüência de corte e seu ajuste com a corrente de polarização. Ainda, de forma a testar a capacidade do circuito de processar um sinal sem distorção, impondo um modo comum ao mesmo, foi utilizado o padrão adotado pela norma européia CENELEC (European Committee for Electrotechnical Standardization) para o sinal de ECG. No desenvolvimento foram utilizadas técnicas de projeto para circuitos de baixa potência, assim como utilização do modelo compacto ACM (Advanced Compact Model) para dimensionamento e cálculos manuais, obtendo-se expressões simples para a freqüência de corte. Fatores importantes para este tipo de projeto como correntes de fuga e nível de inversão do canal foram considerados, assim como as influências das capacitâncias parasitas. As correntes de fuga possuem um modelamento muitas vezes questionável e impreciso. Deste modo, de forma a obter uma idéia clara das fugas envolvidas, duzentos transistores NMOS unitários (0,8?m/10?m) foram colocados em paralelo para medir a fuga nas junções em função da temperatura e tensão reversa de polarização. Os dados obtidos de dez amostras de um mesmo lote mostraram um comportamento dentro do esperado. A média medida das correntes de fuga de um transistor unitário para as temperaturas de 27°C e 85°C foram respectivamente 46fA e 3,4pA. Dois filtros foram projetados para obter uma maior flexibilidade nos testes. Ambos os filtros se utilizam de uma fonte de corrente proporcional à temperatura (PTAT) única de valor típico medido igual a 5,65nA como polarização. Cada filtro se utiliza de um OP-AMP para impor o modo-comum e um divisor de corrente de Bult, obtendo-se uma corrente da ordem de pA para polarizar o filtro propriamente dito. O primeiro filtro usa a própria corrente de PTAT para polarização do nó de entrada que define a freqüência de corte. Com isto, é possível uma compensação de primeira ordem para sua variação com temperatura. O segundo filtro possui uma entrada de corrente independente, de forma que a mesma pode ser alterada externamente, possibilitando verificar a variação da freqüência de corte em função da polarização. A verificação funcional dos sub-circuitos que constituem o filtro, assim como todo o sistema, foi realizada utilizando-se simuladores SMASH/PSPICE/Cadence com modelos Bsim3v3, considerando-se a variação dos parâmetros de processo e intervalo de temperatura de 0ºC à 100ºC. O layout do circuito foi realizado através do programa Cadence, e possui uma área efetiva de 0,263mm2 para os dois filtros. A fabricação foi feita na foundry da AMS, usando-se tecnologia CMOS 0,35?m. A caracterização experimental envolveu análise da freqüência de corte, fugas em junções, resposta a um sinal de ECG, consumo e, comportamento com relação à tensão de alimentação. Resultados experimentais para a freqüência de corte do primeiro filtro, em dez amostras, resultaram em uma média de 2,38Hz e desvio padrão de 0,32Hz. A corrente de referência PTAT apresentou uma média de 6,90nA e um desvio padrão de 1,04nA. O comportamento PTAT da mesma pôde ser observado experimentalmente (de forma indireta) na faixa de 27°C à 85°C. A freqüência de corte em função da corrente de polarização foi analisada usando-se o segundo filtro, que confirmou a dependência linear por quase uma década de variação da corrente de entrada. Também, as respostas aos padrões de sinal de ECG de baixa e alta amplitude foram analisadas com sucesso no primeiro filtro. O trabalho teve seus objetivos alcançados, realizando etapas de especificação, projeto, layout e caracterização. Os resultados experimentais obtidos estão dentro do esperado, validando a arquitetura proposta de um filtro passa-altas, totalmente integrado, com freqüência de corte em sub-hertz
Abstract: This work aims the study of a new topology for integrated filters with cut-off frequencies around sub-hertz, oriented to biomedical applications, having requisites as low consumption and low voltage operation. Due to its application also in implantable systems, the circuit must operate with supply voltage varying from 0.9V to 1.6V. For applications involving implantable circuits, temperature variations are not critical, although this circuit was designed for an operation from 0ºC to 100ºC. This study conducts analyses, design, simulation, fabrication and experimental characterization of the filter, being tested with an electrocardiogram signal (ECG). The proposed filter is a gm-C type and uses the control of the impedance seen from the source of a NMOS transistor to adjust the cut-off frequency. Comparatively to other topologies, it has advantages as simple cut-off frequency control and its easiness to impose a common-mode voltage. As drawbacks, one of the most significant is in the fact of having significant distortions with high amplitude signals (tipically above some tens of milli-volts). In most biomedical applications, or even signals with a seismic origin, for example, where both have very low frequency components, their amplitudes are low in magnitude. The main tested parameter in the circuit was the cut-off frequency and its adjustment with the biasing current. Besides, as a test for the circuit capability of processing a signal without distortion, while imposing it a common-mode, it was used a standard from an European norm called CENELEC (European Committee for Electrotechnical Standardization) for the ECG signal. In the development were used design techniques for low power circuits, as well as the use of the compact model ACM (Advanced Compact Model) for dimensioning and hand calculations, getting simple expression for the cut-off frequency. Important factors for this kind of project as leakage current and channel inversion level were considered, also the influence of stray capacitances. The leakage current has a doubtful and imprecise modeling. Herewith, as a way to get a better idea of leakage values involved, two hundred unity NMOS transistors (0,8?m/10?m) were placed in parallel in order to measure the junction leakages as a function of temperature and reverse voltage biasing. The obtained data for ten samples of a single batch showed a behavior as expected. The mean value for the leakage currents of a unity transistor for temperatures between 27ºC and 85ºC were repectivelly, 46fA and 3.4pA. Two filters were designed to obtain a larger flexibility during the tests. Both filters use a unique PTAT current source with measured typical value equal to 5,65nA as biasing. Each filter uses an OP-AMP to impose a common-mode voltage and a Bult current divider, getting a current with a magnitude of pA to bias the filter itself. The first filter uses the proportional to temperature (PTAT) current directly from source to bias the input branch that defines the cut-off frequency. The second filter has and independent input, so that it can be changed externally, allowing to verify the cut-off frequency as a function of biasing current. The functional verification of the sub-circuits that build-up the filter, as the whole system, was performed using simulators SMASH/PSPICE/Cadence with Bsim3v3 models, considering the process parameters variations and temperature interval from 0ºC to 100ºC. The circuit layout was developed through Cadence program, and has an effective area of 0,263mm2 for both filters. The fabrication was done on AMS foundry, using the CMOS 0.35?m technology. The experimental characterization considered cut-off frequency analysis, junction leakages, response to an ECG signal, consumption and, behavior with respect to supply voltage. Experimental results for cut-off frequency of the first filter, on ten samples, resulted in a mean value of 2.38Hz with a standard deviation of 0.32Hz. The PTAT current presented a mean value of 6.90nA with 1.04nA of standard deviaton. The PTAT behavior of this current could be experimentally observed on range of 27ºC to 85ºC. The cut-off frequency as a function of biasing current was analyzed using the second filter, which confirmed the linear dependency for almost a decade of input current variation. Also, the responses to ECG standard signals of low and high amplitudes were analyzed successfully on the first filter. This work has achieved its purpose, making specifications stages, design, layout and characterization. The experimental results obtained are within expected, validating the proposed architecture of a high-pass filter, fully integrated, with cut-off frequency in sub-hertz
Mestrado
Eletrônica, Microeletrônica e Optoeletrônica
Mestre em Engenharia Elétrica