Journal articles on the topic 'Epoxy Mold Compound'

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1

Kumari, Pinki, Kuldeep Singh, and Anuj Singal. "Reducing the Hygroscopic Swelling in MEMS Sensor using Different Mold Materials." International Journal of Electrical and Computer Engineering (IJECE) 10, no. 1 (February 1, 2020): 494. http://dx.doi.org/10.11591/ijece.v10i1.pp494-499.

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Today, Hygroscopic swelling is one of the biggest challenging problem of Epoxy mold compound (EMC) in packaging with Microelectromechanical system (MEMS) devices. To overcome this hygroscopic swelling problem of EMC and guard the devices, MEMS devices are molded in this paper with different Mold Compound (MC) i.e. titanium and ceramic etc. during their interconnection with the board. Also, a comparatively performance analysis of this various mold compound with MEMS pressure sensor has been studied in this paper at 60% humidity, 140 mol/m<sup>3</sup> saturation concentration and 25 <sup>o</sup>C. It was observed that hygroscopic swelling does not take place in the titanium mold compound. But, titanium is very costly so we have to consider something cheaper material i.e. ceramic in this paper. The Hygroscopic swelling in Ceramic Mold Compound after 1 year is nearly 0.05mm which is very less than epoxy.
2

Lakhera, Nishant, Sandeep Shantaram, and AR Nazmus Sakib. "Adhesion Characteristics of Epoxy Molding Compound and Copper Leadframe Interface: Impact of Environmental Reliability Stresses." International Symposium on Microelectronics 2017, no. 1 (October 1, 2017): 000304–11. http://dx.doi.org/10.4071/isom-2017-wa53_009.

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Abstract Delamination at the mold compound and leadframe interface is the most common failure mode observed during processing and qualification of the microelectronic package. Mold compound to leadframe delamination is typically observed after environmental reliability stresses like: moisture preconditioning and reflow, air-to-air thermal cycling, biased highly accelerated stress etc. Leadframe based packages constitutes majority of microelectronic packages that are manufactured today, which makes mold compound/leadframe interface of great interest requiring thorough understanding of the adhesion characteristics and its evolution as a function of reliability stresses. This study used four-point bend testing to evaluate the adhesion strength of commercially available mold compound to bare copper and silver plated copper leadframes exposed to automotive grade environmental stresses. Results show that adhesion of mold compound to silver plated leadframes is significantly lower than adhesion to bare copper leadframes. Results obtained from this study can be used to carefully select the qualification reliability stresses to prevent overstressing the package and causing failures related to wire bond cracking, delamination etc., which have significant time and cost implications. Finite element simulations were also performed to validate the empirical adhesion test results and can be extended to full package level models to enable delamination prediction.
3

Deringer, Tim, and Dietmar Drummer. "The influence of mold temperature on thermoset in-mold forming." Journal of Polymer Engineering 40, no. 3 (February 25, 2020): 256–66. http://dx.doi.org/10.1515/polyeng-2019-0322.

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AbstractA new process, called thermoset in-mold forming, for combining thermoset master forming and thermoset forming in one mold is in development. A pre-impregnated continuous-fiber reinforced sheet based on epoxy (prepreg) is formed in the injection molding machine, followed by instantaneous overmolding of a short-fiber reinforced epoxy compound in one step. Compared with conventional processes in which thermoset injection molding, prepreg compression molding, and hence curing of the materials are separated, the new process allows for the combination in one step and simultaneous curing of both components. The result is a hybrid component, which features a continuous-fiber reinforced part for higher mechanical performance and a short-fiber reinforced part with high design freedom for integration of additional functions. For a successful combination of both materials in one process, it is essential to investigate the bond strength between them in relation to the processing parameters and their influence on the degree of cure. This paper analyzes the influence of the mold temperature in this process on curing degree, bond strength, and the processing viscosity.
4

Sulong, Abu Bakar, Gan Tek Keong, and Jaafar Sahari. "Effects of Molding Parameters and Addition of Fillers on Gate Chip Off Formation during the Degating Process in Transfer Molding." Key Engineering Materials 447-448 (September 2010): 790–94. http://dx.doi.org/10.4028/www.scientific.net/kem.447-448.790.

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In the electronics packaging industry, Epoxy Mold Compound (EMC) polymer matrix is filled with fused silica (SiO2) to obtain the required roughness and hardness. Gate chip off, which occurs during the degating process in transfer molding is one of the common defects which contributes to the failure in the proper functioning of the package. During the degating process, surface contact between two solid bodies (degating blade and gate) generate a high shear stress on package, thus creating a high potential for the incidence of gate chip of. In this study, the influence of transfer molding parameters and size of fillers (normal and fine) on the gate chip off were investigated. The application of Design of Experiments (DOE) using regression model and Analysis of Variance (ANOVA) showed that molding parameters do not significantly influence the incidence of gate chip off. Numerical simulation was used to investigate effect of two filler sizes and molding parameters on the mold fill time, end pressure of fill and shear stress at the wall. The results showed there were no significant influences on mold fill time but the fine filler showed lower pressure at the end of fill and lower shear stress at the wall. Experimental results of two sizes if filler shown that fine filler mold compound exhibited in reduction of gate chip off formation, compared to normal filler mold compound. Smooth surface of fine mold compound lead to decrease of friction shear stress during degating is expected contribute to this finding.
5

Chen, Hwe-Zhong, Wen-Hung Lee, Huei-Huang Lee, Durn-Yuan Huang, Shyang-Jye Chang, and Sheng-Jye Hwang. "Effects of defrosting period on mold adhesion force of epoxy molding compound." Asia-Pacific Journal of Chemical Engineering 4, no. 2 (March 2009): 161–68. http://dx.doi.org/10.1002/apj.186.

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6

Brueckner, Julia, Michael Schwander, Moritz Jurgschat, and Ramon Tuason. "Effective Inspection Methods for Advanced Packaging Technologies." International Symposium on Microelectronics 2017, no. 1 (October 1, 2017): 000563–68. http://dx.doi.org/10.4071/isom-2017-tha32_055.

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Abstract Advanced packaging technologies have ramped up to provide solutions for new high density devices that are based on the integration of several components with different functions. The need for thin packages with memory, APU, modem and analog all packed in one requires each individual layer thickness to have exacting specifications. In this work we concentrate on the challenging task of measuring epoxy mold compound (EMC) thickness distribution across the wafer. We will present how an optical sensor based on spectral coherence interferometry (SCI) can be utilized to collect critical measurements related to mold thickness, uniformity and height information between bumps and the mold surface. SCI provides an optical, non-destructive, high-throughput solution to measure mold thickness and surface warpage simultaneously. This is done by utilizing a sensor with high numerical aperture (NA) which enables one to measure layers and surfaces of mold materials despite the usual measurement constraints introduced from high roughness values, high internal scattering, and severe wafer warpage. By adding a bottom sensor in a so called twin-configuration, further simultaneous data collection is possible.
7

Hsu, Hsiang-Chen, Shih-Jeh Wu, Wen-Fei Lin, and Boen Houng. "Reliability Design and Optimization Process on through Mold via using Ultrafast Laser." Polymers and Polymer Composites 26, no. 1 (January 2018): 1–8. http://dx.doi.org/10.1177/096739111802600101.

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In this study, a through mold via (TMV) process using ultrafast Laser has been developed for the interconnection on 3D package-on-package (PoP) application. Epoxy molding compound (EMC) is a composite material consisted of epoxy resin, filler particles (fused silica) and other constituents. Among these chemical compositions, the size and spatial distribution of fillers on the EMC dominate the sidewall quality on drilled trench. However, random filler leakage on the sidewall leads to an irregular and uneven trench and these drop out fillers become a problem needed to be solved. Faster removal of debris can be achieved by controlling the laser drilling parameters. Parametric studies have been performed to determine the specification of trench and design rule of material. The optimal desmear process on TMV bottom PoP package developed in this study demonstrates the reliability improvement on follow-up sputtering or filling process.
8

Lakhera, Nishant, Tom Battle, Sheila Chopin, Sandeep Shantaram, and Akhilesh K. Singh. "Technique to predict reliability failure in side-gate transfer molded packages." International Symposium on Microelectronics 2015, no. 1 (October 1, 2015): 000696–701. http://dx.doi.org/10.4071/isom-2015-tha61.

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Scanning acoustic microscopy (SAM) is the primary method to non-destructively detect internal defects in finished semiconductor packages. SAM is heavily used to detect interfacial delamination in the die-package system. Though this method can achieve an acceptable resolution to analyze the quality of the package unit, it is not absolute in all cases. SAM is also time consuming and non-predictable, as it offers a latent response of the finished good to the reliability tests. This paper presents an analytical prediction method defined to gauge whether the epoxy mold compound (EMC) encapsulating a no polyimide (PI) die surface would yield detectable delamination at the die to mold compound interface in the package finished good. The new method can be used to gauge whether top of die to EMC delamination will occur with a change in new wire bond (WB) die layout, new EMC material and new mold process. This new method also provides a way to demonstrate that the observed delamination is not detrimental to package reliability. This method will demonstrate how the no-PI package reliability can be met to not cause electrical failures based on the resin rich (RR) volume.
9

Murali, Sarangapani, Bayaras Abito Danila, and Zhang Xi. "Reliability of Coated and Alloyed Copper/Silver Ball Bonds." International Symposium on Microelectronics 2017, no. 1 (October 1, 2017): 000318–24. http://dx.doi.org/10.4071/isom-2017-wa55_128.

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Abstract The paper discusses on the reliability of coated and alloyed copper/silver ball bonds on both epoxy molded and unmolded conditions:Moisture resistance test using unmolded device at 130°C 85%RH (humidity chamber) revealed no ball lift failure until 96hours for the ball size of 1.65 times the diameter of wireCorrosion resistance test using unmolded device at room temperature by dripping (or soaking) dilute chlorine (Cl) solution revealed no ball lift failure for gold wires. Copper base wire bonds failed after 6min of storage while silver (Ag) base wire bonds showed a few bond lifts within 2min. This shows that Ag base wires are more sensitive to Cl environment than copper (Cu) base wiresA case study of epoxy molded device using green mold compound and four types of Cu and Ag base ball bonds passed on thermal ageing (HTS) at 175°C for 4000h and on +5V bHAST for 500h. The test response is by measuring electrical resistance in order not to reduce below 10% of contact resistance measured during time zero bonding○ Cross-section analysis of the samples showed intact bonding of Cu and Ag base ball bonds after 4000h of HTS○ The result shows when Cu and Ag base wire bonds molded with a good compatible green mold epoxy compound satisfy the automotive electronic council (AEC – Q006 & Q100 Rev-H, for Cu) requirements of 2X stress test with respect to electrical resistance measurementAnother case study of epoxy molded device revealed Cu and Ag base wire bonds pass 3000cycles of thermal cycling (−55°C to +150°C) without any neck/heel cracks and stitch lifts In addition, fine wires are baked at elevated temperature under vacuum or by purging nitrogen to find the quality of wire surface. As expected, Au, Cu and Ag base wires show clean surface. For palladium (Pd) coated Cu wire, a good Pd adhesion to Cu core surface without blisters is evident.
10

Xu, Wen Jiao, and Shu Yu Lu. "Recycling of Thermosetting Epoxy Molding Compound Waste into PVC Composites: Effect of Silane Coupling Agent on Morphology and Physical Properties." Advanced Materials Research 311-313 (August 2011): 1496–500. http://dx.doi.org/10.4028/www.scientific.net/amr.311-313.1496.

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The aim of this study was to investigate the recycling of waste cured epoxy molding compound (c-EMC) which was generated as the mold residue in molding process of electronic component packages, by way of blending the pulverized mold residue with poly (vinyl chloride) (PVC) and other additives to prepare a reproduction composite. The influence of modified and non-modified c-EMC powder on structure and properties of the composites were analyzed by mechanical tests, vicat softening point test (VST) and scanning electron microscopy (SEM). The results showed that simple adding c-EMC powder could improve the stiffness and heat resistance of the composites, though decreased the mechanical strength of the composites. After being pretreated by silane coupling agent γ-aminopropyltriethoxysilane (KH-550), modified c-EMC powder had effective strengthening and toughening effects on the composites with the increasing powder content. Furthermore, better interfacial adhesion and higher VST value of the composites were observed in the presence of KH-550.
11

Yoo, Do-Jae, Jong-In Ryu, Gyu-Hwan Oh, Yong-Choon Park, Ki-Ju Lee, Jin-Su Kim, Jong-Woo Choi, et al. "PMV (Plating Mold Via) interconnection development in molded SiP modules." International Symposium on Microelectronics 2014, no. 1 (October 1, 2014): 000777–82. http://dx.doi.org/10.4071/isom-thp11.

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Recently, there are increasing demands of a size reduction and a fine interconnection technology, especially for System-in-Package (SiP) module and Package on Package (POP) module in a smart phone and a wearable electronic device. In this study, we presented the Plating Mold Via (PMV) interconnection technology as an innovative fine pitch interconnection solution between substrate I/O pads and package I/O pads in molded System-in-Package (SiP) modules. Similar to the Through Mold Via (TMV), the laser mold via process is first performed to produce a through-via in the Epoxy Mold Compound (EMC) mold, but plating and Soldering process are used simultaneously to produce the metallurgical interconnection to embody the I/O pins of the over-molded surface. After the PMV technology is described, a study of PMV in the molded packaging module is followed. The study is conducted using a test vehicle of SiP module that contains flip chips, Quad Flat Non-leaded (QFN) packages and passives. It is focused on several interface reliability issues, including the interfacial strength of PMV to substrate metal pad as well as to the laser projected area of EMC, and the study of IMC at the plating metal and solder interfaces. The study clearly shows that the PMV technology is a promising fine pitch interconnect solution for various SiP modules.
12

Jha, Vibhash, and Torsten Hauck. "Moldflow simulation of an exposed pad leaded package." International Symposium on Microelectronics 2015, no. 1 (October 1, 2015): 000179–84. http://dx.doi.org/10.4071/isom-2015-tp65.

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A study has been conducted for epoxy mold compound filling for a 48 lead exposed pad package. The leadframe design contains a small gap feature where it is critical to evaluate void estimates. A modeling method is being discussed to accurately predict the flow front behavior and make void percentage estimates. With improved design, void percentage significantly goes down as predicted by models. The paper contains detailed methodology for creation of CAD model with standard leadframe drawing and final analysis using a defined gate area. Fill time contours shows significant improvement comparing two designs with 35 μm and 65 μm gap feature.
13

Vogelwaid, Julian, Martin Bayer, Michael Walz, Felix Hampel, Larysa Kutuzova, Günter Lorenz, Andreas Kandelbauer, and Timo Jacob. "Optimizing Epoxy Molding Compound Processing: A Multi-Sensor Approach to Enhance Material Characterization and Process Reliability." Polymers 16, no. 11 (May 30, 2024): 1540. http://dx.doi.org/10.3390/polym16111540.

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The in-line control of curing during the molding process significantly improves product quality and ensures the reliability of packaging materials with the required thermo-mechanical and adhesion properties. The choice of the morphological and thermo-mechanical properties of the molded material, and the accuracy of their determination through carefully selected thermo-analytical methods, play a crucial role in the qualitative prediction of trends in packaging product properties as process parameters are varied. This work aimed to verify the quality of the models and their validation using a highly filled molding resin with an identical chemical composition but 10 wt% difference in silica particles (SPs). Morphological and mechanical material properties were determined by dielectric analysis (DEA), differential scanning calorimetry (DSC), warpage analysis and dynamic mechanical analysis (DMA). The effects of temperature and injection speed on the morphological properties were analyzed through the design of experiments (DoE) and illustrated by response surface plots. A comprehensive approach to monitor the evolution of ionic viscosity (IV), residual enthalpy (dHrest), glass transition temperature (Tg), and storage modulus (E) as a function of the transfer-mold process parameters and post-mold-cure (PMC) conditions of the material was established. The reliability of Tg estimation was tested using two methods: warpage analysis and DMA. The noticeable deterioration in the quality of the analytical signal for highly filled materials at high cure rates is discussed. Controlling the temperature by increasing the injection speed leads to the formation of a polymer network with a lower Tg and an increased storage modulus, indicating a lower density and a more heterogeneous structure due to the high heating rate and shear heating effect.
14

Morais, Pedro, Alireza Akhavan-Safar, Ricardo J. C. Carbas, Eduardo A. S. Marques, Bala Karunamurthy, and Lucas F. M. da Silva. "Mode I Fatigue and Fracture Assessment of Polyimide–Epoxy and Silicon–Epoxy Interfaces in Chip-Package Components." Polymers 16, no. 4 (February 7, 2024): 463. http://dx.doi.org/10.3390/polym16040463.

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Semiconductor advancements demand greater integrated circuit density, structural miniaturization, and complex material combinations, resulting in stress concentrations from property mismatches. This study investigates the failure in two types of interfaces found in chip packages: silicon–epoxy mold compound (EMC) and polyimide–EMC. These interfaces were subjected to quasi-static and fatigue loading conditions. Employing a compliance-based beam method, the tests determined interfacial critical fracture energy values, (GIC), of 0.051 N/mm and 0.037 N/mm for the silicon–EMC and polyimide–EMC interfaces, respectively. Fatigue testing on the polyimide–epoxy interface revealed a fatigue threshold strain energy, (Gth), of 0.042 N/mm. We also observed diverse failure modes and discuss potential mechanical failures in multi-layer chip packages. The findings of this study can contribute to the prediction and mitigation of failure modes in the analyzed chip packaging. The obtained threshold energy and crack growth rate provide insights for designing safe lives for bi-material interfaces in chip packaging under cyclic loads. These insights can guide future research directions, emphasizing the improvement of material properties and exploration of the influence of manufacturing parameters on delamination in multilayer semiconductors.
15

Han, S., K. K. Wang, and D. L. Crouthamel. "Wire-Sweep Study Using an Industrial Semiconductor-Chip-Encapsulation Operation." Journal of Electronic Packaging 119, no. 4 (December 1, 1997): 247–54. http://dx.doi.org/10.1115/1.2792245.

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In this study, the wire-sweep problem has been studied by performing experiments using a commercial-grade epoxy molding compound, a real chip assembly, and an industrial encapsulation process. After encapsulating the chip, the deformed wire shape inside the plastic package has been determined by X-ray scanning. A procedure for the wire-sweep calculation during encapsulation process has been developed. The wire sweep values have been calculated using this procedure with material properties measured from experiments. The calculated wire-sweep values are compared with experimental values measured at different mold temperatures, fill times, and cavities. In most cases, the calculated values are in good agreement with the experimental values.
16

Hu, S. Y., Y. P. Chang, W. R. Jong, and S. C. Chen. "Effect of mold heat transfer on the curing reaction of epoxy molding compound during transfer molding." International Communications in Heat and Mass Transfer 23, no. 6 (October 1996): 779–88. http://dx.doi.org/10.1016/0735-1933(96)00061-9.

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Jeong, Haksan, Kwang-Ho Jung, Choong-Jae Lee, Kyung Deuk Min, Woo-Ram Myung, and Seung-Boo Jung. "Effect of epoxy mold compound and package dimensions on the thermomechanical properties of a fan-out package." Journal of Materials Science: Materials in Electronics 31, no. 9 (March 26, 2020): 6835–42. http://dx.doi.org/10.1007/s10854-020-03243-8.

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Peanpunga, Udom, Kessararat Ugsornrat, Panakamol Thorlor, and Chalermsak Sumithpibul. "The Effect of Epoxy Molding Compound Floor Life to Reliability Performance and mold ability for QFN Package." Journal of Physics: Conference Series 901 (September 2017): 012088. http://dx.doi.org/10.1088/1742-6596/901/1/012088.

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Han, S., and K. K. Wang. "Flow Analysis in a Chip Cavity During Semiconductor Encapsulation." Journal of Electronic Packaging 122, no. 2 (January 11, 1999): 160–67. http://dx.doi.org/10.1115/1.483149.

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In this paper, methods to analyze the flow during semiconductor chip encapsulation have been developed. A numerical method is used for the flow analysis in the chip cavity. In this study, for accurate analysis of flow in the chip cavity, models for the cross flow through the leadframe openings have been developed. The models have been verified by comparing with two experiments. In the first experiment, clear polymer and transparent mold have been used for the visualization of flow in a cavity with a leadframe. In the next experiment, actual epoxy molding compound together with an industrial encapsulation process have been used to observe the melt-front advancement shapes. The calculated and experimental results show good agreement. [S1043-7398(00)00902-6]
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Pei, Chien-Chang, and Sheng-Jye Hwang. "Prediction of Wire Sweep During the Encapsulation of IC Packaging With Wire Density Effect." Journal of Electronic Packaging 127, no. 3 (November 3, 2004): 335–39. http://dx.doi.org/10.1115/1.1939028.

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More wires in a package and smaller wire gaps are the trend in the integrated circuit (IC) packaging industry. The effect of wire density is becoming increasingly apparent, especially on the flow pattern of the epoxy molding compound during the molding process and, hence, on the amount of wire sweep. In most mold flow simulations, the wire density effect is ignored. In order to consider the wire density effect on the predicted amount of wire sweep in the analysis, several indirect approaches were used by researchers before. But those approaches were not general enough to be applied to all cases. This paper presents a more direct and convenient approach to consider wire density effect by including wires in the mesh model for three-dimensional (3D) mold-filling analysis. A thin small outline package (TSOP) with 53 wires is used as the demonstration example, and all the wires are modeled in the 3D mesh. By comparison with experimental results, it is shown that this approach can accurately describe the wire density effect. When the wires are included in the mesh model, the predicted wire sweep results are better than those without considering the wire density effect.
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Yoo, Do-Jae, Ki-Chan Kim, Young-Hoon Kwak, Min-Seok Jang, Job Ha, Jae-Cheon Doh, Chang-Bae Lee, and Young-Do Kweon. "Molded Underfill (MUF) Technology Development for SiP Module with Fine Flip Chip." International Symposium on Microelectronics 2010, no. 1 (January 1, 2010): 000204–11. http://dx.doi.org/10.4071/isom-2010-tp2-paper2.

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In this study, we developed the Molded Underfill (MUF) technology for system in package (SiP) module with fine pitch flip chip in RF application, in which two flip chips, LC filter, and additional passive components are integrated side-by-side. This study covered not only MUF reliability performance but also MUF design study focused on the void free methodology to minimize void between flip chip bumps in the SiP module. The investigation comprises several aspects: A design study that present a printed circuit board (PCB) and epoxy molding Compound (EMC) selection approach, air vent design of cavity vacuum molding, and void formation mechanism by mold flow simulation and DOE(Design of Experiment) of several SIP module layouts. The test vehicle used for this study of MUF by vacuum transfer molding shown as SiP module (8.2×7.7×1.13mm) which was sawn from 52.70×68.70×0.75mm mold area of 118.5*75.5*0.38 substrate. One segment mold inside (52.70× 68.70×0.75mm) had 35ea SiP modules (7X5 unit array). In addition, one SiP module included one Flip chip RF/BB IC(6.51×5.81×0.41mm) which had 339ea bumps and 95um Bump height, one Flip chip RF switch (0.705×0.705× 0.33mm) which had 4 bumps and 85um bump height, 1.6×0.8×0.6mm size of LC filter, and total 25ea passives. In the end, SAT result of void, moisture sensitivity test, thermal cycle test and pressure cooker test had also been carried out for reliability evaluation. The test result shows that the optimized SiP module with fine flip pitch has a good reliability performance.
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Wong, Fu Mauh, Chee Keong Chong, and K. N. Seetharamu. "Transient Thermal Analysis of Wave Soldering Process for an Optical Encoder Module." Journal of Microelectronics and Electronic Packaging 1, no. 3 (July 1, 2004): 145–56. http://dx.doi.org/10.4071/1551-4897-1.3.145.

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Severe delamination at the interfaces of leadframe/mold compound and leadframe/die attach epoxy has been observed right after the wave soldering process for an optical encoder package. During wave soldering process, package is heated up by the hot ambient and the molten solder. As temperature increases, package is more prone to delamination due to degradation of adhesion strength. Finite Element Analysis (FEA) has been conducted to model the wave soldering process using the measured lead temperature as thermal boundary condition. Convective heating and cooling are considered. The dynamic temperature response of the package has been captured and analyzed. Several approaches inclusive of changing leadframe material, removing housing and altering mounting configuration, have been examined to obtain the best design that yield lowest package temperature. Experiment is conducted and the experimental results have been compared with the numerically predicted data and the agreement is good.
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Khalilullah, Ibrahim, Talukder Reza, Liangbiao Chen, Mark Placette, A. K. M. Monayem H. Mazumder, Jiang Zhou, Jiajie Fan, Cheng Qian, Guoqi Zhang, and Xuejun Fan. "In-situ characterization of moisture absorption and hygroscopic swelling of silicone/phosphor composite film and epoxy mold compound in LED packaging." Microelectronics Reliability 84 (May 2018): 208–14. http://dx.doi.org/10.1016/j.microrel.2018.03.025.

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Tsvetkov, Yuriy, Evgeniy Gorbachenko, and Roman Larin. "Friction Impact on the Accuracy of the Dependence of Micro-Hardness on Plastic Deformation in Testing Metals under Uniaxial Compression." Key Engineering Materials 909 (February 4, 2022): 132–38. http://dx.doi.org/10.4028/p-rc91j5.

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Two sets of cylinder specimens with a height to diameter ratio of 1.5 made of annealed technical copper and AK12pch silumin were tested for uniaxial compression to different degrees of plastic deformation. At the first stage of the experiments, the ends of the specimen were ground on skins of different grain sizes and polished. Then the micro-hardness of the ends of each sample was measured. Micro-hardness measurements were carried out by the Vickers method at three loads on the indenter: 0.196, 0.490, and 0.980 N. At the second stage, the samples were cut along the meridional section, each sample was poured with a compound based on epoxy resin into an individual mold so that the meridional section of the cut sample came out onto the surface of the mold. After the process of grinding and polishing the meridional section, the micro-hardness of the center of the section was measured under the same loads that were used for measurements at the ends. At the third stage, the dependences of the micro-hardness on the intensity of plastic deformation were made. A comparative analysis of the indicated dependences, made from the results of measurements at the ends of the specimen and the surface of their meridional sections, showed that friction at the ends of the specimen during compression has a significant effect on the position of the dependence “micro-hardness - plastic deformation”. The evaluation of hardening based on the micro-hardness of the ends leads to significant errors.
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Shih, Meng-Kai, Tai-Kuang Lee, and Jin-Gyao Chang. "Warpage modeling and characterization of intelligent power modules (IPMs)." Journal of Mechanics 37 (2021): 543–50. http://dx.doi.org/10.1093/jom/ufab025.

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Abstract Intelligent power modules (IPMs) are widely used in the electric vehicle (and hybrid electric vehicle industry nowadays due to their high power density and ability to integrate multiple components within a single package. However, the reliability of IPMs is severely degraded by the substrate warpage effect produced during the packaging process. This study therefore develops a computational model to analyze the warpage of the IPM assembly at various stages of the packaging process. The validity of the simulation model is confirmed by comparing the numerical results for the warpage of the direct plated copper substrate with the experimental observations. Taguchi experiments are then performed to examine the effects of eight control factors on the IPM package warpage following the post-mold cure (PMC) process, namely (1) the dam bar layout, (2) the epoxy molding compound (EMC) thickness, (3) the lead frame thickness, (4) the ceramic thickness, (5) the bottom layer Cu foil thickness, (6) the top layer Cu foil thickness, (7) the ceramic material type and (8) the EMC material type. Finally, the Taguchi analysis results are used to determine the optimal packaging design that minimizes the warpage of the post-PMC package.
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Lee, Chu-Chung, TuAnh Tran, Varughese Mathew, Rusli Ibrahim, and Poh-Leng Eu. "Copper Ball Voids: Failure Mechanisms and Methods of Controlling at High Temperature Automotive Application." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2019, DPC (January 1, 2019): 000519–30. http://dx.doi.org/10.4071/2380-4491-2019-dpc-presentation_tp3_013.

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Since 2008, fine gauge (≤ 35 μm diameter) copper (Cu) wire has been rapidly replacing fine gauge gold (Au) wire in consumer, commercial, and industrial products [2–4]. The first wave of Cu wire products used bare, uncoated Cu wire which is soon to known having Cu-Al IMC corrosion induced by mobile chlorine ions in the epoxy mold compound system when IC parts are subjected to moisture related package stress tests such as biased HAST (Highly Accelerated Stress Test) [1–7]. Additionally, when comparing to Au wires, the 2nd bond process window of bare Cu wire can be very narrow and becomes a concern of moving into HVM (high volume manufacturing) [8]. Thus, palladium-coated Cu (PdCu) wire was introduced to the semiconductor assembly market aiming to provide more margin of passing biased HAST and enhance 2nd bond process capability [9–13]. However, the use of Pd-Cu wire is not a panacea to all Cu wire bond problems. One unique anomaly for Pd-Cu wire is the Cu ball void [1] which is observed only with Pd-Cu and not bare Cu ball bonds during HTSL (high temperature storage life) tests. The mechanism of forming Cu ball voids was proven to be the galvanized corrosion mechanism with Pd-Cu coupling. Significant factors affecting the formation rate of Cu ball voids are found to be baking temperature, EFO current settings, bonding parameters and mold compound additives (sulfur). Both anodic and cathodic chemical reactions will be proposed for Cu voids in this paper. Even though Cu void can be considered as a cosmetic defect for the majority of application since the peak temperature of device mission profile is always no larger than 175C. The application at extreme high temperature (for example, 190C) can actually cause electrical failure at the ball bon region due to the Cu void formation in terms of size and location at the Cu-Al IMC region. The main effect is due to the selected mold compound having high amount of metallic adhesion promoter which is sulfur-based and extensive high temperature storage test condition (190C). The FIB/SEM picture of failing ball bond due to Cu voids from this particular device will be presented in the paper. Thus, a newly developed doped Cu wire without Pd coating has been proposed by many wire suppliers to overcome Cu ball voids. However, doped Cu wires without Pd coating have suffered the same high volume manufacturing issues observed by bare Cu wires. For example, short tail and mean time between assist (MTBA) for doped Cu wires without Pd coating are both as poor as bare Cu wires. We will present high temperature storage test results obtained by doped PdCu wires in this paper. To balance high volume manufacturing issues and Cu void formation, doped PdCu wires are also proposed recently. Several doped PdCu wires whose extensive high temperature storage results (220C) will be presented in this paper. The worst case mold compound with high amount of sulfur based adhesion promoter has been used to test the effectiveness of these new wire types. At such harsh testing condition, there is one doped PdCu wire in our test can actually survive without electrical failed ball bond due to Cu voids. Factors of effectiveness of doped PdCu wires will be discussed in this paper. Authors have chosen to focus on Cu voids at both 1st bond (ball bond) and 2nd bond (wedge). 20 um wire diameter has been used for all test vehicle in this study. All controlling factors of eliminating Cu voids will surely be included at the end of this paper.
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Chopin, Sheila F., and Varughese Mathew. "Controlling Extrinsic Chloride Ions Effect on Copper Wirebond Reliability." International Symposium on Microelectronics 2019, no. 1 (October 1, 2019): 000095–99. http://dx.doi.org/10.4071/2380-4505-2019.1.000095.

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Abstract Copper (Cu) wirebond (WB) reliability in encapsulated microelectronic devices is influenced by intrinsic and extrinsic chloride ions. Previous work showed that intrinsic extractable chloride (Cl) ions that are part of the epoxy mold compound (EMC) can cause Cu-Al intermetallic (IMC) or Al pad corrosion under moisture-temperature reliability conditions. Another mode of Cl corrosion occurs due to the entrapment of Cl foreign material (FM) particles that can release Cl ions after molding the device. Intrinsic EMC and extrinsic Cl ions in encapsulated EMC must be defined, analyzed, and controlled to limit the potential for corrosion. Extrinsic Cl ions from FM (Foreign Material) particles can originate from human sources, the environment, assembly processes, and assembly tools. This paper focuses on extrinsic Cl ions from Cl-FM. Cl-FM embedded in EMC can be determined by dissolving the EMC in a solvent followed by filtration. The isolated FM was characterized by various techniques including: Scanning Electron Microscopy - energy-dispersive X-ray (SEM – EDX) and Fourier-transform infrared spectroscopy (FTIR) to determine the structure of the Cl-FM compounds. The FTIR Analysis determines the presence of C-Cl bond by identifying stretching bond frequency in the region of 800 – 600 cm−1 that determines if the Cl-FM particle is organic. The combination of analytical techniques was used to identify the source of the Cl-FM. The types of Cl FM particles discovered were both organic and inorganic in nature, and of different shapes and sizes. The smaller size particles &lt; 30μm posed a challenge for some particle type identification accuracies. Airborne particles are one of the main sources of Cl FM particles that can be entrapped in the EMC. Airborne particles are created by environmental dust, human wear, abrasion and handing, and machine maintenance. The primary Cl FM particles were found to be carbon-chlorine polymers such as polyvinyl chloride (PVC), Polyvinylidene chloride (PVDC), and inorganic chlorides including metal chlorides. Many of the EMC materials found to have entrapped natural and synthetic fibrous materials with embedded Cl compounds. The 175°C mold process and 260°C reflow thermal effect degrading the Cl FM particle in the EMC matrix could generate Cl depending on the additives and modifiers. Investigations were performed to develop hypotheses of how Cl FM particles are generated in the EMC and how the FM particles could be controlled.
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Lau, John, Ming Li, Nelson Fan, Eric Kuah, Zhang Li, Kim Hwee Tan, Tony Chen, et al. "Fan-Out Wafer-Level Packaging (FOWLP) of Large Chip with Multiple Redistribution-Layers (RDLs)." International Symposium on Microelectronics 2017, no. 1 (October 1, 2017): 000576–83. http://dx.doi.org/10.4071/isom-2017-tha35_056.

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Abstract This study is for fan-out wafer-level packaging (FOWLP) with chip-first (die face-up) formation. The chips with Cu contact-pads on the front-side and a die attach film (DAF) on the backside are picked and placed face-up on a temporary glass wafer carrier with a thin layer of light-to-heat conversion (LTHC) material. It is followed by compression molding with epoxy molding compound (EMC) and post mold cure (PMC) on the reconstituted wafer carrier, and then backgrinding the molded EMC to expose the Cu contact-pads of the chips. The next step is to build up the redistribution layers (RDLs) from the Cu contact-pads and then mount the solder balls. Next comes the de-bonding of the carrier with a laser, and then the dicing of the whole reconstituted wafer into individual packages. A 300mm reconstituted wafer with a package/die ratio = 1.8 and a die-top EMC cap = 100μm has also been fabricated (a total of 325 test packages on the reconstituted wafer.) This test package has three RDLs; the line width/spacing of the first RDL is 5μm/5μm, of the second RDL is 10μm/10μm, and of the third RDL is 15μm/15μm. The dielectric layer of the RDLs is fabricated with a photosensitive polyimide (PI) and the conductor layer of the RDLs is fabricated by electrochemical Cu deposition (ECD).
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Lau, John, Ming Li, Nelson Fan, Eric Kuah, Zhang Li, Kim Hwee Tan, Tony Chen, et al. "Fan-Out Wafer-Level Packaging (FOWLP) of Large Chip with Multiple Redistribution Layers (RDLs)." Journal of Microelectronics and Electronic Packaging 14, no. 4 (October 1, 2017): 123–31. http://dx.doi.org/10.4071/imaps.522798.

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This study is for fan-out wafer-level packaging with chip-first (die face-up) formation. Chips with Cu contact-pads on the front side and a die attach film on the backside are picked and placed face-up on a temporary-glass-wafer carrier with a thin layer of light-to-heat conversion material. It is followed by compression molding with an epoxy molding compound (EMC) and a post-mold cure on the reconstituted wafer carrier and then backgrinding the molded EMC to expose the Cu contact-pads of the chips. The next step is to build up the redistribution layers (RDLs) from the Cu contact-pads and then mount the solder balls. This is followed by the debonding of the carrier with a laser and then the dicing of the whole reconstituted wafer into individual packages. A 300-mm reconstituted wafer with a package/die ratio = 1.8 and a die-top EMC cap = 100 μm has also been fabricated (a total of 325 test packages on the reconstituted wafer). This test package has three RDLs; the line width/spacing of the first RDL is 5 μm/5 μm, of the second RDL is 10 μm/10 μm, and of the third RDL is 15 μm/15 μm. The dielectric layer of the RDLs is fabricated with a photosensitive polyimide and the conductor layer of the RDLs is fabricated by electrochemical Cu deposition (ECD).
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Fowler, Michelle, John P. Massey, Matthew Koch, Kevin Edwards, Tanja Braun, Steve Voges, Robert Gernhardt, and Markus Wohrmann. "Advances in Temporary Bonding and Debonding Technologies for use with Wafer-Level System-in-Package (WLSiP) and Fan-Out Wafer-Level Packaging (FOWLP) Processes." International Symposium on Microelectronics 2018, no. 1 (October 1, 2018): 000051–56. http://dx.doi.org/10.4071/2380-4505-2018.1.000051.

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Abstract Today's complex fan-out wafer-level packaging (FOWLP) processes include the use of redistribution layers (RDL) and reconstituted wafers with epoxy mold compound (EMC) for use in heterogeneous integration [1]. Wafer-level system-in-package (WLSiP) uses fan-out wafer-level packaging (FOWLP) to build the system-in-package (SiP) by attaching know-good die (KGD) in a chip-first process to a tape laminated temporary carrier. If the dies are attached in a die-up configuration (active area facing up) and then over-molded with EMC, contact pads on the embedded die are exposed during the backside grind process. During the RDL build, the temporary carrier supplies mechanical support for the thinned substrate. In a die-down configuration with the active area facing down (eWLB), the temporary carrier is removed after the molding process thus exposing the contact pads for RDL build and solder ball mount. The ideal chip attachment scheme should minimize lateral movement of the die during over-mold (die shift) and also minimize vertical deformation of the bonding material. Thermal release tape provides a convenient way to attach die to a carrier prior to over-molding with EMC. However, not all bonding materials are suitable for presentation in tape form, so the material used in the tape may not be the optimal choice. An alternative method is to directly apply temporary bonding material to the carrier substrate. This enables the use of bonding materials with higher melt viscosity and improved thermal stability, resulting in less vertical deformation during die placement, and reduced die shift during over-molding. The bonding material will ideally have high adhesion to the EMC wafer to prevent delamination in the bond line during downstream processing. Stack stress and warpage is a major concern which causes handling and alignment problems during processing. The bonding material and carrier will need to be specifically suited to minimize the effects of stress in the compound wafer. Such material must balance rigidity with warp to prevent lateral die shift and deformation induced by coefficient of thermal expansion (CTE) mismatch between the carrier and EMC material [2]. Bonding materials must also have enough adhesion to the EMC material to overcome such stress without bond failure for an associated debond path (such as laser or mechanical release). In this experiment, we will examine a thermoplastic bonding material in combination with different release materials, addressing die shift, and deformation after EMC processing. Successful pairs will then undergo carrier release using either mechanical release or laser ablation release technology.
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Coudrain, Perceval, Arnaud Garnier, Laetitia Castagné, Aurélia Plihon, Rémi Vélard, Rémi Franiatte, Jean-Charles Souriau, Jeanne Pignol, Célia Darrambide, and Emmanuel Ollier. "(Invited) Fan-out Wafer-Level Packaging: Opportunities and Challenges Towards Heterogeneous Systems." ECS Meeting Abstracts MA2022-02, no. 17 (October 9, 2022): 849. http://dx.doi.org/10.1149/ma2022-0217849mtgabs.

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Fan-out wafer-level packaging has become during the last decade an iconic part of the More Than Moore trend. Emerging in the mid-2000s and early declined in embedded wafer level ball grid array (eWLB), it has since gained popularity for the realization of high-potential systems-in-package (SiP). The basic technology is based on the reconstruction of wafers from individual chips. After embedding chips with an epoxy mold compound (EMC), electrical connections are processed in the form of redistribution layers (RDL) to fan-out signals from chip I/Os to solder balls, whose dimensions are compatible with direct soldering to a printed circuit board. Eliminating the need for intermediate laminated substrates, it has enabled the integration of systems with high performance at reduced cost and footprint. It has also paved the way for applications that would have been difficult to address with conventional packaging. In a resolutely heterogeneous declination of this technology, the co-integration of several chips in a single and dense package has allowed processing multi-chip SiPs including CMOS circuits, memories, radio-frequency (RF) chips and passive components with reduced interconnect length. It is indeed possible to combine in the same package different materials such as Si, SiC, GaN, AsGa. This property gives FOWLP technology unique advantages in terms of cost and versatility that make it attractive in many application areas. Two trends seem to take advantage of this technology. On one hand, the realization of high performance SiPs integrating miniaturized CMOS processors and dense, high bandwidth memories with aggressive interconnects design rules. On the other hand, highly heterogeneous systems mixing semiconductors, especially in the field of wireless telecommunications. For over a decade, RF devices have been taking advantage of FOWLP to build advanced packages with shorter interconnects. Mass production has been reached since 2009 for automotive radars, baseband processors, RF transceivers and power management circuits. More recently, the millimeter wave market has gained interest with the development of 5G at high frequencies (>6 GHz), where the fan-out area becomes an opportunity to embed high quality passives and antennas. CEA-Leti has been studying this technology from its inception, with pioneering work since 2005 outlining wafer reconstruction for heterogeneous integration. At the heart of integration, the epoxy mold compound (EMC) is the way to reconstruct the wafer. By becoming the mechanical link between the different chips, it plays a crucial role during the entire process. On another level, the interconnects constitute the final purpose of the FOWLP integration: RDL layers create the link between chips in heterogeneous SiPs, as well as the link between the SiP and the outside world. These two components must be mastered to ensure functionality and performance of final SiPs. Among various available configurations, the die first scheme consists in positioning chips before molding and processing the interconnects. In RDL 1st scheme the interconnections are, conversely, made before chips are placed. Although these approaches sometimes compete, they generally meet different specifications. Nevertheless, all the configurations share integration issues related to the materials and processes involved. Some of the classic issues met in FOWLP include wafer deformation due to CTE mismatches, die shift during the process and the difficult task of heat dissipation in dense SiPs with increased power densities. We will show how useful the characterization techniques are to develop and improve the overall process, in order to reach the targeted specifications. To illustrate these elements, a detailed description of the technology built up for the realization of heterogeneous systems will be given, such as 5G base stations transceiver operating at 28 GHz including GaN and AsGa chips. We will also present original options implemented to meet the needs of other application fields, and develop our strategy regarding thermal dissipation for future SiPs. In a FOWLP approach, three-dimensional integration is also possible thanks to a technological toolbox that includes, in addition to RDL and solder balls, vertical connections such as Through-Mold Via (TMV). We will describe an original approach developed at CEA-Leti for the fabrication of high aspect ratio TMVs, with a demonstration of 225 µm high and 100 µm pitch TMV for the realization of 3D SiP with high interconnection density. Figure 1
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Teixeira, Jorge, Mário Ribeiro, and Nélson Pinho. "Advanced warpage characterization for FOWLP." International Symposium on Microelectronics 2013, no. 1 (January 1, 2013): 000641–46. http://dx.doi.org/10.4071/isom-2013-wp21.

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Current standards for silicon wafers shape characterization use simple metrics. Warpage and bow are computed as the mean surface wafer height range or the mean surface wafer center height, respectively [1]. These metrics are valid for silicon wafers because of their homogenous and linear thermomechanical properties [2]. In fan-out wafer level package (FO-WLP), embedded Wafer Level Ball Grid Array in specific (eWLB), the use of epoxy mold compound that works both as the physical carrier of the dies and as the base of second level connections has a major impact on the overall macroscopic behavior of the wafer, inducing shapes that do not follow a simple bended or bowed wafer, impacting wafer processability [3]. Warped wafers can affect device performance, reliability, and linewidth control in various processing steps [3]. Early detection will minimize cost and processing time. In our research, we present a solution for wafer characterization in FO-WLP by increasing the information vector that one obtains from standard automated non-contact scanning equipment. For this, we defined wafer shape and wafer ratio as the two new metrics besides warpage, creating a three dimensional vector that can be used to compare and evaluate wafers in high volume production or even single wafer analysis. This is a major improvement over previously used approaches, in which only the average warpage is considered. These metrics were determined by the developed numeric algorithm and their validity was demonstrated through the use of different production conditions, wafer constructions and production monitoring. The proposed approach requires no extra processing steps and time, as compared to conventional off-line methods. Experimental results demonstrate its feasibility and repeatability. This methodology was successfully used in the field and proved to be of high value when evaluating wafer geometrical requirements for both product development and process monitoring.
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Kitaoka, Satoshi, Naoki Kawashima, Masato Yoshiya, Shigeru Miyagawa, Yoshinori Noguchi, and Kazuhiro Ikemura. "Improving Releasability of Mold Materials for IC Encapsulation Using Epoxy Compounds." Materials Science Forum 706-709 (January 2012): 2529–34. http://dx.doi.org/10.4028/www.scientific.net/msf.706-709.2529.

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The effect of dopants such as zirconium and nitrogen on the releasability of Y2O3-based ceramics from molds was investigated for integrated circuit packaging using epoxy molding compounds (EMCs). Co-doping of these elements was carried out by annealing the surfaces of 5mol% ZrO2-Y2O3 samples under a N2 flow at 1100-1300 °C, resulting in concentration of nitrogen near the surfaces of the samples. The adhesion strength was minimized by exposure at about 1200-1250 °C, which was less than half the value for the undoped Y2O3. The co-doping remarkably decreased the polar part of the surface energy and consequently hydrophobicity of the ceramic surfaces increased. The excellent releasability characteristics were likely related to the depression of dissociative adsorption of water molecules, which are considered to act as active sites for the adhesion of EMCs.
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Kitaoka, Satoshi, Naoki Kawashima, Keiji Maeda, Takaki Kuno, and Yoshinori Noguchi. "Design of Mold Materials for Encapsulating Semiconductors Using Epoxy Molding Compounds." Materials Science Forum 561-565 (October 2007): 539–42. http://dx.doi.org/10.4028/www.scientific.net/msf.561-565.539.

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Best, Keith, Steve Gardner, and Casey Donaher. "PHOTOLITHOGRAPHY ALIGNMENT MARK TRANSFER SYSTEM FOR LOW COST ADVANCED PACKAGING AND BONDED WAFER APPLICATIONS." International Symposium on Microelectronics 2016, no. 1 (October 1, 2016): 000315–20. http://dx.doi.org/10.4071/isom-2016-wp34.

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Abstract Advanced packaging technologies continue to enable the semiconductor industry to meet the needs for ever thinner, smaller and faster components required in mobile devices and other high performance applications. However, the increase in chip I/O count, driven by Moore's law, and the ability to produce FinFETs below 10nm have presented numerous additional challenges to the existing advanced packaging processes. Furthermore, unlike Moore's law, which predicted the number of transistors in a dense integrated circuit to double approximately every two years, advanced packaging is experiencing an alternate “law”; where instead of the number of transistors increasing, it is the number of functions increasing, within the ever decreasing volume constraints of the final product that drives the technology roadmap. Inevitably, as functionality increases, so does the process complexity and cost. In this very cost sensitive advanced packaging arena, outsourced semiconductor assembly and test suppliers (OSATs) need to compensate by reducing their manufacturing costs. This requires the OSAT to reduce material costs, increase throughput, yield, and look for new ways to reduce the number of process steps. One of the ways in which the OSATs have reduced the cost of materials is by removing the silicon wafer from back-end processing altogether; using epoxy mold compound (EMC) to create reconstituted wafers, or by using glass carriers. In the case of glass carriers, it is often the case, that the dice are attached face down on the carrier and subsequent processing prevents the front side patterns from being visible from the top side of the composite stack, even with infrared (IR) imaging. In this particular case, an additional lithography “clear out” window is defined in photoresist over the alignment mark so the opaque film can be etched away from the alignment mark, the resist stripped, and the lithography layer reworked. This additional processing is obviously costly and time consuming. This paper specifically focuses on the concepts, methodology, and performance of a stepper-based photolithography solution that utilizes a photoresist latent image to provide temporary alignment marks for the lithography process, removing the need for the additional patterning and etching steps. This revolutionary system employs a backside camera, to align to die through the carrier. A separate exposure unit, calibrated to the alignment camera center, exposes temporary latent image targets which are then detected by the system's regular alignment system during the normal stepper lithography operation. The performance data for the alignment, overlay, and latent image depth control are discussed in detail. The final analysis proves that overlay of &lt; 2μm is readily achievable, with no impact on system throughput.
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Swarbrick, Tom, Keith Best, Casey Donaher, and Steve Gardner. "Photolithography Alignment Mark Transfer System for Low Cost, Advanced Packaging, and Bonded Wafer Applications." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2016, DPC (January 1, 2016): 001302–27. http://dx.doi.org/10.4071/2016dpc-wp16.

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Abstract:
Advanced packaging technologies continue to enable the semiconductor industry to meet the needs for ever thinner, smaller and faster components required in mobile devices and other high performance applications. However, the increase in chip I/O count, driven by Moore's law, and the ability to produce FinFETs below 10nm has presented numerous additional challenges to the existing advanced packaging processes. Furthermore, unlike Moore's law, which predicted the number of transistors in a dense integrated circuit to double approximately every two years, advanced packaging is experiencing an alternate “law”; where instead of the number of transistors increasing, it is the number of functions increasing, within the ever decreasing volume constraints of the final product that drives the technology roadmap. Inevitably, as functionality increases, so does the process complexity and cost. And in the very cost sensitive advanced packaging arena, Outsourced Semiconductor Assembly and Test suppliers (OSATs) need to compensate by reducing their manufacturing costs. This requires the OSAT to reduce material costs, increase throughput, yield, and look for new ways to reduce the number of process steps. One of the ways in which the OSATs have reduced the cost of materials is by removing the silicon wafer from the backend processing altogether; using epoxy mold compound (EMC) to create reconstituted wafers, or by using glass carriers. In the case of glass carriers, it is often the case, where the dice are attached face down on the carrier and subsequent processing prevents the front side patterns from being visible from the top side of the composite stack, even with Infrared (IR) imaging. In this particular case, an additional lithography “clear out” window is defined in photoresist over the alignment mark so the opaque film can be etched away from the alignment mark, the resist is then stripped and cleaned. This additional processing is obviously costly and time consuming. This paper specifically focuses on the concepts, methodology, and performance of a stepper based photolithography solution that utilizes a photoresist latent image to provide temporary alignment marks for the lithography process, removing the need for the additional patterning and etching steps. This revolutionary system employs a backside camera, to align to die through the carrier. A separate exposure unit, calibrated to the alignment camera center, exposes temporary latent image targets which are then detected by the system's regular alignment system during the normal stepper lithography operation. The performance data for the alignment, overlay, and latent image depth control are discussed in detail. The final analysis proves that overlay of &lt; 2um is readily achievable, with no impact on system throughput.
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Scopa Kelso, Rebecca, Brannon I. Hulsey, and Kathryn R. D. Driscoll. "Dental molding compounds and casts." Dental Anthropology Journal 33, no. 1 (January 7, 2020): 17–22. http://dx.doi.org/10.26575/daj.v33i1.290.

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Dental casts are invaluable research tools. There are a variety of molding compounds available, all having temperature, humidity, and timing guidelines to ensure a precise replica of dentition. However, not all field research conditions allow for adherence to environmental guidelines requiring longer wait times prior to pouring epoxy for casting. This study, tests a common molding compound in extreme environments and over varying time intervals, testing the integrity of the dental molds in producing precise replicas of original teeth. 580 molds were created under three varying environments: room temperature, hot/humid, and cold/dry. Molds were removed from these environments in two-week intervals over twelve weeks. The resulting casts were measured to determine timing limitations for producing accurate dental casts under varying environments. Molds stored at room temperature retained their shape and size for the complete twelve weeks. Molds kept in a hot and humid environment, however, only maintained their shape and size up to four weeks, whereas molds in a cold and dry environment showed significant changes by the end of the second week. These findings provide additional tools for researchers working in a variety of field conditions allowing casts to be taken of specimens that cannot be transported off site.
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Placette, Mark D., Xuejun Fan, Jie-Hua Zhao, and Darvin Edwards. "Dual stage modeling of moisture absorption and desorption in epoxy mold compounds." Microelectronics Reliability 52, no. 7 (July 2012): 1401–8. http://dx.doi.org/10.1016/j.microrel.2012.03.008.

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Zhang, Yong Di, Bin Zhang, Yan Fang Yue, and Guang Yang. "Manufacturing Process of EP Matrix Composite Rapid Injection Mold and Application Case." Advanced Materials Research 1061-1062 (December 2014): 460–64. http://dx.doi.org/10.4028/www.scientific.net/amr.1061-1062.460.

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The prototype can be produced from RP(Rapid Prototyping) technology directly by 3D data model, by dispersing and accumulating layer by layer principle, so the new product development cycle can be shortened greatly. RT (Rapid Tooling) technology is a new method and technology for rapid manufacturing mold, which is developed from RP technology. In this research, a rotary switch prototype was produced by laser stereolithography (SL) technology. Using the prototype as master pattern , a injection mold was made by metal casting method , using the composite composed of epoxy resin E51, aluminum powder, quartz powder , graphite and others, the manufacturing process was described in detail, and the ABS samples were successfully obtained through trial production in the injection molding machine.
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Belton, D. "The Effect of Post-Mold Curling Upon the Microstructure of Epoxy Molding Compounds." IEEE Transactions on Components, Hybrids, and Manufacturing Technology 10, no. 3 (September 1987): 358–63. http://dx.doi.org/10.1109/tchmt.1987.1134754.

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Murniati, Murniati, Erin Ryantin Gunawan, Dedy Suhendra, Dina Asnawati, and Pujana Qurba. "Sintesis Senyawa-Senyawa Epoksi dari Asam Lemak Minyak Nyamplung (Calophyllum inophyllum L.)." Jurnal Riset Kimia 13, no. 1 (March 13, 2022): 89–99. http://dx.doi.org/10.25077/jrk.v13i1.447.

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Epoxidation is a reaction of a carbon double bond with active oxygen, which results in the addition of an oxygen atom, converting the original double bond into a three-membered epoxide (oxirane) ring. Generally, the raw material for making epoxy comes from petroleum. Nyamplung kernel oil is a non-edible oil that can be used as an alternative raw material for making epoxy derivatives. The purpose of this study was to determine the optimum conditions and characterization of epoxy materials. The fatty acids of Nyamplung kernel oil were reacted formic acid and hydrogen peroxide with sulfuric acid as a catalyst. The optimum condition of the following parameters on the study of this process was investigated: the epoxidation time, temperature, and the mole ratio of formic acid and hydrogen peroxide. The results showed that the optimum reaction conditions with the temperature was 65 oC, the mole ratio of formic acid and hydrogen peroxide was 1:6, and the reaction time was 75 minutes. The results of the characterization under optimum conditions showed the oxirane value of 1.69, the iodine number of 9.63 mg iod/100 g, and the epoxy conversion of 67.6 %. The results of FTIR characterization showed absorption at a wavenumber of 820.03 cm-1 which is a specific absorption from the oxirane ring of the epoxy compound.
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Ahmad Temizi, Muhammad Afhnan, Meor Iqram Meor Ahmad, Nor Kamaliana Khamis, and Muhammad Yunus Ahmad Samsudin. "Study of Mechanical and Thermal Properties for Epoxy Grouts Subjected to Seawater Conditioning at Elevated Temperature: Tensile Test and Compressive Test." Jurnal Kejuruteraan 34, no. 6 (November 30, 2022): 1017–25. http://dx.doi.org/10.17576/jkukm-2022-34(6)-03.

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Pipelines and risers are major transportation of oil and gas. These components are often exposed to extreme marine environmental conditions that can cause pipelines to fail due to corrosion. Hence, epoxy grouts are used as a coating material on the surface of pipelines and risers for supporting the pipe structure and corrosion prevention. In this case, the efficiency of epoxy grout is important in pipeline rehabilitation. Research on the adaptation of seawater, temperature, and epoxy grouts is carried out to determine the changes in mechanical and thermal properties of the material. The preparation of epoxy grouts was prepared with a mixture of epoxy resins, epoxy hardeners, and aggregates. After the sample compounds have been flattened, the mixture will be put into the mold. The seawater aging process was performed for seven days before conducting laboratory experiments. After the seawater aging process, there were physical changes on the surface of the epoxy grouts which are the epoxy grout become harder and there were voids that can act as stress concentration points that may cause micro-crack on the specimen. Next, tensile (ASTM 638) experiments were performed at different temperatures of 27°C, 40°C, 52°C, 72°C, 80°C and 100°C while the result of compression experiment is based on the literature critique of past journals. Based on the result, the young modulus and ultimate tensile strength of the epoxy grouts are decreased with increasing temperature. The increment of temperature causes the epoxy grouts to become weaker due to the changes in the polymer matrix structure of the epoxy grouts which lead to the failure at low load and shortens the life of the material. In addition, epoxy grouts are amorphous materials where the glass transition temperature determine the mechanical and physical properties of epoxy grouts. Therefore, the results of the study found that the epoxy grouts changed its mechanical properties from brittle to ductile when the temperature is at 72°C. From the comparison between samples immersed and not immersed in seawater, there is a decrease in Young’s modulus, ultimate tensile stress and strain due to the effect of seawater reaction. In conclusion, the increment in temperature and seawater adaptation factors affect the strength and durability of epoxy grouts.
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Zhang, Kun Liang, Bin Hong, Li Peng Zhang, Ya Ji, Zhen Dong Gao, and Jian Ye Gao. "The Pouring Process Optimization for the Conductive Slip-Rin." Materials Science Forum 943 (January 2019): 48–52. http://dx.doi.org/10.4028/www.scientific.net/msf.943.48.

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Based on its specific structural features, the packaging technology is extraordinary significant for the conductive slip-ring (CSR) encapsulating with epoxy molding compounds (EMC). In this work, a modified vacuum packaging technology has been proposed which includes a pouring process.By the construction of the relevant models, the packaging technology was calculated by MATLAB and discussed. It indicates that the EMC can be easily poured into the concentric ring slit of the CSR only with a differential pressure of 200 Pa between the outside pressure and the inside pressure. On the bases of the experimental results; the EMC can easily flow up from the bottom to the top of the CSR packaging mold vertically.
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AbdulRazaq, Jaafar Sh, Abdul Kareem F. Hassan, and Nuha H. Jasim. "Characterization of the mechanical properties and thermal conductivity of epoxy-silica functionally graded materials." AIMS Materials Science 10, no. 1 (2023): 182–99. http://dx.doi.org/10.3934/matersci.2023010.

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<abstract> <p>A functionally graded material (FGM) was prepared using epoxy resin reinforced with silicon dioxide with a particle size of 100 μm and weight percentages of 0, 20, 40, 60, and 80 wt%. In a gravity-molding process using the hand layup technique, specimens with international standard (ASTM)-calculated dimensions were created in a mold of poly(methyl methacrylate), which is also known as acrylic. Tensile, flexural, impact, infrared wave, and thermal conductivity tests, and X-ray diffraction (XRD) were conducted on specimens of the five layers of the FGM. The XRD and infrared spectroscopy demonstrated that the compositions of the silica particles and epoxy had a strong association with their physical structures. The findings of experimental tests indicated that increasing the ratio of silicon dioxide enhanced the mechanical properties, and the increase in modulus of elasticity was directly related to the weight percentage of the reinforcement material. The composite with 80% silica had a 526.88% higher modulus of elasticity than the pure epoxy specimen. Both tensile and flexural strengths of the composite material were maximal when 40 wt% of the particle silicon dioxide was utilized, which were 68.5% and 67.8% higher than those of the neat epoxy, respectively. The test results also revealed that the impact resistance of the FGM increased when the silica proportion increased, with a maximum value of 60 wt% silica particle content, which was an increase of 76.98% compared to pure epoxy. In addition, the thermal properties of epoxy resin improved when SiO<sub>2</sub> was added to the mixture. Thus, the addition of silica filler to composite materials directly proportionally increased their thermal conductivity to the weight ratio of the reinforcement material, which was 32.68–383.66%. FGM composed of up to 80% silica particles had the highest thermal conductivity.</p> </abstract>
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Decker, John A. "Graphite-Epoxy Acoustic Guitar Technology." MRS Bulletin 20, no. 3 (March 1995): 37–39. http://dx.doi.org/10.1557/s0883769400044390.

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We have successfully developed an acoustic guitar (Figure 1) composed of graphite. Trademarked the RainSong® graphite guitar, this instrument uses no endangered tropical tonewoods. The instrument's sound quality is equal to that of a fine wooden guitar. At high frequencies, the clarity, sustain, and play-ability surpasses that of wooden guitars. Because of its construction, the instrument is sturdy and is impervious to humidity, heat, and water.The development of this guitar required analysis of the theory of anisotropic sound propagation in the guitar soundboard and body, and resulted in two patents. We designed prototype guitars in collaboration with Pimentel & Sons, Guitar Makers, and used combinations of unidirectional and woven graphite and aramid fibers in an epoxy-resin matrix.The goal of our project was to accurately duplicate—panel by panel—the acoustic properties of a fine wooden guitar. We had the resulting acoustic modes and frequencies verified in the laboratory. We then developed and constructed open-mold and resin-transfer molding tooling for a family of classical, steel-string acoustic and hollow-body electric guitars, which are now in commercial production.Possibly the first all-composite acoustic guitar, the RainSong® represents a fundamental change in stringed-instrument construction, perhaps the first since the 17th Century Italian masters.The RainSong® technology allows musicians to skirt the effects of climate and transport damage on their instruments. The instrument contains essentially no wood, and hence negates environmental concerns about rapid depletion of the virgin-forest woods, from which stringed instruments have traditionally been made.
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Ishikawa, Yuki, Tomoya Takao, and Takeyasu Saito. "Obtaining thermal resistance of mold compounds using a package structure model with a heat-generating test element group: Comparison of the thermal conductivity and glass transition temperature of epoxy mold compounds." Microelectronics Reliability 151 (December 2023): 115233. http://dx.doi.org/10.1016/j.microrel.2023.115233.

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Chiu, S. M., S. J. Hwang, C. W. Chu, and Dershin Gan. "The influence of Cr-based coating on the adhesion force between epoxy molding compounds and IC encapsulation mold." Thin Solid Films 515, no. 1 (September 2006): 285–92. http://dx.doi.org/10.1016/j.tsf.2005.12.141.

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Abdullah, Shahrum, Mohd Faridz Mod Yunoh, Azman Jalar, and Mohamad Faizal Abdullah. "Hardness Test on an Epoxy Mold Compounds of a Quad Flat No Lead Package Using the Depth Sensing Nanoindentation." Advanced Materials Research 146-147 (October 2010): 1000–1003. http://dx.doi.org/10.4028/www.scientific.net/amr.146-147.1000.

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This study focuses on the effect of stress and load towards hardness at epoxy mold compounds (EMCs) of a Quad Flat No- Lead (QFN) package using indentation technique. A series of three points bending cyclic test were performed with four different loads between 60 N to 120 N on QFN package. The nanoindentation with the maximum load of 300 mN was indented at five locations that perpendicular to the stress line on EMCs of QFN package after three points bending cyclic test were performed. The findings showed that the mean value of hardness was varied with load and stress. Higher load and stress were found to be not affected by hardness of EMCs. From the results, it is believed that the applied load and stress not play a role towards the hardness of EMCs. A polynomial relationship was plotted and shown that correlation of coefficient (R2) between stress and hardness of the studied EMCs was found to be at 97%. Finally, the finding suggested that a close correlation between the stress and hardness since it correlation coefficient gave a higher value with the polynomial relationship.
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Ahn, Woojin, Muhammad Ashraful Alam, Davide Cornigli, Susanna Reggiani, Dhanoop Varghese, and Srikanth Krishnan. "Space Charge Redistribution in Epoxy Mold Compounds of High-Voltage ICs at Dry and Wet Conditions: Theory and Experiment." IEEE Transactions on Dielectrics and Electrical Insulation 28, no. 6 (December 2021): 2043–51. http://dx.doi.org/10.1109/tdei.2021.009817.

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Kliegel, Wolfgang, Jörg Metge, Steven J. Rettig, and James Trotter. "Novel boron chelate complexes from the reaction of salicylaldehydes, tertiary amines, and diphenylborinic or phenylboronic acid. Crystal and molecular structures of two new types of chelated organoborate salts." Canadian Journal of Chemistry 75, no. 9 (September 1, 1997): 1203–14. http://dx.doi.org/10.1139/v97-145.

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The one-pot reaction of equimolar amounts of salicylaldehyde, diphenylborinic acid anhydride, and a tertiary amine in the presence of an alkanol (R′OH) led to the addition of R′OH to the aldehyde group and the formation of an O,O-acetal moiety within the chelate anion with the charge balanced by an ammonium cation arising from the tertiary amine. Exchanging the diphenylborinic acid in the three-component reaction system for phenylboronic acid did not give the analogous adduct or chelate but one additional mole equivalent of phenylboronic acid (anhydride) was incorporated, leading to a polycyclic anion containing pyroboronate and acetal boronate functions with an associated ammonium cation. Crystals of 1-methylpiperidinium 4-ethoxy-2,2-diphenyl-1,3-dioxa-2-borata-1,2,3,4-tetrahydronaphthalenate, 6d, are monoclinic, a = 9.522(1), b = 17.703(1), c = 14.974(1) Å, β = 98.275(10)°, Z = 4, space group P21/n, and those of 1-methylpiperidinium 6,10-epoxy-4-methoxy-6,8-diphenyl-5,7,9-trioxa-8-bora-6-borata-5,6,7,8,9,10-hexahydrobenzocyclooctenate, 10e, are monoclinic, a = 7.968(1), b = 19.3707(4), c = 15.9400(5) Å, β = 100.186(5)°, Z = 4, space group P21/n, The structures were solved by direct methods and refined by full-matrix least-squares procedures to R = 0.050 and 0.033 (Rw = 0.040 and 0.032) for 2815 and 3529 reflections with I ≥ 3σ(F2), respectively. Compounds 6d and 10e are both representative of new classes of organoboron chelates. Keywords: salicylaldehyde semiacetal diphenylboron chelate, salicylaldehyde bisboronate, organoboron compound, crystal structure.

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