Dissertations / Theses on the topic 'Enhancement Mode HEMTs'
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Wu, Yichao. "RF circuit applications of enhancement-mode AlGaN/GaN HEMTs /." View abstract or full-text, 2007. http://library.ust.hk/cgi/db/thesis.pl?ECED%202007%20WUY.
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Schuette, Michael L. "Advanced processing for scaled depletion and enhancement-mode AlGaN/GaN HEMTs." The Ohio State University, 2010. http://rave.ohiolink.edu/etdc/view?acc_num=osu1275524410.
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Macrelli, Elena. "Performance and Robustness of low-voltage enhancement-mode GaN-based power HEMTs with p-type gate." Master's thesis, Alma Mater Studiorum - Università di Bologna, 2021. http://amslaurea.unibo.it/24039/.
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This thesis is a report of the work of a six-months internship in imec, a R&D hub for nano- and
digital technologies based in Leuven, Belgium.
During this internship I worked on the characterization of enhancement-mode GaN-based lateral HEMT devices with p-GaN gate, aiming to understand the impact of different process
variations, device layout and architecture on the electrical performance and reliability of the
devices. After the first essential steps that included the study of the basics about device
structure, fabrication and operations and literature review, I started to plan experiments and
characterization routines with a focus on gate and OFF-state reliability and I performed the
measurements and the data elaboration.
The first chapter of this elaborate will present an overview on the field of power electronics:
its relation to the theme of climate change and the state of its market nowadays.
Then a presentation of p-GaN HEMT devices will follow, explaining the working of the
transistor and all its fabrication options and issues.
After that, the report will get into the real work done during the internship: two chapters will
explain all the experimental details of the measurements and present the obtained results and
observations.
A final chapter will in the end summarize the results and draw some conclusions.
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Nguyen, Thi Dak Ha. "Réalisation et caractérisation de HEMTs AlGaN/GaN sur silicium pour applications à haute tension." Phd thesis, Université Paris Sud - Paris XI, 2013. http://tel.archives-ouvertes.fr/tel-00934655.
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Cette thèse est une contribution aux développements de HEMTS AlGaN/GaN sur substrat de silicium pour des applications basses fréquences sous fortes tensions (typiquement 600V) comme les commutateurs pour la domotique ou les circuits de puissance des véhicules électriques. Elle a été menée en collaboration étroite avec Picogiga International qui a réalisé toutes les épitaxies. Elle est composée de trois parties : développement d'une technologie de fabrication, étude des courants de fuite, amélioration du pouvoir isolant de la barrière et recherche d'un comportement "normally off". La réalisation de contacts ohmiques peu résistifs est l'étape cruciale de la fabrication des HEMTs AlGaN/GaN de puissance. Une optimisation de l'empilement des métaux utilisés, de la température et du temps de recuit ainsi que la recherche d'un compromis sur la distance métallisation - gaz d'électrons, nous a permis de réaliser des contacts ohmiques proches de l'état de l'art (0,5 Ohm.mm). L'origine des courants de fuite a été systématiquement étudiée sur cinq types d'épitaxies différentes. La distance grille - drain et les courants de fuites ont été identifiés comme étant les deux facteurs limitant la tension de claquage. Selon la structure, les courants de fuite ont lieu soit à travers la grille (~e-8 A/mm à 210V), soit en parallèle au canal (e-5 A/mm). Dans les deux cas, ces courants sont comparables aux courants de fuite au travers du tampon (i.e. courants mesurés entre deux mésas). Ces courants de fuite, ont été attribués aux couches de transition nécessaires à l'adaptation de l'épitaxie des couches de nitrure sur le substrat de silicium. La réalisation de HEMT AlGaN/GaN sur silicium pour les applications à haute tension passera donc par une amélioration de ces couches tampons.Nous avons démontré qu'il est possible d'améliorer l'isolation de la barrière en AlGaN grâce à une hydrogénation du matériau. En effet un traitement de surface des transistors par un plasma hydrogène permet, par diffusion, d'y incorporer de l'hydrogène qui passive les dislocations traversantes. Après traitement, les courants de fuite de grille sont réduits et la tension de claquage est repoussée à 400V avec des courants de fuite de l'ordre de e-6 A/mm. Dans ces conditions, le claquage a alors lieu en surface de l'échantillon, il n'est plus limité que par la distance grille-drain. Ce résultat ouvre la voie à la réalisation de HEMT à forte tension de claquage (V~600V).L'effet du plasma fluoré SF6 sur les caractéristiques électriques des HEMT (AlN/GaN)/GaN (la barrière est en super-réseaux AlN/GaN) a été étudié pour la première fois dans cette thèse. Les ions fluor incorporés dans cette barrière agissent comme des donneurs qui font augmenter la densité du gaz bi-dimensionnel d'électrons et décaler la tension de pincement vers les tensions négatives. Cet effet est à l'opposé de celui observé dans les HEMT à barrière en AlGaN. Ce résultat élimine la possibilité de réaliser les HEMT (AlN/GaN)/GaN "normally off" par un dopage au fluor, une technique simple et efficace qui donne de bons résultats sur les HEMT à barrière AlGaN. D'autre part, il apporte quelques réponses expérimentales aux prévisions théoriques d'utiliser le fluor pour les dopages de type n ou p dans les nitrures d'éléments III.
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Greco, Giuseppe. "AlGaN/GaN heterostructures for enhancement mode transistors." Doctoral thesis, Università di Catania, 2013. http://hdl.handle.net/10761/1347.
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Today the continuous increase of electric power demand is in our society a global concern. Hence, the reduction of the energy consumption has become the main task of modern power electronics. In this context, wide band semiconductors (WBG), such as gallium nitride (GaN) and related alloys, have outstanding physical properties that can enable to overcome the limitations of Silicon, in terms of operating power, frequency and temperature of the devices.
An interesting aspects related to GaN materials is the possibility to grow AlGaN/GaN heterostructures, in which a two dimensional electron gas (2DEG) is formed at the heterojunction. Basing on the presence of the 2DEG, AlGaN/GaN heterostructures are particularly interesting for the fabrication of high electron mobility transistors (HEMTs).
One of the most challenging aspects on this field is the development of enhancement mode AlGan/GaN HEMT. This devices would offer a simplified circuitry, in combination with favourable operating conditions for device safety. Hence, this thesis is entitled AlGaN/GaN heterostructures for enhancement mode transistors .
The aim of this work was to clarify the mechanisms ruling the electronic transport at some relevant interfaces in AlGaN/GaN devices, after surface modification processes used in normally-off technologies.
The thesis is divided in 6 chapters. In the first two chapters, the properties of GaN and related AlGaN alloys are described, explaining the formation of the 2DEG and the working principle of HEMT devices.
In chapter 3, a nanoscale characterization of modified AlGaN surfaces is presented in order to deplete the 2DEG. Two different approaches have been studied, i.e., the use of a fluorine plasma treatment and the use of a local oxidation process. Even though a depletion of the 2DEG is possible, several reliability concerns need to be investigated before a practical application to devices can be envisaged.
Among the possible approaches for enhancement mode transistors using AlGaN/GaN heterostructures, the use of a p-GaN gate contact seems to be the most interesting one. Hence, chapter 4 reports a detailed investigation on the formation of Ohmic contact to p-GaN. The evolution of a Au/Ni bilayer, annealed at different temperatures and in two different atmospheres (Ar or N2/O2) was considered. The electrical measurements of the contacts annealed under different conditions demonstrated a reduction of the specific contact resistance in oxidizing atmosphere. Structural characterizations of the metal layer associated with nanoscale electrical measurements, allowed to give a possible scenario on the Ohmic contact formation mechanisms. Finally, the temperature dependence of the specific contact resistance allowed the extraction of the metal/p-GaN barrier.
The fabrication and characterization of AlGaN/GaN transistors with the use of a p-GaN cap layer under the gate contact is presented in chapter 5.
The electrical characterization of p-GaN/AlGaN/GaN transistors demonstrated a significant positive shift of the threshold voltage (Vth) with respect to devices without p-GaN gate. A normally-off behaviour of the devices (Vth= +1.4 V) was obtained upon a reduction of the barrier layer thickness and Al concentration.
Finally, a preliminary study on the use of nickel oxide (NiO) as a dielectric below the Schottky gate contact in AlGaN/GaN heterostructures is reported in the last chapter. First, a structural and morphological investigation of the NiO layers grown by MOCVD showed continuous epitaxial film. The electrical measurements on devices allowed to extract a value of the dielectric constant for the grown NiO very close to the theoretical one, and a reduction of the leakage current in HEMT structures integrating such a dielectric.
The experimental results of this thesis are summarized in the conclusive section, that also briefly describes the remaining open issues and the possible continuation of this research activity.
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Wang, Ruonan. "Enhancement/depletion-mode HEMT technology for III-nitride mixed-signal and RF applications /." View abstract or full-text, 2008. http://library.ust.hk/cgi/db/thesis.pl?ECED%202008%20WANG.
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Yi, Congwen. "Reliability study of enhancement-mode AIGaN/GaN HEMT fabricated with fluorine plasma treatment technology /." View abstract or full-text, 2008. http://library.ust.hk/cgi/db/thesis.pl?ECED%202008%20YI.
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Barranger, Damien. "Développement de transistor AlGaN/GaN E-mode sur substrat silicium 200 mm compatible avec une salle blanche CMOS." Thesis, Lyon, 2017. http://www.theses.fr/2017LYSEI135.
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La thèse porte sur le développement de composants à base d’hétérojonction AlGaN/GaN. Cette hétérojonction permet de bénéficier d’une excellente mobilité (2000 cm²/V.s) grâce à l’apparition d’un gaz d’électron dans le GaN. Cependant, les composants fabriqués sur cette hétérojonction sont normally-on. Pour des raisons de sécurité et d’habitude de conception des composants normally-off sont nécessaires. Il existe de nombreuses façons de fabriquer des transistors normally-off à base d’hétérojonction AlGaN/GaN, dans cette thèse nous avons choisi d’étudier un MOSCHEMT, cette structure est caractérisée par une grille de type MOS et des accès de type HEMT possédant les excellentes propriétés de l’hétérojonction, en fonction des paramètres technologiques : épitaxie, process et structure des composants. L’une des variations technologiques étudiées est une structure cascodée permettant d’améliorer les performances à l’état passant sans détériorer la caractéristique en blocage des composants. L’objectif est de concevoir un composant normally-off sur substrat silicium 200 mm avec une tension de seuil supérieure à 1V, pouvant tenir 600 V en blocage, avec un calibre en courant entre 10 A et 30 A et compatible en salle blanche CMOS. Le manuscrit comporte quatre chapitres. Grâce à une étude bibliographique, le premier chapitre présente les différentes méthodes permettant d’obtenir un transistor normally-off à base de nitrure de gallium. Ce chapitre présente et justifie le choix technologique du CEA-LETI. Le deuxième chapitre présente les modèles ainsi que les méthodes de caractérisations utilisés au cours de la thèse. Le troisième chapitre traite des résultats obtenus en faisant varier les paramètres de fabrication sur les MOSC-HEMT. Enfin, le quatrième chapitre montre une étude sur une technologie innovante de type cascode. Cette structure doit permettre d’augmenter la tension de claquage des transistors sans détériorer l’état passantThis thesis focuses on the development of AlGaN/GaN heterojunction components or HEMT. This heterojunction has an excellent mobility (2000 cm² / V.s) thanks to the appearance of an electron gas in the GaN. However, the components made with this heterojunction are normally-on. For safety reasons particularly, normally-off components are required. There are many ways to make normally-off transistors based on AlGaN/GaN heterojunction. In this thesis we chose to study a MOSCHEMT strucutre. This structure is characterized by a MOS type gate and HEMT type accesses. The study shows the effects of technological parameters (epitaxy, process and component structure) on the electrical behaviour of the components. Another structure studied is the monolithic cascode, which can improve on-state performance of the MOSC-HEMT without damaging the characteristic in reverse of the components. The objective of this thesis is to design a normally-off component on silicon substrate 200 mm with a threshold voltage higher than 1V, able to hold 600 V in reverse, with a current rating between 10 A and 30 A and compatible in CMOS clean room. The manuscript has four chapters. Through a bibliographic review, the first chapter presents the different methods to obtain a normally-off transistor based on gallium nitride. This chapter presents and justifies the technological choice of CEA-LETI. The second chapter presents the models as well as the methods of characterizations used during the thesis. The third chapter deals with the results obtained by varying the manufacturing parameters on the MOSC-HEMTs. Finally, the fourth chapter shows a study on innovative cascode technology. This structure must make it possible to increase the breakdown voltage of the transistors without damaging the on state
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Chao, Kuan-Hua, and 趙冠驊. "High Linearity Enhancement-Mode Double-Channel AlGaN/GaN HEMTs." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/94888739604069885591.
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碩士國立雲林科技大學
電子工程系
103
The GaN material of III-V compounds has the excellent properties of material such as high breakdown voltage, high thermal conductivity, small permittivity and high cut-off frequency. It always has been operated in high power, high temperature and high frequency circuits because of the excellent characteristics of carrier transmission of AlGaN/GaN high electron mobility transistors (HEMTs). In the applications of communication transmission, linearity of device has effect in the degree of distortion of signal. Therefore, linearity is an important factor of device quality. However, in the condition of zero bias that two-dimensional electron gas (2DEG) always exists because of the own properties of AlGaN/GaN HEMTs. Therefore, we have to exert a negative bias to close the device because of the device is depletion-mode. It is a drawback in the applications of power electronic devices so the circuit design is more complicate. Therefore, for reducing the cost of circuit design and the wasting of resources that how to design the enhancement-mode GaN material transistor is an important issue. In this thesis, Sentaurus TCAD is used to simulate device characteristics of AlGaN/GaN HEMTs. First, we will introduce physical models and simulate the electrical characteristics of AlGaN/GaN HEMTs, in which the physical parameters will be calibrated so that the simulation results matches the measured data from a reference data. This process ensures the accuracy of the subsequent simulation work. Next, we will rebuilt our device in to a double-channel structure which’s basic design consult to a reference that has double AlGaN/GaN heterojunctions. After that we will compare the property of composite structure before we have a device which has a flat and wide transconductance peak after we modulate the variation and location of twin transconductance peaks of double-channel AlGaN/GaN HEMTs. The linearity is improved. Last, we use recessed-gate and changing the thick of material layer with partially p-type doping which’s location is under gate that make the depletion-mode device turning into enhancement-mode. Thus we successfully design an enhancement-mode double-channel AlGaN/GaN HEMT which has high linearity.
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Chen, Jian-You, and 陳建佑. "Enhancement-Mode GaN Power HEMTs for High Frequency Applications." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/e6kb36.
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碩士國立交通大學
材料科學與工程學系所
107
Enhancement-mode (E-mode) AlGaN/GaN high electron mobility transistors (HEMTs) have been widely studied in recent years. The gate recess is a common method to realize the E-mode operation because of the suppressions of short-channel effect and current collapse effect. The device performance of E-mode GaN HEMTs has traditionally been limited by low maximum drain current and high on-resistance because of the interface defect at the oxide/AlGaN interface. Therefore, we used the in-situ N2 plasma pre-treatment prior to the gate oxide deposition to improve the interface quality of oxide/AlGaN interface by removing surface native oxide and generating the nitridation inter-layer (NIL). The treated device can obtain a high maximum drain current density and a high transconductance. Besides, a thin-barrier AlGaN/GaN HEMT structure was conducted to provide a good recess uniformity and yield because the thin-barrier structure with a shallow etch depth is suitable for the etch control of the gate recess process. The gate-recessed thin-barrier E-mode AlGaN/GaN HEMT device with the N2 plasma pre-treatment exhibited superior electrical performances, including a maximum drain current density (IDS,max) of 1.068 A/mm, a peak extrinsic transconductance (gm) of 740 mS/mm, a threshold voltage (Vth) of 0.12 V, and a fT/fMAX of 45/110 GHz. At 38 GHz, a maximum output power (Pout) of 0.7 W/mm, a peak power-added efficiency (PAE) of 23.3 %, and a linear gain of 6.05 dB were obtained.
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WONG, CYUN-SIANG, and 翁群翔. "High Breakdown Voltage Enhancement-mode Double-channel AlGaN/GaN HEMTs." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/85524946293443335561.
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碩士國立雲林科技大學
電子工程系
104
In this thesis, simulation and improvement of dual-channel AlGaN/GaN HEMTs by using Sentaurus TCAD is reported. Due to the energy gap difference between AlGaN and GaN, a quantum well is formed at the interface. Electrons are moved by the polarization effect and accumulated at the quantum well, forming 2DEG in the channel even when the gate bias is not applied. Therefore, the HEMTs become depletion mode. In circuit applications, depletion-mode transistors requires a negative supply voltage, which makes the circuit more complicate. As a result, development of enhancement-mode AlGaN/GaN HEMTs is highly desirable. The challenge in designing an enhancement-mode dual-channel HEMT is that it is much more difficult to deplete the electrons in the lower channel. In this work, a variety of techniques are integrated, including adjusting the thickness of AlGaN layer, using recessed gate, applying partial p-type doping, and replacing the GaN buffer layer with an AlGaN buffer layer. The result is two structures of enhancement-mode HEMTs, both of which have very low drain leakage current. Then one of the structures is chosen to improve the off-state breakdown voltage. Conventional gate field plate and slant gate field plate are incorporated and optimized respectively. Moreover, the effects of field plate length and passivation layer thickness are analyzed and compared.
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Chih-ChiehHuang and 黃志傑. "Novel Enhancement-Mode Tri-Gate InAlN/GaN Tunnel-Junction HEMTs." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/fc53ze.
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碩士國立成功大學
微電子工程研究所
107
In this thesis, we demonstrate an enhancement-mode tri-gate InAlN/GaN tunnel-junction high electron mobility transistor (TJ-HEMT). This kind of HEMT includes the designs of source Schottky tunnel-junction and tri-gate structure. It takes advantage of the tri-gate-controlled tunnel-junction to achieve an enhancement-mode device. Moreover, low turn-on current issues of conventional tunnel-junction transistors can be overcome due to the excellent carrier concentration and mobility of HEMTs. Aluminium oxide (Al2O3) thin films deposited by using ultrasonic spray pyrolysis deposition (USPD) served as the gate dielectric of the proposed device. In order to investigate the composition of chemical elements, surface characteristics, and thickness of the Al2O3 dielectric layer, some material analyses were implemented such as X-ray photoelectron spectroscopy (XPS), atomic force microscopy (AFM), and transmission electron microscopy (TEM). Then, in order to characterize the influences of the gate overlapping with the Schottky source contact, we fabricated different devices with different overlapping length. The experiment results show the device with the partial overlap about 0.25 μm possessing the best performances. The device reveals a threshold voltage (VTH) of +1.8 V, an on-state/off-state ratio of 109, a subthreshold swing (SS) of 73 mV/decade, an on-state current (Ion) of 453 mA/mm, and a breakdown voltage of 560 V with a leakage current of 0.5 μA/mm. Compared with the reference device, all of the characteristics have been obviously improved. The comparisons of InAlN/GaN and AlGaN/GaN epitaxy structures for our tri-gate TJ HEMTs were also investigated. The InAlN/GaN device shows better driving output and off-state performance due to the higher 2DEG density and the InAlN barrier lattice more matched to GaN active channel layer. Moreover, the proposed device shows the good thermal stability and low frequency noise characteristics. These results exhibit that the present novel enhancement-mode tri-Gate InAlN/GaN tunnel-junction HEMT with the excellent performances has great potential for high power device applications.
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Hsu, Ting-Hung, and 徐廷鋐. "High-Performance Enhancement-mode AlGaN/GaN HEMTs Utilizing Fluorine Plasma Treatment." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/75597381753639395297.
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碩士國立交通大學
材料科學與工程學系
98
Enhancement mode (E-mode) AlGaN/GaN HEMTs utilizing Fluorine plasma treatment is investigated in this study. The Fluorine-plasma technique effectively converted the device from conventional depletion mode (D-mode) into E-mode operation. The threshold voltage of the AlGaN/GaN HEMT shifted to +0.7 V after F-treatment. A maximum drain current density of 580 mA/mm was measured at VG = 4 V, and peak transconductance was around 185 mS/mm at VG = 2.5 V. The pulsed ID-VD measurement shows the damages caused by Fluorine plasma treatment in the GaN buffer layer was removed after 400 ℃ annealing for 10 min. In addition, the F-ion treated E-mode HEMTs revealed a tradeoff between threshold voltage and current density. To increase the threshold voltage without sacrificing the current density, an E-mode ALD-Al2O3/AlGaN/GaN MIS-HEMT was fabricated to further increase the threshold voltage. An AlGaN/GaN HEMT with high threshold voltage of 5.2 V was demonstrated as truly normally-off operation along with high turn-on gate voltage of 12.7 V due to the insertion of a 16-nm Al2O3 layer under Schottky gate. The device also demonstrated a maximum drain current density of 520 mA/mm at VG = 11 V without large gate leakage and with a peak transconductance of 100 mS/mm. E-mode high-breakdown-voltage (HBV) AlGaN/GaN HEMTs were also developed. The developed devices have a breakdown-voltage higher than 200 V were achieved, as defined by drain (or gate) leakage current up to 1 mA/mm. The F-treated E-mode HBV HEMT demonstrated an output current as high as 900 mA under 3-V gate bias, and the device also showed a low leakage current of 150 μA/mm at VD= 200 V. The above results indicate such F-treated E-mode devices developed are promising for future power electronic applications.
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Hsiao, Tsung-Chieh, and 蕭琮介. "Fabrication and Characterization of Enhancement-mode p-GaN/AlGaN/GaN HEMTs." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/78769138198386419357.
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碩士國立清華大學
電子工程研究所
102
In this thesis, enhancement-mode p-GaN/AlGaN/GaN HEMTs on a silicon substrate were fabricated. The p-type doped GaN and AlGaN/GaN barrier junction can be considered as a PN junction, so using p-type GaN as gate is able to deplete the 2DEG channel at a Vg=0V, thus yielding a normally-off device. For the on-state characteristics, the threshold voltage (Vth) and the maximum transconductance (Gm,max) for the device with 2μm Lch, 5μm Lgs and 7μm Lgd is 0.3V and 45mS/mm. And the on-resistance and on/off current ratio is 3.43mΩ‧cm^2 and 10^8 for the same device. For the reverse breakdown characteristics, we use a thick buffer layer to reduce substrate leakage current and raise the capability of vertical breakdown voltage. The highest breakdown voltage for the device with Lgd=60μm is 2760V, and the best BFOM is 604 MW/cm^2 for the device with Lgd=20μm. A drain current instability that is different from the current collapse due to surface and bulk traps is observed and explained.
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Lanford, William B. "Process development for aluminum gallium nitride-based enhancement- and depletion-mode HEMTs /." 2006. http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqdiss&rft_dat=xri:pqdiss:3242909.
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Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2006.Source: Dissertation Abstracts International, Volume: 67-11, Section: B, page: 6617. Adviser: I. Adesida. Includes bibliographical references. Available on microfilm from Pro Quest Information and Learning.
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Liu, Ya-Hsien, and 劉亞弦. "Fabrication and Characterization of Enhancement-Mode Recessed-Gate AlGaN/GaN MOS-HEMTs." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/s9ytn9.
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Liu, Ren-Xuan, and 劉人瑄. "Study of Enhancement Mode In0.65Ga0.35As/InAs/In0.65Ga0.35As HEMTs for Low-Power Logic Applications." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/889cse.
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碩士國立交通大學
材料科學與工程學系所
103
Semiconductors industry faces significant difficulties as it endeavor to extend Moore’s law through aggressive process scaling. One of the key issues lies in maximizing the device on-current, while suppressing the leakage currents. In general, III-V compound semiconductors have significantly higher intrinsic mobility than silicon and the substrates are semi-insulating. These material properties combing with band gap engineering, epitaxial layer growth technique and process technologies result in the devices with excellent performance. Recently, High indium content InGaAs-based High electron mobility transistors (HEMTs) are particularly promising for future high-speed and ultra-low power logic applications because of the excellent electrical properties of InxGa1-xAs material and the superior band-gap design of HEMTs. In this study, a 60-nm enhancement mode (E-mode) In0.65Ga0.35As/InAs/ In0.65Ga0.35As composite-channel HEMTs is fabricated, which using thin barrier, gate sinking process and non-annealed ohmic process to yield excellent performance for high-speed and logic applications. The device demonstrated a high cut-off frequency of 377.7 GHz and maximum oscillation frequency of 244GHz. For logic applications, when biased at VDS = 0.5 V, it also exhibited excellent performance including the drain induced barrier lowering of 30 mV/V, minimum sub-threshold swing of 69 mV/decade, and ION/IOFF higher than 1.2 × 104. These results demonstrate that the E-mode In0.65Ga0.35As/InAs/In0.65Ga0.35As HEMTs have great potential for future high-speed and low-power logic applications.
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CHIANG, KAI-JEN, and 江鎧任. "The study of Enhancement-mode GaN-based HEMTs formed by Selective-area Ion implantation technology." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/vk3b3t.
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碩士南臺科技大學
光電工程系
104
Since the wide bandgap GaN/AlGaN heterostructures inherently possess spontaneous and strain-induced polarization fields to induce the high electron mobility and high carrier density at the GaN/AlGaN heterointerfaces, GaN/AlGaN-based high electron mobility transistor (HEMT) is one of the most promising power devices due to its excellent thermal stability and high breakdown field. In fact, GaN/AlGaN-based HEMTs have been extensively demonstrated and launched to practical application such as power amplifiers of wireless communication systems and radar systems. In current practical application, most of the GaN/AlGaN-based HEMTs are normally-on devices because the two-dimensional electron gas (2DEG) in energy is lower than the Fermi level. Consequently, an external negative bias must be applied to the gate to making the transistor at the turn-off situation. In other words, the normally–on transistors will continue to dissipate power even without external gate bias. Therefore, the normally-off GaN/AlGaN-based HEMTs are the key devices for the high-efficiency power mplifiers. In this study, selective-area Si implantation are applied onto the GaN/AlGaN heterostructures grown on Si substrate to selectively convert the p-GaN cap layer into n+-GaN regions, and the drain and source area are formed after post-implantation annealing process. In contrast to the conventional normally-off GaN/AlGaN-based HEMTs, which use etching technique to form recess gate associating with a Schottky contact or Fluorine ion implantation at the gate area, in our design, a planar HEMT structure is in-situ formed by selective-area Si implantation onto the p-GaN cap layer where the drain and source area are simultaneously formed thereon. Since the ion implantation induces crystal damage, different implantation and thermal annealing conditions are applied to the device fabrication to investigate the effect of implantation and thermal annealing on device performance. In addition, the effect of different spacing between the drain and source area and SiO2 passivation layer on the device performance is also investigated in this study.
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Hao, Yang-Lu, and 楊旅皓. "Improving Breakdown Voltage for Enhancement-mode Double-Channel AIGaN/GaN HEMTs with Electron-blocking layers." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/8rsz2z.
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碩士國立雲林科技大學
電子工程系
105
ABSTRACT In this thesis, simulation and improvement of double-channel AlGaN/GaN HEMTs by using Sentaurus TCAD is reported. Due to the energy gap difference between AlGaN and GaN, a quantum well is formed at the interface. Electrons are moved by the polarization effect and accumulated at the quantum well, forming 2DEG in the channel even when the gate bias is not applied. Therefore, the HEMTs become depletion mode. In circuit applications, depletion-mode transistors requires a negative supply voltage, which makes the circuit more complicate. As a result, development of enhancement-mode AlGaN/GaN HEMTs is highly desirable. The challenge in designing an enhancement-mode double-channel HEMT is that it is much more difficult to deplete the electrons in the lower channel. In this work, a variety of techniques are integrated, including optimizing the depth of the recessed gate, the Al ratio in the AlGaN layer, and the doping concentration of the p-GaN region. Then an electron-blocking layer (EBL) structure is implemented and optimized to improve the breakdown voltage. Keywords: high electron mobility transistors, breakdown voltage, electron-blocking layer (EBL).
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Lin, Min-Song, and 林敏嵩. "Study of Enhancement Mode InAs HEMTs with Field Plate Technologies for Low-Power Logic Application." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/88xt3f.
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碩士國立清華大學
光電工程研究所
105
In the recent years, high indium content InGaAs-based HEMTs have high potential for high-speed and low-power logic application. 90 nm gate length InAs-channel high electron mobility transistors (HEMTs) have then been fabricated with success and characterized for high-frequency and low-power logic applications. The logical performance of the InAs-channel HEMTs was improved by using advance techniques. In this thesis, the indium content is used and one hundred percent of the InAs-channel were grown on lattice match In-P substrates. The 90 nm InAs HEMTs processed with field plate techniques, Ti/Pt/Au non-alloyed ohmic process, two-step recess and Pt gate sinking technologies for logic applications were fabricated. Depletion and Enhancement Mode InAs Channel HEMTs of the developed 90 nm InAs HEMTs with these advanced processes perform better than the traditional InAs HEMTs at low applied voltage, for example: better current saturation, lower output conductance (go), lower negative threshold-voltage (VT) , smaller subthreshold swing (SS). The excellent electronic performances indicate that the developed 90 nm InAs HEMTs are suitable for high-speed and low voltage applications. In this thesis, the fabrication of 90 nm InAs-channel HEMTs using field plate was developed. We have demonstrated that the field plate technique can realign the electrical field distribution to improve device performance. The devices show great performance in low applied voltage (VDS=0.5 V). The drain induced barrier lowering (DIBL) is 44 mV/V, subthreshold swing (SS) is 64.1 mV/decade, ION/IOFF ratio achieved 2.4 × 104, and much higher breakdown voltage achieved 8.3 V. These results show that the field plate technologies substantially improve logic device performance. Therefore, it has great potential for high-speed and low-power logic application for the next generation.
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Yue-ChangLin and 林岳璋. "Fabrication of Enhancement-Mode GaN/AlGaN High Electron Mobility Transistors (HEMTs) with Hybrid Recessed-Gate Structures." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/h5tt4g.
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Zhao, Weifeng. "Monolithic integration of thermally stable enhancement-mode and depletion-mode InP HEMTs utilizing IR-gate and Ag-ohmic contact techniques /." 2006. http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqdiss&rft_dat=xri:pqdiss:3243043.
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Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2006.Source: Dissertation Abstracts International, Volume: 67-11, Section: B, page: 6646. Adviser: Ilesanmi Adesida. Includes bibliographical references (leaves 99-106) Available on microfilm from Pro Quest Information and Learning.
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Huang, Chia-Ching, and 黃嘉慶. "Gate-Recessed Enhancement-Mode AlGaN/GaN HEMTs with Neutral Beam Etch Technology for High Frequency Power Applications." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/90245486106800645542.
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碩士國立交通大學
影像與生醫光電研究所
105
Enhancement-mode AlGaN/GaN high electron mobility transistors (HEMTs) have been extensively studied in recent years. The gate recess is a common method to realize the e-mode operation because it can suppress short-channel effect and enhance the gate controllability. However, the conventional inductively coupled plasma reactive ion etching (ICP-RIE) which is used to perform the gate recess will induce plasma damage such as interface roughness, disorder of chemical bonds and formation of various types of defect complexes including nitrogen-vacancy-related defects at the AlGaN surface. Therefore, the novel damage-free neutral beam etch (NBE) technique is introduced to solve this problem through completely eliminating ion charges and UV photons from plasma using a carbon plate with high aspect ratio apertures between the plasma and the sample stage. The gate-recessed enhancement-mode AlGaN/GaN HEMT device fabricated using the damage-free neutral beam etching (NBE) method exhibited superior electrical performances, including a maximum drain current density (IDS,max) of 1.65 A/mm, a peak extrinsic transconductance (gm) of 653 mS/mm, a threshold voltage (Vth) of 0.06 V, a current-gain cutoff frequency (fT) of 183 GHz, a maximum oscillation frequency (fMAX) of 191 GHz, and a minimum noise figure (NFmin) of 2.56 dB with an associated gain (GAS) of 5.61 dB at 54 GHz. In addition, at 38 GHz, a maximum output power (Pout) of 2.7 W/mm, a peak power-added efficiency (PAE) of 20.9 %, and a linear gain of 9.4 dB were obtained. Such superior characteristics confirm the inherent advantages of adopting the damage-free NBE process in fabricating GaN devices for millimeter-wave applications.
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Yang, Chih Wei, and 楊治琟. "The Investigation of the Enhancement-Mode AlGaN/GaN HEMTs and Realization of the DC-to-DC Boost Converter." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/35584536162980355246.
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博士長庚大學
電子工程學系
101
In recent years, the energy problem is more and more important. GaN materials have excellent characteristics such as thermal stable ability, high breakdown field, high saturation velocity, high current density caused by high piezoelectricity which make the on-state resistance of GaN FETs are only 2 % of the on-state resistance of traditional CMOS and also makes the GaN materials become an superior candidate for high-speed and high-power switching power supply applications. GaN transistors for automotive electronics applications need to overcome several technologies : achieving an enhancement-mode operation and the breakdown voltage must exceed 600 V. There are several methods to fabricate the E-mode operation GaN transistor, like gate recess, fluorine plasma treatment and p-type GaN cap. In chapter II, we use a new method − the E-mode operation AlGaN/GaN HEMT realized by N2O plasma treatment. For further analyzing, the DC, RF and LFN are systematically investigated, compared, ameliorated and discussed. In order to detail realize the noise mechanism, the fundamental concepts of noise are reviewed and analyzed. The chapter III describes the AlGaN/GaN HEMTs with field-plate extension. The field-plate structure can widely improve the breakdown voltage due to reduce the peak electrical field of device. The field-plate extension analysis is used to optimize the device breakdown characteristics. The gate-to-drain distance is another parameter influences the breakdown voltage, however, longer gate-to-drain distance caused the on-state resistance rising. In the chapter, field-plate extension and gate-to-drain extension are both investigated in DC, RF and LFN. In chapter IV, the substrate removal technology is used to improve the breakdown voltage, however, it causes the self-heating effect and reduces the drain current. For solving this issue, a novel technology called GaN-on-insulator (G.O.I.) is used. For comparing, the standard and substrate removal HEMT are also fabricated and investigated in DC, VBR and LFN with G.O.I. HEMT. Chapter V deals with the application on single chip DC/DC boost converter. Depletion-mode and enhancement-mode operation devices are fabricated and integrated with Schottky diode. The enhancement-mode device is fabricated by using N2O plasma treatment. For high voltage operation, the field-plate structure is used. Electrical characteristics and circuit analysis have also been done to clarify. In chapter VI, we demonstrate a large size power HEMT with area of 6.25 mm2 and total gate with of 60 mm with field-plate structure and a power Schottkey diode with area of 6.25 mm2 and total anode width of 60 mm. For getting high power efficiency, a DC/DC boost converter was demonstrated by integrating the power HEMT and the power Schottkey diode.
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李宗運. "Study of High Speed and Low Voltage Depletion and Enhancement Mode InAs Channel HEMTs for RF and Logic Applications." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/4p3mge.
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碩士國立交通大學
電子工程學系 電子研究所
102
In recently years, wireless communication applications at millimeter wave band and sub-millimeter wave bands have received a lot of momentum. The applications include radar systems, cellular backbone, wireless systems, national weaponry, traffic guidance, etc. Besides, emerging millimeter wave applications such as homeland security, medical diagnosis, and high-resolution image sensor are also in development rapidly. Therefore, development of the device possessing both high frequency features and low noise characteristics is becoming urgent. High indium content InGaAs-based HEMTs are particularly promising because the excellent electrical properties of InxGa1-xAs material and the superior band-gap design of HEMT. In this study, the 60 nm InAs HEMTs processed with advanced two-step recess and Pt gate sinking technologies for RF applications were fabricated. Depletion and Enhancement Mode InAs Channel HEMTs of the developed 60 nm InAs HEMTs with these advanced processes exhibit better performance than the conventional InAs HEMTs at low applied voltage such as better current saturation, lower output conductance (go), smaller negative threshold-voltage (VT), higher current-gain cut-off frequency (fT) of 153 GHz and 288 GHz. The excellent electronic performances indicate the developed 60 nm InAs HEMTs are suitable for high-gain, low noise and low voltage applications. In addition to high frequency RF applications, the evaluations of 60 nm InAs HEMTs for high-speed logic applications have also been demonstrated in this study. The devices show outstanding logic performance in low applied voltage (VDS=0.5 V). The drain induced barrier lowering (DIBL) is 70 mV/V, subthreshold swing (S) is 67 mV/decade, and intrinsic gate delay (CV/ION) is less than 5.0 psec. When comparing to the mature Si technology, the InAs HEMTs exhibit smaller gate delay time. Besides, InAs HEMTs show much higher ION/IOFF performance than the most advanced InSb HEMTs. These results demonstrate that the 60 nm InAs HEMTs have great potential for future high-speed and low-voltage logic applications.
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Yang, Kai-Chun, and 楊凱鈞. "Evaluation of Enhancement Mode InAs HEMTs for RF and Low-Power Logic Applications Using Non-alloyed Ohmic &; Sidewall Etch Process." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/ns7b82.
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碩士國立交通大學
光電系統研究所
104
In order to extend Moore’s law. The key point lies in maximizing the device on-current, while suppressing the leakage currents. In general, III-V compound semiconductors have significantly higher intrinsic mobility than silicon and the substrates are semi-insulating. These material properties combine with band gap engineering, epitaxial layer growth technique and process technologies result in devices with excellent performance. Recently, High indium content InGaAs-based HEMTs are particularly promising for future high-speed and ultra-low power logic application because the excellent electrical properties of InxGa1-xAs material and the superior band-gap design of HEMTs. In this study, the 100 nm InAs HEMTs processed with sidewall etch process, Ti/Pt/Au non-alloyed ohmic process, two-step recess and Pt gate sinking technologies for RF applications were fabricated. Depletion and Enhancement Mode InAs Channel HEMTs of the developed 100 nm InAs HEMTs with these advanced processes exhibit better performance than the conventional InAs HEMTs at low applied voltage such as better current saturation, lower output conductance (go), smaller negative threshold-voltage (VT), higher current-gain cut-off frequency (fT) of 489 GHz. The excellent electronic performances indicate the developed 100 nm InAs HEMTs are suitable for high-gain, low noise and low voltage applications. In addition to high frequency RF applications, the evaluations of 100 nm InAs thin channel HEMTs for high-speed logic applications have also been demonstrated in this study. The devices show outstanding logic performance in low applied voltage (VDS=0.5 V). The drain induced barrier lowering (DIBL) is 50 mV/V, subthreshold swing (SS) is 63.3 mV/decade, and intrinsic gate delay (CV/ION) is less than 0.32 psec, and ION/IOFF higher than 1.3 × 104. These results demonstrate that the E-mode InAs HEMTs have great potential for future high-speed and low-power logic application.
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Tan, Kuang-Hsiung, and 談光雄. "Fabrication of enhancement-mode psedomorphic HEMT." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/18357416173665693874.
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碩士國防大學中正理工學院
電子工程研究所
95
Recently, the wireless area network (WLAN) becomes the public study topic of communication; especially the protocal 802.11a of wireless area network will be developed. There is high frequency, high power and linear related requirements in this communication protocol, but traditional metal-oxide-semiconductor field emitting transistor (MOSFET) by deep sub-micron technology can't reach those requirements, and hetro-junction field emitting transistor technology is still limited by negative-biased on gate in development of power amplifier. These is the results of that the large area of the circuits and low down the commercial competition. The main target of the project is fabricating enhancement-mode pHEMT. Due to the interfacial oxide layer formation by adding the rare earth metal laye in the bottom of gate metal, which also results in a gate leakage current and turn on voltage performance improvement. Used to design a single voltage supply, a high gain, a high linearity, and a low power consumption active device for power amplifier and low noise amplifier with enhancement mode mode pHEMT.
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Wu, Jing-Chung, and 吳勁昌. "Fabrication of Depletion & Enhancement mode Metamorphic HEMT." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/21397120019800812721.
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碩士國立中央大學
電機工程研究所
92
This paper introduces the metamorphic HEMT in different Indium content. We add the pseudomorphic channel like pHEMT in order to increase the current density and the power performance. Besides that, we try to fabricate the depletion & enhancement mode device using different gate metal in the In=50% & 60% mHEMT samples. We use the Pt diffusion to decrease the distance between the gate metal and channel and enhance the device threshold voltage to reach the enhancement mode device purpose.And we use the measurement system in our lab to measure the difference of DC, RF, Power characteristics. By the measurement data we calculate the diffusion depth of Pt gate and using the RF data to extract the small signal model elements and the electron transient time to analyse the performance difference between depletion and enhancement mode device.
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May, Kae Dyi, and 麥凱迪. "The Investigation of Enhancement/Depletion-mode p-GaN Gate AlGaN/GaN HEMT." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/06583780731061211519.
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SARKAR, ARGHYADEEP, and 亞吉安. "High Current and Low Dynamic On Resistance (RON) Enhancement mode GaN MIS-HEMT." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/u98njn.
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碩士國立交通大學
材料科學與工程學系所
104
Enhancement mode (E-Mode) GaN HEMT has recently started replacing conventional depletion mode devices due to additional safety in high power switching applications as it is always in normally off condition. Gate recess is one of the ways to achieve enhancement mode operation. Major problem in doing gate recess process is that it is very difficult to control recess depth by conventional etching technique. In this thesis, we have demonstrated enhancement mode operation of GaN MIS-HEMT through gate recess technique by both dry and wet etch process. Prior to etching and surface passivation, we have done nitrogen plasma treatment on the surface to recover nitrogen vacancy. Finally, HfO2 was deposited by ALD to create strong accumulation under the gate which is responsible for large current density of the device. It is seen that etching profile obtained is quite good which fits the purpose of wet etching as it reduces plasma damage by conventional dry etch method. Further, AFM result indicates a smooth surface morphology with RMS value to be around 0.49 nm. Very high current density of 700 mA/ mm has been obtained which indicate good surface passivation along with threshold voltage of 1.3 V essential for E-Mode operation. HfO2 deposited as gate dielectric shows good dielectric strength with forward breakdown voltage of 11V. Lower value of threshold voltage hysteresis around 80 mV is also reported from this work. We have also obtained a low value of 1.11 for dynamic RON to static RON ratio.
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Chih-WeiLin and 林志偉. "Study of Halogen Doping Aluminum Oxide Deposition on Enhancement-Mode AlGaN/GaN MOS-HEMT." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/qztb4g.
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碩士國立成功大學
奈米積體電路工程碩士學位學程
104
This thesis proposes the halogen doping of aluminum oxide (Al2O3) stacked on the e-mode AlGaN/GaN high electron mobility transistors (HEMTs) by using ultrasonic spray pyrolysis deposition (USPD). We found that the doping oxide deposit on the enhancement mode AlGaN/GaN HEMTs can achieve more positive threshold voltage shift. In order to analyze the oxide layer composition, we utilized the atomic force microscopy (AFM), transmission electron microscopy (TEM), electron spectroscopy for chemical analysis (ESCA), and Hall measurement in the research. We observe that the surface roughness is quite uniform by AFM. Then, we confirm that the thickness of oxide layer is 20 nm through TEM. Besides, in ESCA analysis, the results show the oxide layer is exactly Al2O3. In addition, the decreased oxide layer trap density is confirmed by the hysteresis and interface state density. Gate recess, fluorine ion implantation and doping oxide are applied to the fabrication of AlGaN/GaN HEMTs. We found that threshold voltage of doping oxide device can shift to 1.5V, which is more positive 0.3V than only Al2O3 device. In addition, fluorine ion implantation device has larger drain current and reliability than gate recess device. Finally, we propose that the Al2O3 oxide layer applied to metal-oxide-semiconductor MOSHEMT by using ultrasonic spray pyrolysis technique is studied the optimal thickness of the oxide layer is 20 nm. Gate voltage of device can be operated up to 3V and the breakdown voltage is over 180 V. Moreover, threshold voltage of device with doping oxide achieves 25 % positive shift. Therefore, the device which deposited Al2O3 on AlGaN/GaN HEMTs by using ultrasonic spray pyrolysis technique with halogen doping is suitable for modulate threshold voltage and reduce gate leakage.
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Chen, Yi-Chung, and 陳奕仲. "tudy of Recessed Enhancement-mode AlGaN/GaN/ AlGaN MIS-HEMT with High Threshold Voltage." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/10668624918413250226.
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碩士國立交通大學
材料科學與工程系所
98
AlGaN/GaN/AlGaN enhancement-mode high electron mobility transistor (HEMT) is extensively studied in recent years. However, there is still no solution to fabricate a HEMT with high threshold voltage, which means that it will cause mis-operation in high voltage operation. For enhancement mode operation (E-mode), metal-oxide-semiconductor field effect transistor (MOS-FET), though it has higher threshold voltage, it is not commercialized due to the immature process techniques and higher on-resistance than HEMT. In this thesis, gate recess technique is used to fabricate E-mode AlGaN/GaN/AlGaN metal-insulator-semiconductor high electron mobility transistor (MIS-HEMT). This structure has simpler process and lower on-resistance in comparison with MOS-FET. Additionally, this structure can achieve very high threshold voltage to avoid the mis-operation of the device. Schottky diode was used for process parameter evaluation to find out the optimum process condition, and then the recessed E-mode MIS-HEMT standard process was established. The device demonstrated 2 mA/mm, 0.8 mS/mm, and more than 200V for channel current, transconductance, and three-terminal breakdown voltage, respectively. Furthermore, the device shows 9V threshold voltage. The structure can also be applied to conventional D-mode HEMT application with ID = 280mA/mm and Gm = 75 mS/mm. These characteristics indicate that the structure is promising for high voltage electronic applications.
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Chen, Chao Hung, and 陳昭宏. "The Investigation of Novel Enhancement mode AlGaN/GaN Heterojunction HEMT and its Application for Microwave ICs." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/63317579041410129584.
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博士長庚大學
電子工程學系
101
Wide-Bandgap group III-nitride-based AlGaN/GaN metal-oxide-semiconductor high electron mobility transistors (MOS-HEMTs) with a low gate leakage、high output power and superior device linearity were developed and characterized. Due to its excellent properties such as high breakdown voltage、high electron velocity、Schottky gate performance and high current driving capability let it has been a good candidate for the applications of high speed and high power. In chapter 2、in recently years、the zirconium oxide as gate insulator layer on III-nitride-based compound semiconductor has been extensively studied and applied. A major drawback of traditional GaN HEMT is their large surface defect causing the high gate leakage current. In this work、we proposed a method to reduce gate leakage current by inserting a thin film of high-k ZrO2 oxide layer between AlGaN Schottky layer and Ni/Au gate metal layer to solve this problem. Furthermore、to achieve a high yield and better surface roughness of the Schottky contact area for devices、electron-beam evaporation was applied to avoid plasma induced damage on AlGaN Schottky layer comparison these previous sputtered deposition method. The characteristics of ZrO2 MOS-HEMTs were indicated to achieve high linearity and low interface states for power amplifier applications. In chapter 3、the CHF3 and CF4 treatment technology to fabricate Enhancement-mode AlGaN/GaN HEMTs were demonstrated for investigating the relationship between semiconductor and surface phenomenon. The treatment of the gate region with post gate annealing is important; in order to reduce the plasma induced damage. Based on the measured subthreshold slope (S.S) and the effective interface state densities (Dit) results、the S.S value was 80mV/decade and the Dit of 1.23×1012 cm-2 for CHF3 treatment HEMT. Compared to previous CF4 treatment HEMT、the hydrogen atoms of CHF3 treatment could compensate the vacancy by donating an electron to a vacancy acceptor level; meanwhile、the vacancy induced traps were also suppressed. In chapter 4、Traditional dry etching isolation process in AlGaN/GaN HEMTs results in the gate metal contacting the mesa sidewalls region、forming a parasitic gate leakage path. In this paper、we suppressed the gate leakage current from the mesa-sidewall to increase the gate-to-source breakdown voltage and to reduce interface trap density by using the ion implantation isolation technology. By calculating capacitance-voltage (C-V) measured curve、the hysteresis voltage was 9.3 mV and the interface state density was 5.26×1012 cm-2 for the ion implantation isolation sample. The 1/f noise phenomena and Schottky characteristics are particularly studied for device linearity、which is sensitive to the semiconductor surface. The fluctuation that is caused trapping/detrapping of free carriers near the gate interface can be reduced、due to side-wall induced damages were eliminated. The slight DC and flicker noise variation of ion implantation isolation HEMTs were beneficial for high power transistor applications. In chapter 5、the property of in-situ SiNx surface passivation enhancement-mode (E-mode) AlGaN/GaN high electron mobility transistor was studied using refractory titanium tungsten (TiW) and traditional nickel gate metal. Traditional Ni/AlGaN Schottky interface formed the intermixing states after 400 oC thermal stress. Depletion-mode (D-mode) AlGaN/GaN high electron mobility transistor (HEMT) on the silicon substrate with tungsten (W) and titanium tungsten (TiW) refractory gate materials are demonstrated and compared. However、W/AlGaN Schottky contact provided a lower Schottky barrier height and a higher reverse leakage current than traditional Ni/Au gate metals、limiting the gate voltage swing region of the W-gate GaN HEMTs. Therefore、the titanium tungsten (Ti0.2W0.8) composited refractory gate was proposed to increase the Schottky barrier height and to reduce the tunneling leakage current induced interface noise. Thus the fluctuation that is caused by the trapping/detrapping of free channel carriers near the gate interface can be reduced. Additionally、the variation of the Hooge factor (αH) of a TiW-gate HEMT、measured at 300K~ 400K is slight、especially in the subthreshold gate voltage regime. In chapter 6、we present the temperature effects on the 1/f noise characteristics of the depletion-mode (D-mode) AlGaN/GaN HEMTs on dual-gate structure. The dual-gate devices had a better breakdown voltage and rf characteristics. This could be obtained because the electrical field was balance distributed between the two depletion regions. The dual-gate device can be operated at a higher drain-to-source voltage、due to lower gate leakage current not only improves the device breakdown voltage and the cascade-gate structure also beneficial to the improvement of the rf performance、as compared to a traditional single-gate device. Finally、we describe and demonstrate improved based on T-shape 0.5 μm gate length cascade connection structure D-mode AlGaN/GaN HEMTs for driver amplifier circuit applications. Compared with the traditional D-mode devices、the cascade connection structure devices exhibited higher off-state breakdown voltages and better rf performance were also obtained. Therefore、the cascade connection structure driver amplifier exhibited gain performance in the high bandwidth. In the final chapter、we summarized the results obtained in this thesis.
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Chih-ChiaLai and 賴志嘉. "Design and Implementation of 1 MHz DC-DC LLC Resonant Converter with GaN Enhancement Mode HEMT." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/8qxf2t.
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林佳慶. "Study of Enhancement Mode AlGaN/GaN MIS-HEMT with La2O3/SiO2 Gate Insulator for High Power Application." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/6kgjck.
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碩士國立交通大學
材料科學與工程學系所
105
It is necessary to fabricate enhancement-mode (E-mode) AlGaN/GaN metal-insulator-semiconductor high electron mobility transistor (MIS-HEMT) in views of safety issue, low power consumption and simple design on the circuit. However, when the E-mode AlGaN/GaN MIS-HEMT is used for high power device, the high positive gate voltage may induce the electrons in the 2DEG channel into the deep states at the interface between insulator and AlGaN layer, and results in the threshold voltage instability and hysteresis effect. It would influence the output performance of E-mode MIS-HEMT device. Therefore, choosing gate insulator becomes a key point in E-mode MIS-HEMT. In my study, I chose multilayer La2O3/SiO2 as gate insulator to fabricate E-mode MIS-HEMT with lower deep state density in the interface between gate insulator and semiconductor to reduce hysteresis effect and threshold voltage instability. There two topics in this study. In first part, La2O3/SiO2 MOS-capacitor was used to identify oxide quality. The experimental results of La2O3/SiO2 AlGaN/GaN MOS-capacitor showed best electrical property with great interface quality between La2O3/SiO2 and semiconductor verified by C-V measurement, hysteresis effect and X-ray Photoelectron Spectroscopy (XPS) analysis. In second part, we applied multilayer La2O3/SiO2 to be gate insulator in the fabrication of a gate recessed E-mode AlGaN/GaN MIS-HEMT and compared with conventional E-mode schottky HEMT to investigate the gate leakage current influence on the output performance, the breakdown voltage improvement, the dynamic on-resistance stability under high drain voltage hoping to improve Vth instability effectively. From these measurements, we found the gate recessed La2O3/SiO2 E-mode AlGaN/GaN MIS-HEMT exhibited high ID,max (752 mA/mm), high Gm (210 mS/mm), high BV (440 V with LGD = 5 μm & 670 V with LGD = 10 μm), low hysteresis (50 mV), low Ron (7.6 Ω•mm) due to excellent interface quality between La2O3/SiO2 and semiconductor proved that our device was very suitable for high power application.