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Yin, Hang. "Adaptive Embedded Systems." Thesis, Mälardalens högskola, Akademin för innovation, design och teknik, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-10590.
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Modern embedded systems are evolving in the direction of increased adaptivity and complexity. It is extremely important for a system with limited resource to be adaptive in order to maximize its efficiency of resource usage while guaranteeing a high level of fault tolerance and QoS. This report aims at exploring such a kind of system, i.e. Adaptive Embedded System (AES), which is featured by dynamic reconfiguration at runtime. Based on the investigation and analysis of a variety of case studies related with AES, we proposed the conceptual view and overall architecture of an AES by highlighting its predominant characteristics. We also made an incomplete but detailed summary of the most popular techniques that can be used to realize adaptivity. Those techniques are categorized into dynamic CPU/network resource re-allocation and adaptive fault tolerance. A majority of adaptive applications resort to one or more of those techniques. Besides, there is a separate discussion on dynamic reconfiguration and mode switch for AES. Finally, we classify adaptivity into different modeling problems at a higher abstraction level and build UPPAAL models for two different AESs, a smart phone and an object-tracking robot. Our UPPAAL models provide clear demonstration on how a typical AES works.
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Tosun, Suleyman. "Reliability-centric system design for embedded systems." Related electronic resource: Current Research at SU : database of SU dissertations, recent titles available full text, 2005. http://wwwlib.umi.com/cr/syr/main.
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Eldh, Erik. "Cloud connectivity for embedded systems." Thesis, KTH, Kommunikationssystem, CoS, 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-118746.
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Deploying an embedded system to act as a controller for electronics is not new. Today these kinds of systems are all around us and are used for a multitude of purposes. In contrast, cloud computing is a relatively new approach for computing as a whole. This thesis project explores these two technologies in order to create a bridge between these two wildly different platforms. Such a bridge should enable new ways of exposing features and doing maintenance on embedded devices. This could save companies not only time and money while dealing with maintenance tasks for embedded systems, but this should also avoid the needed to host this maintenance software on dedicated servers – rather these tasks could use cloud resources only when needed. This thesis explores such a bridge and presents techniques suitable for joining these two computing paradigms together. Exploring what is included in cloud computing by examining available technologies for deployment is important to be able to get a picture of what the market has to offer. More importantly is how such a deployment can be done and what the benefits are. How technologies such as databases, load-balancers, and computing environments have been adapted to a cloud environment and what draw-backs and new features are available in this environment are of interest and how a solution can exploit these features in a real-world scenario. Three different cloud providers and their products have been presented in order to create an overview of the current offerings. In order to realize a solution a way of communicating and exchanging data is presented and discussed. Again to realize the concept in a real-world scenario. This thesis presents the concept of cloud connectivity for embedded systems. Following this the thesis describes a prototype of how such a solution could be realized and utilized. The thesis evaluates current cloud providers in terms of the requirements of the prototype. A middle-ware solution drawing strengths from the services offered by cloud vendors for deployment at a vendor is proposed. This middle-ware acts in a stateless manner to provide communication and bridging of functionality between two parties with different capabilities. This approach creates a flexible common ground for end-user clients and reduces the burden of having the embedded systems themselves process and distribute information to the clients. The solution also provides and abstraction of the embedded systems further securing the communication with the systems by it only being enabled for valid middle-ware services.Att använda ett inbyggt system som en kontrollenhet för elektronik är inget nytt. Dessa typer av system finns idag överallt och används i vidt spridda användningsområden medans datormolnet är en ny approach för dator användning i sin helhet. Utforska och skapa en länk mellan dessa två mycket olika platformar för att facilitera nya tillvägagångs sätt att sköta underhåll sparar företag inte tid och pengar när det kommer till inbyggda system utan också när det gäller driften för servrar. Denna examensarbete utforskar denna typ av länk och presenterar för endamålet lämpliga tekniker att koppla dem samman medans lämpligheten för en sådan lösning diskuteras. Att utforska det som inkluderas i konceptet molnet genom att undersöka tillgängliga teknologier för utveckling är viktigt för att få en bild av vad marknaden har att erbjuda. Mer viktigt är hur utveckling går till och vilka fördelarna är. Hur teknologoier som databaser, last distrubutörer och server miljöer har adapterats till molnmiljön och vilka nackdelar och fördelar som kommit ut av detta är av intresse och vidare hur en lösning kan använda sig av dessa fördelar i ett verkliget scenario. Tre olika moln leverantörer och deras produkter har presenterats för att ge en bild av vad som för tillfället erbjuds. För att realisera en lösning har ett sett att kommunicera och utbyta data presenterats och diskuterats. Åter igen för att realisera konceptet i ett verkligt scenario. Denna uppsats presenterar konceptet moln anslutbarhet för inbyggda system för att kunna få en lösning realiserad och använd. En mellanprograms lösning som drar styrka ifrån de tjänster som erbjudas av molnleverantörer för driftsättning hos en leverantor föreslås. Denna mellanprogramslösnings agerar tillståndslöst för att erbjuda kommunikation och funktions sammankoppling mellan de två olika deltagarna som har olika förutsätningar. Denna approach skapar en flexibel gemensam plattform för olika klienter hos slutanvändaren och minskar bördan hos de inbyggdasystemet att behöva göra analyser och distrubuera informationen till klienterna. Denna lösning erbjuder också en abstraktion av de inbyggdasystemen för att erbjuda ytterligare säkerhet när kommunikation sker med de inbyggdasystemet genom att den endast sker med giltiga mellanprogram.
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Corteggiani, Nassim. "Towards system-wide security analysis of embedded systems." Electronic Thesis or Diss., Sorbonne université, 2020. http://www.theses.fr/2020SORUS285.
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Cette thèse se consacre à l'amélioration des techniques d'analyse dynamiques permettant la vérification de logiciels conçus pour des systèmes embarqués, couramment appelé micrologiciel. Au vu de l'augmentation significative de la connectivité des appareils électroniques, les préoccupations concernant leur sécurité s'intensifient. Les conséquences d'une faille de sécurité sur ces appareils peuvent impliquer des répercussions économiques non négligeables et des difficultés techniques importantes pour appliquer un correctif. C’est le cas notamment des amorceurs de code qui sont généralement stockés sur des mémoires mortes et intégrées dans les couches physiques qui constituent le microcontrôleur. Par conséquent, l’analyse de code source spécifique aux systèmes embarqués pendant la phase de production des micro-contrôleurs est cruciale. Cette thèse présente des techniques d'analyse afin de tester la sécurité de composants logiciel et matériel à l'échelle du système. En particulier, nous nous intéressons aux techniques de test basé sur l'émulation partielle dont nous améliorons les capacités avec trois nouvelles approches. Premièrement, Inception un outil d’analyse dynamique permettant d’appliquer des méthodes de tests exhaustifs (exécution symbolique) sur le code source de micrologiciel même lorsque ce dernier dépend de code plus bas niveau (exemple, code binaire ou assembleur). Deuxièmement, une sonde haute performance basé sur le protocol USB 3.0 afin de réduire la latence lors des communications entre l'outil d'analyse et le vrai matériel. Troisièmement, HardSnap une méthode permettant de générer des instantanés des périphériques matériel afin d'augmenter le contrôle et la visibilité lors de l'exécution symbolique. Cet outil permet de réaliser une exploration concurrente de plusieurs chemins d'exécution sans inconsistanceThis thesis is dedicated to the improvement of dynamic analysis techniques allowing the verification of software designed for embedded systems, commonly called firmware. It is clear that the increasing pervasiveness and connectivity of embedded devices significantly increase their exposure to attacks. The consequences of a security issue can be dramatic not least in the economical field, but on the technical stage as well. Especially because of the difficulty to patch some devices. For instance, offline devices or code stored in a mask rom which are read only memory programmed during the chip fabrication. For all these reasons, it is important to thoughtfully test firmware program before the manufacturing process. This thesis presents analysis methods for system-wide testing of security and hardware components. In particular, we propose three impvrovements for partial emulation. First, Inception a dynamic analysis tool to test the security of firmware programs even when mixing different level of semantic (e.g., C/C++ mixed with assembly). Second, Steroids a high performance USB 3.0 probe that aims at minimizing the latency between the analyzer and the real device. Finally, HardSnap a hardware snapshotting method that offers higher visibility and control over the hardware peripherals. It enables testing concurently different execution paths without corrupting the hardware peripherals state
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Carlson, Jan. "Event Pattern Detection for Embedded Systems." Doctoral thesis, Västerås : Department of Computer Science and Electronics, Mälardalen University, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-231.
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von, Hacht Karl-Johan. "Garden Monitoring with Embedded Systems." Thesis, Linköpings universitet, Datorteknik, 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-120706.
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In today’s modern society the process of handling crops in an accountable way withoutloss have become more and more important. By letting a gardener evaluate the progressof his plants from relevant data one can reduce these losses and increase effectiveness ofthe whole plantation. This work is about the construction of such a system composedfrom a developers perspective of three different platforms, from the start of data samplingwithin the context of gardening to and end user easily able to understand the data thentranslated. The first platform will be created from scratch with both hardware andsoftware, the next assembled from already finished hardware components and build withsimpler software. The last will essentially only be a software solution in an alreadyfinished hardware environment.
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Dyer, Matthias. "Distributed embedded systems : validation strategies /." Aachen : Shaker Verlag, 2007. http://e-collection.ethbib.ethz.ch/show?type=diss&nr=17189.
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Lessner, Dirk. "Network security for embedded systems /." [St. Lucia, Qld.], 2005. http://adt.library.uq.edu.au/public/adt-QU20060215.160952/index.html.
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Tewatia, Rohit. "Security in Distributed Embedded Systems." Thesis, Halmstad University, School of Information Science, Computer and Electrical Engineering (IDE), 2008. http://urn.kb.se/resolve?urn=urn:nbn:se:hh:diva-1379.
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Communication in a sensor network needs guaranteed reception of data without fail and providing security to it. The authenticity and confidentiality of the data has to be ensured as sensors have limited hardware resources as well as the bandwidth. This thesis addresses the security aspects in wireless sensor networks. The main task of the project is to identify the critical security parameters for these distributed embedded systems. The sensors have extremely limited resources: small amount of memory, low computation capability and poor bandwidth. For example, a sensor platform can have 8KB of flash memory, a 4MHz 8-bit Atmel processor, and a 900MHz radio interface. Various security threats posed to these small wireless sensor networks has been made and solutions proposed. Secure communication between these communicating partners is to be achieved using cryptography.
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Wilund, Torbjörn. "Robust Distributed Embedded Systems : Communication." Thesis, KTH, Maskinkonstruktion (Inst.), 2006. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-100998.
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Detta examensarbete diskuterar i sin teoretiska del vad begreppet robusthet betyder för distribuerade inbyggda system. Utvecklingen går idag generellt emot att byta mekaniska och elektriska lösningar mot mekatroniska styrsystem. Det finns sedan mycket att vinna på att göra dessa inbyggda styrsystem distribuerade, bland annat beroende på oberoende mellan noder för intern övervakning och feldetektering. Delresultatet om robusthet säger att det beror på integritet för att uppnå tillgänglighet och tillförlitlighet, det vill säga att informationen är den samma i alla berörda noder. Tillförlitligheten beror på hur fel i tid och värde hanteras under systemexekvering. Informationen skyddas i samtliga undersökta protokoll genom redundans av diverse algoritmer, exempelvis CRC vilket ger möjlighet till feldetektering. Skillnad finns dock i hur tidssynkronisering hanteras om det ens finns hantering av för detta. Ur detta perspektiv är endast tidsstyrda nätverksprotokoll av nuvarande alternativ mest tekniskt lämpliga. Den praktiska delen försöker utvärdera GAST levererad hårdvara. Arbetet med att få igång någon kommunikation på TTP/C misslyckades, detta beroende på brister i den sammansatta plattformen. Mer specifikt beror detta troligtvis på konstruktionsfel i det fysiska lagret av plattformen. Med valt bakplan blir ej signalerna som förväntat vilket gör att informationen tolkas fel av externa kommunikations kretsar. Därför rekommenderas närmare analys av signalen i databussen och eventuell konstruktion av ett filter till bakplanet om nuvarande hopsättning skall användas. Plattformen har med sin öppenhet en framtid för utveckling och forskning kring distribuerade inbyggda system, dock saknas färdiga drivrutiner för de i plattformen integrerade protokollen. Detta är något som måste åtgärdas ifall plattformen skall få någon form av betydelse innan tekniken är för gammal. Undersökningen av den TTP Plan genererade koden visar att det går att extrahera information från verktyget och på så sätt utnyttja verktyget för konfiguration. För att detta skall fungera bör man tillverka någon form av verktyg för detta.This thesis tries in its theoretical part to discuss what the term of robustness means for distributed embedded systems. Development of today generally tries to exchange mechanical and electrical solutions for embedded control systems. There are a lot of benefits to gain by designing in a distributed way, this due to internal independencies between nodes for monitoring and error detection. The outcome about robustness suggests that it depends on integrity to achieve availability and reliability, or loss of alternations of information in the different nodes in the distributed system. Reliability depends on how faults in terms of time and value are treated during execution. All studied network protocols have protection of information by different redundancy algorithms such as CRC, which gives the opportunity for fault and error detection. However there are differences in how time is handled, if there is any time handling, and possibility for time synchronization in the hardware. From this perspective the best alternatives are time triggered architectures of current technology. The experimental part tries to evaluate the GAST delivered platform. The work to achieve communication on TTP/C controllers failed due to shortage in the assembled platform. More specifically this is probably the case of bugs in the design of the physical layer of the GAST hardware (not the TTP controllers themselves). By use of recommended backplane, the sent signals are not appearing as expected, and information sent is misinterpreted by external communication devices. A suggestion and recommendation for future work is analysis of the signal in the data bus, and possible design of a filter if current assembly shall be used. The platform has a future for development and research in the field of distributed embedded systems due to its openness, however there is a lack of drivers for the platform integrated network protocols. This must be attended if the platform shall have any significance. The evaluation of TTP Plan generated code shows, that there are possibilities to extract configuration information form tool for configuration of platform. To achieve this some kind of extraction script must be developed.
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Swere, Erick A. R. "Machine learning in embedded systems." Thesis, Loughborough University, 2008. https://dspace.lboro.ac.uk/2134/4969.
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This thesis describes novel machine learning techniques specifically designed for use in real-time embedded systems. The techniques directly address three major requirements of such learning systems. Firstly, learning must be capable of being achieved incrementally, since many applications do not have a representative training set available at the outset. Secondly, to guarantee real-time performance, the techniques must be able to operate within a deterministic and limited time bound. Thirdly, the memory requirement must be limited and known a priori to ensure the limited memory available to hold data in embedded systems will not be exceeded. The work described here has three principal contributions. The frequency table is a data structure specifically designed to reduce the memory requirements of incremental learning in embedded systems. The frequency table facilitates a compact representation of received data that is sufficient for decision tree generation. The frequency table decision tree (FTDT) learning method provides classification performance similar to existing decision tree approaches, but extends these to incremental learning while substantially reducing memory usage for practical problems. The incremental decision path (IDP) method is able to efficiently induce, from the frequency table of observations, the path through a decision tree that is necessary for the classification of a single instance. The classification performance of IDP is equivalent to that of existing decision tree algorithms, but since IDP allows the maximum number of partial decision tree nodes to be determined prior to the generation of the path, both the memory requirement and the execution time are deterministic. In this work, the viability of the techniques is demonstrated through application to realtime mobile robot navigation.
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Schmidgall, Ralf. "Automotive embedded systems software reprogramming." Thesis, Brunel University, 2012. http://bura.brunel.ac.uk/handle/2438/7070.
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The exponential growth of computer power is no longer limited to stand alone computing systems but applies to all areas of commercial embedded computing systems. The ongoing rapid growth in intelligent embedded systems is visible in the commercial automotive area, where a modern car today implements up to 80 different electronic control units (ECUs) and their total memory size has been increased to several hundreds of megabyte. This growth in the commercial mass production world has led to new challenges, even within the automotive industry but also in other business areas where cost pressure is high. The need to drive cost down means that every cent spent on recurring engineering costs needs to be justified. A conflict between functional requirements (functionality, system reliability, production and manufacturing aspects etc.), testing and maintainability aspects is given. Software reprogramming, as a key issue within the automotive industry, solve that given conflict partly in the past. Software Reprogramming for in-field service and maintenance in the after sales markets provides a strong method to fix previously not identified software errors. But the increasing software sizes and therefore the increasing software reprogramming times will reduce the benefits. Especially if ECU’s software size growth faster than vehicle’s onboard infrastructure can be adjusted. The thesis result enables cost prediction of embedded systems’ software reprogramming by generating an effective and reliable model for reprogramming time for different existing and new technologies. This model and additional research results contribute to a timeline for short term, mid term and long term solutions which will solve the currently given problems as well as future challenges, especially for the automotive industry but also for all other business areas where cost pressure is high and software reprogramming is a key issue during products life cycle.
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Ghamari, Mohammad. "Reliable communication in embedded systems." Thesis, Lancaster University, 2013. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.663247.
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Embedded computer systems equipped with wireless communication transceivers are nowadays used in a vast number of application scenarios. Energy consumption is important in many of these scenarios as systems are battery operated and long maintenance free operation is required. To achieve this goal, embedded systems employ low-power communication transceivers and protocols. However, currently used protocols cannot operate efficiently when communication channels are highly erroneous. In many application scenarios, we find this characteristic that a large numbers of transmitted packets maybe lost or received corrupted. This work aims to provide solutions to this particular problem. This thesis focuses on one particular class of low-power MAC protocols in embedded systems and investigates its transmission reliability through erroneous channels. Subsequently, this thesis presents a number of techniques which ameliorate the transmission reliability in conjunction with energy efficiency of existing low-power MAC protocols simultaneously in erroneous channels. In this thesis, average diversity combining (ADC) is applied in low-power MAC protocols to ensure that the received corrupted packets can be used to contribute in decoding process. This thesis demonstrates that how ADC is integrated with low-power MAC protocols. It is also shown that the integrated method improves low-power Communication dramatically. The integrated method always reduces the frame error rate; in some investigated scenarios frame error rates are reduced from 20.85% to 1.25%. Furthermore we have shown that the ADC mechanism can be implemented on existing systems without significant impact on system performance. In addition, transmit/receive diversity along with error correction technique is also applied in existing low-power MAC protocols such that high losses of transmitted packets are preventable. This work demonstrates how transmit/receive diversity along with error correction technique is integrated with low-power MAC protocols. It is illustrated that the integrated scheme prevents high losses of transmitted packets. Subsequently, in order to further analyze the transmission reliability cost of the proposed techniques in low-power embedded systems, we have compared different combinations of proposed hardware and software extensions. Surprisingly, our analysis is demonstrated that, although increasing the number of antennas at one particular side of a communication link which is directly proportional to the system cost, always guarantee better transmission reliability, however, there are cases that applying fewer number of antennas along with using appropriate software extensions can provide better transmission reliability compared with cases with more number of antennas.
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Moss, Andrew David. "Program transformation of embedded systems." Thesis, University of Bristol, 2005. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.432724.
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Wallace, Malcolm. "Functional programming and embedded systems." Thesis, University of York, 1995. http://etheses.whiterose.ac.uk/10807/.
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Burgess, Peter. "A testbed for embedded systems." Thesis, University of St Andrews, 1994. http://hdl.handle.net/10023/13457.
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Testing and Debugging are often the most difficult phase of software development. This is especially true of embedded systems which are usually concurrent, have real-time performance and correctness constraints and which execute in the field in an environment which may not permit internal scrutiny of the software behaviour. Although good software engineering practices help, they will never eliminate the need for testing and debugging. This is because failings in the specification and design are often only discovered through testing and understanding these failings and how to correct them comes from debugging. These observations suggest that embedded software should be designed in a way which makes testing and debugging easier and that tools which support these activities are required. Due to the often hostile environment in which the finished embedded system will function, it is necessary to have a platform which allows the software to be developed and tested "in vitro". The Testbed system achieves these goals by providing dynamic modification and process migration facilities for use during development as well as powerful monitoring and background debugging support. These facilities are built on a basic run-time harness supporting an event-driven programming model with a global communication mechanism. This programming model is well suited to the reactive nature of embedded systems. The main research contributions of this work are in the areas of finding deadlock-free, path-optimal routings for networks and of dynamic modification with automated conversion of data which may include pointers.
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Tavares, Hugo Rafael Mendes. "Development methodologies for embedded systems." Master's thesis, Universidade de Aveiro, 2013. http://hdl.handle.net/10773/12748.
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Mestrado em Engenharia Eletrónica e TelecomunicaçõesO presente documento aborda algumas metodologias de desenvolvimento de projetos e de sistemas embutidos, com enfoque em algumas técnicas para melhorar os produtos e serviços de modo a satisfazer as necessidades dos clientes. Ao longo dos últimos anos, os requisitos funcionais de sistemas compostos por software registaram um aumento extensivo, devido ao avanço de várias tecnologias usadas em dispositivos. Num mundo cada vez mais competitivo, o nível de procura para o desenvolvimento de sistemas de gestão mais eficientes com o objetivo de garantir vantagem competitiva também aumentou. De forma a competir em mercados exigentes, as organizações precisam de adotar estratégias, visando a criação de valor das suas principais funções empresariais de modo a garantir a satisfação dos clientes. A competição pelo mercado exige às organizações que estas procurem alternativas para melhorar as suas metodologias de desenvolvimento. Desta forma, foi organizado o necessário para o desenvolvimento de software embutido no âmbito do desenvolvimento de processos por forma a resolver os métodos atuais, analisando criticamente essas metodologias. Este trabalho foi também desenvolvido em ambiente organizacional, providenciado pela empresa Exatronic. No fim, obtém-se um conjunto de princípios para uma metodologia de desenvolvimento para este tipo de sistemas, com a possibilidade de ser aplicada às atividades da empresa.
Over the past few years, the functional requirements of systems comprised of software have increased extensively, due to the advancement of various technologies used in devices. In an ever increasingly competitive environment, the level of demand for the development of more efficient management systems as a means to achieve high levels of competitive advantage is also increasing. In order to compete in highly unpredictable markets, organizations need to adopt appropriate strategies, aiming at creating value out of their main business functions to guaranty high levels of customer service. Markets competition is driving organizations to find alternatives to improve their development methodologies. The object of study focuses on a topic regarding the methodologies for project development and embedded development necessary to answer customer needs of products and services. The goal is to organize what needs to be done in embedded software development from the standpoint of development process by addressing current methodologies and critically analysing them. This work was also developed in an organizational environment, provided by the organization Exatronic. In the end, principles for a development methodology for this type of systems is obtained, with the possibility to be applied within the organization's activity.
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COLOMBO, LUIGI. "Embedded Strategies for Electromechanical Systems." Doctoral thesis, Università Politecnica delle Marche, 2019. http://hdl.handle.net/11566/263395.
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L’attività di ricerca presentata in questa tesi riguarda la progettazione e lo sviluppo di soluzioni embedded per processi elettromeccanici al fine di ottenere prestazioni di controllo ottimizzate. In dettaglio, il motore rotante sincrono a magneti permanenti e il motore lineare piezoelettrico sono i processi che sono stati studiati e approfonditi in questa tesi. Per il primo processo è stata sviluppata una tecnica “sensorless” senza l’ausilio di trasduttori meccanici. Un controllo di tipo Sliding Mode, tecnica basata su modello, è stato progettato combinando un nuovo approccio che determina l’incertezza dei parametri del modello, i.e. la resistenza statorica e la condizione iniziale di uno stato non misurato, i.e. la posizione angolare del rotore.
Quindi è stata impiegata una tecnica di controllo ottimale per ottimizzare il comportamento del motore piezoelettrico. A tale scopo è stato utilizzato il controllo LQG basato su un modello numerico identificato, al fine di aumentare le prestazioni dell’intero sistema. Seguendo l’idea del Reference Governor, il controller LQG regola un sistema PA pre-compensato che manipola i segnali di riferimento.
Negli ultimi anni sono stati compiuti notevoli progressi in riguardo alle tecniche di controllo non lineare robuste, come il controllo adattivo, il controllo basato sull’approccio geometrico, il controllo di tipo backstepping e sliding, ad esempio, che tengono conto delle incertezze nella fase di sintesi, e che garantiscono il raggiungimento dell’obbiettivo di controllo dinanzi a errori di modellazione. La tecnica di controllo Sliding è generalmente conosciuta per la sua robustezza, ma il cosiddetto “fenomeno del chattering” ha dato origine a un certo scetticismo su tale approccio. Al giorno d’oggi, queste strategie di controllo sono implementabili con la disponibilità di potenti microprocessori a basso costo.The research activity presented in this thesis concerns the design and development of embedded solutions for electromechanical processes in order to obtain optimised control performances. In detail, the rotary permanent magnets synchronous motor and the linear piezoelectric motor are the processes that have been studied and deepened in this thesis. For the first process, a “sensorless” technique has been developed, without the aid of mechanical transducers. A sliding mode control, model base technique, has been designed combining a new approach which determines the parameter uncertainty of the model, i.e. the stator resistance, and the initial condition of an unmeasured state, i.e. the angular position of the rotor. Then an optimal control technique has been employed to optimise the behaviour of the piezoelectric motor. To this purpose, the Linear Quadratic Gaussian (LQG) control based on a numerically identified model has been used with a view to increasing the performances of the overall system. Following the idea of Reference Governor, the LQG controller regulates a pre-compensated Piezoelectric Actuator (PA) system manipulating the reference signals. In recent years, considerable progress have been made in robust nonlinear control techniques, such as non-linear adaptive control, control based on the geometric approach, the backstepping and sliding mode control for instance, which take into account the uncertainties in the synthesis phase, ensuring the achievement of the objective control in the face of modelling errors. The sliding control technique is generally recognised as very robust, but the so-called “chattering phenomenon” has given rise to a certain scepticism on this approach. Nowadays, the control strategies are implementable with the availability of powerful low-cost microprocessors.
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Vallius, T. (Tero). "An embedded object approach to embedded system development." Doctoral thesis, University of Oulu, 2009. http://urn.fi/urn:isbn:9789514292941.
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Building an embedded system from an idea to a product is a slow and expensive process requiring a lot of expertise. Depending on the developer’s expertise, the required quantity and price level of the final product, and the time and money available for development, the developer can build a device from different granularity of components, ranging from ready-made platforms, kits, and modules to individual components. Generally, solutions requiring less expertise, time and money produce products with higher production costs.
The main contribution of this thesis is the EOC (Embedded Object Concept) and Atomi II Framework. EOC utilizes common object-oriented methods used in software by applying them to small electronic modules, which create complete functional entities. The conceptual idea of the embedded objects is implemented with the Atomi II framework, which contains several techniques for making the EOC a commercially feasible implementation.
The EOC and the Atomi II Framework decreases the difficulty level of making embedded systems by enabling a use of ready-made modules to build systems. It enables automatic conversion of a device made from such modules into an integrated PCB, lowering production costs compared to other modular approaches. Furthermore, it also enables an automatic production tester generation due to its modularity. These properties lower the number of skills required for building an embedded system and quicken the path from an idea to a commercially applicable device. A developer can also build custom modules of his own if he possesses the required expertise.
The test cases demonstrate the Atomi II Framework techniques in real world applications, and demonstrate the capabilities of Atomi objects. According to our test cases and estimations, an Atomi based device becomes approximately 10% more expensive than a device built from individual components, but saves up to 50% time, making it feasible to manufacture up to 10-50k quantities with this approach.
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Dunkels, Adam. "Programming Memory-Constrained Networked Embedded Systems. PhD thesis." Doctoral thesis, Västerås : Department of Computer Science and Electronics, Mälardalen University, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-173.
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Tomiyama, Hiroyuki, Shinya Honda, and Hiroaki Takada. "Real-Time Operating Systems for Multicore Embedded Systems." IEEE, 2008. http://hdl.handle.net/2237/12100.
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Sundmark, Daniel. "Structural System-Level Testing of Embedded Real-Time Systems." Doctoral thesis, Västerås : School of Innovation, Design and Engineering, Mälardalen University, 2008. http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-488.
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Cortés, Luis Alejandro. "A Petri Net based Modeling and Verification Technique for Real-Time Embedded Systems." Licentiate thesis, Linköping University, Linköping University, ESLAB - Embedded Systems Laboratory, 2001. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-5751.
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Embedded systems are used in a wide spectrum of applications ranging from home appliances and mobile devices to medical equipment and vehicle controllers. They are typically characterized by their real-time behavior and many of them must fulfill strict requirements on reliability and correctness.
In this thesis, we concentrate on aspects related to modeling and formal verification of realtime embedded systems.
First, we define a formal model of computation for real-time embedded systems based on Petri nets. Our model can capture important features of such systems and allows their representations at different levels of granularity. Our modeling formalism has a welldefined semantics so that it supports a precise representation of the system, the use of formal methods to verify its correctness, and the automation of different tasks along the design process.
Second, we propose an approach to the problem of formal verification of real-time embedded systems represented in our modeling formalism. We make use of model checking to prove whether certain properties, expressed as temporal logic formulas, hold with respect to the system model. We introduce a systematic procedure to translate our model into timed automata so that it is possible to use available model checking ools. Various examples, including a realistic industrial case, demonstrate the feasibility of our approach on practical applications.
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Martinsson, Albin Martinsson. "Embedded IoT for Eclipse Arrowhead." Thesis, Luleå tekniska universitet, Institutionen för system- och rymdteknik, 2021. http://urn.kb.se/resolve?urn=urn:nbn:se:ltu:diva-85910.
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This thesis investigates the possibility of connecting an embedded device, STM32 B-L4S5I-IOT01A IoT discovery node, to a Eclipse Arrowhead framework local cloud.This thesis also examines the benefits of using the Eclipse Arrowhead framework compared to its competitors Amazon Web Services and Microsoft Azure. The world is entering a new industrial revolution, often referred to as Industry 4.0, moving towards a more decentralized and software-oriented means of production.This fourth industrial revolution incorporates System of Systems, Cyber-Physical Systems, and embedded software technologies. One of the internet-based industrial solutions is the Eclipse Arrowhead framework. The Eclipse Arrowhead framework contains many examples in various promgramming languages and technologies but lacks an example of a specific piece of hardware connecting to a local Eclipse Arrowhead cloud.Therefore, a project with the clear intent to showcase both the capabilities and possibilities of Cyber-Physical systems and the Eclipse Arrowhead framework is needed. The system this thesis implements consists of three major parts: the stm32 board, a Python flask app, and the Eclipse Arrowhead framework.The main objective of the Eclipse Arrowhead framework is to connect the consumer and the provider in a safe and structured way.The provider is built with C/C++ using ARMs' mbed os. The response time of the different frameworks, Eclipse Arrowhead framework and Amazon Web Services, was measured.We made a thousand attempts to form an adequate basis for an average response time. In addition to presenting the average response time, we calculated the maximum and minimum response times to understand the different frameworks' performance further. The thesis shows some benefits in response time when running an Eclipse Arrowhead framework local cloud instead of using a remote service such as Amazon Web Services. Average response time decreased by 17.5 times while running an Eclipse Arrowhead framework local cloud.Maximum and minimum response times decreased by 1.9 and 134 times, respectively.
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Wiklander, Jimmie. "Component-based software design of embedded real-time systems." Licentiate thesis, Luleå : Luleå University of Technology, 2009. http://pure.ltu.se/ws/fbspretrieve/3318285.
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Larses, Ola. "Architecting and Modeling Automotive Embedded Systems." Doctoral thesis, Stockholm, 2005. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-543.
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Eisenbarth, Thomas. "Cryptography and cryptanalysis for embedded systems." Berlin Bochum Dülmen London Paris Europ. Univ.-Verl, 2009. http://d-nb.info/1000474909/04.
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Mack, Raphael. "Modeling and verifying embedded operating systems." Zürich : ETH, Eidgenössische Technische Hochschule Zürich, Institut für Computersysteme, 2008. http://e-collection.ethbib.ethz.ch/show?type=dipl&nr=367.
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Ispir, Mustafa. "Test Driven Development Of Embedded Systems." Master's thesis, METU, 2004. http://etd.lib.metu.edu.tr/upload/12605630/index.pdf.
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In this thesis, the Test Driven Development method (TDD) is studied for use in developing embedded software. The required framework is written for the development environment Rhapsody.
Integration of TDD into a classical development cycle, without necessitating a transition to agile methodologies of software development and required unit test framework to apply TDD to an object oriented embedded software development project with a specific development environment and specific project conditions are done in this thesis. A software tool for unit testing is developed specifically for this purpose, both to support the proposed approach and to illustrate its application.
The results show that RhapUnit supplies the required testing functionality for developing embedded software in Rhapsody with TDD. Also, development of RhapUnit is a successful example of the application of TDD.
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Söldner, Constantin, Frank Danzinger, Angela Roth, and Kathrin Möslein. "Open Innovation by Opening Embedded Systems." Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2012. http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-100980.
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1 INTRODUCTION
With the increasing capabilities of today’s smart phones, the demand of consumers for new applications has risen dramatically. By opening up these smart phones and providing third parties the opportunity to develop “apps” for their systems, producers like Apple and platform owners like Google can offer much more value to their customers. As smart phones are one kind of embedded systems (ES), the question arises if similar development can also take place in other kinds of embedded systems. ES, consisting of hardware and software, are embedded in a device to realize a specific function, in contrast to personal computers, which serve multiple purposes [4,30]. The notion of incorporating external actors in the innovation process has been coined open innovation which has become increasingly popular in research and practice since Chesbrough introduced the term in 2003 [12]. By opening up their innovation processes for external actors, firms could benefit from internal as well as from external ideas. In this paper, the notion of open innovation will be explored in the context of ES. The case of ES is particularly interesting, as it requires not only the opening of innovation processes, but also the opening of the embedded system itself. Some of these platforms are opened only to a small degree like Apple’s iPhone, in order to enable others to create new applications for it. Similar developments also take place for example in the automotive software domain, especially concerning infotainment systems. However, most kinds of ES have been spared out by this development until now. As more than 98% of all chips manufactured are used for ES [10] and high-performing computer chips are getting cheaper [38], opening considerations could also prove valuable for a large number of other application domains. However, opening up innovation processes in the context of ES is challenging from both an organizational and technical perspective. First of all, embedded systems are subject to a variety of constraints in contrast to multi-purpose computing devices, like realtime and security constraints or costs and resource constraints. Second, ES are quite diverse both in their composition and in terms on their requirements. In this paper, we want to explore, how the different properties of embedded systems influence possible open innovation processes. This will be done by drawing on to the characteristics of firms implementing the three core open innovation processes suggested by Gassmann and Enkel (2004) [15] and conceptually explaining how the characteristics of ES enable or hinder open innovation processes. As a result, a classification of the OI processes in terms of ES characteristics is provided.
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Taušan, N. (Nebojša). "Choreography modeling in embedded systems domain." Doctoral thesis, Oulun yliopisto, 2016. http://urn.fi/urn:isbn:9789526214573.
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Abstract Choreography modelling, as a service-oriented architecture specific technique, is increasingly present in embedded systems development domain. This technique specifies a flow of interactions between participants' services from the global or neutral point of view while the specified models represent an integral part of the overall software architecture. Choreography modelling languages that are currently used in embedded systems domain, however, are not expressive enough to capture the choreography-relevant information in this domain. For this reason, choreography specifications are often lacking information or include ambiguous information. This allows misinterpretation of the specified choreography models and leads to difficulties in communication among stakeholders that use those models. The objective of this research is to advance the design of choreography modelling languages by identifying the information content that is relevant in embedded systems domain and by designing a choreography modelling language that supports that information content. To achieve this objective, this research adopted the design science research framework and five individual studies were conducted within this framework. These studies used methods such as the interviews with practitioners, company specific documents and open standards to understand the challenges in industry, systematic literature review to collect the existing scientific knowledge about the utilization of choreography in embedded systems and the focus groups to evaluate the designed language. Based on these study results, the information content that is relevant for choreography modelling in embedded systems domain was identified and then supported with the design of choreography modelling language. The design of the choreography modelling language is evaluated in academic and industry context. The evaluation in academic context is realized by language implementation while the evaluation in industry is realized with industry experts. Language evaluation showed increased expressiveness of the designed language and indicated on possible benefits from its use in testing and protocol development area. These benefits include the reduction of development time and errors in the testing phase while the reduction of maintenance burden and performance improvement can be expected in the protocol development areaTiivistelmä Koreografinen mallintaminen on enenevässä määrin käytetty tekniikka sulautettujen järjestelmien palvelukeskeisten arkkitehtuurien määrittelyssä. Tämän mallintamisen avulla pystytään määrittämään palveluiden ja osallistujien välisten vuorovaikutusten virtaa globaalilla tasolla kun taas määritellyt mallit kuvaavat ohjelmistoarkkitehtuurin keskeisiä osakokonaisuuksia. Tällä hetkellä sulautettujen järjestelmien koreografiseen mallintamiseen käytetyt kielet eivät ole tarpeeksi ilmaisuvoimaisia kattaakseen alalla tarvittavien mallien oleelliset tietosisällöt. Tästä syystä koreografiamalleista puuttuu usein oleellisia tietoja tai tietosisällöt eivät ole yksiselitteisiä. Tämä johtaa koreografiamallien tietosisältöjen virheelliseen tulkintaan, joka taas aiheuttaa haasteita malleja hyödyntävien sidosryhmien välisessä vuorovaikutuksessa. Tämän tutkimuksen tavoitteena on edistää koreografiamallinnuksessa käytettävien kielten suunnittelua tunnistamalla ne tietosisällöt, jotka ovat oleellisia sulautetuille järjestelmille sekä suunnitella kieli, joka tukee oleellisia tietosisältöjä. Tavoitteen saavuttamiseksi sovellettiin "design science" (suunnittelun tutkimus) tutkimusmenetelmää, jolla toteutettiin viisi tapaustutkimusta. Näissä tutkimuksissa hyödynnettiin teollisuuden asiantuntijoiden haastatteluita, yrityskohtaisia dokumentteja ja avoimia standardeja, joiden avulla pystyttiin ymmärtämään teollisuuden kohtaamia haasteita tutkimusalueella. Systemaattisen kirjallisuuskatsauksen avulla kerättiin yhteen olemassa oleva tieteellinen tietämys koreografian käytöstä sulautetuissa järjestelmissä. Kehitetyn kielen sopivuutta teolliseen tuotekehitykseen arvioitiin asiantuntiaryhmille järjestetyissä työpajoissa. Saatujen tutkimustulosten valossa koreografiamallinnuksessa tarvittavat oleelliset tietosisällöt sulautettujen järjestelmien alueella pystyttiin määrittämään sekä kehittämään tietosisältöä tukeva koreografian mallinnuskieli. Kehitetty mallinnuskieli on arvioitu akateemisessa kontekstissa toteuttamalla koreografian mallinnuskieli. Teollisessa ympäristössä arvioinnin ovat suorittaneet teollisuuden asiantuntijat. Arviointien tuloksena voidaan todeta, että kehitetyllä mallinnuskielellä on parempi ilmaisuvoima kuin aiemmin käytössä olleilla kielillä. Lisäksi saatiin viitteitä kielen soveltuvuudesta testauksessa ja protokollien kehityksessä. Kieltä soveltamalla saavutettiin lyhempi kehitysaika ja vähennettiin virheitä testausvaiheessa. Lisäksi protokollan kehityksen osuudessa oletetaan ylläpidon kuormittavuuden vähenevän ja suorituskyvyn paranevan
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Mårdsjö, Jon. "Security concerns regarding connected embedded systems." Thesis, Linköpings universitet, Databas och informationsteknik, 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-92755.
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Embedded systems have been present in our daily lives for some time, but trends clearly show a rise in inter-connectivity in such devices. This presents promising new applications and possibilities, but also opens up a lot attack surface. Our goal in this thesis is to find out how you can develop such interconnected embedded systems in a way that guarantees the three major components of information security: Confidentialy, Integrity and Availability. The main focus of security is networked security. In this thesis, a dual approach is taken: investigate the development process of building secure systems, and perform such an implementation. The artifacts produced as byproducts, the software itself, deployment instructions and lessons learned are all presented. It is shown that the process used helps businesses find a somewhat deterministic approach to security, have a higher level of confidence, helps justify the costs that security work entails and helps in seeing security as a business decision. Embedded systems were also shown to present unforeseen obstacles, such as how the lack of a motherboard battery clashes with X.509. In the end, a discussion is made about how far the system can guarantee information security, what problems still exist and what could be done to mitigate them.
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Kasinathan, Gokulnath. "Data Transformation Trajectories in Embedded Systems." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-205276.
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Mobile phone tracking is the ascertaining of the position or location of a mobile phone when moving from one place to another place. Location Based Services Solutions include Mobile positioning system that can be used for a wide array of consumer-demand services like search, mapping, navigation, road transport traffic management and emergency-call positioning. The Mobile Positioning System (MPS) supports complementary positioning methods for 2G, 3G and 4G/LTE (Long Term Evolution) networks. Mobile phone is popularly known as an UE (User Equipment) in LTE. A prototype method of live trajectory estimation for massive UE in LTE network has been proposed in this thesis work. RSRP (Reference Signal Received Power) values and TA(Timing Advance) values are part of LTE events for UE. These specific LTE events can be streamed to a system from eNodeB of LTE in real time by activating measurements on UEs in the network. AoA (Angle of Arrival) and TA values are used to estimate the UE position. AoA calculation is performed using RSRP values. The calculated UE positions are filtered using Particle Filter(PF) to estimate trajectory. To obtain live trajectory estimation for massive UEs, the LTE event streamer is modelled to produce several task units with events data for massive UEs. The task level modelled data structures are scheduled across Arm Cortex A15 based MPcore, with multiple threads. Finally, with massive UE live trajectory estimation, IMSI (International mobile subscriber identity) is used to maintain hidden markov requirements of particle filter functionality while maintaining load balance for 4 Arm A15 cores. This is proved by serial and parallel performance engineering. Future work is proposed for Decentralized task level scheduling with hash function for IMSI with extension of cores and Concentric circles method for AoA accuracy.Mobiltelefoners positionering är välfungerande för positionslokalisering av mobiltelefoner när de rör sig från en plats till en annan. Lokaliseringstjänsterna inkluderar mobil positionering system som kan användas till en mängd olika kundbehovs tjänster som sökning av position, position i kartor, navigering, vägtransporters trafik managering och nödsituationssamtal med positionering. Mobil positions system (MPS) stödjer komplementär positions metoder för 2G, 3G och 4G/LTE (Long Term Evolution) nätverk. Mobiltelefoner är populärt känd som UE (User Equipment) inom LTE. En prototypmetod med verkliga rörelsers estimering för massiv UE i LTE nätverk har blivit föreslagen för detta examens arbete. RSRP (Reference Signal Received Power) värden och TA (Timing Advance) värden är del av LTE händelser för UE. Dessa specifika LTE event kan strömmas till ett system från eNodeB del av LTE, i realtid genom aktivering av mätningar på UEar i nätverk. AoA (Angel of Arrival) och TA värden är använt för att beräkna UEs position. AoA beräkningar är genomförda genom användandet av RSRP värden. Den kalkylerade UE positionen är filtrerad genom användande av Particle Filter (PF) för att estimera rörelsen. För att identifiera verkliga rörelser, beräkningar för massiva UEs, LTE event streamer är modulerad att producera flera uppgifts enheter med event data från massiva UEar. De tasks modulerade data strukturerna är planerade över Arm Cortex A15 baserade MPcore, med multipla trådar. Slutligen, med massiva UE verkliga rörelser, beräkningar med IMSI(International mobile subscriber identity) är använt av den Hidden Markov kraven i Particle Filter’s funktionalitet medans kravet att underhålla last balansen för 4 Arm A15 kärnor. Detta är utfört genom seriell och parallell prestanda teknik. Framtida arbeten för decentraliserade task nivå skedulering med hash funktion för IMSI med utökning av kärnor och Concentric circles metod för AoA noggrannhet.
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Tsakiris, Nicholas, and n. tsakiris@internode on net. "Enabling Gigabit IP for Embedded Systems." Flinders University. Computer Science, Engineering and Mathematics, 2009. http://catalogue.flinders.edu.au./local/adt/public/adt-SFU20090913.204821.
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For any practical implementation of chip design, there needs to be a hardware platform available for the purpose of prototyping and implementation of FPGA-based programs, whether they are written in VHDL or Verilog. Communication between the platform and a computer is a useful feature of many hardware solutions as it allows for the capability of regular data transmission between the two devices. Furthermore, the ability to communicate between the platform and a computer at high-speeds requires a specially constructed interface, one that can be modified by the designer at their choosing.
There are a number of commercial packages which provide a hardware platform to perform this task, however there are drawbacks to many of the available options. Some may require special hardware to connect to a computer using proprietary connectors or boards, which increases the cost and reduces the flexibility of any solution. Other options may have limited access to the internal structure of the interface, limiting the ability of the developer to modify the interface to suit their needs. There may be an extra cost to provide the code to the interface, separate from the board, which can also tax design budgets.
This dissertation provides a solution in the form of a Gigabit Ethernet connection with a custom IP/network layer written in VHDL to facilitate the connection. With an increasing number of IP-enabled devices available such as IPTV and set top boxes, the ability to link hardware using Ethernet is very useful and so the development of a lean and capable network layer was considered a suitable focus for the project. The overall goal has been to provide an interface which is cheap, open, robust and efficient, retaining the flexibility a developer might require to modify the code to their needs.
After covering some basic background information about the project, the dissertation looks at the requirements of the board and interface, as well as the alternative interface solutions which were looked at before deciding on Gigabit Ethernet. The protocols used in Ethernet are then covered, with both an explanation of the structure of each and their relevance to the implementation. The Finite State Machines which control operation of the interface are covered in depth, with an explanation of their inter-connectivity to each other and how they fit in the data-flow between the computer and the board. Error correction and reliability is discussed, as well as any remaining components critical to the operation of the interface.
Pipelining, the method of design which provides the speed required for Gigabit Ethernet, is covered along with the extra speed optimisation techniques used in the design such as RAM swinging buffers. Testing and synthesis are covered which ensure the design is as robust as possible, both in simulations and in real-world applications. The final design was implemented on a Xilinx Spartan 3 FPGA (XC3S5000-5FG900C) and capable of a maximum speed of 128.287 MHz, which is more than enough to satisfy the requirements of Gigabit Ethernet under a variety of network conditions. The interface code occupies 1,166 slices of logic on the FPGA (3% of the total amount of logic available), making it sufficiently compact to run large projects on the same chip. The core was tested on physical hardware and performed correctly at real line Gigabit speeds. Configuration of the computer along with the method of connecting to the board and transferring data is mentioned, with explanation of the code run on the computer to make this possible. Finally, the dissertation provides an example application through the use of JPEG2000 image compression/decompression.
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Biteus, Jonas. "Fault Isolation in Distributed Embedded Systems." Doctoral thesis, Linköping : Vehicular Systems, Department of Electrical Engineering, Linköpings universitet, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-8774.
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Kim, Jeongwook. "Genetic algorithms for smart embedded systems." Diss., Georgia Institute of Technology, 2001. http://hdl.handle.net/1853/13886.
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Finney, James. "Autocoding methods for networked embedded systems." Thesis, University of Warwick, 2009. http://wrap.warwick.ac.uk/36892/.
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The volume and complexity of software is increasing; presenting developers with an ever increasing challenge to deliver a system within the agreed timescale and budget [1]. With the use of Computer-Aided Software Engineering (CASE) tools for requirements management, component design, and software validation the risks to the project can be reduced. This project focuses on Autocoding CASE tools, the methods used by such tools to generate the code, and the features these tools provide the user. The Extensible Stylesheet Language Transformation (XSLT) based autocoding method used by Rapicore in their NetGen embedded network design tool was known to have a number of issues and limitations. The aim of the research was to identify these issues and develop an innovative solution that would support current and future autocoding requirements. Using the literature review and a number of practical projects, the issues with the XSLT-based method were identified. These issues were used to define the requirements with which a more appropriate autocoding method was researched and developed. A more powerful language was researched and selected, and with this language a prototype autocoding platform was designed, developed, validated, and evaluated. The work concludes that the innovative use and integration of programmer-level Extensible Markup Language (XML) code descriptions and PHP scripting has provided Rapicore with a powerful and flexible autocoding platform to support current and future autocoding application requirements of any size and complexity.
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Choy, Kum Wah. "Blackboard architecture for intelligent embedded systems." Thesis, Nottingham Trent University, 2005. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.429255.
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It can be argued that the future of machines lies in embedding intelligent systems within them. Unfortunately, sophisticated artificial intelligence (AI) software is usually large and complicated, requiring powerful processors that are not practical in most embedded systems owing to cost, size, and heat production. One solution is to distribute the intelligent processing across many less powerful processors. This research has investigated the suitability, characteristics, and potential of a distributed blackboard system as an· architecture for the implementation of complex AI software in an embedded distributed processing network. A distributed blackboard system called DARBS (Distributed Algorithmic and Rule-based Blackboard System) has been implemented on a distributed processing network comprising up to 18 personal computers. Using the TileWorld environment as a test-bed, the distributed set-up was found to outperform a non-distributed one, although both were non-optimal. The speedup factor of the distributed blackboard system increases up to a maximum as the number of agent processors (APs) increases, after which it drops a little and levels off. To obtain maximum speedup for a given number of agents, it was found that an even distribution of agents across the APs is required, while avoiding saturation of the blackboard. The optimum number of agents per AP was found to be two, with blackboard saturation starting at eight APs. Based on these findings, an embedded version of DARBS (called emDARBS) was designed and implemented on a SARNet parallel processing network of low-cost StrongARM processors. This implementation has demonstrated that a distributed blackboard system is suitable for embedded distributed processing networks, but that some changes are required to tailor it for embedded systems. The potential for embedding intelligent systems in everyday machines has thus been demonstrated.
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Koltes, Andreas. "Reconfigurable memory systems for embedded microprocessors." Thesis, University of Cambridge, 2015. https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.709244.
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Thomas, Sam Lloyd. "Backdoor detection systems for embedded devices." Thesis, University of Birmingham, 2018. http://etheses.bham.ac.uk//id/eprint/8365/.
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A system is said to contain a backdoor when it intentionally includes a means to trigger the execution of functionality that serves to subvert its expected security. Unfortunately, such constructs are pervasive in software and systems today, particularly in the firmware of commodity embedded systems and “Internet of Things” devices. The work presented in this thesis concerns itself with the problem of detecting backdoor-like constructs, specifically those present in embedded device firmware, which, as we show, presents additional challenges in devising detection methodologies. The term “backdoor”, while used throughout the academic literature, by industry, and in the media, lacks a rigorous definition, which exacerbates the challenges in their detection. To this end, we present such a definition, as well as a framework, which serves as a basis for their discovery, devising new detection techniques and evaluating the current state-of-the-art. Further, we present two backdoor detection methodologies, as well as corresponding tools which implement those approaches. Both of these methods serve to automate many of the currently manual aspects of backdoor identification and discovery. And, in both cases, we demonstrate that our approaches are capable of analysing device firmware at scale and can be used to discover previously undocumented real-world backdoors.
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Galbraith, Megan Lee 1979. "Embedded systems for computational garment design." Thesis, Massachusetts Institute of Technology, 2003. http://hdl.handle.net/1721.1/61136.
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Thesis (S.M.)--Massachusetts Institute of Technology, School of Architecture and Planning, Program in Media Arts and Sciences, 2003.Includes bibliographical references (leaves [109]-111).
In an age where identity is increasingly fluid and multifaceted, the static clothing and unresponsive materials we wear are often an insufficient means of expression. Clothing designers want to create systems of clothing that react, collect information, and enrich our interactions with spaces and people; however, technical barriers inhibit designers interested in building computational garments. Designers need a tool that is attainable and usable in order to successfully work in the field of computational garment design. This thesis introduces a powerful, intuitive tool named Zuf which provides a new approach to control embedded devices using fuzzy logic. Zuf is a prototyping and simulation environment for programming and testing embedded devices. Users write code by establishing simple, natural language rules. The rules are translated into fuzzy algorithms which run on the devices. Zuf enables fashion designers to think abstractly about computation as a medium.
Megan Lee Galbraith.
S.M.
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Ackerman, M. C. (Marthinus Casper). "Kernel support for embedded reactive systems." Thesis, Stellenbosch : Stellenbosch University, 1993. http://hdl.handle.net/10019.1/58022.
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Thesis (MSc)--Stellenbosch University , 1993.ENGLISH ABSTRACT: Reactive systems are event driven state machines which usually do not terminate, but remain in perpetual interaction with their environment. Such systems usually interact 'With devices which introduce a high degree of concurrency and some real time constraints to the system. Because of the concurrent nature of reactive systems they are commonly implemented as communicating concurrent processes on one or more processors. Jeffay introduces a design paradigm which requires consumer processes to consume messages faster than they are produced by producer processes. If this is guaranteed, the real time constraints of such .. system are always met, and the correctness of the process interaction is guaranteed in terms of the message passing semantics. I developed the ESE kernel, which supports Jeffay systems by providing lightweight processes which communicate over asynchronous channels. Processes are scheduled non-preemptively according to the earliest deadline first policy when they have messages pending on their input channels. The Jeffay design method and the ESE kernel have been found to be highly suitable to implement embedded reactive systems. The general requirements of embedded reactive systems, and kernel support required by such systems, are discussed.
AFRIKAANSE OPSOMMING: Reaktiewe stelsels is toeatandsoutomate wat aangedryf word deur gebeure in hul omgewins. So 'n stelsel termineer gewoonlik nie, maar bly in 'n voortdurende wisselwerking met toestelle in sy omgewing. Toestelle in die omgewing van 'n reaktiewe stelsel veroorsaak in die algemeen 'n hoë mate van gelyklopendheid in die stelsel, en plaas gewoonlik sekere intydse beperkings op die stelsel. Gelyklopende stelsels word gewoonlik as stelsel. van kommunikerende prosesse geïmplementeer op een of meer prosessors. Jeffay beskryf 'n ontwerpsmetodologie waarvolgens die ontvanger van boodskappe hulle vinniger moet verwerk as wat die sender hulle kan stuur. Indien hierdie gedrag tussen alle pare kommunikerende prosesse gewaarborg kan word, sal die stelsel altyd sy intydse beperkings gehoorsaam, en word die korrektheid van interaksies tussen prosesse deur die semantiek van die boodskapwisseling gewaarborg. Die "ESE" bedryfstelselkern wat ek ontwikkel het, ondersteun stelsels wat ontwerp en geïmplementeer word volgens Jeffay se metode. Prosesse kommunikeer oor asinkrone kanale, en die ontvanger van die boodskap met die vroegste keertyd word altyd eerste geskeduleer. Jeffay se ontwerpsmetode en die "ESE" kern blyk in die praktyk baie geskik te wees vir reaktiewe stelsels wat as substelsels van groter stelsels uitvoer. Die vereistes van reaktiewe substelsels, en die kemondersteuning wat daarvoor nodig is, word bespreek.
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Tuliniemi, J. (Jere). "Physically based rendering for embedded systems." Master's thesis, University of Oulu, 2018. http://urn.fi/URN:NBN:fi:oulu-201805101776.
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Physically Based Rendering (PBR) is a mainstay of offline and real-time rendering. The principles behind it were first implemented in offline renderers due to processing time not being an issue. Subsequently, real-time rendering began using the same principles especially in the medium of games. Transferring the methods to a real-time environment has led to increasing number of compromises in the physicality, but the principles remain the same. Some of the main goals include adherence to empirically measured reflectances that, among other issues, conserve light energy realistically. With industries such as automotive manufacturers wanting to incorporate modern rendering techniques to their products, there is a need to investigate how such techniques perform in low-end devices. This thesis tests PBR in different devices, from low-end to high-end, to determine the specific performance impacts of PBR. The implementation of PBR presented in this thesis is portable to different hardware platforms and provides approximately the same results in each device. PBR, as it is implemented in modern game engines, impacts the performance significantly. However, there are methodology components that can be applied to rendering pipelines with minimal costFysiikkaperusteinen renderöinti (PBR) on offline- ja reaaliaikaisen renderöinnin tärkeä osa. Sen takana olevat periaatteet otettiin ensin käyttöön offline-renderöinnissä eli elokuvagrafiikassa, koska siinä käsittelyaika ei ole ongelma. Reaaliaikaisessa renderöinnissä, etenkin peleissä, on alettu käyttämään samoja periaatteita. Menetelmien siirtäminen reaaliaikaiseen ympäristöön on lisännyt fyysisyyteen liittyviä kompromisseja, mutta periaatteet ovat pysyneet samoina. Päätavoitteena PBR:ssä on valon heijastumisen empiirisesti mitattujen seurauksien noudattaminen. Yksi tälläinen seuraus on muun muassa valon energian säilyvyys. Teollisuudenaloilla, kuten autoteollisuudessa, valmistajat haluavat sisällyttää tuotteisiinsa nykyaikaista renderöintitekniikkaa. Tämä luo tarpeen selvittää, miten tällaiset tekniikat toimivat resurssiköyhissä laitteissa. Tämä diplomityö testaa PBR:n toteutusta eri laitteissa, pienitehoisesta suurempitehoiseen, PBR:lle erityisien suorituskykyvaikutusten määrittämiseksi. Tässä diplomityössä esitettävä, testaukseen tarkoitettu, PBR:n toteutus on siirrettävissä eri laitteistoalustoille ja se tuottaa suunnilleen samat visuaaliset tulokset kussakin laitteessa. PBR, joka on toteutettu samalla tavalla kuin nykyaikaisissa pelimoottoreissa, vaikuttaa suorituskykyyn merkittävästi sulautetuissa järjestelmissä. PBR sisältää kuitenkin komponentteja, joita voidaan käyttää renderöintiin ilman suuria tehovaatimuksia
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Freitas, Tiago Fernando Alves de. "Agile practices in embedded systems development." Master's thesis, Universidade de Aveiro, 2015. http://hdl.handle.net/10773/18569.
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Mestrado em Engenharia de Computadores e TelemáticaAs metodologias ágeis ganharam popularidade depois de um grupo de profissionais em diferentes métodos de desenvolvimento se juntar e criar um manifesto ágil. Estas metodologias foram criadas com o intuito de melhorar a forma de desenvolver software, tendo como foco principal a satisfação do cliente. Cada vez mais estão a ser usadas em diversos projetos substituindo a abordagem mais tradicional que atualmente ainda está muito presente. Por exemplo, Waterfall é uma metodologia tradicional onde todo o desenvolvimento é planeado deixando pouco espaço para alterações por parte do cliente. O interesse das empresas nestas metodologias tem aumentado. As empresas querem saber mais sobre esta nova forma de desenvolvimento e quais as vantagens que estas vão ter comparando com o seu atual método de desenvolvimento, que geralmente é um método tradicional. A aplicação de metodologias ágeis na área de programação para sistemas embutidos é diferente dos sistemas de informação. O desenvolvimento deste tipo de sistemas tem de ter em conta a parte do hardware e software. No contexto da empresa Exatronic, esta dissertação tem como objetivo investigar a abordagem ágil de forma a recomendar práticas que podem ser adaptadas por esta empresa e com elas obter melhores resultados. A empresa disponibilizou um projeto já terminado para as praticas escolhidas serem aplicadas e simuladas, tendo em conta a plataforma de desenvolvimento Atmel Studio e tipo de processadores Atmel usados pela empresa. As práticas recomendadas foram duas, integração contínua e desenvolvimento orientado por testes, pois são as únicas onde é possível criar um ambiente para a sua utilização e simulação. Por fim, são analisadas as vantagens do uso destas praticas no projeto da empresa.
Agile methodologies gained popularity after a group of professionals in different development methods join and create an agile manifesto. These methodologies were created in order to improve the way to develop software, focusing mainly on customer satisfaction. They are increasingly being used in several projects, replacing the more traditional approach currently very present. For example, Waterfall is a traditional approach in which all development is planned, leaving little space for customer changes. The interest of companies in these methodologies has increased. Companies want to know more about this new way of development and what advantages they will have compared to their current development method, which is usually a traditional one. The application of agile methodologies in embedded systems is different from the informational systems. The development of such systems has to take into account the part of hardware and software. In the context of Exatronic company, this dissertation aims to investigate the agile approach in order to recommend practices that could be adapted in the company. Exatronic provided a finished project for the selected practices be implemented and simulated, taking into account the Atmel Studio development platform and the Atmel processors used by the company. The recommended practices were two, continuous integration and test driven development, because they are the only ones where is possible to create an environment for its use and simulation.
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Holzmann, Clemens. "Spatial awareness of autonomous embedded systems." Wiesbaden Vieweg + Teubner, 2008. http://d-nb.info/992304865/04.
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Vasapollo, Marco. "Model driven design for embedded systems." Master's thesis, Alma Mater Studiorum - Università di Bologna, 2014. http://amslaurea.unibo.it/6529/.
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Diarra, Rokiatou. "Automatic Parallelization for Heterogeneous Embedded Systems." Thesis, Université Paris-Saclay (ComUE), 2019. http://www.theses.fr/2019SACLS485.
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L'utilisation d'architectures hétérogènes, combinant des processeurs multicoeurs avec des accélérateurs tels que les GPU, FPGA et Intel Xeon Phi, a augmenté ces dernières années. Les GPUs peuvent atteindre des performances significatives pour certaines catégories d'applications. Néanmoins, pour atteindre ces performances avec des API de bas niveau comme CUDA et OpenCL, il est nécessaire de réécrire le code séquentiel, de bien connaître l’architecture des GPUs et d’appliquer des optimisations complexes, parfois non portables. D'autre part, les modèles de programmation basés sur des directives (par exemple, OpenACC, OpenMP) offrent une abstraction de haut niveau du matériel sous-jacent, simplifiant ainsi la maintenance du code et améliorant la productivité. Ils permettent aux utilisateurs d’accélérer leurs codes séquentiels sur les GPUs en insérant simplement des directives. Les compilateurs d'OpenACC/OpenMP ont la lourde tâche d'appliquer les optimisations nécessaires à partir des directives fournies par l'utilisateur et de générer des codes exploitant efficacement l'architecture sous-jacente. Bien que les compilateurs d'OpenACC/OpenMP soient matures et puissent appliquer certaines optimisations automatiquement, le code généré peut ne pas atteindre l'accélération prévue, car les compilateurs ne disposent pas d'une vue complète de l'ensemble de l'application. Ainsi, il existe généralement un écart de performance important entre les codes accélérés avec OpenACC/OpenMP et ceux optimisés manuellement avec CUDA/OpenCL. Afin d'aider les programmeurs à accélérer efficacement leurs codes séquentiels sur GPU avec les modèles basés sur des directives et à élargir l'impact d'OpenMP/OpenACC dans le monde universitaire et industrielle, cette thèse aborde plusieurs problématiques de recherche. Nous avons étudié les modèles de programmation OpenACC et OpenMP et proposé une méthodologie efficace de parallélisation d'applications avec les approches de programmation basées sur des directives. Notre expérience de portage d'applications a révélé qu'il était insuffisant d'insérer simplement des directives de déchargement OpenMP/OpenACC pour informer le compilateur qu'une région de code particulière devait être compilée pour être exécutée sur la GPU. Il est essentiel de combiner les directives de déchargement avec celles de parallélisation de boucle. Bien que les compilateurs actuels soient matures et effectuent plusieurs optimisations, l'utilisateur peut leur fournir davantage d'informations par le biais des clauses des directives de parallélisation de boucle afin d'obtenir un code mieux optimisé. Nous avons également révélé le défi consistant à choisir le bon nombre de threads devant exécuter une boucle. Le nombre de threads choisi par défaut par le compilateur peut ne pas produire les meilleures performances. L'utilisateur doit donc essayer manuellement différents nombres de threads pour améliorer les performances. Nous démontrons que les modèles de programmation OpenMP et OpenACC peuvent atteindre de meilleures performances avec un effort de programmation moindre, mais les compilateurs OpenMP/OpenACC atteignent rapidement leur limite lorsque le code de région déchargée a une forte intensité arithmétique, nécessite un nombre très élevé d'accès à la mémoire globale et contient plusieurs boucles imbriquées. Dans de tels cas, des langages de bas niveau doivent être utilisés. Nous discutons également du problème d'alias des pointeurs dans les codes GPU et proposons deux outils d'analyse statiques qui permettent d'insérer automatiquement les qualificateurs de type et le remplacement par scalaire dans le code sourceRecent years have seen an increase of heterogeneous architectures combining multi-core CPUs with accelerators such as GPU, FPGA, and Intel Xeon Phi. GPU can achieve significant performance for certain categories of application. Nevertheless, achieving this performance with low-level APIs (e.g. CUDA, OpenCL) requires to rewrite the sequential code, to have a good knowledge of GPU architecture, and to apply complex optimizations that are sometimes not portable. On the other hand, directive-based programming models (e.g. OpenACC, OpenMP) offer a high-level abstraction of the underlying hardware, thus simplifying the code maintenance and improving productivity. They allow users to accelerate their sequential codes on GPU by simply inserting directives. OpenACC/OpenMP compilers have the daunting task of applying the necessary optimizations from the user-provided directives and generating efficient codes that take advantage of the GPU architecture. Although the OpenACC / OpenMP compilers are mature and able to apply some optimizations automatically, the generated code may not achieve the expected speedup as the compilers do not have a full view of the whole application. Thus, there is generally a significant performance gap between the codes accelerated with OpenACC/OpenMP and those hand-optimized with CUDA/OpenCL. To help programmers for speeding up efficiently their legacy sequential codes on GPU with directive-based models and broaden OpenMP/OpenACC impact in both academia and industry, several research issues are discussed in this dissertation. We investigated OpenACC and OpenMP programming models and proposed an effective application parallelization methodology with directive-based programming approaches. Our application porting experience revealed that it is insufficient to simply insert OpenMP/OpenACC offloading directives to inform the compiler that a particular code region must be compiled for GPU execution. It is highly essential to combine offloading directives with loop parallelization constructs. Although current compilers are mature and perform several optimizations, the user may provide them more information through loop parallelization constructs clauses in order to get an optimized code. We have also revealed the challenge of choosing good loop schedules. The default loop schedule chosen by the compiler may not produce the best performance, so the user has to manually try different loop schedules to improve the performance. We demonstrate that OpenMP and OpenACC programming models can achieve best performance with lesser programming effort, but OpenMP/OpenACC compilers quickly reach their limit when the offloaded region code is computed/memory bound and contain several nested loops. In such cases, low-level languages may be used. We also discuss pointers aliasing problem in GPU codes and propose two static analysis tools that perform automatically at source level type qualifier insertion and scalar promotion to solve aliasing issues
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RIZVI, SYED TAHIR HUSSAIN. "Visual Analysis Algorithms for Embedded Systems." Doctoral thesis, Politecnico di Torino, 2018. http://hdl.handle.net/11583/2707423.
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The main contribution of this thesis is the design and development of an optimized framework to realize the deep neural classifiers on the embedded platforms. Deep convolutional networks exhibit unmatched performance in image classification. However, these deep classifiers demand huge computational power and memory storage. That is an issue on embedded devices due to limited onboard resources. The computational demand of neural networks mainly stems from the convolutional layers. A significant improvement in performance can be obtained by reducing the computational complexity of these convolutional layers, making them realizable on embedded platforms.
In this thesis, we proposed a CUDA (Compute Unified Device Architecture)-based accelerated scheme to realize the deep architectures on the embedded platforms by exploiting the already trained networks. All required functions and layers to replicate the trained neural networks were implemented and accelerated using concurrent resources of embedded GPU. Performance of our CUDA-based proposed scheme was significantly improved by performing convolutions in the transform domain. This matrix multiplication based convolution was also compared with the traditional approach to analyze the improvement in inference performance.
The second part of this thesis focused on the optimization of the proposed framework. The flow of our CUDA-based framework was optimized using unified memory scheme and hardware-dependent utilization of computational resources. The proposed flow was evaluated over three different image classification networks on Jetson TX1 embedded board and Nvidia Shield K1 tablet. The performance of proposed GPU-only flow was compared with its sequential and heterogeneous versions. The results showed that the proposed scheme brought the higher performance and enabled the real-time image classification on the embedded platforms with lesser storage requirements. These results motivated us towards the realization of useful real-time classification and recognition problems on the embedded platforms.
Finally, we utilized the proposed framework to realize the neural network-based automatic license plate recognition (ALPR) system on a mobile platform. This highly-precise and computationally demanding system was deployed by simplifying the flow of trained deep architecture developed for powerful desktop and server environments. A comparative analysis of computational complexity, recognition accuracy and inference performance was performed.
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PATTI, DENIS. "Visual Analysis Algorithms for Embedded Systems." Doctoral thesis, Politecnico di Torino, 2018. http://hdl.handle.net/11583/2709452.
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Visual search systems are very popular applications, but on-line versions in 3G wireless environments suffer from network constraint like unstable or limited bandwidth that entail latency in query delivery, significantly degenerating the user’s experience. An alternative is to exploit the ability of the newest mobile devices to perform heterogeneous activities, like not only creating but also processing images. Visual feature extraction and compression can be performed on on-board Graphical Processing Units (GPUs), making smartphones capable of detecting a generic object (matching) in an exact way or of performing a classification activity.
The latest trends in visual search have resulted in dedicated efforts in MPEG standardization, namely the MPEG CDVS (Compact Descriptor for Visual Search) standard. CDVS is an ISO/IEC standard used to extract a compressed descriptor.
As regards to classification, in recent years neural networks have acquired an impressive importance and have been applied to several domains. This thesis focuses on the use of Deep Neural networks to classify images by means of Deep learning.
Implementing visual search algorithms and deep learning-based classification on embedded environments is not a mere code-porting activity. Recent embedded devices are equipped with a powerful but limited number of resources, like development boards such as GPGPUs. GPU architectures fit particularly well, because they allow to execute more operations in parallel, following the SIMD (Single Instruction Multiple Data) paradigm. Nonetheless, it is necessary to make good design choices for the best use of available hardware and memory.
For visual search, following the MPEG CDVS standard, the contribution of this thesis is an efficient feature computation phase, a parallel CDVS detector, completely implemented on embedded devices supporting the OpenCL framework. Algorithmic choices and implementation details to target the intrinsic characteristics of the selected embedded platforms are presented and discussed. Experimental results on several GPUs show that the GPU-based solution is up to 7× faster than the
CPU-based one. This speed-up opens new visual search scenarios exploiting entire real-time on-board computations with no data transfer.
As regards to the use of Deep convolutional neural networks for off-line image classification, their computational and memory requirements are huge, and this is an issue on embedded devices. Most of the complexity derives from the convolutional layers and in particular from the matrix multiplications they entail. The contribution of this thesis is a self-contained implementation to image classification providing common layers used in neural networks. The approach relies on a heterogeneous CPU-GPU scheme for performing convolutions in the transform domain. Experimental results show that the heterogeneous scheme described in this thesis boasts a 50× speedup over the CPU-only reference and outperforms a GPU-based reference by 2×, while slashing the power consumption by nearly 30%.
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TUOHETI, ABUDUWAILI. "Smart Embedded Systems for Biomedical Applications." Doctoral thesis, Politecnico di Torino, 2019. http://hdl.handle.net/11583/2742529.
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