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Todorov, Vassil. "Automotive embedded software design using formal methods." Electronic Thesis or Diss., université Paris-Saclay, 2020. http://www.theses.fr/2020UPASG026.
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La part croissante des fonctions d'assistance à la conduite, leur criticité, ainsi que la perspective d'une certification de ces fonctions, rendent nécessaire leur vérification et leur validation avec un niveau d'exigence que le test seul ne peut assurer.Depuis quelques années déjà d’autres domaines comme l’aéronautique ou le ferroviaire sont soumis à des contextes équivalents. Pour répondre à certaines contraintes ils ont localement mis en place des méthodes formelles. Nous nous intéressons aux motivations et aux critères qui ont conduit à l’utilisation des méthodes formelles dans ces domaines afin de les transposer sur des scénarios automobiles et identifier le périmètre potentiel d'application.Dans cette thèse, nous présentons nos études de cas et proposons des méthodologies pour l'usage de méthodes formelles par des ingénieurs non-experts. Le model checking inductif pour un processus de développement utilisant des modèles, l'interprétation abstraite pour démontrer l'absence d'erreurs d'exécution du code et la preuve déductive pour des cas de fonctions critiques de librairie.Enfin, nous proposons de nouveaux algorithmes pour résoudre les problèmes identifiés lors de nos expérimentations. Il s'agit d'une part d'un générateur d'invariants et d'une méthode utilisant la sémantique des données pour traiter efficacement des propriétés comportant du temps long, et d'autre part d'un algorithme efficace pour mesurer la couverture du modèle par les propriétés en utilisant des techniques de mutationThe growing share of driver assistance functions, their criticality, as well as the prospect of certification of these functions, make their verification and validation necessary with a level of requirement that testing alone cannot ensure. For several years now, other industries such as aeronautics and railways have been subject to equivalent contexts. To respond to certain constraints, they have locally implemented formal methods. We are interested in the motivations and criteria that led to the use of formal methods in these industries in order to transpose them to automotive scenarios and identify the potential scope of application.In this thesis, we present our case studies and propose methodologies for the use of formal methods by non-expert engineers. Inductive model checking for a model-driven development process, abstract interpretation to demonstrate the absence of run-time errors in the code and deductive proof for critical library functions.Finally, we propose new algorithms to solve the problems identified during our experiments. These are, firstly, an invariant generator and a method using the semantics of data to process properties involving long-running timers in an efficient way, and secondly, an efficient algorithm to measure the coverage of the model by the properties using mutation techniques
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Härberg, Martin, and Roberto Chiarito. "Design, Measurement and Verification of Scania’s Platform Software Architecture for Safety Related Embedded Systems." Thesis, KTH, Maskinkonstruktion (Inst.), 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-185515.
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The platform software architecture for the safety related embedded systems developed by Scania has become increasingly more complex. High complexity raises both the risk of failures and the time consumed by software developers to understand and debug the source code. This leads to increased software maintenance costs, which according to [24] can be between 60% and 75% of the total cost of software development. The purpose of this Master’s thesis is to investigate how a part of Scania’s current software architectural design can be further developed in order to decrease the complexity and the maintenance costs, without compromising with the essential functionality and performance. Another goal is to provide a solution that complies with the software safety requirements from ISO 26262, which Scania is planning to be able to fulfill in the future. To be able to compare our proposal for the software architecture with Scania’s current solution, a measurement tool has been developed. This tool measures the software quality metrics coupling and cohesion, which together with other software metrics gives an estimation of the architecture’s complexity. The verification of the software architecture with regards to ISO 26262 has been done using contract theory. The thesis work has resulted in alternative solutions for the software architectural design of the pressure sensor driver and the real-time database in one of Scania’s electronic control units. These solutions comply better with ISO 26262 and have lower complexity than Scania’s current solution in terms of coupling, cohesion and size of software components. This has been achieved by restructuring the software architecture and avoiding reuse of common software functions. The main conclusion of the thesis is that there is great potential for Scania to reduce the complexity of the platform software architecture and comply with ISO 26262.Plattformsarkitekturen för programvaran i de säkerhetsrelaterade inbyggda system som Scania utvecklar har blivit alltmer komplex. Hög komplexitet medför ökad risk för att fel uppstår i programvaran samt att den tid som programvaruutvecklare spenderar med att förstå och debugga (avlusa) källkoden ökar. Detta leder till ökade underhållskostnader, vilket enligt [24] kan utgöra mellan 60 % och 75 % av den totala kostnaden för programvaruutveckling. Syftet med detta examensarbete är att undersöka hur en del av Scanias nuvarande arkitekturdesign kan vidareutvecklas för att minska komplexiteten, utan att kompromissa med någon grundläggande funktionalitet och prestanda. Ett annat mål är att erbjuda en lösning som uppfyller de säkerhetskrav för programvaran som ISO 26262 ställer, vilket Scania förbereder sig för att kunna uppfylla i framtiden. Ett mätverktyg har utvecklats för att kunna jämföra vår programvaruarkitekturlösning med Scanias nuvarande lösning. Detta verktyg mäter kvalitetsmåtten coupling (koppling) och cohesion (samhörighet), vilka tillsammans med andra programvarumått ger en uppskattning av komplexiteten för arkitekturen. Verifieringen av programvaruarkitekturen med avseende på kraven från ISO 26262 har utförts med hjälp av kontraktteori. Examensarbetet har resulterat i alternativa arkitekturlösningar för trycksensorernas drivrutiner samt realtidsdatabasen i en av Scanias styrenheter, där lösningarna både uppfyller kraven från ISO 26262 bättre och har lägre komplexitetän Scanias nuvarande lösning. Detta har uppnåtts genom en omstrukturering av programvaruarkitekturen samt genom att undvika att återanvända gemensamma programvarufunktioner. Huvudslutsatsen som kan dras från examensarbetet är att det finns stor potential för Scania att kunna reducera programvaruarkitekturens komplexitet, samt uppfylla kraven från ISO 26262.
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Ahmad, Noor Azurati Binti. "The impact of software architecture on the cost of design, implementation and verification of reliable embedded systems." Thesis, University of Leicester, 2013. http://hdl.handle.net/2381/28166.
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The concern of this thesis is the development of software for systems utilising embedded processors. In many cases, the safety of users of “embedded systems” (and other people in the immediate vicinity) depends on the correct operation of this software. This project explores the ways in which the cost of designing, implementing and verifying the behaviour of systems that include embedded software can be reduced. More specifically, the goal is to determine the extent to which the use of a time-triggered (TT) architecture - as opposed to an equivalent “event triggered” (ET) architecture - could offer benefits to the developers of reliable embedded systems. To evaluate this, a method of software architecture evaluation was developed and is described. The work detailed in this thesis involved an extensive empirical study of the costs involved in testing TT systems, with and without task pre-emption. Factors considered in this comparison included: [i] implementation costs, including code size, overhead, memory and CPU utilisation of a scheduler; [ii] testing costs, including the ease of obtaining timing data for isolated and in-situ tasks; and [iii] design costs, including execution time, lines of code and number of inputs required to perform a test of schedulability on the task set. The results from empirical studies suggested the use of TT architectures (compared with equivalent designs based on ET architectures) would require greater efforts at the design phase, but lower efforts during the testing phases. The results also suggested systems based on TT designs are likely to have lower implementation costs than equivalent systems based on ET designs. Taken together, the results point to a lower overall cost for TT systems. Execution of the method is described through the presentation of experimental case studies. Throughout these activities, the method has been shown to be a capable tool for software architecture evaluation.
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Mačišák, Martin. "Využití metody „model based design“ pro návrh embedded aplikace." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2021. http://www.nusl.cz/ntk/nusl-442458.
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This diploma thesis demonstrates the differences between approaches in software development. A code generation search is performed. The work describes possible tools and methods of code validation and verification. The next part provides information on the use of a design-based model in critical-demanding applications. Further, the work describes the proposal of platforms for controling the BLDC motor. Low leve software is programed for these chosen platforms. The logic of controling and user interface is created. The logic of controling is created and tested in Simulink. Further more whole programmed code is connected with the low level layer. The whole solution of my diploma thesis is tested.
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Kureksiz, Funda. "A Real Time Test Setup Design And Realization For Performance Verification Of Controller Designs For Unmanned Air Vehichles." Master's thesis, METU, 2008. http://etd.lib.metu.edu.tr/upload/2/12609393/index.pdf.
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In this thesis, a test platform based on real-time facilities and embedded software is designed to verify the performance of a controller model in real time. By the help of this platform, design errors can be detected earlier and possible problems can be solved cost-effectively without interrupting the development process.
An unmanned combat air vehicle (UCAV) model is taken as a plant model due to its importance in current and future military operations. Among several autopilot modes, the altitude hold mode is selected since it is an important pilot-relief mode and widely used in aviation. A discrete PID controller is designed in MATLAB/Simulink environment for using in verification studies. To control the dynamic system in wide range, a gain scheduling is employed where the altitude and velocity are taken as scheduling variables. Codes for plant and controller model are obtained by using real time workshop embedded coder (RTWEC) and downloaded to two separate computers, in which xPC kernel and VxWorks operating system are run, respectively.
A set of flight test scenarios are generated in Simulink environment. They are analyzed, discussed, and then some of them are picked up to verify the platform. These test scenarios are run in the setup and their results are compared with the ones obtained in Simulink environment.
The reusability of the platform is verified by using a commercial aircraft, Boeing 747, and its controller models. The test results obtained in the setup and in Simulink environment are presented and discussed.
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Traub, Johannes [Verfasser]. "Formal Verification of Concurrent Embedded Software / Johannes Traub." Kiel : Universitätsbibliothek Kiel, 2016. http://d-nb.info/1105472175/34.
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Swart, Riaan. "A language to support verification of embedded software." Thesis, Stellenbosch : Stellenbosch University, 2004. http://hdl.handle.net/10019.1/49823.
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Thesis (MSc)--University of Stellenbosch, 2004.ENGLISH ABSTRACT: Embedded computer systems form part of larger systems such as aircraft or chemical processing facilities. Although testing and debugging of such systems are difficult, reliability is often essential. Development of embedded software can be simplified by an environment that limits opportunities for making errors and provides facilities for detection of errors. We implemented a language and compiler that can serve as basis for such an experimental environment. Both are designed to make verification of implementations feasible. Correctness and safety were given highest priority, but without sacrificing efficiency wherever possible. The language is concurrent and includes measures for protecting the address spaces of concurrently running processes. This eliminates the need for expensive run-time memory protection and will benefit resource-strapped embedded systems. The target hardware is assumed to provide no special support for concurrency. The language is designed to be small, simple and intuitive, and to promote compile-time detection of errors. Facilities for abstraction, such as modules and abstract data types support implementation and testing of bigger systems. We have opted for model checking as verification technique, so our implementation language is similar in design to a modelling language for a widely used model checker. Because of this, the implementation code can be used as input for a model checker. However, since the compiler can still contain errors, there might be discrepancies between the implementation code written in our language and the executable code produced by the compiler. Therefore we are attempting to make verification of executable code feasible. To achieve this, our compiler generates code in a special format, comprising a transition system of uninterruptible actions. The actions limit the scheduling points present in processes and reduce the different interleavings of process code possible in a concurrent system. Requirements that conventional hardware places on this form of code are discussed, as well as how the format influences efficiency and responsiveness.
AFRIKAANSE OPSOMMING: Ingebedde rekenaarstelsels maak deel uit van groter stelsels soos vliegtuie of chemiese prosesseerfasiliteite. Hoewel toetsing en ontfouting van sulke stelsels moeilik is, is betroubaarheid dikwels onontbeerlik. Ontwikkeling van ingebedde sagteware kan makliker gemaak word met 'n ontwikkelingsomgewing wat geleenthede vir foutmaak beperk en fasiliteite vir foutbespeuring verskaf. Ons het 'n programmeertaal en vertaler geïmplementeer wat as basis kan dien vir so 'n eksperimentele omgewing. Beide is ontwerp om verifikasie van implementasies haalbaar te maak. Korrektheid en veiligheid het die hoogste prioriteit geniet, maar sonder om effektiwiteit prys te gee, waar moontlik. Die taal is gelyklopend en bevat maatreëls om die adresruimtes van gelyklopende prosesse te beskerm. Dit maak duur looptyd-geheuebeskerming onnodig, tot voordeel van ingebedde stelsels met 'n tekort aan hulpbronne. Daar word aangeneem dat die teikenhardeware geen spesiale ondersteuning vir gelyklopendheid bevat nie. Die programmeertaal is ontwerp om klein, eenvoudig en intuïtief te wees, en om vertaaltyd-opsporing van foute te bevorder. Fasiliteite vir abstraksie, byvoorbeeld modules en abstrakte datatipes, ondersteun implementering en toetsing van groter stelsels. Ons het modeltoetsing as verifikasietegniek gekies, dus is die ontwerp van ons programmeertaal soortgelyk aan dié van 'n modelleertaal vir 'n modeltoetser wat algemeen gebruik word. As gevolg hiervan kan die implementasiekode as toevoer vir 'n modeltoetser gebruik word. Omdat die vertaler egter steeds foute kan bevat, mag daar teenstrydighede bestaan tussen die implementasie geskryf in ons implementasietaal, en die uitvoerbare masjienkode wat deur die vertaler gelewer word. Daarom poog ons om verifikasie van die uitvoerbare masjienkode haalbaar te maak. Om hierdie doelwit te bereik, is ons vertaler ontwerp om 'n spesiale formaat masjienkode te genereer bestaande uit 'n oorgangstelsel wat ononderbreekbare (atomiese) aksies bevat. Die aksies beperk die skeduleerpunte in prosesse en verminder sodoende die aantal interpaginasies van proseskode wat moontlik is in 'n gelyklopende stelsel. Die vereistes wat konvensionele hardeware aan dié spesifieke formaat kode stel, word bespreek, asook hoe die formaat effektiwiteit en reageerbaarheid van die stelsel beïnvloed.
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Traub, Johannes Frederik Jesper [Verfasser]. "Formal Verification of Concurrent Embedded Software / Johannes Traub." Kiel : Universitätsbibliothek Kiel, 2016. http://nbn-resolving.de/urn:nbn:de:gbv:8-diss-186183.
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Yan, Weiwei. "Software-hardware Cooperative Embedded Verification System Fusing Fingerprint Verification and Shared-key Authentication." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-66677.
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In order to protect the security of the commercial information, personnel information, military information, governmental information on the Internet, the claimed identity should be authenticated. Now there are three main security authentication methods: first: using user PIN, such as password; second: using physical key, such as USBKey; third: using biological authentication technology, such as fingerprint, iris, voice and palm prints, etc. Because of the uniqueness, invariance, and ubiquity properties of biometric authentication, biometric authentication is becoming popular, especially fingerprint recognition. However, when the fingerprint recognition information is transported on the public channel, it may be attacked, such as the fingerprint information is stolen. So a cryptology mechanism is needed to protect the fingerprint recognition information. In the field of embedded security authentication system, the traditional hardware implementation mechanism, such as ASIC, can satisfy requires of functions and performances, but it is not configurable, flexible, and easy to expand; the traditional software implementation mechanism, such as general purpose processor, is flexible, but the cost and the power consumption are higher than hardware implementation. In order to take the advantages of biometrics, cryptology, hardware implementation, and software implementation, a hardware-software cooperating embedded authentication system based on shared-key authentication and fingerprint verification is proposed. First, this system authenticates the identities of client and server by shared-key authentication, creates the current encrypt key and hash key, and then authenticates the identity of them via fingerprint recognition. During fingerprint recognition, the information of fingerprint is not needed to transmit over the public channel, so the security of fingerprint is increased. Theoretic analysis and experiments show that, this system reach very high authentication rate and security. This system can resist replay attack, server template attack, device template attack, effectively.
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Grobler, Leon D. "A kernel to support computer-aided verification of embedded software." Thesis, Stellenbosch : University of Stellenbosch, 2006. http://hdl.handle.net/10019.1/2479.
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Thesis (MSc (Mathematical Sciences)--University of Stellenbosch, 2006.Formal methods, such as model checking, have the potential to improve the reliablility of software. Abstract models of systems are subjected to formal analysis, often showing subtle defects not discovered by traditional testing.
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Traub, Johannes Frederik Jesper [Verfasser]. "Formal Verification of Concurrent Embedded Software / Johannes Frederik Jesper Traub." Kiel : Universitätsbibliothek Kiel, 2016. http://d-nb.info/1105472175/34.
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He, Nannan. "Exploring Abstraction Techniques for Scalable Bit-Precise Verification of Embedded Software." Diss., Virginia Tech, 2009. http://hdl.handle.net/10919/27683.
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Conventional testing has become inadequate to satisfy rigorous reliability requirements of embedded software that is playing an increasingly important role in many safety critical applications. Automatic formal verification is a viable avenue for ensuring the reliability of such software. Recently, more and more formal verification techniques have begun modeling a non-Boolean data variable as a bit-vector with bounded width (i.e. a vector of multiple bits like 32- or 64- bits) to implement bit-precise verification. One major challenge in the scalable application of such bit-precise verification on real-world embedded software is that the state space for verification can be intractably large.
In this dissertation, several abstraction techniques are explored to deal with this scalability challenge in the bit-precise verification of embedded software. First, we propose a tight integration of program slicing, which is an important static program analysis technique, with bounded model checking (BMC). While many software verification tools apply program slicing as a separate preprocessing step, we integrate slicing operations into our model construction and reduction process and enhance them with compilation optimization techniques to compute accurate program slices. We also apply a proof-based abstraction-refinement framework to further remove those program segments irrelevant to the property being verified.
Next, we present a method of using symbolic simulation for scalable formal verification. The simulation involves distinguishing X as symbolic values to abstract concrete variablesâ values. Also, the method embeds this symbolic simulation in a counterexample-guided abstraction-refinement framework to automatically construct and verify an abstract model, which has a smaller state space than that of the original concrete program.
This dissertation also presents our efforts on using two common testability metrics â controllability metric (CM) and observability metric (OM) â as the high-level structural guidance for scalable bit-precise verification. A new abstraction approach is proposed based on the concept of under- and over-approximation to efficiently solve bit-vector formulas generated from embedded software verification instances. These instances include both complicated arithmetic computations and intensive control structures. Our approach applies CM and OM to assist the abstraction refinement procedure in two ways: (1) it uses CM and OM to guide the construction of a simple under-approximate model, which includes only a subset of execution paths in a verification instance, so that a counterexample that refutes the instance can be obtained with reduced effort, and (2) in order to reduce the cost of using proof-based refinement alone, it uses OM heuristics to guide the restoration of additional verification-relevant formula constraints with low computational cost for refinement. Experiments show a significant reduction of the solving time compared to state-of-the-art solvers for the bit-vector arithmetic.
This dissertation finally proposes an efficient algorithm to discover non-uniform encoding widths of individual variables in the verification model, which may be smaller than their original modeling width but sufficient for the verification. Our algorithm distinguishes itself from existing approaches in that it is path-oriented; it takes advantage of CM and OM values to guide the computation of the initial, non-uniform encoding widths, and the effective adjustment of these widths along different paths, until the property is verified. It can restrict the search from those paths that are deemed less favorable or have been searched in previous steps, thus simplifying the problem. Experiments demonstrate that our algorithm can significantly speed up the verification especially in searching for a counterexample that violates the property under verification.Ph. D.
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Eldib, Hassan Shoukry. "Constraint Based Program Synthesis for Embedded Software." Diss., Virginia Tech, 2015. http://hdl.handle.net/10919/55120.
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In the world that we live in today, we greatly rely on software in nearly every aspect of our lives. In many critical applications, such as in transportation and medical systems, catastrophic consequences could occur in case of buggy software. As the computational power and storage capacity of computer hardware keep increasing, so are the size and complexity of the software. This makes testing and verification increasingly challenging in practice, and consequentially creates a chance for software with critical bugs to find their way into the consumer market.
In this dissertation, I present a set of innovative new methods for automatically verifying, as well as synthesizing, critical software and hardware in embedded computing applications. Based on a set of rigorous formal analysis techniques, my methods can guarantee that the resulting software are efficient and secure as well as provably correct.Ph. D.
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Bagnato, Alessandra. "Modeling and verification in model-based software engineering : application to embedded systems." Thesis, Evry, Institut national des télécommunications, 2013. http://www.theses.fr/2013TELE0004.
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Les systèmes embarqués, y compris les dispositifs, l’intergiciel et le logiciel pour la création de sous-systèmes intelligents capables de gérer le contrôle d’appareils électroniques, font de plus en plus partie de nos vies quotidiennes : ils sont intégrés dans des infrastructures de base, (par exemple dans la gestion des routes et des chemins de fer) et sont désormais utilisés en tant que technologies-clés par des millions d'applications logicielles chaque jour. En outre, l'évolution rapide et continue des systèmes embarqués modernes a provoqué de nouveaux défis. Par exemple, la conception des processus complexes qui causent des retards dans le temps de commercialisation et la conséquente augmentation des coûts globaux. Ces systèmes sont plus enclins aux erreurs et par conséquence il devient prioritaire de fournir aux concepteurs des outils effectifs et efficaces pour les aider à surmonter les difficultés liées à la conception des systèmes globales, pour la vérification et pour la validation. Cette thèse est la définition et le développement d'une méthodologie de modélisation basée sur le profil de MARTE et sur le profil de SysML dans un contexte avionique, et orientée à la réutilisation des composantes logicielles et à leur vérification. Cette thèse vise à discuter et illustrer aussi l'efficacité d’une stratégie basée sur la combinaison d’UML, MARTE (Modeling and Analysis of Real Type and Embedded Systems) et des langages SysML sur des étapes différentes de la modélisation d'un système embarquéEmbedded Systems, including devices, middleware and software for the creation of intelligent sub-systems able of monitoring and controlling appliances, are more and more part of our world everyday lives; they are included in the basic infrastructure of society such as roads and railways and are key technologies used by millions of people every day. Moreover the continuous rapid evolution of modern embedded systems has given rise to new challenges: such as increasingly complex design processes that cause delays in time to market and cause escalation of overall design costs. Additionally, these systems are more prone to containing errors, and it becomes more relevant to provide designers with effective tools to aid them in overcoming the difficulties related to the overall system design, verification and validation. This thesis contributes to the definition and to the development of a model based methodology grounded on the OMG’s MARTE profile (Modeling and Analysis of Real Type and Embedded Systems) and on SysML profile to model requirements targeting an avionic case study, with a particular attention to the reuse of the modelled components and to the benefits of their verification. This thesis aims at discussing and illustrating the effectiveness of using a combination of UML, MARTE and SysML languages at the different steps of the embedded system modelling efforts and to provide within this thesis a set of methodological guidelines/steps and an approach to create design model, stores and verify them
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Hu, Wei 1972. "Managing embedded software development in China." Thesis, Massachusetts Institute of Technology, 2003. http://hdl.handle.net/1721.1/30053.
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Thesis (S.M.)--Massachusetts Institute of Technology, System Design & Management Program, February 2004.Includes bibliographical references.
As microprocessors have become smaller and cheaper, they are embedded in more and more non-computing products, such as washing machines, elevators, MP3 players and printers. It has been estimated that these products consumed 99% of the worldwide production of microprocessors. I In general, "Embedded system" means a computer system sitting inside a product other than a computer to make the product more flexible and controllable. For example, a modem washing machine has a control software system to execute different "washing programs" for different types of clothes. Embedded systems usually have strict requirements on response time, and the response must be generated within a finite and specified period, though depending on the situation, the time could be within a few milliseconds or a few seconds. Because of the special requirement on response time, embedded systems are sometimes called real-time systems. Embedded systems can be divided into two categories: hard and soft, according to the degree of required "timeliness" 2 . A hard embedded system is stringent on that the response must occur within a specified timeline. Typical examples are flight-control systems and missile control systems. A soft embedded system is less strict: response time is important but the system still can function properly given occasionally missed deadline. Examples are mobile phones, printers, and medical devices. This paper is only concerned with development of the soft-embedded systems, and hence the term "embedded systems" in the paper means "soft embedded systems".
by Wei Hu.
S.M.
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Flobakk, Rune. "Automated verification of design adherence in software implementation." Thesis, Norwegian University of Science and Technology, Department of Computer and Information Science, 2007. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-8808.
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Software design and architecture specify how a system should be implemented to achieve the required quality attributes. Being able to automatically verify the design adherence during implementation will continuously assure that the system realizes the quality attributes, as well as over time does not drift away from them. This thesis investigates how a software design can be used to automatically verify and enforce rules for implementation. The current tool support for automatic design enforcement is assessed and reviewed. In addition, a prototype contribution to this practice, a plug-in for the Maven software project management system, is presented.
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Chunduri, Annapurna. "An Effective Verification Strategy for Testing Distributed Automotive Embedded Software Functions: A Case Study." Thesis, Blekinge Tekniska Högskola, Institutionen för programvaruteknik, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:bth-12805.
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Context. The share and importance of software within automotive vehicles is growing steadily. Most functionalities in modern vehicles, especially safety related functions like advanced emergency braking, are controlled by software. A complex and common phenomenon in today’s automotive vehicles is the distribution of such software functions across several Electronic Control Units (ECUs) and consequently across several ECU system software modules. As a result, integration testing of these distributed software functions has been found to be a challenge. The automotive industry neither has infinite resources, nor has the time to carry out exhaustive testing of these functions. On the other hand, the traditional approach of implementing an ad-hoc selection of test scenarios based on the tester’s experience, can lead to test gaps and test redundancies. Hence, there is a pressing need within the automotive industry for a feasible and effective verification strategy for testing distributed software functions. Objectives. Firstly, to identify the current approach used to test the distributed automotive embedded software functions in literature and in a case company. Secondly, propose and validate a feasible and effective verification strategy for testing the distributed software functions that would help improve test coverage while reducing test redundan- cies and test gaps. Methods. To accomplish the objectives, a case study was conducted at Scania CV AB, Södertälje, Sweden. One of the data collection methods was through conducting interviews of different employees involved in the software testing activities. Based on the research objectives, an interview questionnaire with open-ended and close-ended questions has been used. Apart from interviews, data from relevant ar- tifacts in databases and archived documents has been used to achieve data triangulation. Moreover, to further strengthen the validity of the results obtained, adequate literature support has been presented throughout. Towards the end, a verification strategy has been proposed and validated using existing historical data at Scania. Conclusions. The proposed verification strategy to test distributed automotive embedded software functions has given promising results by providing means to identify test gaps and test redundancies. It helps establish an effective and feasible approach to capture function test coverage information that helps enhance the effectiveness of integration testing of the distributed software functions.
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Sinha, Ambuj Sudhir. "Design Techniques for Side-channel Resistant Embedded Software." Thesis, Virginia Tech, 2011. http://hdl.handle.net/10919/34465.
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Side Channel Attacks (SCA) are a class of passive attacks on cryptosystems that exploit implementation characteristics of the system. Currently, a lot of research is focussed towards developing countermeasures to side channel attacks. In this thesis, we address two challenges that are an inherent part of the efficient implementation of SCA countermeasures. While designing a system, design choices made for enhancing the efficiency or performance of the system can also affect the side channel security of the system. The first challenge is that the effect of different design choices on the side channel resistance of a system is currently not well understood. It is important to understand these effects in order to develop systems that are both secure and efficient. A second problem with incorporating SCA countermeasures is the increased design complexity. It is often difficult and time consuming to integrate an SCA countermeasure in a larger system.
In this thesis, we explore that above mentioned problems from the point of view of developing embedded software that is resistant to power based side channel attacks. Our first work is an evaluation of different software AES implementations, from the perspective of side channel resistance, that shows the effect of design choices on the security and performance of the implementation. Next we present work that identifies the problems that arise while designing software for a particular type of SCA resistant architecture - the Virtual Secure Circuit. We provide a solution in terms of a methodology that can be used for developing software for such a system - and also demonstrate that this methodology can be conveniently automated - leading to swifter and easier software development for side channel resistant designs.Master of Science
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Edelman, Joseph R. "Machine Code Verification Using The Bogor Framework." Diss., CLICK HERE for online access, 2008. http://contentdm.lib.byu.edu/ETD/image/etd2396.pdf.
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White, Maurice Walter. "Verification and evaluation of structural analysis and design software." Thesis, Virginia Tech, 1991. http://hdl.handle.net/10919/41489.
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Nilsson, Daniel. "System for firmware verification." Thesis, University of Kalmar, School of Communication and Design, 2009. http://urn.kb.se/resolve?urn=urn:nbn:se:hik:diva-2372.
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Software verification is an important part of software development and themost practical way to do this today is through dynamic testing. This reportexplains concepts connected to verification and testing and also presents thetesting-framework Trassel developed during the writing of this report.Constructing domain specific languages and tools by using an existinglanguage as a starting ground can be a good strategy for solving certainproblems, this was tried with Trassel where the description-language forwriting test-cases was written as a DSL using Python as the host-language.
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Engels, Daniel Wayne 1970. "Scheduling for hardware/software partitioning in embedded system design." Thesis, Massachusetts Institute of Technology, 2000. http://hdl.handle.net/1721.1/86443.
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Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2000.Includes bibliographical references (p. 197-204).
by Daniel Wayne Engels.
Ph.D.
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Wiklander, Jimmie. "Component-based software design of embedded real-time systems." Licentiate thesis, Luleå : Luleå University of Technology, 2009. http://pure.ltu.se/ws/fbspretrieve/3318285.
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Li, Juncao. "An Automata-Theoretic Approach to Hardware/Software Co-verification." PDXScholar, 2010. https://pdxscholar.library.pdx.edu/open_access_etds/12.
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Hardware/Software (HW/SW) interfaces are pervasive in computer systems. However, many HW/SW interface implementations are unreliable due to their intrinsically complicated nature. In industrial settings, there are three major challenges to improving reliability. First, as there is no systematic framework for HW/SW interface specifications, interface protocols cannot be precisely conveyed to engineers. Second, as there is no unifying formal model for representing the implementation semantics of HW/SW interfaces accurately, some critical properties cannot be formally verified on HW/SW interface implementations. Finally, few automatic tools exist to help engineers in HW/SW interface development. In this dissertation, we present an automata-theoretic approach to HW/SW co-verification that addresses these challenges. We designed a co-specification framework to formally specify HW/SW interface protocols; we synthesized a hybrid Büchi Automaton Pushdown System, namely Büchi Pushdown System (BPDS), as the unifying formal model for HW/SW interfaces; and we created a co-verification tool, CoVer that implements our model checking algorithms and realizes our reduction algorithms for BPDS. The application of our approach to the Windows device/driver framework has resulted in the detection of fifteen specification issues. Furthermore, utilizing CoVer, we discovered twelve real bugs in five drivers. These non-trivial findings have demonstrated the significance of our approach in industrial applications.
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Moukarzel, Michael A. "µLeech: A Side-Channel Evaluation Platform for Next Generation Trusted Embedded Systems." Digital WPI, 2015. https://digitalcommons.wpi.edu/etd-theses/1034.
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"We propose a new embedded trusted platform module for next generation power scavenging devices. Such power scavenging devices are already in the current market. For instance, the Square point-of-sale reader uses the microphone/speaker interface of a smartphone for both communications and to charge up the power supply. While such devices are already widely deployed in the market and used as trusted devices in security critical applications they have not been properly evaluated yet. Our trusted module is a dedicated microprocessor that can preform cryptographic operations and store cryptographic keys internally. This power scavenging trusted module will provide a secure cryptographic platform for any smartphone. The second iteration of our device will be a side-channel evaluation platform for power scavenging devices. This evaluation platform will focus on evaluating leakage characteristics, it will include all the features of our trusted module, i.e. complicated power handling including scavenging from the smartphone and communications through the microphone/speaker interface. Our design will also included the on-board ports to facilitate easy acquisition of high quality power signals for further side-channel analysis. Our evaluation platform will provide the ability for security researchers to analyze leakage in next generation mobile attached embedded devices and to develop and enroll countermeasures."
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Curtis, Scott Brian. "Modification and verification of design simulation for thermoacoustic research software." Thesis, Monterey, Calif. : Springfield, Va. : Naval Postgraduate School ; Available from National Technical Information Service, 2000. http://handle.dtic.mil/100.2/ADA379258.
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Stanton, SC. "Validation and Verification of Software Design using Finite State Process." Thesis, Honours thesis, University of Tasmania, 2002. https://eprints.utas.edu.au/43/1/Validation_and_Verification_of_Software_Design_Using_FSP.pdf.
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This thesis aims to evaluate the effectiveness of a formal language (Finite State Process) automated verification tool (Labelled Transition System Analyser) at finding and resolving errors in design models of software. FSP is used to model the Lift Problem from a specification refined by validation. The specification is mapped to a finite state domain and tested for errors - in the mapping, in the understanding of the initial requirements, in the accuracy of the initial requirements, and in the concurrency properties of the identified co-operating entities. Exposition of errors refines (validates) the initial description, and drives their resolution giving rise to an evolutionary corrected model; upon exit of iterative analysis this is mapped to UML behavioural diagrams forming Implementation Specifications.
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Seth, Deepak. "A platform based approach for embedded systems software development." Thesis, Massachusetts Institute of Technology, 2006. http://hdl.handle.net/1721.1/35092.
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Thesis (S.M.)--Massachusetts Institute of Technology, System Design and Management Program, 2006.Includes bibliographical references (leaves 94-96).
A platform based approach for product development allows companies to eliminate redundancies, efficiently utilize its resources and provide products for a wider market. The basic idea is to develop and share key components and to introduce new technologies in as many products as possible. The automobile industry has for long used the concept of product platforms and has successfully achieved savings in development costs and seen a growth in sales and market share. By creating a common software platform, this concept can be applied to software development for embedded systems where software modules and applications can be shared across products within a product family. This provides better code reuse and increases standardizations across products. This thesis will examine how the concept of platforms can be applied to software development from the viewpoint of the telecommunications industry. By using the power of a common software platform, telecommunication equipment makers can accelerate product delivery and introduce new technologies to a wider range of customers. With the right strategy, they can also make their products into platforms that serve as a foundation on which other companies can develop products and offer their services.
by Deepak Seth.
S.M.
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Molin, Oscar. "Design verification through software architecture recovery : Meeting ISO 26262 requirements on software using static analysis." Thesis, Uppsala universitet, Institutionen för informationsteknologi, 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-202149.
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Emerging functional safety standards in the automotive industry will create new challenges for companies sitting on large deposits of legacy code. When refactoring existing code for compliance with standards such as ISO 26262, great savings could be made if work products required by the standard could be automatically generated from existing source code. In this thesis, we explore the possibilities to generate graphical software architectures, data-flow graphs and software architectural descriptions directly from existing C source code. By parsing the source code to find structures and the relations between them, we were able to create relational graphs that represents the software of an entire system or that of just one component, using different levels of abstraction where appropriate. We create a proof-of-concept tool chain that can generate two kinds of graphical architecture views and one data-flow view. Although these tools are by no means ready for production, they do show promise and are already useful as development tools for better software understanding. Finally we test the tool chain on current production ECU (Electric Control Unit) software used in heavy trucks and buses and evaluate the results against the requirements of the ISO 26262 standard. This thesis was done at Scania CV AB in Södertälje, Sweden.
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Chantatub, Wachara. "The integration of software specification, verification, and testing techniques with software requirements and design processes." Thesis, University of Sheffield, 1995. http://etheses.whiterose.ac.uk/1850/.
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Specifying, verifying, and testing software requirements and design are very important tasks in the software development process and must be taken seriously. By investing more up-front effort in these tasks, software projects will gain the benefits of reduced maintenance costs, higher software reliability, and more user-responsive software. However, many individuals involved in these tasks still find that the techniques available for the tasks are either too difficult and far from practical or if not difficult, inadequate for the tasks. This thesis proposes practical and capable techniques for specifying and verifying software requirements and design and for generating test requirements for acceptance and system testing. The proposed software requirements and design specification techniques emerge from integrating three categories of software specification languages, namely an infonnal specification language (e.g. English), semiformal specification languages (Entity-Relationship Diagrams, Data Flow Diagrams, and Data Structure Diagrams), and a formal specification language (Z with an extended subset). The four specification languages mentioned above are used to specify both software requirements and design. Both software requirements and design of a system are defined graphically in Entity-Relationship Diagrams, Data Flow Diagrams, and Data Structure Diagrams, and defined formally in Z specifications. The proposed software requirements and design verification techniques are a combination of informal and formal proofs. The informal proofs are applied to check the consistency of the semiformal specification and to check the consistency, correctness, and completeness of the formal specification against the semiformal specification. The formal proofs are applied to mathematically prove the consistency of the formal specification. Finally, the proposed technique for generating test requirements for acceptance and system testing from the formal requirements specification is presented. Two sets of test requirements are generated: test requirements for testing the critical requirements, and test requirements for testing the operations of the system.
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Lockhart, Jonathan A. "Software Development Process and Reliability Quantification for Safety Critical Embedded Systems Design." University of Cincinnati / OhioLINK, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1562673285477425.
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Cavalcante, Sergio Vanderlei. "A hardware-software co-design system for embedded real-time applications." Thesis, University of Newcastle Upon Tyne, 1997. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.360339.
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Supiratana, Panon. "Graphical visualization and analysis tool of data entities in embedded systems engineering." Thesis, Mälardalens högskola, Akademin för innovation, design och teknik, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-10428.
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Several decades ago, computer control systems known as Electric Control Units (ECUs) were introduced to the automotive industry. Mechanical hardware units have since then increasingly been replaced by computer controlled systems to manage complex tasks such as airbag, ABS, cruise control and so forth. This has lead to a massive increase of software functions and data which all needs to be managed. There are several tools and techniques for this, however, current tools and techniques for developing real-time embedded system are mostly focusing on software functions, not data. Those tools do not fully support developers to manage run-time data at design time. Furthermore, current tools do not focus on visualization of relationship among data items in the system. This thesis is a part of previous work named the Data Entity approach which prioritizes data management at the top level of development life cycle. Our main contribution is a tool that introduces a new way to intuitively explore run-time data items, which are produced and consumed by software components, utilized in the entire system. As a consequence, developers will achieve a better understanding of utilization of data items in the software system. This approach enables developers and system architects to avoid redundant data as well as finding and removing stale data from the system. The tool also allows us to analyze conflicts regarding run-time data items that might occur between software components at design time.A Data-Entity Approach for Component-Based Real-Time Embedded Systems Development
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Lewis, Oliver. "Performance issues of variability design in embedded system application families." Thesis, Edinburgh Napier University, 2000. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.327156.
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Bergström, Christoffer. "Simulation Framework of embedded systems in armored vehicle design." Thesis, Umeå universitet, Institutionen för fysik, 2021. http://urn.kb.se/resolve?urn=urn:nbn:se:umu:diva-185123.
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Embedded systems are a mixture of electric and mechanical hardware along with the software that is controlling them. BAE Systems Hägglunds, which designs and builds armored vehicles, is interested in knowing how to simulate these systems for logic validation and testing different design variations. The goal of this thesis was to create a framework for carrying out these simulations. This was done by analyzing hardware and software design at BAE and Identifying the necessary conditions for creating a model which can be simulated. Matlab Simulink is suggested as the tool for these simulations. The framework suggests dividing the model into smaller modules which reflects design principles at BAE. These modules will be made up of sub-modules containing hardware and software in layers. The hardware foundation will be made up of pre-designed components created in Simulink’s physical simulation library. The software will be imported into specialized sub-modules and integrated into the hardware using proposed bridge functions, converting information between the two systems. The framework is designed to provide a comprehensive solution instead of a deep one that can be adapted to changing circumstances. Tests have been made on small-scale systems, but the framework still needs to be tested on a large-scale system, which was not possible during this thesis. In conclusion, this is a stable foundation that needs to be built upon.
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Vörtler, Thilo [Verfasser], Petra [Gutachter] Hofstedt, and Heinrich Theodor [Gutachter] Vierhaus. "Verification of software for Contiki-based low-power embedded systems using software model checking / Thilo Vörtler ; Gutachter: Petra Hofstedt, Heinrich Theodor Vierhaus." Cottbus : BTU Cottbus - Senftenberg, 2018. http://d-nb.info/1152265601/34.
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Zhao, Yun, and Qishan Zhang. "DESIGN OF A SOFTWARE GPS RECEIVER AND ITS MATLAB IMPLEMENTATION." International Foundation for Telemetering, 2004. http://hdl.handle.net/10150/605312.
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International Telemetering Conference Proceedings / October 18-21, 2004 / Town & Country Resort, San Diego, CaliforniaThe embedded system related hardware technology has experienced rapid development, and it provided the software technology with a huge space for growth. Therefore using software approaches to perform GPS receiver functions in a powerful and generic hardware platform is becoming more feasible. In this paper, the software GPS receiver technology and the design basics of the software receiver are discussed. Further in the Matlab simulation environment, the implementation of a software receiver for replacing the processing functions of ASIC in traditional GPS receivers, i.e. RF front end and multi-channel correlator, is presented. Some simulation results and implementation details are included.
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Sezer, Bulent. "Software Engineering Process Improvement." Master's thesis, METU, 2007. http://etd.lib.metu.edu.tr/upload/12608338/index.pdf.
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This thesis presents a software engineering process improvement study. The literature on software process improvement is reviewed. Then the current design verification process at one of the Software Engineering Departments of
the X Company, Ankara, Türkiye (SED) is analyzed. Static software development process metrics have been calculated for the SED based on a recently proposed approach. Some improvement suggestions have been made based on the metric values calculated according to the proposals of that study. Besides, the author'
s improvement suggestions have been discussed with the senior staff at the department and then final version of the improvements has been gathered. Then, a discussion has been made comparing these two approaches. Finally, a new software design verification process model has been proposed. Some of the suggestions have already been applied and preliminary results have been obtained.
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Palomeque, Alberto. "Impact of Embedded Software Design Decisions on the Product Life Cycle Process." Thesis, Mälardalen University, School of Innovation, Design and Engineering, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-10018.
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Software design decisions were considered in this study, as the possibly principal factor for unplanned adjustments related to the embedded software handling, at production- and service processes. The study reveals an increase of requirement changes during the last phases in then software development projects execution, which forces late design decisions in order to fulfil the changed requirements. Consequently, the likelihood of risks for unexpected impacts on the subsequent processes will increase.
A research approach based on interviews and data from previous projects at Volvo CE was performed. The process methodology used at Volvo CE for software development was investigated from the project planning and control view and the project team member’s perspective.
A high amount of software-design decisions were encountered at the end of the software development process at Volvo CE, as a result of numerous requirement changes at the final phases of the projects execution. A gap was identified between how the process methodology specified the progression of activities for software development and the actual progression of the project activities in Volvo CE.
This study discusses problem areas in the software development process at Volvo CE from an embedded design decisions perspective. As future work, the study recommends three steps to find improvements to the process methodology: 1) Update the process based on standardized procedures for management of requirements changes, risk handling, and communication. 2) Further analysis and possible adaptations of the process model 3) Develop methods and/or tools for process quality assurance.
The management of the embedded software decisions appears to be a very complicated area, the conventional statements on the importance of the decisions in the earlier phases, at least, should be further discussed and investigated.
PREPARE
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Yuce, Bilgiday. "Fault Attacks on Embedded Software: New Directions in Modeling, Design, and Mitigation." Diss., Virginia Tech, 2018. http://hdl.handle.net/10919/81824.
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This research investigates an important class of hardware attacks against embedded software, which uses fault injection as a hacking tool. Fault attacks use well-chosen, targeted fault injection combined with clever system response analysis to break the security of a system.
In case of a fault attack on embedded software, faults are injected into the underlying processor hardware and their effects are observed in the executed software's output. This introduces an additional difficulty in mitigation of fault attack risk. Designing efficient countermeasures requires first understanding software, instruction-set, and hardware level components of fault attacks, and then, systematically addressing the vulnerabilities at each level.
This research first proposes an instruction fault sensitivity model to capture effects of fault injection on embedded software. Based on the instruction fault sensitivity model, a novel fault attack method called MAFIA (Micro-architecture Aware Fault Injection Attack) is also introduced. MAFIA exploits the vulnerabilities in multiple abstraction layers. This enables an adversary to determine best points to attack during the execution as well as pinpoint the desired fault effects. It has been shown that MAFIA breaks the existing countermeasures with significantly fewer fault injections than the traditional fault attacks.
Another contribution of the research is a fault attack simulator, MESS (Micro-architectural Embedded System Simulator). MESS enables a user to model hardware, instruction-set, and software level components of fault attacks in a simulation environment. Thus, software designers can use MESS to evaluate their programs against several real-world fault attack scenarios.
The final contribution of this research is the fault-attack-resistant FAME (Fault-attack Aware Microprocessor Extensions) processor, which is suited for embedded, constrained systems. FAME combines fault detection in hardware and fault response in software. This allows low-cost, performance-efficient, flexible, and backward-compatible integration of hardware and software techniques to mitigate fault attack risk. FAME has been designed as an architectural concept as well as implemented as a chip prototype. In addition to protection mechanisms, the chip prototype also includes fault injection and analysis features to ease fault attack research.
The findings of this research indicate that considering multiple abstraction layers together is essential for efficient fault attacks, countermeasures, and evaluation techniques.Ph. D.
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Tucci, Primiano <1986>. "Hardware/Software Design of Dynamic Real-Time Schedulers for Embedded Multiprocessor Systems." Doctoral thesis, Alma Mater Studiorum - Università di Bologna, 2013. http://amsdottorato.unibo.it/5594/1/tucci_primiano_tesi.pdf.
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The new generation of multicore processors opens new perspectives for the design of embedded systems. Multiprocessing, however, poses new challenges to the scheduling of real-time applications, in which the ever-increasing computational demands are constantly flanked by the need of meeting critical time constraints. Many research works have contributed to this field introducing new advanced scheduling algorithms. However, despite many of these works have solidly demonstrated their effectiveness, the actual support for multiprocessor real-time scheduling offered by current operating systems is still very limited.
This dissertation deals with implementative aspects of real-time schedulers in modern embedded multiprocessor systems. The first contribution is represented by an open-source scheduling framework, which is capable of realizing complex multiprocessor scheduling policies, such as G-EDF, on conventional operating systems exploiting only their native scheduler from user-space. A set of experimental evaluations compare the proposed solution to other research projects that pursue the same goals by means of kernel modifications, highlighting comparable scheduling performances.
The principles that underpin the operation of the framework, originally designed for symmetric multiprocessors, have been further extended first to asymmetric ones, which are subjected to major restrictions such as the lack of support for task migrations, and later to re-programmable hardware architectures (FPGAs). In the latter case, this work introduces a scheduling accelerator, which offloads most of the scheduling operations to the hardware and exhibits extremely low scheduling jitter.
The realization of a portable scheduling framework presented many interesting software challenges. One of these has been represented by timekeeping. In this regard, a further contribution is represented by a novel data structure, called addressable binary heap (ABH). Such ABH, which is conceptually a pointer-based implementation of a binary heap, shows very interesting average and worst-case performances when addressing the problem of tick-less timekeeping of high-resolution timers.
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Tucci, Primiano <1986>. "Hardware/Software Design of Dynamic Real-Time Schedulers for Embedded Multiprocessor Systems." Doctoral thesis, Alma Mater Studiorum - Università di Bologna, 2013. http://amsdottorato.unibo.it/5594/.
Full textAbstract:
The new generation of multicore processors opens new perspectives for the design of embedded systems. Multiprocessing, however, poses new challenges to the scheduling of real-time applications, in which the ever-increasing computational demands are constantly flanked by the need of meeting critical time constraints. Many research works have contributed to this field introducing new advanced scheduling algorithms. However, despite many of these works have solidly demonstrated their effectiveness, the actual support for multiprocessor real-time scheduling offered by current operating systems is still very limited.
This dissertation deals with implementative aspects of real-time schedulers in modern embedded multiprocessor systems. The first contribution is represented by an open-source scheduling framework, which is capable of realizing complex multiprocessor scheduling policies, such as G-EDF, on conventional operating systems exploiting only their native scheduler from user-space. A set of experimental evaluations compare the proposed solution to other research projects that pursue the same goals by means of kernel modifications, highlighting comparable scheduling performances.
The principles that underpin the operation of the framework, originally designed for symmetric multiprocessors, have been further extended first to asymmetric ones, which are subjected to major restrictions such as the lack of support for task migrations, and later to re-programmable hardware architectures (FPGAs). In the latter case, this work introduces a scheduling accelerator, which offloads most of the scheduling operations to the hardware and exhibits extremely low scheduling jitter.
The realization of a portable scheduling framework presented many interesting software challenges. One of these has been represented by timekeeping. In this regard, a further contribution is represented by a novel data structure, called addressable binary heap (ABH). Such ABH, which is conceptually a pointer-based implementation of a binary heap, shows very interesting average and worst-case performances when addressing the problem of tick-less timekeeping of high-resolution timers.
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Singh, Kuljeet. "Design and Evaluation of an Embedded Real-time Micro-kernel." Thesis, Virginia Tech, 2002. http://hdl.handle.net/10919/35794.
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This thesis presents the design and evaluation of an operating system kernel specially designed for dataflow software. Dataflow is a style of software architecture that is well suited for control and "signal flow" applications. This architecture involves many small processes and lots of inter-process communication, which impose too much overhead on traditional RTOSes. This thesis describes design and implementation of the Dataflow Architecture Real-time Kernel (DARK). DARK is a reconfigurable, multithreaded and preemptive operating system kernel that introduces a special data-driven scheduling strategy for dataflow applications. It uses the underlying hardware for high-speed context switching between the kernel and applications, which is five times faster than the ordinary context switch. The features of the kernel can be configured according to performance requirements without change to the applications. Along with the performance evaluation of DARK, the performance comparison results of DARK with two commercial RTOSes: MicroC/OS-II and Analog Devices VDK++ are also provided.Master of Science
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Neal, Stephen. "A language for the dynamic verification of design patterns in distributed computing." Thesis, University of Kent, 2001. https://kar.kent.ac.uk/13532/.
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Masi, Riccardo. "Software verification and validation methods with advanced design patterns and formal code analysis." Master's thesis, Alma Mater Studiorum - Università di Bologna, 2022.
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This thesis focuses on the description and the improvement of the host company software life cycle, with a focus on the Verification and Validation phase. The host company is an international group, the world leader in the supply of advanced technologies for the ceramic, metal, packaging industries, food and beverage, and the production of plastic containers and advanced materials.
The software life cycle is an extremely important development process for building the state-of-art of software products and it is a process that requires methodology, control, and appropriate documentation. For companies, quality assurance in software development has become a very expensive activity from an economic point of view and the verification and validation phase is essential to reduce these costs.
The starting point of the thesis consists of the analysis and evaluation of the answers obtained through a company survey submitted to the software developers during the first phase of the internship.
Subsequently, the description of a typical software life cycle management is predominant, with particular attention to the Verification and Validation phase, explained through some practice examples.
Afterward, we will analyze in detail the different methodologies and strategies of the Software Verification and Validation process, starting from static analysis, passing through classical methodologies of dynamic analysis, and concluding with innovative Verification and Validation solutions to automate the process.
The main goal of the thesis is the optimization and standardization of the automation software life cycle of the host company, proposing innovative solutions for every single phase of the process and possible future research and updates.
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Bappudi, Bhargav. "Example Modules for Hardware-software Co-design." University of Cincinnati / OhioLINK, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1470043472.
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Gora, Michael Arthur. "Securing Software Intellectual Property on Commodity and Legacy Embedded Systems." Thesis, Virginia Tech, 2010. http://hdl.handle.net/10919/33473.
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The proliferation of embedded systems into nearly every aspect of modern infrastructure and society has seen their deployment in such diverse roles as monitoring the power grid and processing commercial payments. Software intellectual property (SWIP) is a critical component of these increasingly complex systems and represents a significant investment to its developers. However, deeply immersed in their environment, embedded systems are difficult to secure. As a result, developers want to ensure that their SWIP is protected from being reverse engineered or stolen by unauthorized parties.
Many techniques have been proposed to address the issue of SWIP protection for embedded systems. These range from secure memory components to complete shifts in processor architectures. While powerful, these approaches often require the development of systems from the ground up or the application of specialized and often expensive hardware components. As a result they are poorly suited to address the security concerns of legacy embedded systems or systems based on commodity components.
This work explores the protection of SWIP on heavily constrained, legacy and commodity embedded systems. We accomplish this by evaluating a generic embedded system to identify the security concerns in the context of SWIP protection. The evaluation is applied to determine the limitations of a software only approach on a real world legacy embedded system that lacks any specialized security hardware features. We improve upon this system by developing a prototype system using only commodity components. Finally we propose a Portable Embedded Software Intellectual Property Security (PESIPS) system that can easily be deployed as a framework on both legacy and commodity systems.Master of Science
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Brestovac, Goran, and Robi Grgurina. "Applying Multi-Criteria Decision Analysis Methods in Embedded Systems Design." Thesis, Mälardalens högskola, Akademin för innovation, design och teknik, 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-22013.
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In several types of embedded systems the applications are deployed both as software and as hardware components. For such systems, the partitioning decision is highly important since the implementation in software or hardware heavily influences the system properties. In the industry, it is rather common practice to take deployment decisions in an early stage of the design phase and based on a limited number of aspects. Often such decisions are taken based on hardware and software designers‟ expertise and do not account the requirements of the entire system and the project and business development constraints. This approach leads to several disadvantages such as redesign, interruption, etc. In this scenario, we see the need of approaching the partitioning process from a multiple decision perspective. As a consequence, we start by presenting an analysis of the most important and popular Multiple Criteria Decision Analysis (MCDA) methods and tools. We also identify the key requirements on the partitioning process. Subsequently, we evaluate all of the MCDA methods and tools with respect to the key partitioning requirements. By using the key partitioning requirements the methods and tools that the best suits the partitioning are selected. Finally, we propose two MCDA-based partitioning processes and validate their feasibility thorough an industrial case study.
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Wang, Zhonglei [Verfasser]. "Software Performance Estimation Methods for System-Level Design of Embedded Systems / Zhonglei Wang." München : Verlag Dr. Hut, 2010. http://d-nb.info/1009095455/34.
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Teegarden, Zoe C. (Zoe Chelsea) 1976. "Embedded low-power wireless sensor system : design of a software radio base station." Thesis, Massachusetts Institute of Technology, 2001. http://hdl.handle.net/1721.1/86738.
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Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2001.Includes bibliographical references (p. 114-118) and index.
by Zoe C. Teegarden.
M.Eng.