Relevant bibliographies by topics / Electronics front-end

Academic literature on the topic 'Electronics front-end'

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Published: 25 May 2024

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Journal articles on the topic "Electronics front-end"

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Salomon, F., P. Edelbruck, G. Brulin, A. Boiano, G. Tortone, A. Ordine, M. Bini, S. Barlini, and S. Valdré. "FAZIA front-end electronics." EPJ Web of Conferences 88 (2015): 01015. http://dx.doi.org/10.1051/epjconf/20158801015.

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Hall, G. "LHC front-end electronics." Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment 453, no. 1-2 (October 2000): 353–64. http://dx.doi.org/10.1016/s0168-9002(00)00657-4.

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Luengo, S., D. Gascón, A. Comerma, L. Garrido, J. Riera, S. Tortella, and X. Vilasís. "SPD very front end electronics." Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment 567, no. 1 (November 2006): 310–14. http://dx.doi.org/10.1016/j.nima.2006.05.112.

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Antonelli, A., G. Corradi, M. Moulson, C. Paglia, M. Raggi, T. Spadaro, D. Tagnani, et al. "The NA62 LAV front-end electronics." Journal of Instrumentation 7, no. 01 (January 26, 2012): C01097. http://dx.doi.org/10.1088/1748-0221/7/01/c01097.

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Bailly, P., C. Beigbeder, R. Bernier, D. Breton, G. Bonneaud, T. Caceres, R. Chase, et al. "BaBar DIRC electronics front-end chain." IEEE Transactions on Nuclear Science 45, no. 4 (1998): 1898–906. http://dx.doi.org/10.1109/23.710959.

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Cardarelli, R., G. Aielli, P. Camarri, A. Di Ciaccio, L. Di Stante, B. Liberti, E. Pastori, R. Santonico, and A. Zerbini. "RPC performance vs. front-end electronics." Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment 661 (January 2012): S198—S200. http://dx.doi.org/10.1016/j.nima.2010.09.136.

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Manfredi, P. F., and M. Manghisoni. "Front-end electronics for pixel sensors." Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment 465, no. 1 (June 2001): 140–47. http://dx.doi.org/10.1016/s0168-9002(01)00374-6.

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De Geronimo, G., P. O'Connor, V. Radeka, and B. Yu. "Front-end electronics for imaging detectors." Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment 471, no. 1-2 (September 2001): 192–99. http://dx.doi.org/10.1016/s0168-9002(01)00963-9.

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Weilhammer, Peter. "Front-end electronics for RICH detectors." Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment 433, no. 1-2 (August 1999): 413–25. http://dx.doi.org/10.1016/s0168-9002(99)00541-0.

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Artuso, Marina. "The BTeV RICH front end electronics." Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment 553, no. 1-2 (November 2005): 130–34. http://dx.doi.org/10.1016/j.nima.2005.08.021.

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Dissertations / Theses on the topic "Electronics front-end"

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Pratte, Jean-Francois. "The RatCAP front-end electronics." Thèse, Université de Sherbrooke, 2008. http://savoirs.usherbrooke.ca/handle/11143/1833.

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The Center for Translational Neuroimaging of the Brookhaven National Laboratory has been studying the phenomenon of addiction, which has a direct impact on millions of people worldwide. This requires the development of new radiotracers for imaging specific neurotransmitter systems in the brain, and the design and implementation of novel imaging devices to measure the neuroactivity of the brain. The RatCAP, or Rat Conscious Animal Positron Emission Tomography (PET), is a head-mounted miniature PET scanner for brain metabolism imaging of awake rats with minimal mobility restriction to enable correlation with the animal's behavior. The RatCAP detector is based on LSO scintillator crystals and avalanche photodiode (APD) arrays. The design of the RatCAP imposed stringent requirements on the readout electronics. First, due to its size and limited power budget, VLSI of the front-end electronics was mandatory. Second, due to the weak signal to noise ratio from the APD detectors, the analog front-end noise had to be minimized, within the power budget, to provide the best possible timing resolution. Finally, the number of interconnections with the data acquisition system had to be minimal in order to maximize the animal's mobility. This thesis presents the design and implementation of the ASIC for the RatCAP. The final ASIC integrates 32 channels consisting of a charge sensitive preamplifier, programmable gain, a bipolar shaping amplifier, and timing and energy discriminators. A novel 32-to-1 address and timing serial encoder is integrated on-chip to multiplex the acquired data through a single output. The ASIC was realized in 0.18 [mu]m CMOS technology from TSMC, has a size of 3.3 mm × 4.5 mm, and power consumption of 117 mW. The ASIC is fully operational. Noise characterization led to a measured equivalent noise charge of 650 electrons rms with the APD biased at the input. A coincidence timing resolution of 6.7 ns FWHM was measured between two typical LSO-APD-ASIC modules using a 68 Ge source (threshold at 420 keV). An energy resolution of 18.7% FWHM at 511 keV was measured for a 68 Ge source. The ASIC and the technology developed for the RatCAP have opened the door to the realization of many other systems, such as a PET-MRI scanner, and led to the granting of three patents and the publication of numerous scientific presentations.
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Luengo, Álvarez Sonia. "Scintillator Pad Detector: Very Front End Electronics." Doctoral thesis, Universitat Ramon Llull, 2008. http://hdl.handle.net/10803/9150.

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El Laboratori d'Altes Energies de La Salle és un membre d'un grup acreditat per la Generalitat. Aquest grup està format per part del Departament d'Estructura i Constituents de la Matèria de la Facultat de Física de la Universitat de Barcelona, part del departament d'Electrònica de la mateixa Facultat i pel grup de La Salle. Tots ells estan involucrats en el disseny d'un subdetector en l'experiment de LHCb del CERN: el SPD (Scintillator Pad Detector).

El SPD és part del Calorímetre de LHCb. Aquest sistema proporciona possibles hadrons d'alta energia, electrons i fotons pel primer nivell de trigger. El SPD està format per una làmina centellejeadora de plàstic, dividida en 600 cel.les de diferent tamany per obtenir una millor granularitat aprop del feix. Les partícules carregades que travessin el centellejador generaran una ionització del mateix, a diferència dels fotons que no la ionitzaran. Aquesta ionització, generarà un pols de llum que serà recollit per una WLS que està enrotllada dins de les cel.les centellejadores. La llum serà transmesa al sistema de lectura mitjançant fibres clares. Per reducció de costos, aquestes 6000 cel.les estan dividides en grups, usant MAPMT (fotomultiplicadors multiànode) de 64 canals per rebre la informació en el sistema de lectura. El senyal de sortida dels fotomultilplicadors és irregular degut al baix nivell de fotoestadística, uns 20-30 fotoelectrons per MIP, i degut també a la resposta de la fibra WLS, que té un temps de baixada lent. Degut a tot això, el processat del senyal, es realitza primer durant la integració de la càrrega total i finalment per la correcció de la cua que conté el senyal provinent del PMT.

Aquesta Tesi està enfocada en el sistema de lectura de l'electrònica del VFE del SPD. Aquest, està format per un ASIC (dissenyat pel grup de la UB) encarregat d'integrar el senyal, compensar el senyal restant i comparar el nivell d'energia obtingut amb un llindar programable (fa la distinció entre electrons i fotons), una FPGA que programa aquests llindars i compensacions de cada ASIC i fa el mapeig de cada canal rebut en el detector i finalment usa serialitzadors LVDS per enviar la informació de sortida al trigger de primer nivell. En el disseny d'aquest tipus d'electrònica s'haurà de tenir en compte, per un costat, restriccions de tipus mecànic: l'espai disponible per l'electrònica és limitat i escàs, i per un altre costat, el nivell de radiació que deurà suportar és considerable i s'haurà de comprobar que tots els components superin un cert test de radiació, i finalment, també s'haurà de tenir en compte la distància que separa els VFE dels racks on la informació és enviada i el tipus de senyal amb el que es treballa en aquest tipus d'experiments: mixta i de poc rang.
El Laboratorio de Altas Energías de la Salle es un miembro de un grupo acreditado por La Generalitat. Este grupo está formado por parte del departamento de Estructura i Constituents de la Matèria de la Facultad de Física de la Universidad de Barcelona, parte del departamento de Electrónica de la misma Facultad y el grupo de La Salle. Todos ellos están involucrados en el diseño de un subdetector en el experimento de LHCb del CERN: El SPD (Scintillator Pad Detector).
El SPD es parte del Calorímetro de LHCb. Este sistema proporciona posibles hadrones de alta energía, electrones y fotones para el primer nivel de trigger.El SPD está diseñado para distinguir entre electrones y fotones para el trigger de primer nivel. Este detector está formado por una lámina centelleadora de plástico, dividida en 6000 celdas de diferente tamaño para obtener una mejor granularidad cerca del haz. Las partículas cargadas que atraviesen el centelleador generarán una ionización del mismo, a diferencia de los fotones que no la generarán. Esta ionización generará, a su vez, un pulso de luz que será recogido por una WLS que está enrollada dentro de las celdas centelleadoras. La luz será transmitida al sistema de lectura mediante fibras claras. Para reducción de costes, estas 6000 celdas están divididas en grupos, utilizando un MAPMT (fotomultiplicadores multiánodo) de 64 canales para recibir la información en el sistema de lectura. La señal de salida de los fotomultiplicadores es irregular debido al bajo nivel de fotoestadística, unos 20-30 fotoelectrones por MIP, y debido también a la respuesta de la fibra WLS, que tiene un tiempo de bajada lento. Debido a todo esto, el procesado de la señal, se realiza primero mediante la integración de la carga total y finalmente por la substracción de la señal restante fuera del período de integración.
Esta Tesis está enfocada en el sistema de lectura de la electrónica del VFE del SPD. Éste, está formado por un ASIC (diseñado por el grupo de la UB) encargado de integrar la señal, compensar la señal restante y comparar el nivel de energía obtenido con un umbral programable (que distingue entre electrones y fotones), y una FPGA que programa estos umbrales y compensaciones de cada ASIC, y mapea cada uno de los canales recibidos en el detector y finalmente usa serializadores LVDS para enviar la información de salida al trigger de primer nivel. En el diseño de este tipo de electrónica se deberá tener en cuenta, por un lado, restricciones del tipo mecánico: el espacio disponible para la electrónica en sí, es limitado y escaso, por otro lado, el nivel de radiación que deberá soportar es considerable y se tendrá que comprobar que todos los componentes usado superen un cierto test de radiación, y finalmente, también se deberá tener en cuenta la distancia que separa los VFE de los racks dónde la información es enviada y el tipo de señal con el que se trabaja en este tipo de experimentos: mixta y de poco rango.
Laboratory in La Salle is a member of a Credited Research Group by La Generatitat. This group is formed by a part of the ECM department, a part of the Electronics department at UB (University of Barcelona) and La Salle's group. Together, they are involved in the design of a subdetector at LHCb Experiment at CERN: the SPD (Scintillator Pad Detector).
The SPD is a part of LHCb Calorimeter. That system provides high energy hadrons, electron and photons candidates for the first level trigger.
The SPD is designed to distinguish electrons and photons for this first level trigger. This detector is a plastic scintillator layer, divided in about 6000 cells of different size to obtain better granularity near the beam. Charged particles will produce, and photons will not, ionisation on the scintillator. This ionisation generates a light pulse that is collected by a Wavelength Shifting (WLS) fibre that is twisted inside the scintillator cell. The light is transmitted through a clear fibre to the readout system.
For cost reduction, these 6000 cells are divided in groups using a MAPMT of 64 channels for receiving information in the readout system. The signal outing the SPD PMTs is rather unpredictable as a result of the low number of photostatistics, 20-30 photoelectrons per MIP, and the due to the response of the WLS fibre, which has low decay time. Then, the signal processing must be performed by first integrating the total charge and later subtracting to avoid pile-up.
This PhD is focused on the VFE (Very Front End) of SPD Readout system. It is performed by a specific ASIC (designed by the UB group) which integrates the signal, makes the pile-up compensation, and compares the level obtained to a programmable threshold (distinguishing electrons and photons), an FPGA which programs the ASIC thresholds, pile-up subtraction and mapping the channels in the detector and finally LVDS serializers, in order to send information to the first level trigger system.
Not only mechanical constraints had to be taken into account in the design of the card as a result of the little space for the readout electronics but also, on one hand, the radiation quote expected in the environment and on the other hand, the distance between the VFE electronics and the racks were information is sent and the signal range that this kind of experiments usually have.
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Li, Lin. "RF transceiver front-end design for testability." Thesis, Linköping University, Department of Electrical Engineering, 2004. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2256.

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In this thesis, we analyze the performance of a loop-back built-in-self-test for a RF transceiver front-end. The tests aim at spot defects in a transceiver front-end and they make use of RF specifications such as NF (Noise Figure), G (power gain) and IIP3 (third order Intercept point). To enhance fault detectability, RF signal path sensitization is introduced. We use a functional RF transceiver model that is implemented in MatLab™ to verify this analysis.

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De, La Taille C. "Front-End Electronics in calorimetry : from LHC to ILC." Habilitation à diriger des recherches, Université Paris Sud - Paris XI, 2009. http://tel.archives-ouvertes.fr/tel-00438183.

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ce rapport résume les développements réalisés en électronique pour lire le calorimètre à Argon Liquide (LAr) d'ATLAS au LHC puis le R&D effectué dans CALICE pour lire ceux de l'ILC en passant par les circuits développés pour lire les photomultiplicateurs multi-anode (MaPMT) pour OPERA ou pour la luminosité d'ATLAS et qui ont aussi des applications en imagerie médicale. Commencée au début des années 90, le R&D pour la calorimétrie d'ATLAS était extrêmement challenging en termes de vitesse de lecture, tenue aux radiations et précision de mesure. La vitesse élevée a nécessité une nouvelle approche de préamplificateurs de courant plutôt que de charge et la définition du bruit en ENI. Les préamplificateurs ont été développés a Orsay ainsi que les shapers monolithiques, ils sont détaillés dans le chapitre 1 ainsi que les considérations sur le filtrage numérique, qui constituait une nouveauté pour la communauté et qui ne donnait pas les résultas escomptés au début. Le chapitre 2 est consacré au système de calibration, développé et produit par Orsay et dont la performance poussée a nécessité des études approfondies. Le chapitre 3 clôt les études pour ATLAS avec un résumé des mesures qui ont dû être faites sur les 200 000 voies du détecteur pour le comprendre et le modéliser afin d'atteindre partout la précision et l'uniformité meilleures que le pourcent. Ces travaux pour ATLAS se sont achevés en 2004, même si des développements ont été réalisés pour les calorimètres de NA48 et D0 durant cette même période et sur des sujets connexes qui ne sont pas détaillés ici. La prochaine génération de collisionneurs après le LHC nécessitera une nouvelle génération de calorimètres, beaucoup plus granulaires (on parle d' « imaging calorimetry », avec des centaines de millions de canaux) et d'électronique de lecture intégrée dans le détecteur. Les ASICs développés pour cette application dans le cadre de la collaboration « CALICE » sont décrits au chapitre 4. Ils intègrent toutes les fonctions d'amplification, digitisation et lecture intégrée qui ont font de véritables « Systems On Chip » (SoC). Une famille de 3 circuits permet de lire le calorimètre électromagnétique Silicium-Tungstène, les RPCs du calorimètre hadronique digital ou les SiPM du calorimètre hadronique analogique ; très performants et versatiles, ils trouvent de nombreuses applications extérieures Ces circuits ont repris de précédents blocs de chips mis au point dans les années 2000 pour lire les photomultiplicateurs multi-anodes du Target Tracker de l'expérience OPERA puis du luminomètre de l'expérience ATLAS et qui sont décrits au chapitre 5 Ces circuits trouvent une continuation actuelle dans les photodétecteurs intégrés de grandes dimensions, développés pour de futures expériences Neutrino.
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García, García Eduardo José. "Novel Front-end Electronics for Time Projection Chamber Detectors." Doctoral thesis, Universitat Politècnica de València, 2012. http://hdl.handle.net/10251/16980.

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Este trabajo ha sido realizado en la Organización Europea para la Investigación Nuclear (CERN) y forma parte del proyecto de investigación Europeo para futuros aceleradores lineales (EUDET). En física de partículas existen diferentes categorías de detectores de partículas. El diseño presentado esta centrado en un tipo particular de detector de trayectoria de partículas denominado TPC (Time Projection Chamber) que proporciona una imagen en tres dimensiones de las partículas eléctricamente cargadas que atraviesan su volumen gaseoso. La tesis incluye un estudio de los objetivos para futuros detectores, resumiendo los parámetros que un sistema de adquisición de datos debe cumplir en esos casos. Además, estos requisitos son comparados con los actuales sistemas de lectura utilizados en diferentes detectores TPC. Se concluye que ninguno de los sistemas cumple las restrictivas condiciones. Algunos de los principales objetivos para futuros detectores TPC son un altísimo nivel de integración, incremento del número de canales, electrónica más rápida y muy baja potencia. El principal inconveniente del estado del arte de los sistemas anteriores es la utilización de varios circuitos integrados en la cadena de adquisición. Este hecho hace imposible alcanzar el altísimo nivel de integración requerido para futuros detectores. Además, un aumento del número de canales y frecuencia de muestreo haría incrementar hasta valores no permitidos la potencia utilizada. Y en consecuencia, incrementar la refrigeración necesaria (en caso de ser posible). Una de las novedades presentadas es la integración de toda la cadena de adquisición (filtros analógicos de entrada, conversor analógico-digital (ADC) y procesado de señal digital) en un único circuito integrado en tecnología de 130nm. Este chip es el primero que realiza esta altísima integración para detectores TPC. Por otro lado, se presenta un análisis detallado de los filtros de procesado de señal. Los objetivos más importantes es la reducció
García García, EJ. (2012). Novel Front-end Electronics for Time Projection Chamber Detectors [Tesis doctoral no publicada]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/16980
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Li, Mengxiong. "5 GHz optical front end in 0.35μm CMOS." Thesis, University of Nottingham, 2007. http://eprints.nottingham.ac.uk/10368/.

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With the advantages of low cost, low power consumption, high reliability and potential for large scale integration, CMOS monolithically integrated active pixel chips have significant application in optical sensing systems. The optical front end presented in this thesis will have application in Optical Scanning Acoustic Microscope System (O-SAM), which involves a totally non-contact method of acquiring images of the interaction between surface acoustic waves (SAWs) and a solid material to be characterized. In this work, an ultra fast optical front-end using improved regulated cascade scheme is developed based on AMS 0.35mm CMOS technology. The receiver consists of an integrated photodiode, a transimpedance amplifier, a mixer, an IF amplifier and an output buffer. By treating the n-well in standard CMOS technology as a screening terminal to block the slow photo-generated bulk carriers and interdigitizing shallow p+ junctions as the active region, the integrated photodiode operates up to 4.9 GHz with no process modification. Its responsivity was measured to be 0.016 A/W. With multi-inductive-series peaking technique, the improved ReGulated-Cascade (RGC) transimpedance amplifier achieves an experimentally measured -3dB bandwidth of more than 6 GHz and a transimpedance gain of 51 dBW, which is the fastest reported TIA in CMOS 0.35mm technology. The 5 GHz Gilbert cell mixer produces a conversion gain of 11 dB, which greatly minimized the noise contribution from the IF stage. The noise figure and input IIP3 of the mixer were measured to be 15.7 dB and 1.5 dBm, respectively. The IF amplifier and output buffer pick up and further amplify the signal for post processing. The optical front end demonstrates a typical equivalent input noise current of 35 pA=pHz at 5 GHz, and a total transimpedance gain of 83 dB ohm whileconsuming a total current of 40 mA from 3.3 V power supply. The -3 dB bandwidth for the optical front end was measured to be 4.9 GHz. All the prototype chips, including the optical front end, and the individual circuits including the photodiode, TIA, mixer were probe-tested and all the measurements were taken with Anritsu VNA 37397D and Anritsu spectrum analyser MS2721A.
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Rabén, Hans. "Receiver Front-End Design for WiMAX/LTE in 90 nm CMOS : Receiver Front-End Design for WiMAX/LTE in 90 nm CMOS." Thesis, University of Gävle, Ämnesavdelningen för elektronik, 2009. http://urn.kb.se/resolve?urn=urn:nbn:se:hig:diva-5425.

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Chen, Yingtao. "Simulations and electronics development for the LHAASO experiment." Thesis, Paris 11, 2015. http://www.theses.fr/2015PA112147/document.

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Le travail de thèse porte sur l'étude de l'électronique front-end pour le télescope WFCTA (Wide Field of View Cherenkov Telescope Array,) qui est l'un des détecteurs de l’observatoire LHAASO (Large High Altitude Air shower Observatory,). Le manuscrit de thèse couvre six thèmes principaux allant de la simulation physique au développement d’un nouveau système d'acquisition de données.Tout d'abord, les principes de la physique des rayons cosmiques et de l'expérience LHAASO sont présentés donnant ainsi une introduction sur les sujets discutés dans la thèse. Des simulations ont été faites dans le but de comprendre la propagation des rayons cosmiques dans l'atmosphère et d’en déduire les caractéristiques du signal d'entrée de l'électronique. Ces simulations ont également été utilisées pour approfondir la compréhension des spécifications du télescope et de les vérifier.Un nouveau modèle de PMT a été élaboré pour être utilisé dans les simulations. Ce nouveau modèle est comparé aux autres modèles de PMT. Des modèles d’électronique pour les conceptions basées sur les composants électroniques classiques et sur l’ASIC (Application-specific Integrated Circuit) sont construites et étudiées. Ces deux solutions remplissent les spécifications du télescope WFCTA. Néanmoins, compte tenu du développement de la micro-électronique, il est proposé que l’électronique des télescopes de haute performance devrait être basée sur l’ASIC.L'ASIC sélectionné, PARISROC 2, est évalué en utilisant des bancs de tests existants. Les résultats montrent que ces bancs de tests ne peuvent pas démontrer pleinement la véritable performance de l’ASIC. Par conséquent, une carte électronique front-end prototype qui est basée sur ASIC a été conçu et fabriqué. Plusieurs modifications ont été apportées pour améliorer la performance de la nouvelle carte. Une description détaillée de ce développement est présentée dans la thèse. Un nouveau système d’acquisition de données a également été conçu pour améliorer la capacité de lecture de données dans le banc de tests de la carte front-end.Enfin, une série de tests ont été effectués pour vérifier le concept de design et pour évaluer la performance de la carte front-end. Ces résultats montrent la bonne performance générale de l'ASIC PARISROC 2 et que la carte front-end répond globalement aux spécifications de la WFCTA. Basé sur les résultats de ce travail de thèse, un nouveau ASIC, mieux adapté pour les télescopes de type WFCTA, a été conçu et est actuellement en cours de fabrication
This thesis is focused on the study of the front-end electronics for the wide field of view Cherenkov telescope array (WFCTA), which is one of the large high altitude air shower observatory (LHAASO) detectors. The thesis manuscript covers six main topics going from the physics simulations to the implementation of a new data acquisition system. The physics of cosmic rays and the LHAASO experiment is presented giving foundation for discussion of the main topics of the thesis. Simulations were performed to understand the propagation of cosmic rays in the atmosphere and to determine the characteristics of the input signal of the electronics. These simulations allow also understand the specifications of the telescope and to verify them. A new PMT model was successfully built for both physical and electronic simulations. This new model is compared to other models and its performance is evaluated. Behavior models for the designs based on the classical electronics and application-specific integrated circuit (ASIC) were built and studied. It is shown that both solutions fit the requirements of the telescope. However, considering the development of the micro-electronics, it is proposed that the electronics of the high-performance telescopes should be based on ASIC. The selected ASIC, PARISROC 2, is evaluated by using the existing application boards. The results showed that the designs considered could not fully demonstrate the real performance of the chip. Therefore, a prototype front-end electronics board, based on PARISROC 2, was designed, implemented and fabricated. Several modifications and enhancements were made to improve the performance of the new design. A detailed description of the development is presented and discussed in the manuscript. Furthermore, a new data acquisition system was developed to enhance the readout capabilities in the front-end test bench.Finally, a series of tests were performed to verify the concept of the design and to evaluate the front-end board. The results show the good general performance of the PARISROC 2 and that this design globally meets the specifications of the WFCTA. Based on the results of this thesis work, a new ASIC chip, better adapted for telescopes such as WFCTA, has been designed and is currently being fabricated
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Kantasuwan, Thana. "RF front-end CMOS design for build-in-self-test." Thesis, Linköping University, Department of Electrical Engineering, 2004. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2642.

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In this master degree work, a digital attenuator and a low noise amplifier (LNA) have been designed and integrated with the RF front-end receiver for IEEE 802.11b Wireless LAN standard. Firstly, the 4-bit digitally controlled attenuator has been designed with theattenuation range of 50 to 80 dB and reflection coefficient less than -25 dB. Next, the single stage wide band low noise amplifier with voltage gain larger than 14 dB and noise figure below 4 dB has been designed to operate at frequency 2.4 GHz. Finally, the integration with a down-conversion mixer has been done and evaluated its performance.

The attenuator and low noise amplifier desired in this thesis have been implemented using standard CMOS 0.35µm technology and validated by the simulation tools Cadence Spectre-RF.

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Asmussen, Jeremy Dennis. "Wideband body enabled RF front end transceiver in 0.18-[micrometer] technology." Pullman, Wash. : Washington State University, 2009. http://www.dissertations.wsu.edu/Thesis/Fall2009/j_asmussen_111509.pdf.

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Thesis (M.S. of electrical engineering)--Washington State University, December 2009.
Title from PDF title page (viewed on Jan. 14, 2010). "Department of Electrical Engineering and Computer Science." Includes bibliographical references (p. 62-63).
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Books on the topic "Electronics front-end"

1

Sullivan, Love Janine, and Ajluni Cheryl J, eds. RF front-end: World class designs. Amsterdam: Newnes/Elsevier, 2009.

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Rivetti, Angelo. Cmos: Front-End Electronics for Radiation Sensors. Taylor & Francis Group, 2018.

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Cmos: Front-End Electronics for Radiation Sensors. Taylor & Francis Group, 2015.

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Rivetti, Angelo. Cmos: Front-End Electronics for Radiation Sensors. Taylor & Francis Group, 2018.

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Rivetti, Angelo. Cmos: Front-End Electronics for Radiation Sensors. Taylor & Francis Group, 2017.

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Rivetti, Angelo. Cmos: Front-End Electronics for Radiation Sensors. Taylor & Francis Group, 2018.

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Rivetti, Angelo. Cmos: Front-End Electronics for Radiation Sensors. Taylor & Francis Group, 2018.

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Lai, Jih-sheng. 3-phase Active-front-end Power Conversion (Synthesis Lectures on Power Electronics). Morgan & Claypool Publishers, 2007.

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Darabi, Hooman, and Ahmad Mirzaei. Integration of Passive RF Front-End Components in Socs. Cambridge University Press, 2013.

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Integration Of Passive Rf Front End Components In Socs. Cambridge University Press, 2013.

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Book chapters on the topic "Electronics front-end"

1

Velure, Arild. "Front-End Electronics." In Springer Theses, 11–40. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-71559-5_2.

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Bindal, Ahmet. "Front-End Electronics for Embedded Systems." In Electronics for Embedded Systems, 175–200. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-39439-8_8.

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Marzocca, Cristoforo, Fabio Ciciriello, Francesco Corsi, Francesco Licciulli, and Gianvito Matarrese. "Front-End Electronics for Silicon Photomultipliers." In Analog Electronics for Radiation Detection, 203–35. Boca Raton : Taylor & Francis, CRC Press, 2016. | Series: Devices, circuits, and systems ; 59: CRC Press, 2017. http://dx.doi.org/10.1201/b20096-9.

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Anghinolfi, Francis, Paul Aspell, Michael Campbell, Erik Heijne, Pierre Jarron, and Gerrit Meddeler. "Development of Front End Electronics for Future Supercollider Experiments." In New Technologies for Supercolliders, 105–23. Boston, MA: Springer US, 1991. http://dx.doi.org/10.1007/978-1-4684-1360-1_9.

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Malcovati, Piero, Marcello De Matteis, Alessandro Pezzotta, Marco Grassi, Marco Croce, Marco Sabatini, and Andrea Baschirotto. "A Low-Power Continuous-Time Accelerometer Front-End." In Wideband Continuous-time ΣΔ ADCs, Automotive Electronics, and Power Management, 215–35. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-41670-0_12.

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Pedretti, Davide, Marco Bellato, Antonio Bergnoli, Riccardo Brugnera, Daniele Corti, Flavio Dal Corso, Alberto Garfagnini, et al. "The Global Control Unit for the JUNO Front-End Electronics." In Springer Proceedings in Physics, 186–89. Singapore: Springer Singapore, 2018. http://dx.doi.org/10.1007/978-981-13-1313-4_37.

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Kulshreshtha, Tanmai, Sudhir Kumar Singh, Ruchi Chaurasia, Manish Kumar, and Naimur Rahman Kidwai. "Low-Power Front End for Continuous-Wave Doppler Harmonic Ultrasonography System." In Proceedings of Trends in Electronics and Health Informatics, 449–57. Singapore: Springer Singapore, 2022. http://dx.doi.org/10.1007/978-981-16-8826-3_38.

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Alessandrello, A., D. V. Camin, A. Giuliani, and G. Pessina. "Considerations on Front End Electronics for Bolometric Detectors with Resistive Readout." In Low Temperature Detectors for Neutrinos and Dark Matter, 122–34. Berlin, Heidelberg: Springer Berlin Heidelberg, 1987. http://dx.doi.org/10.1007/978-3-642-72959-1_13.

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Newcomer, F. M., S. Tedja, R. Van Berg, J. Van der Spiegel, and H. H. Williams. "Front end Signal Processing Electronics for the SDC Straw Tracking System." In Supercollider 5, 43–46. Boston, MA: Springer US, 1994. http://dx.doi.org/10.1007/978-1-4615-2439-7_10.

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García-Vázquez, Hugo, Alexandre Quenon, Grigory Popov, and Fortunato Carlos Dualibe. "Design of an ULP-ULV RF-Powered CMOS Front-End for Low-Rate Autonomous Sensors." In Wireless Power Transmission for Sustainable Electronics, 323–45. Hoboken, NJ, USA: John Wiley & Sons, Inc., 2020. http://dx.doi.org/10.1002/9781119578598.ch11.

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Conference papers on the topic "Electronics front-end"

1

Spieler, Helmuth. "Front-End Electronics and Signal Processing." In INSTRUMENTATION IN ELEMENTARY PARTICLE PHYSICS. AIP, 2003. http://dx.doi.org/10.1063/1.1604074.

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MARTIN, F. "THE ATLAS TILE CALORIMETER FRONT END ELECTRONICS." In Proceedings of the Tenth International Conference. WORLD SCIENTIFIC, 2003. http://dx.doi.org/10.1142/9789812704894_0077.

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FERRER RIBAS, E. "OVERVIEW OF LIQUID ARGON FRONT END ELECTRONICS." In Proceedings of the Tenth International Conference. WORLD SCIENTIFIC, 2003. http://dx.doi.org/10.1142/9789812704894_0078.

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BRETON, DOMINIQUE. "THE FRONT-END ELECTRONICS FOR LHCB CALORIMETERS." In Proceedings of the Tenth International Conference. WORLD SCIENTIFIC, 2003. http://dx.doi.org/10.1142/9789812704894_0080.

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Ojarand, Jaan, Athanasios T. Giannitsis, Mart Min, and Raul Land. "Front-end electronics for impedimetric microfluidic devices." In SPIE Microtechnologies, edited by Ángel B. Rodríguez-Vázquez, Rainer Adelung, Ricardo A. Carmona-Galán, Gustavo Liñán-Cembrano, and Carsten Ronning. SPIE, 2011. http://dx.doi.org/10.1117/12.886553.

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Scotti, Valentina, Alfonso Boiano, Lorenzo Fabris, Massimo Manghisoni, Giuseppe Osteria, Francesco Perfetto, Valerio Re, Elisa Riceputi, and Gianluigi Zampa. "Front-end Electronics for the GAPS Tracker." In 36th International Cosmic Ray Conference. Trieste, Italy: Sissa Medialab, 2019. http://dx.doi.org/10.22323/1.358.0136.

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Costa, Jose Abritta, Tony Igor Dornelas, Rafael Antunes Nobrega, and Augusto Santiago Cerqueira. "Front-end electronics of the Neutrinos Angra Project." In 2014 IEEE International Instrumentation and Measurement Technology Conference (I2MTC). IEEE, 2014. http://dx.doi.org/10.1109/i2mtc.2014.6860996.

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GO, A., P. ASPELL, D. BARNEY, P. BLOCH, A. PEISERT, B. LOFSTEDT, S. REYNAUD, S. BORKAR, and S. LALWANI. "FRONT-END ELECTRONICS FOR THE CMS PRESHOWER DETECTOR." In Proceedings of the Tenth International Conference. WORLD SCIENTIFIC, 2003. http://dx.doi.org/10.1142/9789812704894_0079.

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NELSON, C. A., and T. M. SHAW. "FRONT-END ELECTRONICS UPGRADE FOR THE CDF CALORIMETERS." In Proceedings of the Tenth International Conference. WORLD SCIENTIFIC, 2003. http://dx.doi.org/10.1142/9789812704894_0081.

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Tchoualack, A. T., L. Ottaviani, W. Rahajandraibe, J. P. Walder, and W. Vervisch. "Front End Electronics for SiC Based Neutron Dosimetry." In 2020 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC). IEEE, 2020. http://dx.doi.org/10.1109/nss/mic42677.2020.9507787.

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Reports on the topic "Electronics front-end"

1

Levi, M. Front-end electronics development for the SSC. Office of Scientific and Technical Information (OSTI), December 1990. http://dx.doi.org/10.2172/5286319.

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Citterio, M., S. Rescia, and V. Radeka. Radiation effects on front-end electronics for noble liquid calorimetry. Office of Scientific and Technical Information (OSTI), December 1994. http://dx.doi.org/10.2172/34408.

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Conrad, Ryan C., Scott J. Morris, Leon E. Smith, and Daniel T. Keller. Front-end Electronics for Unattended Measurement (FEUM). Prototype Test Plan. Office of Scientific and Technical Information (OSTI), September 2015. http://dx.doi.org/10.2172/1225159.

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Conrad, Ryan C., Daniel T. Keller, Scott J. Morris, and Leon E. Smith. Front-end Electronics for Unattended Measurement (FEUM). Results of Prototype Evaluation. Office of Scientific and Technical Information (OSTI), July 2015. http://dx.doi.org/10.2172/1225160.

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Medepalli, Praneeth, and Grzegorz Deptuch. Studies of Front-End Electronics for High-Precision Timing Measurements with LGADs. Office of Scientific and Technical Information (OSTI), August 2019. http://dx.doi.org/10.2172/1615358.

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Ezell, N. Dianne Bull, Lorenzo Fabris, Richard J. Wunderlich, Padhraic L. Mulligan, Christian M. Petrie, and Charles L. Britton, Jr. Commercial Design of Custom Front-end Electronics for a High Temperature Fission Chamber. Office of Scientific and Technical Information (OSTI), October 2018. http://dx.doi.org/10.2172/1479737.

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James J. Beatty Richard D. Kass. Development of a low-power, low-cost front end electronics module for large scale distributed neutrino detectors. Office of Scientific and Technical Information (OSTI), March 2008. http://dx.doi.org/10.2172/948830.

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Iliev, Metodi, and Kiril Dimitrov Ianakiev. Report on Task USA A 0931 (A.252) Implementation of Fast, Front-End Electronics for Improved Low-Dead Time Neutron Counting. Office of Scientific and Technical Information (OSTI), December 2019. http://dx.doi.org/10.2172/1581264.

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Super conductor Supercollider front end electronics development; ring imaging Cerenkov studies; and warm liquid calorimetry. Final report. Office of Scientific and Technical Information (OSTI), December 1998. http://dx.doi.org/10.2172/291148.

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