Academic literature on the topic 'Digital logic circuits'
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Journal articles on the topic "Digital logic circuits"
Hasuo, S., and T. Imamura. "Digital logic circuits." Proceedings of the IEEE 77, no. 8 (1989): 1177–93. http://dx.doi.org/10.1109/5.34118.
Full textDuncan, Philip N., Siavash Ahrar, and Elliot E. Hui. "Scaling of pneumatic digital logic circuits." Lab on a Chip 15, no. 5 (2015): 1360–65. http://dx.doi.org/10.1039/c4lc01048e.
Full textKamde, Shilpa, Jitesh Shinde, Sanjay Badjate, and Pratik Hajare. "Comparative Analysis Domino Logic Based Techniques For VLSI Circuit." INTERNATIONAL JOURNAL OF COMPUTERS & TECHNOLOGY 12, no. 8 (March 21, 2014): 3803–8. http://dx.doi.org/10.24297/ijct.v12i8.2998.
Full textHou, Yue Wei, Xin Xu, Wei Wang, Xiao Bo Tian, and Hai Jun Liu. "Titanium Oxide Memristor Based Digital Encoder Circuit." Applied Mechanics and Materials 644-650 (September 2014): 3430–33. http://dx.doi.org/10.4028/www.scientific.net/amm.644-650.3430.
Full textRaman, Karthik, and Andreas Wagner. "The evolvability of programmable hardware." Journal of The Royal Society Interface 8, no. 55 (June 9, 2010): 269–81. http://dx.doi.org/10.1098/rsif.2010.0212.
Full textDokic, B. L. "A Review on Energy Efficient CMOS Digital Logic." Engineering, Technology & Applied Science Research 3, no. 6 (December 18, 2013): 552–61. http://dx.doi.org/10.48084/etasr.389.
Full textAvdeev, N. A., and P. N. Bibilo. "Design of Digital Operational Units with Low Power Consumption." Programmnaya Ingeneria 12, no. 2 (March 16, 2021): 63–73. http://dx.doi.org/10.17587/prin.12.63-73.
Full textJóźwiak, Lech. "General Decomposition and Its Use in Digital Circuit Synthesis." VLSI Design 3, no. 3-4 (January 1, 1995): 225–48. http://dx.doi.org/10.1155/1995/16259.
Full textShukla, Vandana, O. P. Singh, G. R. Mishra, and R. K. Tiwari. "Design and Implementation of Four Bit Binary Shifter Circuit Using Reversible Logic Approach." International Journal of Reconfigurable and Embedded Systems (IJRES) 4, no. 3 (November 1, 2015): 213. http://dx.doi.org/10.11591/ijres.v4.i3.pp213-218.
Full textŽemva, Andrej, Andrej Trost, and Baldomir Zajc. "Educational Programmable System for Prototyping Digital Circuits." International Journal of Electrical Engineering & Education 35, no. 3 (July 1998): 236–44. http://dx.doi.org/10.1177/002072099803500306.
Full textDissertations / Theses on the topic "Digital logic circuits"
Silva, Augusto Neutzling. "Syhthesis of thereshold logic based circuits." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2014. http://hdl.handle.net/10183/119435.
Full textIn this work, a novel method to synthesize digital integrated circuits (ICs) based on threshold logic gates (TLG) is proposed. Synthesis considering TLGs is quite relevant, since threshold logic has been revisited as a promising alternative to conventional CMOS IC design due to its suitability to emerging technologies, such as resonant tunneling diodes, memristors and spintronics devices. Identification and synthesis of threshold logic functions (TLF) are fundamental steps for the development of an IC design flow based on threshold logic. The first contribution is a heuristic algorithm to identify if a function can be implemented as a single TLG. Furthermore, if a function is not detected as a TLF, the method uses the functional composition approach to generate an optimized TLG network that implements the target function. The identification method is able to assign optimal variable weights and optimal threshold value to implement the function. It is the first heuristic algorithm that is not based on integer linear programming (ILP) that is able to identify all threshold functions with up to six variables. Moreover, it also identifies more functions than other related heuristic methods when the number of variables is more than six. Differently from ILP based approaches, the proposed algorithm is scalable. The average execution time is less than 1 ms per function. The second major contribution is the constructive process applied to generate optimized TLG networks taking into account multiple goals and design costs, like gate count, logic depth and number of interconnections. Experiments carried out over MCNC benchmark circuits show an average gate count reduction of 32%, reaching up to 54% of reduction in some cases, when compared to related approaches.
Gaubatz, Donald Almo. "Logic programming analysis of asynchronous digital circuits." Thesis, University of Cambridge, 1991. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.386062.
Full textLiu, Tai-hung. "Logic synthesis for high-performance digital circuits /." Digital version accessible at:, 1999. http://wwwlib.umi.com/cr/utexas/main.
Full textXia, Yinshui. "Low power design techniques for digital logic circuits." Thesis, Edinburgh Napier University, 2003. http://researchrepository.napier.ac.uk/Output/6887.
Full textDuncan, Austin H. "Logic Gates Using the Digilent Basys3." Digital Commons @ East Tennessee State University, 2015. https://dc.etsu.edu/honors/311.
Full textHacker, Charles Hilton, and n/a. "WinLogiLab - A Computer-Based Teaching Suite for Digital Logic Design." Griffith University. School of Engineering, 2001. http://www4.gu.edu.au:8080/adt-root/public/adt-QGU20050915.172404.
Full textHacker, Charles. "WinLogiLab - A Computer-Based Teaching Suite for Digital Logic Design." Thesis, Griffith University, 2001. http://hdl.handle.net/10072/367209.
Full textThesis (Masters)
Master of Philosophy (MPhil)
School of Engineering
Science, Environment, Engineering and Technology
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Ramirez, Ortiz Rolando Carleton University Dissertation Engineering Electronics. "Circuit design rules for mixed static and dynamics CMOS logic circuits." Ottawa, 1999.
Find full textKeeble, Clifford George. "The synthesis of self-timed circuits by formal methods." Thesis, University of Southampton, 1993. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.239920.
Full textSah, Puja. "Implementing Digital Logic Design Concepts Using Paper Electronics." Thesis, University of North Texas, 2018. https://digital.library.unt.edu/ark:/67531/metadc1157633/.
Full textBooks on the topic "Digital logic circuits"
J, Adam L., ed. Digital circuits. London: E. Arnold, 1990.
Find full textDigital circuits: Logic and design. New York: M. Dekker, 1985.
Find full text1930-, Pierce Bill, ed. Digital logic: Circuits and systems. Albany, N.Y: Delmar Publishers, 1988.
Find full textLangholz, Gideon. Digital logic design. Dubuque, Iowa: Wm. C. Brown, 1988.
Find full textAbraham, Kandel, and Mott Joe L, eds. Digital logic design. Dubuque, Iowa: Wm. C. Brown, 1988.
Find full textBogart, Theodore F. Introduction to digital circuits. Lake Forest: McGraw, 1992.
Find full textIntroduction to digital circuits. Lake Forest, Ill: Glencoe, 1992.
Find full textJ, Martin Alain, ed. Asynchronous pulse logic. Boston: Kluwer Academic Publishers, 2002.
Find full textMims, Forrest M. Engineer's mini-notebook: Digital logic circuits. Ft. Worth, Tex: Radio Shack], 1986.
Find full textT, Radhakrishnan, ed. Digital logic and computer organization. New Delhi: Prentice Hall of India (P) Ltd., 2006.
Find full textBook chapters on the topic "Digital logic circuits"
Nixon, Mark S. "Logic Circuits." In Introductory Digital Design, 49–84. London: Macmillan Education UK, 1995. http://dx.doi.org/10.1007/978-1-349-13508-0_3.
Full textChalk, B. S. "Digital Logic Circuits." In Computer Organisation and Architecture, 8–22. London: Macmillan Education UK, 1996. http://dx.doi.org/10.1007/978-1-349-13871-5_2.
Full textTooley, Mike. "Logic Circuits." In Aircraft Digital Electronic and Computer Systems, 70–94. 3rd ed. London: Routledge, 2022. http://dx.doi.org/10.1201/9781003215516-5.
Full textStonham, T. J. "Practical Digital Circuits." In Digital Logic Techniques, 145–60. Boston, MA: Springer US, 1987. http://dx.doi.org/10.1007/978-1-4615-6856-8_7.
Full textStonham, T. J. "Design of Sequential Logic Circuits." In Digital Logic Techniques, 82–114. Boston, MA: Springer US, 1987. http://dx.doi.org/10.1007/978-1-4615-6856-8_5.
Full textHajji, Bekkay, Adel Mellit, and Loubna Bouselham. "Sequential Logic Circuits." In A Practical Guide for Simulation and FPGA Implementation of Digital Design, 119–73. Singapore: Springer Singapore, 2022. http://dx.doi.org/10.1007/978-981-19-0615-2_4.
Full textHajji, Bekkay, Adel Mellit, and Loubna Bouselham. "Combinational Logic Circuits." In A Practical Guide for Simulation and FPGA Implementation of Digital Design, 45–118. Singapore: Springer Singapore, 2022. http://dx.doi.org/10.1007/978-981-19-0615-2_3.
Full textChakradhar, Srimat T., Vishwani D. Agrawal, and Michael L. Bushneil. "Logic Circuits and Testing." In Neural Models and Algorithms for Digital Testing, 9–19. Boston, MA: Springer US, 1991. http://dx.doi.org/10.1007/978-1-4615-3958-2_2.
Full textBarrett, Steven F. "Fuzzy Logic." In Synthesis Lectures on Digital Circuits & Systems, 123–47. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-21877-4_5.
Full textLaMeres, Brock J. "Digital Circuitry and Interfacing." In Introduction to Logic Circuits & Logic Design with Verilog, 37–80. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-53883-9_3.
Full textConference papers on the topic "Digital logic circuits"
Chen, J. E., Chung Len Lee, Wen Zen Shen, and Beyin Chen. "Fanout fault analysis for digital logic circuits." In Proceedings of the Fourth Asian Test Symposium. IEEE, 1995. http://dx.doi.org/10.1109/ats.1995.485313.
Full textSoeleman, Hendrawan, and Kaushik Roy. "Ultra-low power digital subthreshold logic circuits." In the 1999 international symposium. New York, New York, USA: ACM Press, 1999. http://dx.doi.org/10.1145/313817.313874.
Full textSziray, Jozsef. "Test calculation for logic and short-circuit faults in digital circuits." In 2012 IEEE 16th International Conference on Intelligent Engineering Systems (INES). IEEE, 2012. http://dx.doi.org/10.1109/ines.2012.6249815.
Full textYang, Xiangning, Eric Weglarz, and Kewal Saluja. "On NBTI Degradation Process in Digital Logic Circuits." In 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07). IEEE, 2007. http://dx.doi.org/10.1109/vlsid.2007.117.
Full textShreya, Sonal, and Rajeevan Chandel. "Performance analysis of CNTFET based digital logic circuits." In 2014 Students Conference on Engineering and Systems (SCES). IEEE, 2014. http://dx.doi.org/10.1109/sces.2014.6880063.
Full textSmith, S. Desmond. "Demonstration of a simple optical finite state machine and restoring all-optical digital logic." In OSA Annual Meeting. Washington, D.C.: Optica Publishing Group, 1986. http://dx.doi.org/10.1364/oam.1986.we3.
Full textJoo-Young Kim and Hoi-Jun Yoo. "Bitwise Competition Logic for compact digital comparator." In 2007 IEEE Asian Solid-State Circuits Conference. IEEE, 2007. http://dx.doi.org/10.1109/asscc.2007.4425682.
Full textAvedillo, M. J., and J. M. Quintana. "A threshold logic synthesis tool for RTD circuits." In Euromicro Symposium on Digital System Design, 2004. DSD 2004. IEEE, 2004. http://dx.doi.org/10.1109/dsd.2004.1333337.
Full textGhasemi, Mehdi, Mohammad Hossein Moaiyeri, and Keivan Navi. "Analytical performance evaluation of molecular logic circuits." In 2012 16th CSI International Symposium on Computer Architecture and Digital Systems (CADS). IEEE, 2012. http://dx.doi.org/10.1109/cads.2012.6316428.
Full textChan-Geun Yoon, Tae-Won Ahn, and Ho-Bum Song. "A fast response digital logic tone detector." In 48th Midwest Symposium on Circuits and Systems, 2005. IEEE, 2005. http://dx.doi.org/10.1109/mwscas.2005.1594083.
Full textReports on the topic "Digital logic circuits"
Reddy, Sudhakar M. On Timing Faults in Digital Logic Circuits. Fort Belvoir, VA: Defense Technical Information Center, August 1993. http://dx.doi.org/10.21236/ada268714.
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