Dissertations / Theses on the topic 'Digital filter synthesis'

Thesis (M. S.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2009.
Committee Chair: Smith, Mark J. T.; Committee Co-Chair: Mersereau, Russell M.; Committee Member: Anderson, David; Committee Member: Lanterman, Aaron; Committee Member: Rosen, Gail; Committee Member: Wardi, Yorai.

The purpose of this thesis is to formulate a technically sound approach to designing Infinite Impulse Response (IIR) digital filters using high-level modeling tools. High-level modeling tools provide the ability to build and simulate ideal models. Once proper validation is complete on these ideal models, the user can then migrate to lower levels of abstraction until an actual real world model is designed. High-level modeling tools are the epitome of the top-down design concept in which design first takes place with the basic functional knowledge of a system. With each level of abstraction, validation is performed. High-level modeling tools are used throughout industry and their application is continually growing especially in the DSP area where many modes of communications are expanding. High-level modeling tools and validation significantly address this complex expansion by utilizing an ideal representation of a complicated network.
Master of Science

Software radios (SWR) have been proposed for wireless communication systems to enable them to operate according to incompatible wireless communication standards by implementing most analog functions in the digital section on software-reprogrammable hardware. However, this significantly increases the required computations for SWR functionality, mainly because of the digital front-end computationally intensive filtering functions, such as sample rate conversion (SRC), channelization, and equalization. For increasing the computational efficiency of SWR systems, two new SRC methods with better performance than conventional SRC methods are presented. In the first SRC method, we modify the conventional CIC filters to enable them to perform SRC on slightly oversampled signals efficiently. We also describe a SRC method with high efficiency for SRC by factors greater than unity at which SRC in SWR systems may be computationally demanding. This SRC method efficiently increases the sample rate of wideband signals, especially in SWR base station transmitters, by applying Lagrange interpolation for evaluating output samples hierarchically using a low-rate signal that is computed with low cost from the input signal. A new channelizer/synthesizer is also developed for extracting/combining frequency multiplexed channels in SWR transceivers. The efficiency of this channelizer/synthesizer, which uses modulated perfect reconstruction (PR) filter banks, is higher than polyphase filter banks (when applicable) for processing few channels, and significantly higher than discrete filter banks for processing any number of variable-bandwidth channels where polyphase filter banks are inapplicable. Because the available methods for designing modulated PR filter banks are inapplicable due to the required number of subchannels and stopband attenuation of the prototype filters, a new design method for these filter banks is introduced. This method is reliable and significantly faster than the existing methods. Modulated PR filter banks are also considered for implementing a frequency-domain block blind equalizer capable of equalizing SWR signals transmitted though channels with long impulse responses and severe intersymbol interference (ISI). This blind equalizer adapts by using separate sets of weights to correct for the magnitude and phase distortion of the channel. The adaptation of this blind equalizer is significantly more reliable and its computational requirements increase at a lower rate compared to conventional time-domain equalizers making it efficient for equalizing long channels that exhibit severe ISI.

This thesis deals with the synthesis and optimization of frequency analogue filters with modern active elements usable for higher frequencies. The thesis is divided into three parts, the first part deals with the problematic concerning Leap-Frog combined ARC structure. Due to a difficult design, this method is not described in a detail and used in practice, although it shows e.g. low sensitivity. Firstly, a complete analysis of individual filters was made (for and T endings) and consequently these findings were used during implementation of this method to NAF program. Finally, samples of real filters were realized (for verification of functioning and correct design). Another very interesting topic concerning filters is usage of coupled band-pass for small bandwidth, where it is necessary to solve the problems concerning ratio of building elements values, but also price, quality, size of coils, sensitivity, Q factors, coefficients etc. That is why in practice a coil is very often substituted with other equivalent lossy and lossless blocks which create ARC filters structure. The design and the possibility of usage of lossy grounded elements were described here (such as synthetic inductors, frequency dependent negative resistor). Some parts of the design are individual computer sensitivity analysis, setting of usage and quality comparison of individual lossy grounded blocks. Besides, a program for these elements was created, it is useful for a quick design and depiction of transfer characteristics. The third part deals with the usage of tuning universal filters consisting three or more operational amplifiers, which secures its universality and possibility to create different kinds of transfer characteristic. In practice, Akerberg - Mossberg and Kerwin - Huelsman - Newcomb are the most used types of filters. These were also compared with less common universal filters. In the end, the possibility of digital tuning of universal filter with the help of digital potentiometers for filters of 10th order and frequency around 1 MHz was shown.

International Telemetering Conference Proceedings / October 28-31, 1996 / Town and Country Hotel and Convention Center, San Diego, California
In this paper design and development of a PC- Based S- Band Down Converter/ FM Telemetry Receiver are discussed. With the advent of Direct Digital Synthesis (DDS) & Phase Locked Loop (PLL) technology, availability of GaAs & Silicon MMICs, Coaxial Resonator Oscillator (CRO), SAW Oscillator, SAW Filters and Ceramic Filters, realisation of single card PC- Based Down Converter and Telemetry Receiver has become a reality. With the availability of Direct Digital Synthesis and Phase Locked Loop devices having microprocessor bus compatibility, opens up many application in Telemetry and Telecommunications. In this paper design of local oscillator based on hybrid DDS & PLL technique, Coaxial Resonator Oscillator and Front-end are discussed in detail.

Firstly, a new synthesis method for the generation of the generalized Chebyshev characteristic polynomials has been presented. The general characteristic function is generated by a linear combination of Chebyshev basis characteristic functions. The basis functions for different filtering functions may easily be determined based on the number and position of reflection and transmission zeros. These basis functions enable direct synthesis of both lumped and distributed filter networks. Different filter functions including but not limited to low-pass, bandpass and dual bandpass filters, have been synthesised to demonstrate the general application of the synthesis method. Secondly, a new method for the design of a new class of distributed low-pass filter has been presented that enables exact realisation of the series short circuited transmission lines which are normally approximated via unit elements in other filter realisations. The filters are based on parallel coupled high impedance transmission lines which are terminated at one end in open-circuited stubs. The approach enables realisation of both finite and quarter-wave frequency transmission zeros hence giving improved stopband performance. A complete design is presented and the fabricated low-pass filter demonstrates excellent performance in good agreement with theory. Finally, design techniques for microwave bandpass filters using re-entrant resonators are presented. The key feature is that each re-entrant resonator in the filter generates a passband resonance and a finite frequency transmission zero, above the passband. Thus an Nth degree filter can have N finite frequency transmission zeros with a simple physical realization. A new synthesis technique for pseudo-elliptic low-pass filters suitable for designing re-entrant bandpass filter has also been show-cased. A physically symmetrical 5 pole re-entrant bandpass prototype filter with 5 transmission zeros above the passband was designed and fabricated. Measured results showed good correspondence with theories.

Etude des phenomenes temporels et frequentiels apparaissant lors d'une synthese a partir de la modification des spectres deduits de l'analyse par transformee de fourier a court terme (tfct). Les performances de l'implementation par tfct d'une analyse synthese, d'une operation de filtrage invariant ou dependant du temps, et d'une reduction de bruit ont ete caracterisees

This thesis work is aimed at the high level synthesis of FPGA based IIR digital filters using Vivado HLS produced by Xilinx and HDL coder produced by MathWorks. The Higher Layer Model of the filter was designed in Vivado HLS, MATLAB and Simulink. Simulations, verification and Synthesis of the RTL code was done for both tools.  Further optimizations were done so that the final design could meet the area, timing and throughput requirements. The resulting designs were later evaluated to see which of them satisfies the design objectives specified. This thesis work has revealed that Vivado HLS is able to generate more efficient designs than the HDL coder. Vivado provides the designer with more granularity to control scheduling and binding, the two processes at the heart of HLS. In addition, both tools provide the designer with transparency from modeling up to verification of the RTL code. HDL coder did not meet timing. Vivado HLS on the other hand met the timing requirements. The limitations of each design flow are also discussed in this report.   A review of the tools available on the market today was also done and recommendations about them made. Finally, this thesis work recommends that ABB HVDC should adopt the HLS methodology using Vivado in order to achieve accelerated development. More work should be done to evaluate the possibility of auto C/C++ code generation for RTL synthesis in Vivado. Lastly, an evaluation on the LabVIEW environment should be done as an alternative to the HLS methodology.

Neste trabalho é desenvolvido um método de análise de ciclo limite devido à quantização, à entrada zero, para redes operando com aritmética em ponto flutuante. Condições de inexistência de ciclo limite são facilmente obtidas via cálculo computacional. O método de análise se aplica a redes genéricas de qualquer ordem. É desenvolvido, em seguida, um método de síntese de redes operando com aritmética em ponto fixo, que são imunes a ciclo limite devido à quantização, à entrada zero, utilizando para isso o conceito de redes estruturalmente passivas. As redes assim sintetizadas apresentam sub-redes estruturalmente LBR ou BR na sua malha de realimentação. São as redes de segunda ordem, sintetizadas pelo método proposto. É provado que algumas dessas redes são também imunes a ciclo limite devido a overflow, à entrada zero e a resposta forçada.
This thesis presents a method for analysis of zero-input limit cycles due to quantization, in digital filters realized with floating point arithmetic. Conditions for absence of limit cycles are easily derived by computational calculus. The method of analysis is applicable to generic structures of any order. Following this, a method is presented a method for the synthesis of digital filters realized with fixed point arithmetic, that are free from zero-input limit cycles due to quantization, using the concept of structurally passive networks. The structures synthetized present sub-filters structurally LBR or BR in the feedback loop. Second order structures are synthetized and studied. It is proved that some of these stuctures are also free from zero-input limit cycles due to overflow and stable to forced response.

The aim of this work is to design a filter of the type low–pass of order 5th with Butterworth’s approximation in the range of over-tuning 10 – 100 kHz and if it will be possible so! achieve even higher marginal frequencies. To compare two typical representatives of the frequency filters cascading and non-cascading synthesis from the viewpoint the accuracy of an! approximation function, sensitivity to the tolerance values of components, number of the components (mainly OZ) and viability, especially the possibility of electronic over-tuning in selected frequency range. On the basis of these conditions will be chosen one design, which will be realized later. Further it will be necessary to consider the possibilities of electronic over-tuning and to choose for this over-tuning suitable component, to design user management changes of marginal frequency fm by the help of keyboard + LCD and control application on the PC. For this hardware will be programmed appropriate control software. At the end of this work will be constructed appropriate device, which fullfils requirements written above and will be subjected to the laboratory measurements that verify function of this device. The constructional details of the filter are presented in the enclosure at the end of this work. At the CD are available all materials, which were created during the master’s thesis or which are necessarily concerned.

Дисертація присвячена математичному моделюванню задач криптографії та обробки сигналів з використанням неканонічних гіперкомплексних числових систем, застосування яких зменшує кількість обчислень при функціонуванні таких моделей та дозволяє оптимізувати їх за окремими характеристиками. Результати моделювання задачі розділення секрету показали, що застосування неканонічних гіперкомплексних числових систем, починаючи з вимірності 4, зменшує кількість потрібних обчислень у порівнянні із застосуванням канонічних гіперкомплексних числових систем. Розроблено методи побудови структур неканонічних гіперкомплексних числових систем, що задовольняють критеріям побудови цифрового фільтра. Побудовано цифровий фільтр з коефіцієнтами у неканонічних гіперкомплексних числових системах та проведена його оптимізація за параметричною чутливістю.
The thesis is devoted to mathematical modeling of cryptography and signal problems using non-canonical hypercomplex numerical systems, which reduces the calculations amount during these models functioning and allows their optimization by individual characteristics. The modelling results of secret sharing scheme have shown that the use of non-canonical hypercomplex numerical systems starting from dimension 4 reduces the computation amount required in comparison with the use of canonical hypercomplex numerical systems. The methods for synthesis the noncanonical hypercomplex numerical system structures that satisfy the criteria for building a digital filter are developed. The digital filter is developed with the coefficients in noncanonical hypercomplex numerical systems and optimized by the parametric sensitivity.
Диссертация посвящена математическому моделированию задач криптографии и обработки сигналов с использованием неканонических гиперкомплексных числовых систем (ГЧС). Разработаны методы и способы представления и обработки данных в неканонических ГЧС, применение которых упрощает вид математических моделей, уменьшает количество вычислений при их функционировании и позволяет производить их оптимизацию по отдельным признакам. Анализ результатов работ последнего десятилетия по применению гиперкомплексных числовых систем в решении задач криптографии и обработки сигналов показал следущее: 1) применение канонических ГЧС к задаче разделения секрета повышает криптографическую стойкость, но вместе с тем увеличивает количество операций, требуемых для реализации такой задачи. Применение неканонических ГЧС дает возможность минимизировать количество вычислений за счет меньшей размерности системы; 2) синтез цифрового фильтра с использованием канонических ГЧС дает результаты по оптимизации его параметрической чувствительности, но поскольку выбор таких систем ограничен, неканонические ГЧС дают большие возможности по оптимизации чувствительности. В работе совершенствуются методы построения структур ГЧС заданной размерности, в том числе получения множества структур неканонических ГЧС, заданных в общем виде и неканонических гиперкомплексных числовых систем, изоморфных диагональной системе. Эти методы учитывают заданные ограничения представления данных в неканонических ГЧС для моделирования практических задач. Предлагается метод построения некоторых классов изоморфизма для неканонических ГЧС размерности 2. Изоморфные системы используются для минимизации вычислений при таком представления данных. В работе совершенствуются методы определения единичного элемента, нормы, сопряжения и делителей нуля для неканонических гиперкомплексных числовых систем; методы выполнения операций в таких системах. Впервые предлагается метод вычисления вычетов в неканонических ГЧС, который применяется в моделировании задачи разделения секрета и учитывает структурные особенности неканонических гиперкомплексных числовых систем. Предлагается модификация модулярной схемы разделения секрета, которая отличается от существующей представлением информации остатками в неканонических ГЧС по совокупности неканонических гиперкомплексных модулей. Реализована компьютерная модель задачи разделения секрета для неканонических ГЧС третьей и четвертой размерности в системе символьных вычислений MAPLE. Приведены результаты работы такой модели и сравнительные характеристики количества операций в части преобразования данных, непосредственно разделения секрета и восстановления данных. Анализ полученных результатов показал, что в целом, применение неканонических ГЧС к данной модели позволяет использовать меньшую размерность в зависимости от выбора констант при структурных единицах в таблице умножения системы, для обеспечения такой же криптостойкости, как и с использованием канонических ГЧС. Использование неканонической ГЧС размерности 3 для обеспечения такой же криптостойкости, как и при использовании канонической ГЧС размерности 4, не дает нужного эффекта для уменьшения количества вычислений, так как среднее количество операций увеличивается на 92%. Но уже при использовании неканонической ГЧС размерности 4 с 9-ю составными ячейками в таблице умножения с целыми коэффициентами из диапазона {-4,4}, для обеспечения такой же криптостойкости, как и при использовании канонической ГЧС размерности 6, количество требуемых вычислений уменьшается в среднем на 44%. Для успешного восстановления секрета, необходимо использовать числовые системы без делителей нуля и обладающих свойством мультипликативности нормы. В диссертационной работе впервые предлагается метод синтеза неканонических ГЧС, которые могут быть использованы при построении цифрового фильтра. Создана математическая модель рекурсивного цифрового фильтра с гиперкомплексными коэффициентами в полученных неканонических ГЧС третьей размерности. Впервые предлагается метод оптимизации суммарной параметрической чувствительности фильтра, построенного с использованием неканонических ГЧС который позволяет существенно уменьшить параметрическую чувствительность эквивалентного фильтра с вещественными коэффициентами (до ~50%) и существующих фильтров с гиперкомплексными коэффициентами (до ~40%). В работе описано расширение аналитически-программного инструментария в системе символьных вычислений MAPLE, который реализует предложенные модели и методы с учетом структурных особенностей неканонических ГЧС, а именно: определение основных свойств и выполнение операций над неканоническими гиперкомплексными числами; выполнение модулярных операций над неканоническими гиперкомплексными числами; построение структур неканонических ГЧС согласно заданным критериям, в том числе, критерию построения цифрового фильтра; реализация модели задачи разделения секрета в неканонических ГЧС и метода оптимизации параметрической чувствительности цифрового фильтра. Листинги кода приведены в приложениях.

Muitos pesquisadores têm se interessado em explorar o vasto poder computacional das recentes unidades de processamento gráfico (GPUs) em aplicações fora do domínio gráfico. Essa tendência ao desenvolvimento de propósitos gerais com a GPU (GPGPU) foi intensificada com a produção de APIs não-gráficas, tais como a Compute Unified Device Architecture (CUDA), da NVIDIA. Com elas, estudou-se a solução na GPU de muitos problemas de processamento de sinal 2D e 3D envolvendo álgebra linear e equações diferenciais parciais, mas pouca atenção tem sido dada ao processamento de sinais 1D, que também podem exigir recursos computacionais significativos. Já havia sido demonstrado que a GPU pode ser usada para processamento de sinais em tempo-real, mas alguns processos não se adequavam bem à arquitetura da GPU. Neste trabalho, apresento uma nova técnica para implementar um filtro digital linear recursivo usando a GPU. Até onde eu sei, a solução aqui apresentada é a primeira na literatura. Uma comparação entre esta abordagem e uma implementação equivalente baseada na CPU demonstra que, quando usada em um sistema de processamento de áudio em temporeal, esta técnica permite o processamento de duas a quatro vezes mais coeficientes do que era possível anteriormente. A técnica também elimina a necessidade de processar o filtro na CPU - evitando transferências de memória adicionais entre CPU e GPU - quando se deseja usar o filtro junto a outros processos, tais como síntese de som. A recursividade estabelecida pela equação do filtro torna difícil obter uma implementação eficiente em uma arquitetura paralela como a da GPU. Já que cada amostra de saída é computada em paralelo, os valores necessários de amostras de saída anteriores não estão disponíveis no momento do cômputo. Poder-se-ia forçar a GPU a executar o filtro sequencialmente usando sincronização, mas isso seria um uso ineficiente da GPU. Este problema foi resolvido desdobrando-se a equação e "trocando-se" as dependências de amostras próximas à saída atual por outras precedentes, assim exigindo apenas o armazenamento de um certo número de amostras de saída. A equação resultante contém convoluções que então são eficientemente computadas usando a FFT. A implementação da técnica é geral e funciona para qualquer filtro recursivo linear invariante no tempo. Para demonstrar sua relevância, construímos um filtro LPC para sintetizar em tempo-real sons realísticos de colisões de objetos feitos de diferentes materiais, tais como vidro, plástico e madeira. Os sons podem ser parametrizados por material dos objetos, velocidade e ângulo das colisões. Apesar de flexível, esta abordagem usa pouca memória, exigindo apenas alguns coeficientes para representar a resposta ao impulso do filtro para cada material. Isso torna esta abordagem uma alternativa atraente frente às técnicas tradicionais baseadas em CPU que apenas realizam a reprodução de sons gravados.
Many researchers have been interested in exploring the vast computational power of recent graphics processing units (GPUs) in applications outside the graphics domain. This trend towards General-Purpose GPU (GPGPU) development has been intensified with the release of non-graphics APIs for GPU programming, such as NVIDIA's Compute Unified Device Architecture (CUDA). With them, the GPU has been widely studied for solving many 2D and 3D signal processing problems involving linear algebra and partial differential equations, but little attention has been given to 1D signal processing, which may demand significant computational resources likewise. It has been previously demonstrated that the GPU can be used for real-time signal processing, but several processes did not fit the GPU architecture well. In this work, a new technique for implementing a digital recursive linear filter using the GPU is presented. To the best of my knowledge, the solution presented here is the first in the literature. A comparison between this approach and an equivalent CPU-based implementation demonstrates that, when used in a real-time audio processing system, this technique supports processing of two to four times more coefficients than it was possible previously. The technique also eliminates the necessity of processing the filter on the CPU - avoiding additional memory transfers between CPU and GPU - when one wishes to use the filter in conjunction with other processes, such as sound synthesis. The recursivity established by the filter equation makes it difficult to obtain an efficient implementation on a parallel architecture like the GPU. Since every output sample is computed in parallel, the necessary values of previous output samples are unavailable at the time the computation takes place. One could force the GPU to execute the filter sequentially using synchronization, but this would be a very inefficient use of GPU resources. This problem is solved by unrolling the equation and "trading" dependences on samples close to the current output by other preceding ones, thus requiring only the storage of a limited number of previous output samples. The resulting equation contains convolutions which are then efficiently computed using the FFT. The proposed technique's implementation is general and works for any time-invariant recursive linear filter. To demonstrate its relevance, an LPC filter is designed to synthesize in real-time realistic sounds of collisions between objects made of different materials, such as glass, plastic, and wood. The synthesized sounds can be parameterized by the objects' materials, velocities and collision angles. Despite its flexibility, this approach uses very little memory, requiring only a few coefficients to represent the impulse response for the filter of each material. This turns this approach into an attractive alternative to traditional CPU-based techniques that use playback of pre-recorded sounds.

This diploma thesis deals with digital sound synthesis. The main task was to design and implement new sound synthesizer. Created tool uses different approaches to the sound synthesis, so it can be described as a hybrid. Instrument design was inspired by existing audio synthesizers. For implementation, C++ language and VST technology from Steinberg are used. As an extension, a module, that can process voice or text input and then build a MIDI file with melody (which can be interpreted with using any synthesizer) was designed and implemented. For this module, Python language is used. For the synthesizer, a simple graphical user interface was created.

碩士
亞洲大學
光電與通訊學系
102
This thesis uses an filter synthesis method based on normal-form transformation to implement a high robustness and computationally efficient digital filter structure. On one hand, this thesis utilizes power of 2 parameters and sparse normal-form filter realization to achieve the goal of computational efficiency. On the other hand, the computationally efficient filter realization can simultaneously keep the property of normal-form realization, and thus the robustness can be preserved. The main contribution of this thesis is the PHP programs are coded to implement the practical ECG denoising problem. Various types of filter realizations are compared. Through the results, we may conclude that the sparse normal-form is the most suitable filter realization for ECG noise removal.

碩士
亞洲大學
行動商務與多媒體應用學系
105
In this thesis, the optimal synthesis and stability analysis methods are pre-sented for fixed-point infinite impulse response (IIR) digital filter design. In the developed synthesis method, the computation consumptions, sensitivities, overflow, and under flow effects are taken into account. In addition, an improved mathemati-cal model of an fixed-point IIR digital filter is derived for satisfying the most commonly used format of fixed-point arithmetic in the digital signal processors, say, Q-format. Moreover, an improved stability criterion in terms of register length is derived based upon a normal-form filter realization. Such criterion releases the conservativeness of the existing method using small gain theorem and the Bell-man-Grownwall Lemma. Finally, numerical examples are performed to verify the effectiveness of the proposed approach.

This thesis is concerned with the development of a novel discrete particle swarm optimization (PSO) technique and its application to the discrete optimization of digital filter frequency response characteristics on the one hand, and the high-level synthesis of bit-parallel digital filter data-paths on the other. Two different techniques are presented for the optimization of sharp-transition band frequency response masking (FRM) digital filters, one of which is based on the conventional finite impulse-response (FIR) digital subfilters, and a new hardware-efficient approach which is based on utilizing infinite impulse-response (IIR) digital subfilters. It is shown that further hardware efficiency can be achieved by realizing the IIR interpolation subfilters by using the bilinear-LDI approach. The corresponding discrete PSO is carried out over the canonical signed digit (CSD) multiplier coefficient space for direct mapping to digital hardware considering simultaneous magnitude and group-delay frequency response characteristics. A powerful encoding scheme is developed for the high-level synthesis of digital filters based on discrete PSO, which preserves the data dependency relationships in the digital filter data-paths. In addition, a constrained discrete PSO is developed to overcome the limitations which would manifest themselves if the conventional PSO were to be used. Several examples are presented to demonstrate the application of discrete PSO to the design, high-level synthesis and optimization of digital filters.
Communications