Dissertations / Theses on the topic 'Decision Feedback Equalizer'
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1
Senol, Sinan. "Performance Comparison Of Adaptive Decision Feedback Equalizer And Blind Decision Feedback Equalizer." Master's thesis, METU, 2004. http://etd.lib.metu.edu/upload/1023746/index.pdf.
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The Decision Feedback Equalizer (DFE) is a known method of channel equalization which has performance superiority over linear equalizer. The best performance of DFE is obtained, commonly, with training period which is used for initial acquisiton of channel or recovering changes in the channel. The training period requires a training sequence which reduces the bit transmission rate or is not possible to send in most of the situations. So, it is desirable to skip the training period. The Unsupervised (Blind) DFE (UDFE) is such a DFE scheme which has no training period. The UDFE has two modes of operation. In one mode, the UDFE uses Constant Modulus Algorithm (CMA) to perform channel acquisition, blindly. The other mode is the same as classical decision-directed DFE. This thesis compares the performances of the classical trained DFE method and the UDFE. The performance comparison is done in some channel environments with the problem of timing error present in the received data bearing signal. The computer aided simulations are done for two stationary channels, a time-varying channel and a frequency selective Rayleigh fading channel to test the performance of the relevant equalizers. The test results are evaluted according to mean square error (MSE), bit-error rate (BER), residual intersymbol interference (RISI) performances and equalizer output diagrams. The test results show that the UDFE has an equal or, sometimes, better performance compared to the trained DFE methods. The two modes of UDFE enable it to solve the absence of training sequence.
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Chandramouli, Soumya. "A Novel Analog Decision-Feedback Equalizer in CMOS for Serial 10-Gb/sec Data Transmission Systems." Diss., Georgia Institute of Technology, 2007. http://hdl.handle.net/1853/19847.
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This dissertation develops an unclocked receiver analog decision-feedback equalizer (ADFE) circuit architecture and topology and implements the circuit in 0.18-um CMOS to enable 10-Gb/sec serial baseband data transmission over FR-4 backplane and optical fibre. The ADFE overcomes the first feedback-loop latency challenge of traditional digital and mixed-signal DFEs by separating data re-timing from equalization and also eliminates the need for clock-recovery prior to decision-feedback equalization.
The ADFE enables 10-Gb/sec decision-feedback equalization using a 0.18-um CMOS process, the first to do so to the author s knowledge. A tuneable current-mode-logic (CML) feedback-loop is designed to enable first post-cursor cancellation for a range of data-rates and to have external control over loop latency over variations in process, voltage and temperature. CML design techniques are used to minimize current consumption and achieve the required voltage swing for decision-feedback to take place. The all-analog equalizer consumes less power and area than comparable state-of-the art DFEs.
The ADFE is used to compensate inter-symbol interference (ISI) for 20 inches of FR-4 backplane and 300 m of multi-mode fibre at 10-Gb/sec. The ADFE also extends the reach of single-mode fibre at 10-Gb/sec to 120 km. The work described in this dissertation advances the state-of-the-art in equalization solutions for multi-Gb/sec serial data transmission and can find applications in several of the 10-Gb/sec Ethernet standards that have been approved recently. The contributions of this work toward future research are also discussed.
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Xiaoqi, Han. "Nonlinear Equalization Based on Decision Feedback Equalizer for Optical Communication System." Miami University / OhioLINK, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=miami1386170540.
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Nassr, Husam, and Kurt Kosbar. "PERFORMANCE EVALUATION FOR DECISION-FEEDBACK EQUALIZER WITH PARAMETER SELECTION ON UNDERWATER ACOUSTIC COMMUNICATION." International Foundation for Telemetering, 2017. http://hdl.handle.net/10150/626999.
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This paper investigates the effect of parameter selection for the decision feedback equalization (DFE) on communication performance through a dispersive underwater acoustic wireless channel (UAWC). A DFE based on minimum mean-square error (MMSE-DFE) criterion has been employed in the implementation for evaluation purposes. The output from the MMSE-DFE is input to the decoder to estimate the transmitted bit sequence. The main goal of this experimental simulation is to determine the best selection, such that the reduction in the computational overload is achieved without altering the performance of the system, where the computational complexity can be reduced by selecting an equalizer with a proper length. The system performance is tested for BPSK, QPSK, 8PSK and 16QAM modulation and a simulation for the system is carried out for Proakis channel A and real underwater wireless acoustic channel estimated during SPACE08 measurements to verify the selection.
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Adnan, Rubyet. "Blind Equalization for Tomlinson-Harashima Precoded Systems." Thesis, University of Canterbury. Electrical and Computer Engineering, 2007. http://hdl.handle.net/10092/1130.
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At a communications receiver the observed signal is a corrupted version of the transmitted signal. This distortion in the received signal is due to the physical characteristics of the channel, including multipath propagation, the non-idealities of copper wires and impulse noise. Equalization is a process to combat these distortions in order to recover the original transmitted signal. Roughly stated, the equalizer tries to implement the inverse transfer function of the channel while taking into account the channel noise. The equalizer parameters can be tuned to this inverse transfer function using an adaptive algorithm. In many cases, the algorithm uses a training sequence to drive the equalizer parameters to the optimum solution. But, for time-varying channels or multiuser channels the use of a training sequence is inefficient in terms of bandwidth, as bandwidth is wasted due to the periodic re-transmission of the training sequence. A blind equalization algorithm is a practical method to eliminate this training sequence. An equalizer adapted using a blind algorithm is a key component of a bandwidth efficient receiver for broadcast and point-to-multipoint communications. The initial convergence performance of a blind adaptive equalizer depends on the higher-order statistics of the transmitted signal. In modern digital systems, Tomlinson-Harashima precoding (THP) is often used for signal shaping and to mitigate the error propagation problem of a decision feedback equalizer (DFE). The concept of THP comes from pre-equalization. In fact, it is a nonlinear form of pre-equalization, which bounds the higher-order statistics of the transmitted signal. But, THP and blind equalization are often viewed as incompatible equalization techniques. In this research, we give multiple scenarios where blind equalization of a THP-encoded signal might arise. With this motivation we set out to answer the question, can a blind equalizer successfully acquire a THP-encoded signal? We investigate the combination of a Tomlinson-Harashima precoder on the transmitter side and a blind equalizer on the receiver side. By bounding the kurtosis of the THP-encoded signal, we show that THP actually aids the initial convergence of blind equalization. We find that, as the symbol constellation size increases, the THP-encoded signal kurtosis approaches that of a uniform distribution, not a Gaussian. We investigate the compatibility of blind equalization with THP-encoded signals for both SISO and MIMO systems. In a SISO system, conventional blind algorithms can be used to counter the distortions introduced in the received signal. However, in a MIMO system with multiple users, the other users act as interferers on the desired user's signal. Hence, modified blind algorithms need to be applied to mitigate these interferers. For both SISO and MIMO systems, we show that the THP encoder ensures that the signal distribution approaches a non-Gaussian distribution. Using Monte Carlo simulations, we study the effects of Tomlinson-Harashima precoding on the performance of Bussgang-type blind algorithms and verify our theoretical analysis. The major contributions of this thesis are: • A demonstration that a blind equalizer can successfully acquire a THP-encoded signal for both SISO and MIMO systems. We show that THP actually aids blind equalization, as it ensures that the transmitted signal is non-Gaussian. • An analytical quantification of the effects of THP on the transmitted signal statistics. We derive a novel bound on the kurtosis of the THP-encoded signal. • An extension of the results from a single-user SISO scenario to multiple users and a MIMO scenario. We demonstrate that our bound and simulated results hold for these more general cases. Through our work, we have opened the way for a novel application of training sequence-less equalization: to acquire and equalize THP-encoded signals. Using our proposed system, periodic training sequences for a broadcast or point-to-multipoint system can be avoided, improving the bandwidth efficiency of the transceiver. Future modem designs with THP encoding can make use of our advances for bandwidth efficient communication systems.
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Wickert, Mark, Shaheen Samad, and Bryan Butler. "AN ADAPTIVE BASEBAND EQUALIZER FOR HIGH DATA RATE BANDLIMITED CHANNELS." International Foundation for Telemetering, 2006. http://hdl.handle.net/10150/604050.
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ITC/USA 2006 Conference Proceedings / The Forty-Second Annual International Telemetering Conference and Technical Exhibition / October 23-26, 2006 / Town and Country Resort & Convention Center, San Diego, CaliforniaMany satellite payloads require wide-band channels for transmission of large amounts of data to users on the ground. These channels typically have substantial distortions, including bandlimiting distortions and high power amplifier (HPA) nonlinearities that cause substantial degradation of bit error rate performance compared to additive white Gaussian noise (AWGN) scenarios. An adaptive equalization algorithm has been selected as the solution to improving bit error rate performance in the presence of these channel distortions. This paper describes the design and implementation of an adaptive baseband equalizer (ABBE) utilizing the latest FPGA technology. Implementation of the design was arrived at by first constructing a high fidelity channel simulation model, which incorporates worst-case signal impairments over the entire data link. All of the modem digital signal processing functions, including multirate carrier and symbol synchronization, are modeled, in addition to the adaptive complex baseband equalizer. Different feedback and feed-forward tap combinations are considered as part of the design optimization.
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Liu, Yizhou. "ELECTRICAL EQUALIZATION FOR MULTIMODE FIBER SYSTEMS." Miami University / OhioLINK, 2017. http://rave.ohiolink.edu/etdc/view?acc_num=miami1484004535118825.
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McGinty, Nigel, and nigel mcginty@defence gov au. "Reduced Complexity Equalization for Data Communication." The Australian National University. Research School of Information Sciences and Engineering, 1998. http://thesis.anu.edu.au./public/adt-ANU20050602.122741.
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Optimal decision directed equalization techniques for time dispersive communication channels are often too complex to implement. This thesis considers reduced complexity decision directed equalization that lowers complexity demands yet retains close to optimal performance. The first part of this dissertation consists of three reduced complexity algorithms based on the Viterbi Algorithm (VA) which are: the Parallel Trellis VA (PTVA); Time Reverse Reduced State Sequence Estimation (TR-RSSE); and Forward-Backward State Sequence Detection (FBSSD). The second part of the thesis considers structural modifications of the Decision Feedback Equalizer (DFE), which is a special derivative of the VA, specifically, optimal vector quantization for fractionally spaced DFEs, and extended stability regions for baud spaced DFEs using passivity analysis are investigated.¶
For a special class of sparse channels the VA can be decomposed over a number of independent parallel trellises. This decomposition will be called the Parallel Trellis Viterbi Algorithm and can have lower complexity than the VA yet it retains optimal performance. By relaxing strict sparseness constraints on the channel a sub-optimal approach is proposed which keeps complexity low and obtains good performance.¶
Reduced State Sequence Estimation (RSSE) is a popular technique to reduce complexity. However, its deficiency can be the inability to adequately equalize non-minimum phase channels. For channels that have energy peaks in the tail of the impulse response (post-cursor dominant) RSSE's complexity must be close to the VA or performance will be poor. Using a property of the VA which makes it invariant to channel reversal, TR-RSSE is proposed to extend application of RSSE to post-cursor dominant channels.¶
To further extend the class of channels suitable for RSSE type processing, FBSSD is suggested. This uses a two pass processing method, and is suited to channels that have low energy pre and post-cursor. The first pass generates preliminary estimates used in the second pass to aid the decision process. FBSSD can range from RSSE to TR-RSSE depending on parameter settings.¶
The DFE is obtained when the complexity of RSSE is minimized. Two characterizing properties of the DFE, which are addressed in this thesis, are feedback and quantization. A novel fractionally spaced (FS) DFE structure is presented which allows the quantizer to be generalized relative to the quantizer used in conventional FS-DFEs. The quantizer can be designed according to a maximum a posteriori criterion which takes into account a priori statistical knowledge of error occurrences. A radically different quantizer can be obtained using this technique which can result in significant performance improvements.¶
Due to the feedback nature of the DFE a form of stability can be considered. After a decision error occurs, a stable DFE will, after some finite time and in the absence of noise, operate error free. Passivity analysis provides sufficient conditions to determine a class of channels which insures a DFE will be stable. Under conditions of short channels and small modulation alphabets, it is proposed that conventional passivity analysis can be extended to account for varying operator gains, leading to weaker sufficient conditions for stability (larger class of channels).
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Gunning, Dan, and Pontus Jernberg. "Estimation of Inter-Cell Interference in 3G Communication Systems." Thesis, Linköpings universitet, Reglerteknik, 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-71156.
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In this thesis the telecommunication problem known as inter-cell interference is examined. Inter-cell interference originates from users in neighboring cells and affects the users in the own cell. The reason that inter-cell interference is interesting to study is that it affects the maximum data-rates achievable in the 3G network. By knowing the inter-cell interference, higher data-rates can be scheduled without risking cell-instability. An expression for the coupling between cells is derived using basic physical principles. Using the expression for the coupling factors a nonlinear model describing the inter-cell interference is developed from the model of the power control loop commonly used in the base stations. The expression describing the coupling factors depends on the positions of users which are unknown. A quasi decentralized method for estimating the coupling factors using measurements of the total interference power is presented. The estimation results presented in this thesis could probably be improved by using a more advanced nonlinear filter, such as a particle filter or an Extended Kalman filter, for the estimation. Different expressions describing the coupling factors could also be considered to improve the result.
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Mendes, Filho João. "Sobre equalizadores autodidatas de decisão realimentada aplicados a sistemas multiusuário." Universidade Presbiteriana Mackenzie, 2007. http://tede.mackenzie.br/jspui/handle/tede/1450.
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Due to the growing demand for mobile communications, adaptive equalizers play an important role for enhancing the efficiency of data transmission. In this scenario, the Decision Feedback Equalizer (DFE) stands out. It presents a favorable tradeoff between computational cost and efficient behavior, mainly when compared to Linear Transversal Equalizer. In this work, the blind adaptation of DFE is investigated for the single and multiuser cases. In the single user case, the perfect equalization conditions for the DFE are revisited, considering the absence of noise and feedback of correct decisions. Assuming the joint blind adaptation of the DFE's feedforward and feedback filters, two stochastic gradient algorithms are also revisited. The first is based on the Constant Modulus cost function, subjected to a constraint to avoid degenerate solutions. The second considers the minimization of a cost function that takes into account the probability density function of the equalizers's output. This latter, known in the literature as the Soft Decision-Directed (SDD) algorithm, was proposed for the recovery of signals based on the Quadrature Amplitude Modulation (QAM). From the division of the complex plane into regions containing 4-QAM type constellations, we propose a modification in the SDD algorithm based on the centers of these regions. The resulting algorithm presents a more favorable tradeoff between convergence rate and computational cost. Moreover, in order to mitigate the steady-state mean-square error, we consider concurrent algorithms based on the previous mentioned. As a core of this dissertation, the perfect equalization conditions and the remarked algorithms are extended to the multiuser case. Simulation results point out that the Modified SDD algorithm and its concurrent adaptation with the constrained Constant Modulus Algorithm present advantages in terms of convergence rate for the blind adaptation of DFE in the recovering of QAM signals.
Devido à crescente demanda por comunicações móveis, equalizadores adaptativos autodidatas desempenham um importante papel na melhoria da eficiência da transmissão de dados. Nesse cenário, destaca-se o equalizador de decisão realimentada (DFE - Decision Feedback Equalizer), que apresenta um compromisso favorável entre custo computacional e comportamento eficiente, principalmente quando comparado ao equalizador linear transversal. Neste trabalho, a adaptação autodidata do DFE é investigada tanto no caso mono quanto no multiusuário. Considerando o caso monousuário, revisitam-se as condições de equalização perfeita com o DFE, assumindo realimentação de decisões corretas e ausência de ruído. Revisitam-se também dois algoritmos do gradiente estocástico para adaptação autodidata conjunta dos filtros direto e de realimentação do DFE. O primeiro é baseado na função custo do Módulo Constante com uma restrição imposta, a fim de se evitar soluções degeneradas. O segundo considera a minimização de uma função custo que leva em conta a função densidade de probabilidade do sinal de saída do equalizador. Este último, conhecido na literatura como algoritmo de Decisão Direta Suave (SDD - Soft Decision-Directed), foi proposto para recuperação de sinais com modulação do tipo QAM (Quadrature Amplitude Modulation). A partir da divisão do espaço complexo em regiões contendo constelações do tipo 4-QAM, é proposta uma modificação ao algoritmo SDD baseada nos centros dessas regiões. O algoritmo resultante apresenta uma relação mais favorável entre velocidade de convergência e complexidade computacional. Ainda com o intuito de mitigar o erro quadrático resultante da adaptação autodidata, considera-se a utilização de algoritmos concorrentes baseados nos algoritmos supracitados. Como cerne desta dissertação, as condições de equalização perfeita e os algoritmos abordados são estendidos para o caso multiusuário. Resultados de simulações evidenciam que o algoritmo SDD modificado e sua adaptação concorrente com o algoritmo do Módulo Constante com restrição apresentam vantagens em termos de velocidade de convergência para adaptação autodidata do DFE na recuperação de sinais do tipo QAM.
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Deyneka, Alexander. "Metody ekvalizace v digitálních komunikačních systémech." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2011. http://www.nusl.cz/ntk/nusl-218963.
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Tato práce je psaná v angličtině a je zaměřená na problematiku ekvalizace v digitálních komunikačních systémech. Teoretická část zahrnuje stručné pozorování různých způsobů návrhu ekvalizérů. Praktická část se zabývá implementací nejčastěji používaných ekvalizérů a s jejich adaptačními algoritmy. Cílem praktické části je porovnat jejich charakteristiky a odhalit činitele, které ovlivňují kvalitu ekvalizace. V rámci problematiky ekvalizace jsou prozkoumány tři typy ekvalizérů. Lineární ekvalizér, ekvalizér se zpětnou vazbou a ML (Maximum likelihood) ekvalizér. Každý ekvalizér byl testován na modelu, který simuloval reálnou přenosovou soustavu s komplexním zkreslením, která je složena z útlumu, mezisymbolové interference a aditivního šumu. Na základě implenentace byli určeny charakteristiky ekvalizérů a stanoveno že optimální výkon má ML ekvalizér. Adaptační algoritmy hrají významnou roli ve výkonnosti všech zmíněných ekvalizérů. V práci je nastudována skupina stochastických algoritmů jako algoritmus nejmenších čtverců(LMS), Normalizovaný LMS, Variable step-size LMS a algoritmus RLS jako zástupce deterministického přístupu. Bylo zjištěno, že RLS konverguje mnohem rychleji, než algoritmy založené na LMS. Byly nastudovány činitele, které ovlivnili výkon popisovaných algoritmů. Jedním z důležitých činitelů, který ovlivňuje rychlost konvergence a stabilitu algoritmů LMS je parametr velikosti kroku. Dalším velmi důležitým faktorem je výběr trénovací sekvence. Bylo zjištěno, že velkou nevýhodou algoritmů založených na LMS v porovnání s RLS algoritmy je, že kvalita ekvalizace je velmi závislá na spektrální výkonové hustotě a a trénovací sekvenci.
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Kennedy, Rodney Andrew, and rodney kennedy@anu edu au. "Operational Aspects of Decision Feedback Equalizers." The Australian National University. Research School of Physical Sciences and Engineering, 1989. http://thesis.anu.edu.au./public/adt-ANU20050418.151329.
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The central theme is the study of error propagation effects in decision feedback equalizers (DFEs). The thesis contains: a stochastic analysis of error propagation in a tuned DFE; an analysis of the effects of error propagation in a blindly adapted DFE; a deterministic analysis of error propagation through input-output stability ideas; and testing procedures for establishing correct tap convergence in blind adaptation. To a lesser extent, the decision directed equalizer (DDE) is also treated.¶ Characterizing error propagation using finite state Markov process (FSMP) techniques is first considered. We classify how the channel and DFE parameters affect the FSMP model and establish tight bounds on the error probability and mean error recovery time of a tuned DFE. These bounds are shown to be too conservative for practical use and highlight the need for imposing stronger hypotheses on the class of channels for which a DFE may be effectively used.¶ In blind DFE adaptation we show the effect of decision errors is to distort the adaptation relative to the use of a training sequence. The mean square error surface in a LMS type setting is shown to be a concatenation of quadratic functions exposing the possibility of false tap convergence to undesirable DFE parameter settings. Averaging analysis and simulation are used to verify this behaviour on some examples.¶ Error propagation in a tuned DFE is also examined in a deterministic setting. A finite error recovery time problem is set up as an input-output stability problem. Passivity theory is invoked to prove that a DFE can be effectively used on a channel satisfying a simple frequency domain condition. These results give performance bounds which relate well with practice.¶ Testing for false tap convergence in blind adaptation concludes our study. Simple statistic output tests are shown to be capable of discerning correct operation of a DDE. Similar tests are conjectured for the DFE, supported by proofs for the low dimensional cases.
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Brooks, Duncan John. "Adaptive algorithms for low complexity equalizers in mobile communications." Thesis, Imperial College London, 1998. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.312445.
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Awny, Ahmed Sanaa Ahmed [Verfasser]. "Design and measurement techniques for decision feedback equalizers up to 110Gb/s in SiGe technologies / Ahmed Sanaa Ahmed Awny." Paderborn : Universitätsbibliothek, 2015. http://d-nb.info/1073584070/34.
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Lan, Yi-Yang, and 藍義陽. "Volterra-based Decision Feedback Equalizer." Thesis, 1993. http://ndltd.ncl.edu.tw/handle/77614132011693728845.
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碩士國立交通大學
電信研究所
81
The advantages of a conventional decision feedback equa- lizer(CDFE) is its simplicity in design and in implementa- tion. However, the feedback part of CDFE is a linear equa- lizer and, hence,the decision regions in the signal space are delimited by hyperplanes. This property limits the performance of the system. In the articles, we propose a new adaptive nonlinear equalizer, called Volterra-based decision feedback equalizer, which is capable of forming nonlinear decision boundaries in the signal space. As a result, the performance limit in the CDFE can effectively be overcome. Especially, it has outstanding performance whenever the transmission channel is nonlinear. Moreover, conventional adaptation algorithms can be directly applied to the new structure. The simulation result demonstrate that the new structure can be an effective alternative in contrast to the CDFE.
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Chen, Kuan-Yu, and 陳冠宇. "Design of 20Gbps Adaptive Linear Equalizer and Decision Feedback Equalizer." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/rc2864.
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碩士國立臺灣大學
電子工程學研究所
105
Nowadays, the SerDes (Serializer-to-Deserializer) topology is increasingly popular in the wireline communication systems for the reduced I/O pads and also the low fabrication cost. However, the aggregate bandwidth of the data traffic is strictly limited by the channel characteristics. The limited bandwidth of the channel will induce large inter-symbol interference (ISI), and also deteriorate the bit-error-rate (BER) performance. Thus, the equalization is more and more important in the wireline systems. Moreover, the channel attenuation greatly varies with materials and lengths, and hence the adaptation techniques for the equalizer are required in most applications. In this thesis, the most common equalizers in the receiver are designed, analyzed, and verified. The first part shows a 20Gbps linear equalizer with the proposed adaptation method. Fabricated in 40nm CMOS technology, this adaptive linear equalizer can well compensate the channel loss under 18.3dB attenuation. Only 2.68us is required for the adaptation procedure and 4.9mW is consumed by the adaptation logics. The second part presents a 20Gbps infinite impulse response decision feedback equalizer (IIR-DFE). To enhance the power efficiency of the IIR-DFE, the charge-steering logic (CSL) is utilized in this work. Besides, the quarter-rate topology and some circuit merging techniques are adopted. Fabricated in 40nm CMOS technology, the power efficiency of 0.31mW/Gbps can be obtained.
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Liao, Sheng-Hui, and 廖盛惠. "Soft Decision Approaches for Blind Adaptive Decision Feedback Equalizer." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/60781162149955816270.
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碩士國立臺灣海洋大學
電機工程學系
93
Because of multi-path and Doppler effect, the development of the underwater acoustic communication system is a challenging task. The optimum equalization and appropriate signal processing technique are needed to improve the quality of communications. In this thesis, the implementation algorithms based on the blind adaptive decision feedback equalization (BADFE), whose function can be automatically adjusted according to variations of channel, are investigated. The soft decision is combined with the BADFE to get a modified equalization scheme. The proposed method combines decision feedback, blind adaptive scheme, and the soft decision method at the same time. Therefore it can combat the distortion occurred in underwater communication channels without the need of the training sequence. The bit error rates and the transmission efficiency are improved. Computer simulation results indicate that the performances of the proposed method always has better convergence speed and lower bit error rate even in the bad channel and low SNR.
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Lin, Yuan-Fu, and 林元莆. "5~20 Gb/s Adaptive Linear Equalizer and Decision-Feedback Equalizer." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/13812443680406086957.
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碩士國立臺灣大學
電子工程學研究所
102
In recent years, in addition to the fast growing in data rate, wide-range data is also required in the applications of various multimedias and portable devices. As the data rate keeps rising, many significant problems appear. One is that the bandwidth is limited compared to the data rate. It will result a significant inter symbol interference (ISI) to degrade the bit error rate (BER). In order to deal with ISI, equalizers are widely adopted. However, the length or the material of the communication channel may be different depending on the application. Therefore, an adaptive algorithm with the equalizer is more popular in recent communication systems. In wide-range data rate application, power efficiency issue is also concerned. This thesis is mainly divided into two parts. In Chapter 2, a 5-20 Gb/s power scalable adaptive continuous-time linear equalizer (CTLE) architecture is proposed. We use a power scalable technique to improve the power efficiency for slow data rate. We also propose an adaptive algorithm using edge counting. This circuit is implemented in 40-nm CMOS process. A 5-20 Gb/s adaptive charge-steering decision-feedback equalizer (DFE) is presented in chapter 3. To lower power consumption of the system, charge-steering logic circuit is adopted in this design. We use sign-sign least mean square (SSLMS) algorithm to adjust the DFE’s taps adaptively. This circuit is implemented in 40-nm CMOS process.
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Chih-Hsiu, Lin. "High-performance Decision Feedback Equalizer Algorithms and Architectures." 2005. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-2706200513551300.
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Lin, Chih-Hsiu, and 林志修. "High-performance Decision Feedback Equalizer Algorithms and Architectures." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/87741163492734933340.
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博士國立臺灣大學
電子工程學研究所
93
An adaptive equalizer plays a key role at the receiver in modern digital transmission systems. The design of this equalizer is important since it determines the transmission quality attainable. Also, the equalizer occupies a high portion of the computational complexity in implementing the demodulator. Theses properties have made it the focus of much analytical and practical design. Recently, many researches of interest in communication systems are to increase transmission rate and recording density. However, with the increase of transmission rate and recording density, the signals propagating the channel suffer from serious channel distortion, which causes intersymbol interference (ISI). Hence, to design a robust and high-speed equalizer becomes important and necessary. A decision feedback equalizer (DFE) is an efficient scheme to suppress this ISI. However, most cost-effective DFE implementations suffer from the phenomenon of error propagation, which degrades system performance in the sense of bit error rate (BER) or signal-to-noise ratio (SNR). In this thesis, we propose a soft-threshold-based multi-layer DFE (STM-DFE) algorithm to suppress the error propagation. Simulation results show that the proposed STM-Algorithm can efficiently reduce the BER and burst error length (BEL). When being applied to a practical Lorentzian channel and channels of different eigenvalue spread, the STM algorithm even outperforms the ideal DFE (IDFE) system (in an IDFE, symbols are assumed to be correctly fed back without propagation errors). In VLSI implementations of the STM-DFE, the hardware overhead is negligible compared with a conventional DFE. The direct implementation can be applied to low-speed application such as magnetic data storage systems. In addition, for high-speed applications, we propose a two-stage precomputation scheme to lower the hardware overhead. A new adaptive algorithm to update for a DFE with precomputation scheme is also proposed so that both hardware complexity and power consumption can be saved. Finally, we consider the application of the STM-DFE to 10GBase-LX4 systems. With the help of the STM-DFE, we can perform effective EQ, and the required bit number of ADC can be reduced from 8 to 6. That is, STM-DFE can help to ease the ADC precision requirement, and help to save the silicon cost in implementing the receiver ICs.
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Chen, Qiong Zhang, and 陳瓊璋. "Distance-based decision feedback equalizer with cluster technique." Thesis, 1995. http://ndltd.ncl.edu.tw/handle/24618178756238443020.
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Kuo, Ching-Yu, and 郭經昱. "A Correlation-Aided Complementary Code Keying Decision-Feedback Equalizer." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/05634360204453028349.
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碩士國立交通大學
電信工程系
90
Complementary code Keying (CCK) is employed as the modulation method for the high-rate scheme of the IEEE 802.11b WLAN system which provides 5.5Mbps and 11Mbps for high data rate transmission. The 8 chips within a CCK symbol have certain correlation properties and thus CCK performs better than conventional QPSK modulation in a AWGN channel. The WLAN system is operated in a wireless environment which will introduce time dispersion of the signal, thus techniques that combat the multipath interference are needed. In this thesis we discuss the equalizers that combat the intersymbol interference (ISI) and the decision-feedback equalizer (DFE) is commonly used in communication systems because it performs well and is simple for implementation. However, when applied in CCK scheme the silcer or hard-decision device in the DFE will destroy the correlation between chips in the same CCK symbol when the chip decision is not correct. Thus, a correlation-aided DFE is proposed that utilizes the detected symbols from the modified FWT block as the input of the feedback filter. That is, detection is done for symbols instead of chips to mitigate the detection error. Simulation results show that the modified DFE mitigates the detection error and thus perform better than the conventional DFE.
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Wen, Shao-Min, and 溫紹閔. "An Overlap-Cut Frequency Domain Equalizer with Decision Feedback." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/27290735396335554768.
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碩士國立臺灣海洋大學
通訊與導航工程系
96
To overcome the effects of multipath fading in the wireless communication systems, equalizer is adopted at the receiver. Equalizers can be classified into two types : one is Frequency Domain Equalizer(FDE) and the other is Time Domain Equalizer(TDE). Transmitter inserts the guard interval (GI) to avoid inter-block interference (IBI) for the FDE receiver. However, system capacity will be reduced for the insertion of the GI. In this paper, we propose a FDE without GI, i.e., Overlap-Cut(OC) FDE with decision feedback. The proposed FDE adopts the OC method to avoid the IBI and exploits the decision feedback to improve the BER performance. Without inserting the GI, the proposed FDE is more compatible to frame structure of the existing communication systems.
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SHI, JUN-DIAN, and 施君典. "Adaptive decision feedback equalizer for tdma mobile radio receiver." Thesis, 1989. http://ndltd.ncl.edu.tw/handle/97955454574045569248.
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Chen, Nancy Fang-Yih. "High-Performance Adaptive Decision Feedback Equalizer Designs for Ethernet Systems." 2004. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-1307200416371500.
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李智偉. "Improvements in convergence of the blind adaptive decision feedback equalizer." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/71009722495584364480.
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碩士國立海洋大學
電機工程學系
90
In the field of underwater acoustic communications, digital communications systems generally use binary phase shift keying (BPSK) and quadrature phase shift keying (QPSK) signaling. The multipath effects and Doppler frequency shift can be overcome by an adaptive trained decision feedback equalizer (DFE). Unfortunately, the trained DFE is inefficient, unless it is periodically retrained, for digital communications through a water channel. But it will reduce effective capacity. The blind adaptive decision feedback equalization (BADFE) exhibits good convergence rate and symbol-error rate (SER) as the conventional trained decision feedback equalizer (DFE) does, but it requires no training. In this thesis, a new method for BADFE is discussed. An recursive-least-square (RLS) algorithm is employed for updating the parameters of the recursive whitening filter in BADFE during the starting period, and the revised structure is called BADFE(RLS). BADFE(RLS) can speed up the convergence rate and get better tracking capabilities. This will improve the quality of communication and increase the capacity. Because of the advantages of the reliable, programmable and model of the DSP system, we complier the BADFE program based on TMS320C6711 DSK. The testing system uses a QPSK modulation with 12 kbps data rate and the carrier frequency is 36 kHz.
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Chen, Nancy Fang-Yih, and 陳方玉. "High-Performance Adaptive Decision Feedback Equalizer Designs for Ethernet Systems." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/w56wtg.
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碩士國立臺灣大學
電子工程學研究所
92
As the applications and prevalence of the world wide web (WWW) flourish over the past decade, the demand for higher bandwidth and data rate is skyrocketing. In August 2002, the IEEE 802.3ae task force finalized the 10-Gigabit Base LX4 Ethernet Standard. However, under multi-gigabit data rates, fiber is no longer an ideal transmission medium. This is especially the case for multi-mode fiber (MMF) used in 10G Base LX4 Ethernet systems, because it suffers from differential mode dispersion (DMD). However, conventional adaptive decision feedback equalizers (ADFE) cannot attain the bit error rate (BER) requirement of 10-12 in 10G Base LX4 Ethernet systems, because hard decision of slicers causes error propagation in the feedback loop. Soft threshold multi-layer adaptive decision feedback equalizer (STM-ADFE) designs are adopted to solve this problem. Our system simulation environment includes three representative channel impulses responses, trans-impedance amplifier (TIA), analog equalizer (AEQ), analog/digital converter (ADC), and STM-ADFE. Integration with the analog front end reduces the filter tap numbers needed in STM-ADFE. VLSI architectures of STM-ADFE are also presented. With low hardware overhead, STM-ADFE not only lowers the BER, but also reduces the bit resolution needed in the ADC from 8 to 6.
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Shih, I.-Hao, and 施義浩. "Design and Analysis in Decision Feedback Equalizer of OFDM System." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/90924484934069381681.
Full textAbstract:
碩士國立交通大學
電信工程系所
94
Due to the reflection and diffraction of the EM wave, the wireless channels have the multipath fading effects. These influences reduce the system performance and the bit error rates of transmission raise. Therefore, we use the equalizer at the receiver to compensate the multipath channel influences and suppress the noise effect. The architecture and algorithms of equalizers are different, and in which, the decision feedback equalizer can remove the multipath interference effectively without enhancing the noise. In this thesis, we design the architecture and the algorithms of decision feedback equalizer which originally belonged to the single carrier system for OFDM system. We will compare the performances of our architecture and the linear equalizer. Furthermore, different equalization systems have different influences when they have channel estimation errors or with channel coding systems, so we will take these influences into account in the simulations which is in the end of this thesis.
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Xiang, Yihai. "Design of high-speed adaptive parallel multi-level decision feedback equalizer." Thesis, 1997. http://hdl.handle.net/1957/34362.
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Multi-level decision feedback equalization (MDFE) is an effective technique to remove inter-symbol interference (ISI) from disk readback signals, which uses the simple architecture of decision feedback equalization. Parallelism which doubles the symbol rate can be realized by setting the first tap of the feedback filter to zero.
A mixed-signal implementation has been chosen for the parallel MDFE, in which coefficients for the 9-tap feedback filter are adapted in the digital domain by 10-bit up/ down counters; 6-bit current mode D/A converters are used to convert digital coefficients to differential current signals which are summed with the forward equalizer (FE) output, and a flash A/D is used to make decisions and generate error signals for adaptation.
In this thesis, a description of the parallel structure and the adaptation algorithm are presented with behavioral level verification. The circuit design and layout were carried out in HP 1.2um n-well CMOS process. The design of the high-speed counter and the current-mode D/A are discussed. HSPICE simulations show that a symbol rate of 100Mb/s for the feedback equalizer is readily achieved.Graduation date: 1997
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Lin, Hsin-Lei, and 林心蕾. "Design of a Decision Feedback Equalizer for IEEE 802.11b WLAN System." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/82725817885192451197.
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碩士國立中興大學
電機工程學系
90
In this thesis, design of a decision feedback equalizer (DFE) based on IEEE 802.11b protocol is presented. It has dual 6-tap feed-forward filters with 6-bit input and an 8-tap feedback filter with 2-bit input, that all the filters are implemented using the finite impulse response (FIR) filter. The output of the DFE is sliced into two levels by detector for CCK (8-chip complementary code keying) modulation. The least mean square (LMS) algorithm is used for updating the coefficients in the parallel DFE architecture. The data elapse time in the critical path is 19.46 nsec. The DFE is implemented using the TSMC 0.35 m CMOS 1p4m technology. The total gate count is 58624. The power consumption is 25.087 mW operating under a 3.3 V supply voltage.
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Yang, Meng-Da, and 楊孟達. "Efficient VLSI Design of Adaptive Decision Feedback Equalizer for Gigabit Ethernet." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/61001349691646492395.
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碩士國立臺灣大學
電機工程學研究所
90
Abstract The IEEE 802.3ab task force finalizes the 1000-BASE-T standard, which increases the data rate even further to 1Gb/s for copper wiring over distances of 100m minimum[1]-[3]. 1000-BASE-T employs full duplex baseband transmission over four pair of Category 5 cabling. In order to achieve a target bit error rate (BER) of less than , the receiver corresponding to a wire pair must operate under the sever channel impairment such as the Intersymbol Interference (ISI), echo, Near-end Cross Talk(NEXT), and Far-end Cross Talk(FEXT). Hence, the DSP techniques can be applied to overcome the above problems. For example, the adaptive equalizer, the adaptive echo and NEXT cancellers can be employed to compensate the ISI, Echo, and NEXT, respectively. Moreover, the Trellis-coded Modulation (TCM) is also applied to improve the noise margin. The Decision Feedback Equalizer (ADFE) is employed to compensate the ISI here. In this thesis, we will focus on the VLSI design of ADFE. Here, we will propose two VLSI design of ADFE. In the one design of ADFE we will design a low-cost/low-power ADFE for 1000BASE-T and 100BASE-T applications by various techniques from the system level, the architecture level and the circuit level. In the another design of the ADFE, we will apply our proposed Predicted Parallel Branch Slicer scheme to design a high-performance/high-throughput rate pipelined ADFE. Finally, we will implement these two designs of the ADFE by the Avanti standard cell library in order to verify our VLSI design of the ADFE.
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Lin, Yu-Chun, and 林育羣. "High Throughput Concurrent Adaptive Decision Feedback Equalizer for 2-PAM Systems." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/43751081341932125009.
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博士國立中央大學
電機工程學系
101
Adaptive Decision Feedback Equalizers (ADFEs) are widely used to reduce the inter-symbol interferences (ISIs) caused by channels in communication systems since ADFEs are better than Adaptive Linear Equalizers (ALEs) in both signal-to-noise ratio (SNR) and hardware complexity points of views. However, the data rate of an ADFE is limited due to the feedback path in both the coefficients update part and the data equalization part. In theorem, to do lookahead and then parallel can eliminate the limitation of data rate and the data lookahead scheme is usually used. Data lookahead scheme requires calculating all-possible results; hence the hardware complexity grows quickly with the parallelism and the tap-number of the ADFE. In this dissertation, we propose the coefficients-lookahead scheme for the ADFEs in the receivers of 2-level Pulse Amplitude Modulation (2-PAM) systems, that is, to find out the coefficients for lookahead scheme. Based on the coefficients-lookahead scheme, the self-lookahead filter and the high speed architecture are proposed. The proposed architecture has almost the same SNR with conventional ADFE and has hardware complexity growing slowly with parallelism. In coefficients adaption, we propose a slow updating method, Batch Mode Coefficients Update (BMCU) algorithm to fit the requirement for channel tracking and high data rate. Besides, to avoid noise enhancement at the feed-forward filter (FFF), a FFF noise-suppression ADFE (FNS-ADFE) architecture is proposed which has 2 dB better SNR or 1% less bit error rate than that of a conventional ADFE. The test-chip has been fabricated in a 40nm CMOS-GP technology with the core size as 275 μm × 275 μm (or 28.5k equivalent gates count), and dissipates 2.3 pJ/ bit at 10 Gbps with low-supply voltage (0.75 V), 3.5 pJ/bit at 13 Gbps with normal-supply voltage (0.9 V) and 5.8 pJ/bit at 16 Gbps with high-supply voltage (1.2 V).
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Yi-TingLi and 李依庭. "Frequency-Domain Iterative Block Decision Feedback Equalizer with Soft Decision for Single-Carrier Block Transmission." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/e35cfz.
Full textAbstract:
碩士國立成功大學
電腦與通信工程研究所
105
Single-carrier block transmission (SCBT) with frequency-domain linear equalizer suffers from considerable performance degradation in severely frequency-selective fading channels. Nonlinear decision-feedback equalization (DFE), such as iterative block DFE with hard decision (HD-IBDFE), was proposed to tackle this problem. For simplicity, HD-IBDFE always uses the hard decisions from the previous iteration as the input of the feedback filter (FBF), but low-reliability decisions entering FBF limits the performance. In addition, the design of equalizer coefficients needs parameter estimation, which incurs additional complexity. To overcome these drawbacks of HD-IBDFE, we propose IBDFE with various soft decision devices (SD-IBDFE), by extending the idea of IBDFE with null zone (NZ-IBDFE) in the literature, which uses the thresholds to keep low-reliability decisions from being used for decision feedback. We propose several kinds of SD-IBDFE, such as IBDFE with erasure zone (EZ-IBDFE), IBDFE with linear clipper (LC-IBDFE) and IBDFE with conditional mean (CM-IBDFE). When the equalized signal falls between certain thresholds (i.e., falling in the erasure interval), EZ-IBDFE will use the intermediate value of the erasure interval for feedback, while LC-IBDFE will map through a linear function to determine the feedback value. CM-IBDFE uses the minimum mean square error estimate of the symbol (i.e., the conditional mean) as the input of FBF. In the thesis, we also propose a new parameter estimation method for HD-IBDFE and EZ-IBDFE that is simpler and yet more accurate than the conventional one. Simulation results show that the proposed SD-IBDFE has a better performance than HD-IBDFE.
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Huang, Yi-Jung, and 黃一容. "Applications of the ATSC DTV Systems Using the Modified Decision Feedback Equalizer." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/73540436273317931783.
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碩士國立雲林科技大學
電子與資訊工程研究所
93
A complete study of the transceiver design for ATSC DTV is presented in this thesis. Since the performance of the ATSC DTV receiver mainly depends on the equalizer, several adaptive filtering algorithms, including LMS, RLS, SAG, CMA, and the proposed modified SAG are investigated for compact for compact the signal distortion. To further improve the decision quality, a modified Viterbi decoder is used to be the decision device in the decision feedback equalizer. Computer simulation demonstrates that the proposed modified SAG algorithm and new DFE architecture can achieve performance improvement in the ATSC DTV system.
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yang, cheng-song, and 楊盛松. "Multilayer perceptron decision feedback equalizer in complex signals based on evolutionary algorithms." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/35062438890905889163.
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Wang, Wen-Lung, and 王文隆. "The Analyses of the activation function of Multilayer Perceptron Decision Feedback Equalizer." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/6hx6cp.
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碩士國立臺北科技大學
電資碩士在職專班研究所
100
In digital communication system, digital signal will distort while the signal is sent to the receiver through the channels because all the communication channels in nature are not ideal. Generally, reasons causing distortion include Inter-Symbol Interference (ISI), Co-Channel Interference (CCI), Noise, Multi-path Interference (MAI), etc. Traditionally, to lessen interferences, an equalizer is installed on the receiver to improve the distortion. On the other hand, to reduce ISI and Noise, and make channel features more stable, Adaptive Filters is applied as it will self-adjust to fit the situation of channel keeping changing all the time and with algorithm, different equalizer structure results in different improvement. Multilayer perceptron decision feedback equalizer (MLP-DEF) of Neural Networks structure makes the interferences better improved. Although most of the MLP-DEF output layers, using fixed activation function, performs well, this article is trying to address a different idea in the light of this activation function to accelerate system convergence rate by adjusting the parameter, , and to explore how Bit Error Rate (BER) changes. Furthermore, we want to know the effect on this convergence rate and BER under the condition of different SNR (Signal Noise Ratio), by way of discussing the simulation experiments of formula, and comparison between before and after the adjustment.
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Kun-LiWang and 王焜立. "Hybrid Dual Decision Feedback Equalizer for Single-Carrier Frequency Division Multiple Access." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/vvde9c.
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碩士國立成功大學
電腦與通信工程研究所
102
In severe frequency-selective fading channels, the performance of the hybrid decision feedback equalizer (H-DFE) in single-carrier frequency division multiple access (SC-FDMA) systems is somewhat limited because of error propagation. In the thesis, we use the hybrid dual decision feedback equalizer (H-DDFE) to mitigate the error propagation effect of the H-DFE. First, the decision variables that are deemed prone to errors are identified. Then, the two most probable decisions associated with the given decision variable are retained and used to separately drive two independently operated decision feedback equalizers (DFEs) for a certain period of times, resulting in two sequences of decisions. In the end, the better sequence of the two is chosen. Simulation results show that the H-DDFE has the better performance than the H-DFE with only a modest increase in complexity. In addition, we investigate the impact of imperfect channel estimation, e.g., least squares (LS) and linear minimum mean square error (LMMSE) channel estimation techniques, on the equalizer performance. Simulation results show that the equalizer with the LMMSE channel estimation has the better performance than that with the LS method, and performs very closely to that with the perfect channel estimates. But the LMMSE channel estimator has a higher complexity and requires the knowledge of the channel’s power delay profile.
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Chen, Sin Chung, and 陳信忠. "Optimal Decision-feedback Equalizer Design under Multipath Fading Channel and Colored Noise." Thesis, 1996. http://ndltd.ncl.edu.tw/handle/91335057750039417619.
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Liu, Chun-Chi, and 劉俊綦. "Application of Wireless Optical Receiver with Decision Feedback Equalizer in Industrial Sensing." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/82179712252207909756.
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LI, XIU-ZAO, and 李秀棗. "Baudrate timing recovery technique with decision feedback equalizer in digital subscriber loops." Thesis, 1990. http://ndltd.ncl.edu.tw/handle/39035322289345510213.
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Lin, Chi-Shiung, and 林志雄. "Design and Implementation of Multi-Giga Bit Parallel Adaptive Decision Feedback Equalizer." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/36653261716961171331.
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碩士國立中央大學
電機工程研究所
94
Internet and data transmission technique are going to grow fast, the trend of recent Ethernet system will make a high effort to provide high data rate services. According to the related standard about high speed wire-lined communication system, the data rate is more than gigabits per second, even several gigabits per second. Hence, for the high transmitted data rate, the Inter-Symbol Interference (ISI) effect always exists, and it is serious and dominant for the signal distortion. The design of Adaptive Decision Feedback Equalizer (ADFE) is very important because it determines the system performance, such as Bit Error Rate (BER) and data rate. The computation cost of ADFE is also large for hardware implementation. The conventional ADFE and the Least-Mean-Square (LMS) algorithm inherently have feedback inside the data flow and the operating frequency is limited by the feedback structures. The internal feedback or recursive in the architecture algorithms makes it difficult to implement systems concurrency in the form of either pipelined or paralleled processing. This thesis provides a high speed equalizer design, and it is suitable for the 10GBase-LX4 Ethernet system in IEEE 802.3ae standard (IEEE 802.3ae Ad-hoc database). We design and implement an all digital 3.5Gbps blind ADFE based on the TSMC 0.13 μm CMOS technology. The implementation shows that the chip area is 1.55 × 1.55 mm2 with operation up to 3.5 Gbps using 1.2-V supply and dissipates 110 mW.
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Tu, Chi-Chieh, and 杜啟傑. "Design and Analysis of an Adaptive Decision Feedback Recurrent Neural Network Equalizer." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/94017234188494698959.
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碩士國立雲林科技大學
電機工程系碩士班
101
The goal of this thesis is mainly focused on the analysis and design of a decision feedback recursive neural network (DFRNN) equalizer for communications over nonlinear channels. We have proposed a recursive formula for the DFRNN real-time recurrent learning (RTRL) algorithm. The equalizer is applied to and verified by a binary transmission system. System performance is majorly compared with those of two commonly used architectures, that is, the recurrent neural network (RNN) and DFRNN with least mean square (LMS) algorithm. Although it requires slightly larger amount of computations, DFRNN(RTRL) exhibits faster speed of convergence and lower bit error rate (BER) than DFRNN(LMS) and RNN. Simulation results show that, for a BER of 10-4, DFRNN(RTRL) is about 2 dB better than DFRNN(LMS) under a severe intersymbol interference (ISI) environment. While in such a harsh environment, RNN presents a totally intolerable performance.
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Yasotharan, Hemesh. "Equalization of Integrated Optical Photodiodes using an Infinite Impulse Response Decision Feedback Equalizer." Thesis, 2011. http://hdl.handle.net/1807/29649.
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This thesis examines the challenges in creating a fully integrated optical receiver. Due to the nature of silicon, 850nm light exhibits a poor impulse response when directed at an on-die photodiode. Using a modified decision feedback equalizer with an infinite impulse response filter in the feedback path allows to eliminate the long tail of post-cursor ISI that is generated by the photodiode. Due to silicide depositions over the photodiodes, making them opaque, the receiver was tested using an electrical cable with similar frequency roll-off as that of a photodiode. A data rate of 3.7 Gbps was achieved and only limited by the amount of input reflections at the transimpedance amplifier. The receiver occupies an area of 0.23 mm^2 and consumes 51.3mW.
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Jian-YuPan and 潘建羽. "Signal Detection of Single-Carrier Block Transmission using Frequency Domain Decision Feedback Equalizer." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/42405865805355259917.
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Wang, Bor-Ming, and 王博民. "Dynamic Power-Saving Adaptive Decision Feedback Equalizer Design for High-Speed Communication Systems." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/65828061187282662550.
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碩士國立臺灣大學
電子工程學研究所
91
In this thesis, we design a high-speed Adaptive Decision Feedback Equalizer (ADFE) with dynamic power saving mechanism. Our target is to provide ADFE architectures for high-speed communication systems. We propose two high-speed ADFE architectures named Type-I and Type-II Partial Unrolled Pipelined ADFE (PUP-ADFE) respectively in Chapter 4 . Furthermore, we also propose a dynamic power saving strategy for ADFE design in Chapter 5 . All the ideas are verified from algorithm to physical implementation. Finally, we list our implementation results to show the achievements of our design.
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Yang, Yu-Sheng, and 楊育盛. "A 3.125 Gb/s Blind Decision Feedback Equalizer Based on Constant Modulus Algorithm." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/06138478603911017218.
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碩士國立臺灣科技大學
電機工程系
101
In high speed wireline communications, the frequency-dependent channel loss is an important issue. The equalizer is an effective method to resolve the frequency- dependent signal attenuation problem in wireline communications. This thesis realizes an on-chip constant-modulus-algorithm(CMA)-based decision feedback equalizer (DFE) to overcome the problem. The CMA is a blind equalization method, so it does not need a training sequence. Thus, the adaptive mechanism can be completely implemented on chip. The wireline we consider in this thesis is the RG58A/U coaxial cable for 3.125 Gb/s Ethernet application. The CMA-based DFE chip was realized in TSMC 0.18 μm CMOS process. The equalizer consumed 42 mW power at 1.8 V supply. The chip area is 1.25 mm2. In post layout simulations, the proposed equalizer can compensate for a 12.23-dB channel loss at Nyquist frequency for a 15-meter RG58A/U cable with 5.6667e-5 BER. For a 20-meter RG58A/U cable with 16.75 dB loss at Nyquist frequency, the equalizer can improve the BER from 2.3871e-1 down to 1.6633e-3.
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Huang, Chung-Kai, and 黃均凱. "Design and Verification of Coded Bidirectional Decision-Feedback Equalizer for Mobile OFDM Systems." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/2jnjv2.
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碩士中原大學
電子工程研究所
107
Orthogonal frequency-division multiplexing (OFDM) is the critical technique for the next-generation wireless system resulting from its high spectral efficiency and low receiver complexity. However, the mobile channel will generate the inter-carrier interference (ICI) of the OFDM, and thus will degrade the OFDM system performance significantly. Therefore, it is the key to design the low-complexity equalizer to suppress the ICI. In the first part of the thesis, we present the Coded Bidirectional Decision-Feedback Equalizer (CBD-DFE) to tackle the ICI impairments from the mobile OFDM systems. The CBD-DFE is composed of two primary techniques. First, we adopt the BD-DFE proposed by Chung [1] to suppress the double-sided ICI. The advantage of the BD-DFE lies on its cancelling ability of double-sided ICI of the detected symbol of interest; however, the conventional DFE only cancel single-side ICI. Secondly, we further introduce the convolutional encoder and decoder to the BD-DFE, namely the CBD-DFE, for improving the system performance. Moreover, we evaluate the CBD-DFE receiver for the long-term-evolution (LTE) communication system to check its practice in the existing popular system specification. In the second part of the thesis, we also aim to verify the correctness of our proposed CBD-DFE, and therefore we adopt the Matlab/Simulink/Zedboard+AD9361 software-defined radio (SDR) platform for system verification. In this thesis, we use two verification methods, (1) Use AD9361 to be as the data recorder and data player, and (2) Use AD9361 to be as transmitter, and use Matlab/Simulink/Zedboard+AD9361 SDR platform as the receiver. When observing verification results, they are demonstrated that the verification results and MATLAB simulation results are coincided very well, showing the fidelity of our proposed design works.
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Ng, Chee-Kit, and 吳智傑. "A 50Gb/s 115mW All-Digital Adaptive Decision Feedback Equalizer with Noise-Suppression Filter." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/23ej26.
Full textAbstract:
碩士國立交通大學
電機資訊國際學程
102
Next generation wire-line communication system operate at multi-Gbps data rates becomes more demanding, the need for high-speed low power equalizers that can compensate on highly dispersive channels loss significantly increases. Adaptive Decision Feedback Equalizers (ADFEs) are widely used due to its superior performance to reduce the inter-symbol interferences (ISIs) caused by channels in communication systems and provide high signal-to-noise ratio (SNR). However, the data throughput rate of ADFEs is limited due to the feedback loops in the coefficients update part and data equalization part. Therefore, Noise-Suppression Extended Incremental Coefficients-Lookahead ADFEs (NS-EICL ADFEs) has been proposed. NS-EICL ADFEs uses the coefficients-lookahead scheme followed by parallelism to eliminate the limitation of data rate. Based on the coefficients-lookahead scheme, a high-throughput self-lookahead filter, and extended filter (feedback filter) are realized. Together with the slow update rate Batch Mode Coefficients Update (BMCU) unit and Noise-Suppression Filters (NSFs), an unlimited data rate and better output SNR ADFE is achieved. However, the number of delay elements grows quickly in the feedback loop with high parallelism of the ADFEs. Therefore, the hardware area and power are increased. In this dissertation, we propose a Dual Data-paths Self-Lookahead Filters (DD-SLFs) which is the modified version of previous SLFs design and is named (Dual Data-paths NS-EICL ADFE). DD-SLFs architecture have better energy efficiency and hardware area than SLFs architecture due to the number of delay elements in the feedback loop reduced. Based on the DD-SLFs architecture, two set of extended filters are used to determine the tentative decision data. Therefore, DD-SLFs have no performance degradation as is compared to SLFs architecture. Furthermore, gated clock technique with the design idea of register file architecture is used to replace pipelined delay elements to save power. Besides, in order to achieve an optimal energy efficiency ADFEs, an intelligent SNR-power management skill is proposed to optimize the overall power usages with required performance. Two test chips have been fabricated in 40 nm CMOS GP technology process and operates at 1 GHz system clock rate. The measurement result verify that with a 40 parallelism factor, 40 Gbps NS-EICL ADFE with core size 500 µm x 500 µm (or 292.5k equivalent gates count), and dissipates 3.75 pJ/bit at 40 Gbps with low-supply voltage (0.87 V), 4.19 pJ/bit at 48 Gbps with normal-supply voltage (0.9 V) and 5.86 pJ/bit at 58 Gbps with high-supply voltage (1.04 V) in -25 dB channel. On the other hand, with a 50 parallelism factor, dual data-paths architecture, and power management (PM) is taped out. The core size is 653 µm x 653 µm (or 345.81k equivalent gates count). It dissipates 2.3 pJ/bit at best channel (-6 dB) and 2.74 pJ/bit at worst channel (-23.5 dB) under 0.9 V supply voltage at 50 Gbps throughput rate, respectively.
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McGinty, Nigel. "Reduced Complexity Equalization for Data Communication." Phd thesis, 1998. http://hdl.handle.net/1885/47801.
Full textAbstract:
Optimal decision directed equalization techniques for time dispersive communication channels are often too complex to implement. This thesis considers reduced complexity decision directed equalization that lowers complexity demands yet retains close to optimal performance. The first part of this dissertation consists of three reduced complexity algorithms based on the Viterbi Algorithm (VA) which are: the Parallel Trellis VA (PTVA); Time Reverse Reduced State Sequence Estimation (TR-RSSE); and Forward-Backward State Sequence Detection (FBSSD). The second part of the thesis considers structural modifications of the Decision Feedback Equalizer (DFE), which is a special derivative of the VA, specifically, optimal vector quantization for fractionally spaced DFEs, and extended stability regions for baud spaced DFEs using passivity analysis are investigated. ¶ ...
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Evans, Andrew John. "Design, implementation, and measurements of a high speed serial link equalizer." 2012. http://hdl.handle.net/2152/19981.
Full textAbstract:
The advancements of semiconductor processing technology have led to the ability for computing platforms to operate on large amounts of data at very high clock speeds. To fully utilize this processing power the components must have data continually available for operation upon and transport to other system components. To enable this data requirement, high speed serial links have replaced slower parallel communication protocols. Serial interfaces inherently require fewer signals for communication and thus reduce the device pin count, area and cost. A serial communication interface can also be run at a higher frequency because the clock skew between channels is no longer an issue since the data transmitted on various channels is independent. Serial data transmission also comes with a set of drawbacks when signal integrity is considered. The data must propagate through a channel that induces unwanted effects onto the signals such as intersymbol interference. These channel effects must be understood and mitigated to successfully transmit data without creating bit errors upon reception at the target component. Previously developed adaptive equalization techniques have been used to filter the effects of intersymbol interference from the transmitted data in the signal. This report explores the modeling and implementation of a system comprised of a transmitter, channel, and receiver to understand how intersymbol interference can be removed through a decision-feedback equalizer realized in hardware. The equalizer design, implementation, and measurements are the main focus of this report and are based on previous works in the areas of integrated circuit testing, channel modeling, and equalizer design. Simulation results from a system modeled in Simulink are compared against the results from a hardware model implemented with an FPGA, analog to digital converter and discrete circuit elements. In both the software and hardware models, bit errors were eliminated for certain amounts of intersymbol interference when a receiver with decision-feedback equalization was used instead of a receiver without equalization.text