Journal articles: 'DC link stress'

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Uthirasamy, R., and U. S. Ragupathy. "Design and Experimentation of Boost Cascaded DC Link Inverter for Domestic UPS Applications." Journal of Circuits, Systems and Computers 24, no. 10 (October 25, 2015): 1550156. http://dx.doi.org/10.1142/s021812661550156x.

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A new structure of Boost Cascaded DC Link H-Bridge Inverter (BCDCLHBI) is proposed for domestic UPS applications. It consists of DC-DC converter, sub-multilevel modules and H-bridge inverter circuits. The proposed sub-multilevel modules synthesize a stepped DC link voltage with reduced voltage stress across the H-bridge inverter. Compared with conventional two-level inverter the proposed stepped DC link inverter configuration has reduced Power Spectral Density (PSD) and reduced voltage stress. Compared with conventional Cascaded Multilevel Inverter (CMLI) configuration, the proposed system has reduced power switches, DC sources and gate driver requirements. To obtain better quality of AC power output, carrier-level shifted Pulse Width Modulation (PWM) schemes are developed for sub-multilevel switching. A simulation and prototype model of 7-level BCDCLHBI is developed and its performance is validated.

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Zhou, Xuanyi, Wei Juin Choy, Abraham M. Alcaide, Shuo Wang, Sandro Guenter, Jose I. Leon, Vito Giuseppe Monopoli, et al. "Common DC-Link Capacitor Harmonic Current Minimization for Cascaded Converters by Optimized Phase-Shift Modulation." Energies 16, no. 5 (February 21, 2023): 2098. http://dx.doi.org/10.3390/en16052098.

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This paper investigates the influence of a constant carrier phase shift on the DC-link capacitor harmonic current of cascaded converters used in fuel-cell and mild-hybrid electric vehicles. In these applications, a DC-DC converter can be adopted between the battery and the motor drive inverter in a cascaded structure, where the two converters share the same DC-link. Since the DC-link capacitor of such a system represents a critical component, the optimization of the converter operation to limit the current stress and extend the lifetime of the capacitor is an primary objective. This paper proposes the use of a carrier phase shift between the modulations of the two converters in order to minimize the harmonic current of the DC-link capacitor. By harmonic analysis, an optimal carrier phase shift can be derived depending on the converter configuration. Analytical results are presented and validated by hardware-in-the-loop experiments. The findings show that the pulse width modulation carrier phase shift between the interleaved boost converter and the voltage source motor drive inverter has a significant influence on the DC-link capacitor current and thus on its lifetime. A case study with two-cell and three-cell interleaved boost converters shows a possible DC-link capacitor lifetime extension of up to 390%.

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Ahmad, Javed, Mohammad Zaid, Adil Sarwar, Chang-Hua Lin, Mohammed Asim, Raj Kumar Yadav, Mohd Tariq, Kuntal Satpathi, and Basem Alamri. "A New High-Gain DC-DC Converter with Continuous Input Current for DC Microgrid Applications." Energies 14, no. 9 (May 4, 2021): 2629. http://dx.doi.org/10.3390/en14092629.

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The growth of renewable energy in the last two decades has led to the development of new power electronic converters. The DC microgrid can operate in standalone mode, or it can be grid-connected. A DC microgrid consists of various distributed generation (DG) units like solar PV arrays, fuel cells, ultracapacitors, and microturbines. The DC-DC converter plays an important role in boosting the output voltage in DC microgrids. DC-DC converters are needed to boost the output voltage so that a common voltage from different sources is available at the DC link. A conventional boost converter (CBC) suffers from the problem of limited voltage gain, and the stress across the switch is usually equal to the output voltage. The output from DG sources is low and requires high-gain boost converters to enhance the output voltage. In this paper, a new high-gain DC-DC converter with quadratic voltage gain and reduced voltage stress across switching devices was proposed. The proposed converter was an improvement over the CBC and quadratic boost converter (QBC). The converter utilized only two switched inductors, two capacitors, and two switches to achieve the gain. The converter was compared with other recently developed topologies in terms of stress, the number of passive components, and voltage stress across switching devices. The loss analysis also was done using the Piecewise Linear Electrical Circuit Simulation (PLCES). The experimental and theoretical analyses closely agreed with each other.

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Madani, Seyed M., Mohammad Reza Amini, Hamid Atighechi, and Milad Dolatshahi. "Quasi-parallel resonant DC-link inverter with a reduced switch voltage stress." Energy Conversion and Management 52, no. 1 (January 2011): 590–95. http://dx.doi.org/10.1016/j.enconman.2010.07.034.

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DeMarcos, Ander, Endika Robles, Unai Ugalde, Inigo Martinez de Alegria, and Jon Andreu. "Interleaving Modulation Schemes in Asymmetrical Dual Three-Phase Machines for the DC-Link Stress Reduction." Machines 11, no. 2 (February 10, 2023): 267. http://dx.doi.org/10.3390/machines11020267.

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The DC-Link capacitor plays a crucial role as far as power density and reliability are concerned: it occupies approximately 40% of the inverter, and causes approximately 30% of its failures. Asymmetrical dual three-phase (ADTP) multiphase arrangements are gaining relevance in the automotive sector for powertrain applications. This work focuses on reducing the impact that the widely used double zero sequence injection (DZSI) family of PWM techniques have on such a bulky and failure-prone component in an ADTP arrangement by means of interleaving techniques. By using the double Fourier integral formalism, the input current spectra and the overall performance of these PWM techniques have been derived, in terms of current rms value and voltage ripple in the DC-Link capacitor. Simulations have shown that choosing an adequate interleaving scheme and angle considerably relieves both current and voltage stresses on the DC-Link capacitor compared to noninterleaved operation. Reductions of 84% current rms and 86% voltage ripple have been achieved at static operating points. Finally, by averaging the rms current over WLTP standard driving cycle, reductions up to 26% have been obtained under more realistic conditions. All this would enhance the reliability and reduce the size of the onboard capacitors in future electric vehicles.

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Hu, Wang, Yunxiang Xie, Zhiping Wang, and Zhi Zhang. "A Novel Three-Phase Current Source Rectifier Based on an Asymmetrical Structure to Reduce Stress on Semiconductor Devices." Energies 13, no. 13 (June 30, 2020): 3331. http://dx.doi.org/10.3390/en13133331.

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This paper presents a novel three-phase current source rectifier (CSR) for AC/DC step-down voltage conversion to reduce voltage and current stress. The proposed converter features an asymmetrical connection between upper and lower arms compared with conventional CSRs, but has the same number of devices. With the proposed asymmetrical structure and modified space vector pulse width modulation (SVPWM) scheme, half of transistors only need to withstand half of the line-to-line voltage rather than the full line-to-line voltage, and its DC link current can be shared by multiple switches in freewheeling periods. Therefore, it is able to bring about a significant reduction in voltage and current stress, allowing for an improvement in the converter without additional cost. The topological structure, operation principles, and comparative analysis are specifically presented. Finally, an experimental prototype is built up to verify the performance of the proposed converter.

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Tcai, Anatolii, Ibrahim Mohd Alsofyani, In-Yong Seo, and Kyo-Beum Lee. "DC-link Ripple Reduction in a DPWM-Based Two-Level VSI." Energies 11, no. 11 (November 1, 2018): 3008. http://dx.doi.org/10.3390/en11113008.

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This paper proposes a new method to reduce the ripple current of the DC-link capacitor in a two-level voltage source inverter (VSI), with a discontinuous pulse-width modulation (DPWM). In real applications, a capacitor block is very bulky, due to the parallel connection of several capacitors that share the value of the ripple current. Hence, it contributes significantly to the volume and weight of the whole system. Conventional DPWM is used to minimize the amount of switching for the power transistors, therefore, reducing stress and power loss. This leads to increased efficiency and reliability of the system. Nevertheless, the reduction of the DC link ripple current is still not optimal. Therefore, the proposed method introduces a PWM phase-shift technique to provide further reduction of the DC-link ripple current in a DPWM-based VSI. The efficacy of the proposed method is confirmed by simulation and experimental results.

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Henderson, Callum, Dimitrios Vozikis, Derrick Holliday, Xiaoyan Bian, and Agustí Egea-Àlvarez. "Assessment of Grid-Connected Wind Turbines with an Inertia Response by Considering Internal Dynamics." Energies 13, no. 5 (February 26, 2020): 1038. http://dx.doi.org/10.3390/en13051038.

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This paper presents a small-signal analysis of different grid side controllers for full power converter wind turbines with inertia response capability. In real wind turbines, the DC link controller, the drivetrain damping controller and the inertial response might present contradictory control actions in a close bandwidth range. This situation might lead to reduced control performance, increased component stress and non-compliance of connection agreements. The paper presents an analysis of the internal wind turbine dynamics by considering different grid-side converter control topologies: standard current control used in the wind industry, standard current control with inertia emulation capabilities and virtual synchronous machines. Comments are made on the similarities between each topology and the negative effects and limits, and possible remedies are discussed. Finally, the conclusion poses that the inclusion of a DC link voltage controller reduces the ability of a converter to respond to external frequency events without energy storage. The degradation increases with the DC link voltage control speed.

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Uthirasamy, R., U. S. Ragupathy, and R. Naveen. "Structure of 15-Level Sub-Module Cascaded H-Bridge Inverter for Speed Control of AC Drive Applications." International Journal of Power Electronics and Drive Systems (IJPEDS) 5, no. 3 (February 1, 2015): 404. http://dx.doi.org/10.11591/ijpeds.v5.i3.pp404-414.

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This paper deals with the implementation of a single phase 15-level Sub-Multilevel Cascaded H-Bridge Inverter (SMCHBI) for variable speed industrial drive applications. It consists of sub-multilevel modules and H-bridge inverter configuration. Sub-multilevel switches synthesize stepped DC link voltage and current from the DC sources. H-bridge inverter switches renovate stepped DC link voltage and current into sinusoidal waveform. Compared with conventional Cascaded Multilevel Inverter (CMLI), the proposed system employs the reduced number of power switches, DC sources and gate driver requirements. The proposed system not only reduces the overall system cost but also reduces the voltage stress across the inverter switches. The proposed system does not required additional resonant soft switching circuits for Zero Voltage Switching (ZVS) of inverter. In the proposed method, variable frequency method is adopted for the speed control of industrial induction motor drives. A prototype model of 15-level SMCHB is developed and the performance of the systems is validated experimentally.

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Kumar, G. V. Brahmendra, Palanisamy Kaliannan, Sanjeevikumar Padmanaban, Jens Bo Holm-Nielsen, and Frede Blaabjerg. "Effective Management System for Solar PV Using Real-Time Data with Hybrid Energy Storage System." Applied Sciences 10, no. 3 (February 7, 2020): 1108. http://dx.doi.org/10.3390/app10031108.

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This paper proposes an effective management system for stand-alone solar photovoltaic (PV) using real-time data with Hybrid Energy Storage System (HESS). The abrupt movement of fleeting clouds often gives rise to PV power output fluctuations which in turn affect the power quality and system stability due to scattered solar radiation reception. These variations can limit through a ramp-limit controller and employing a DC link controller to maintain the stable DC link voltage. The battery is used in the system for continuous power application and the sudden variations in charging and discharging of battery power can create stress on the battery. These sudden changes in a battery will be removed by the super-capacitor (SC) unit and achieves a fast DC link voltage regulation. Hence, the high energy and power density devices such as battery and SC units will deliver more stable power into the system. The control scheme is tested in Matlab/Simulink and validated by Real-Time Hardware-in-Loop (HIL) simulator using periodic one-minute data for one year from the solar PV power plant from real-time.

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Maalandish, Mohammad, Seyed Hossein Hosseini, Mehran Sabahi, and Pouyan Asgharian. "Modified MPC based grid-connected five-level inverter for photovoltaic applications." COMPEL - The international journal for computation and mathematics in electrical and electronic engineering 37, no. 2 (March 5, 2018): 971–85. http://dx.doi.org/10.1108/compel-02-2017-0056.

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PurposeThe main purpose of this paper is to select appropriate voltage vectors in the switching techniques and, by selecting the proper voltage vectors, be able to achieve a DC link with the same outputs and a symmetric multi-level inverter. Design/methodology/approachThe proposed structure, a two-stage DC–AC symmetric multi-level inverter with modified Model Predictive Control (MMPC) method, is presented for Photovoltaic (PV) applications. The voltage of DC-link capacitors of the boost converter is controlled by MMPC control method to select appropriate switching vectors for the multi-level inverter. The proposed structure is provided for single-phase power system, which increases 65 V input voltage to 220 V/50 Hz output voltage, with 400 V DC link. Simulation results of proposed structure with MMPC method are carried out by PSCAD/EMTDC software. FindingsBased on the proposed structure and control method, total harmonic distortion (THD) reduces, which leads to lower power losses and higher circuit reliability. In addition, reducing the number of active switches in current path causes to lower voltage stress on the switches, lower PV leakage current and higher overall efficiency. Originality/valueIn the proposed structure, a new control method is presented that can make a symmetric five-level voltage with lower THD by selecting proper switching for PV applications.

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Chang, Long-Yi, Kuei-Hsiang Chao, and Tsang-Chih Chang. "A High Voltage Ratio and Low Ripple Interleaved DC-DC Converter for Fuel Cell Applications." Scientific World Journal 2012 (2012): 1–11. http://dx.doi.org/10.1100/2012/896508.

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This paper proposes a high voltage ratio and low ripple interleaved boost DC-DC converter, which can be used to reduce the output voltage ripple. This converter transfers the low DC voltage of fuel cell to high DC voltage in DC link. The structure of the converter is parallel with two voltage-doubler boost converters by interleaving their output voltages to reduce the voltage ripple ratio. Besides, it can lower the current stress for the switches and inductors in the system. First, the PSIM software was used to establish a proton exchange membrane fuel cell and a converter circuit model. The simulated and measured results of the fuel cell output characteristic curve are made to verify the correctness of the established simulation model. In addition, some experimental results are made to validate the effectiveness in improving output voltage ripple of the proposed high voltage ratio interleaved boost DC-DC converters.

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Guo, Qi. "Multi-resonant DC-DC Converter Based on Switched Capacitor Pre-voltage Reduction." CPSS Transactions on Power Electronics and Applications 7, no. 4 (December 2022): 421–31. http://dx.doi.org/10.24295/cpsstpea.2022.00038.

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This paper proposes a multi-resonant DC-DC converter based on switched capacitor pre-buck. The converter can realize soft switching in the full load range and has good voltage gain characteristics. In order to effectively reduce the voltage stress on the device, the front stage of the converter adopts a stacked structure of switched capacitors. This structure realizes the function of high step-down ratio by pre-stepping the bus voltage. After reasonable parameter design and frequency matching, the third harmonic is superimposed on the high-order resonant link of the latter stage during the energy transmission process. This will significantly reduce the loss of the secondary side rectifier diode and increase the efficiency. This paper introduces the working principle of the converter, proposes a five-element parameter design scheme, and analyzes the parameter dispersion to assist the parameter design scheme to make it more reasonable, and finally conducts experimental verification. A 100 W prototype with 400 V input and 12 V output was built in the laboratory to verify the correctness of the theoretical analysis.

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Moradisizkoohi, Hadi, Nour Elsayad, and Osama Mohammed. "A Soft-Switched DC/DC Converter Using Integrated Dual Half-Bridge with High Voltage Gain and Low Voltage Stress for DC Microgrid Applications." Inventions 3, no. 3 (September 3, 2018): 63. http://dx.doi.org/10.3390/inventions3030063.

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In this paper, a soft-switched boost converter including an integrated dual half-bridge circuit with high voltage gain and continuous input current is introduced that can be suitable for the applications requiring a wide voltage gain range, such as for the front-end of the inverter in a DC microgrid to integrate renewable energy sources (RES). In the proposed converter, two half-bridge converters are connected in series at the output stage to enhance the voltage gain. Additionally, the balanced voltage multiplier stage is employed at the output to increase the voltage conversion ratio, as well as distribute the voltage stress across semiconductors; hence, switches with smaller on-resistance RDS(on) can be adopted resulting in an improvement in the efficiency. The converter takes advantage of the clamp circuit not only to confine the voltage stress of switches, but also to achieve the soft-switching, which leads to a reduction in the switching loss as well as the cost. The mentioned features make the proposed converter a proper choice for interfacing RES to the DC-link bus of the inverter. The operation modes, steady-state analysis, and design consideration of the proposed topology have been demonstrated in the paper. A 1-kW laboratory prototype was built using gallium nitride (GaN) transistors and silicon carbide (SiC) diodes to confirm the effectiveness of the proposed topology.

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KOLAR, JOHANN W., and FRANZ C. ZACH. "A NOVEL THREE-PHASE THREE-SWITCH THREE-LEVEL UNITY POWER FACTOR BOOST-TYPE PWM RECTIFIER." Journal of Circuits, Systems and Computers 05, no. 03 (September 1995): 479–501. http://dx.doi.org/10.1142/s0218126695000308.

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Based on the combination of a three-phase diode bridge and a DC/DC boost converter a new three-phase three-switch three-level PWM rectifier system is developed. It can be characterized by sinusoidal mains current consumption, controlled output voltage and low blocking voltage stress on the power transistors. The application could be, e.g., for feeding the DC link of a telecommunications power supply module. The stationary operational behavior, the control of the mains currents and of the output voltage are analyzed. Finally, the stresses on the system components are determined by digital simulation and compared to the stresses in a conventional PWM rectifier system.

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Kani, N. Ismayil, B. V. Manikandan, and Prabakar Perciyal. "A Novel Soft Switching Based Fuzzy Logic Control for Single Phase Inverter." Applied Mechanics and Materials 573 (June 2014): 143–49. http://dx.doi.org/10.4028/www.scientific.net/amm.573.143.

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—This The Pulse Width Modulation (PWM) DC-to-AC inverter has been widely used in many applications due to its circuit simplicity and rugged control scheme. It is however driven by a hard-switching pulse width modulation (PWM) inverter, which has low switching frequency, high switching loss, high electro-magnetic interference (EMI), high acoustic noise and low efficiency, etc. To solve these problems of the hard-switching inverter, many soft-switching inverters have been designed in the past. Unfortunately, high device voltage stress, large dc link voltage ripples, complex control scheme and so on are noticed in the existing soft-switching inverters. This proposed work overcomes the above problems with simple circuit topology and all switches work in zero-voltage switching condition. Comparative analysis between conventional open loop, PI and fuzzy logic based soft switching inverter is also presented and discussed. Keywords—Zero voltage switching, Inverter, Dc link, PI controller, Fuzzy logic system control ,Modulation strategy, Soft switching

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Tran, Vinh-Thanh, Duc-Tri Do, Van-Dung Do, and Minh-Khai Nguyen. "A Three-Level DC-Link Quasi-Switch Boost T-Type Inverter with Voltage Stress Reduction." Energies 13, no. 14 (July 20, 2020): 3727. http://dx.doi.org/10.3390/en13143727.

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In recent years, the three-level T-Type inverter has been considered the best choice for many low and medium power applications. Nevertheless, this topology is known as a buck converter. Therefore, in this paper, a new topology incorporating the dc-link type quasi-switched boost network with the traditional three-level T-type inverter is proposed to overcome the limit of traditional three-level T-Type inverter. The space vector pulse width modulation scheme is considered to control this topology, which provides some benefits such as enhancing modulation index and reducing the magnitude of common-mode voltage. For this scheme, the zero, medium, and large vectors are utilized to generate the output voltage. The shoot-through state which is adopted by turning on all power switches of inverter leg is inserted into zero vector to boost the dc-link voltage. As a result, there is no distortion at the output waveform. The control signal of intermediate network power switches is also detailed to improve the boost factor and voltage gain. As a result, the voltage stress on power devices like capacitors, diodes, and switches is decreased significantly. To demonstrate the outstanding of proposed structure and its control strategy, some comparisons between the proposed method and other ones are performed. Simulation and experimental prototype results are conducted to verify the accuracy of the theory and effectiveness of the inverter.

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Thangaprakash, S., and A. Krishnan. "Modified Space Vector Modulated Z Source Inverter with Effective DC Boost and Lowest Switching Stress." Journal of Engineering Research [TJER] 7, no. 1 (June 1, 2010): 70. http://dx.doi.org/10.24200/tjer.vol7iss1pp70-77.

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This paper presents a modified control algorithm for Space Vector Modulated (SVM) Z-Source inverters. In traditional control strategies, the Z-Source capacitor voltage is controlled by the shoot through duty ratio and the output voltage is controlled by the modulation index respectively. Proposed algorithm provides a modified voltage vector with single stage controller having one degree of freedom wherein traditional controllers have two degrees of freedom. Through this method of control, the full utilization of the dc link input voltage and keeping the lowest voltage stress across the switches with variable input voltage could be achieved. Further it offers ability of buck-boost operation, low distorted output waveforms, sustainability during voltage sags and reduced line harmonics. The SVM control algorithm presented in this paper is implemented through Matlab/Simulink tool and experimentally verified with Z-source inverter prototype in the laboratory.

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Punna, Srinivas, Rupesh Mailugundla, and Surender Reddy Salkuti. "Design, Analysis and Implementation of Bidirectional DC–DC Converters for HESS in DC Microgrid Applications." Smart Cities 5, no. 2 (March 28, 2022): 433–54. http://dx.doi.org/10.3390/smartcities5020024.

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This research proposes an enhanced converter for a hybrid energy storage system (HESS) for a multi-input bidirectional DC–DC power converter (MIPC). When batteries are used for energy storage, their charge and discharge rates are low, putting the battery under current stress and shortening its life. Because of their increased power density, supercapacitors (SCs) can react quickly to abrupt fluctuations and solve this problem. SCs, on the other hand, cannot be utilized for storage since they cannot provide power for prolonged periods of time. Batteries and supercapacitors are employed together in HESSs because their opposing characteristics make them an ideal pair for energy storage. An MIPC is used to connect the HESS to the DC microgrid. The MIPC allows for decoupled battery and SC power regulation, as well as energy transfer across storage devices inside the system. A controller has been developed to regulate both HESS charging and discharging operations, making it a unified controller for DC microgrid applications. The proposed model predictive control (MPC) provided better DC grid voltage restoration to step change in PV generation and load demand over the traditional proportional integral (PI) control scheme. The MPC method minimizes current strains, extends battery life and enhances overall system performance in response to a step change in PV power and load demand as well as providing quicker DC grid voltage control. Simulation and experimental data for the proposed controller were created by varying PV generation and load demand, resulting in faster DC link voltage regulation.

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Selvabharathi, D., Palanisamy R, K. Selvakumar, V. Kalyanasundaram, D. Karthikeyan, Amal Nair, Kriti Karnavat, and Annanya Sharma. "Simulation of Zeta Converter Based 3-level NPC Inverter with PV System." Indonesian Journal of Electrical Engineering and Computer Science 12, no. 1 (October 1, 2018): 1. http://dx.doi.org/10.11591/ijeecs.v12.i1.pp1-6.

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<span lang="EN-US">This paper proposes increasing the efficiency of the autonomous Photovoltaic (PV) system by utilizing zeta converter alongside neutral point clamped multilevel inverters (NPC-MLI) based on innovative PWM scheme. The PV system acts as an input source and the relevant control of zeta converter through maximum power point tracking (MPPT) offers the maximum available power from the PV array connected to DC-link. To obtain a high voltage gain we need to exhaust the dc-link voltage as much as possible and reduce stress on the switches. For this the NPC-MLI algorithm approaches PWM technique to perform capacitive charging in parallel and discharging in series to obtain maximum voltage gain. The proposed scheme is designed and verified via detailed simulations in the MATLAB/Simulink environment. </span>

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Hải, Quách Thanh, Nguyễn Tùng Linh, Lê Xuân Vinh, Huỳnh Tấn Mẫn, Trương Việt Anh, and Lê Việt Cường. "THUẬT TOÁN DÙNG NHIỀU SÓNG MANG GIẢM DÒNG ĐIỆN ĐẦU VÀO VÀ ĐIỆN ÁP STRESS TRONG BỘ NGHỊCH LƯU TĂNG ÁP TỰA KHÓA CHUYỂN MẠCH." TNU Journal of Science and Technology 227, no. 02 (February 28, 2022): 165–72. http://dx.doi.org/10.34238/tnu-jst.5213.

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Bài báo này trình bày phương pháp với nhiều hơn ba sóng mang để giảm dòng điện đầu vào và điện áp stress trên các thành phần trong QSBI. Kỹ thuật được đề xuất dựa trên một số thời điểm ngắn mạch của bộ tăng áp DC/DC và một trong bộ nghịch lưu ở vị trí của các vectơ không. Cơ sở của kỹ thuật đề xuất là sử dụng nhiều sóng mang. Giải thuật nhiều sóng mang này giúp không chỉ giảm điện áp DC-Link mà còn giảm dòng điện ngõ vào và điện áp cung cấp cho QSBI. Điều này đưa đến những lợi ích kinh tế như: giảm dòng điện và điện áp trên các khóa; giảm điện cảm, điện dung do đó giảm kích thước của mạch. Kết quả mô phỏng cho thấy điện áp DC-Link có thể giảm 33,13% khi số sóng mang tăng từ 2 lên 5 và dòng điện ngõ vào giảm 33,4%. Phương pháp đề xuất có hiệu quả cao khi cần hệ số tăng áp lớn. Trong bài viết lựa chọn số sóng mang cần thiết để đạt hiệu suất cao nhất đã được chúng tôi phân tích và khuyến nghị. Các phân tích làm rõ kỹ thuật và mô phỏng đánh giá của phương pháp đề xuất cũng được trình bày trong bài báo.

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A. Rahiman, Riyaz, and M. C. John Wiselin. "Implementation of a Novel Control Technique in Landsman Converter Using Bumble Bee Optimization." International Journal of Engineering & Technology 7, no. 3.27 (August 15, 2018): 339. http://dx.doi.org/10.14419/ijet.v7i3.27.17968.

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This paper focuses on a solar PV array based BLDC motor employing Landsman converter under partial shading condition (PSC). A converter acts as an interface between the SPV array under PSC and Voltage Source Inverter (VSI) feeding the Brushless DC (BLDC) motor. BLDC motor incorporating the merits of higher efficiency, high reliability, high ruggedness, easy-to-drive, capability to operate successfully at low voltage and excellent performance over a wide range of speed. The speed control of BLDC motor by variable DC-link voltage. This eliminates the additional phase current sensing, DC-link voltage sensing, additional control and associated circuitry. The proposed system includes simplicity control, compactness, and soft starting of the BLDC motor. The operation of Landsman converter in CCM results reduced stress on devices. To optimize the operating point of the SPV array in order to get maximum possible power output by means of the better maximum power point tracking (MPPT) technique. The technique is Bumble Bee Mating Optimization (BBMO) based MPPT. The novel technique is compared to the conventional techniques. The simulated results are executed in MATLAB/SIMULINK.

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Tran, Van-Thuan, Minh-Khai Nguyen, Cao-Cuong Ngo, and Youn-Ok Choi. "Three-Phase Five-Level Cascade Quasi-Switched Boost Inverter." Electronics 8, no. 3 (March 6, 2019): 296. http://dx.doi.org/10.3390/electronics8030296.

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This paper presents a three-phase cascaded five-level H-bridge quasi-switched boost inverter (CHB-qSBI). The merits of the CHB-qSBI are as follows: single-stage conversion, shoot-through immunity, buck-boost voltage, and reduced passive components. Furthermore, a PWM control method is applied to the CHB-qSBI topology to improve the modulation index. The voltage stress across power semiconductor devices and the capacitor are significantly lower using improved pulse-width modulation (PWM) control. Additionally, by controlling individual shoot-through duty cycle, the DC-link voltage of each module can achieve the same values. As a result, the imbalance problem of the DC-link voltage can be solved. A detailed analysis and operating principle with the modulation scheme and comprehensive comparison for the CHB-qSBI are illustrated. The experimental and simulation results are presented to validate the operating principle of the three-phase CHB-qSBI.

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Nishizawa, Koroku, Jun-ichi Itoh, Akihiro Odaka, Akio Toba, Hidetoshi Umida, and Satoru Fujita. "Current Stress Reduction for DC-Link Capacitors of Three-Phase VSI With Carrier-Based Continuous PWM." IEEE Transactions on Industry Applications 55, no. 6 (November 2019): 6061–72. http://dx.doi.org/10.1109/tia.2019.2932701.

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Uthirasamy, R., V. Kumar Chinnaiyan, S. Vishnukumar, Alagar Karthick, V. Mohanavel, Umashankar Subramaniam, and M. Muhibbullah. "Design of Boosted Multilevel DC-DC Converter for Solar Photovoltaic System." International Journal of Photoenergy 2022 (January 5, 2022): 1–23. http://dx.doi.org/10.1155/2022/1648474.

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Integration of renewable energy sources to the grid-connected system has influenced scholarly research in recent times to evolve solutions for power electronic conversion. Particularly, solar photovoltaic (SPV), being a resource available throughout the year, demands needful research to meet the demand for industrial applications. To facilitate SPV, multilevel inverters (MLIs) and cascaded H-bridge inverters (CHBIs) are proposed in the literature to meet the power requirement. However, these circuits suffer from efficiency loss, economic aspects of DC sources usage, and switching losses. Hence, in this research, a new power converter topology is projected to improve the overall efficiency of SPV systems. Further, a three-level approach involving (i) SPV Panel-Temperature Reduction (SPV-PTR) Setup, (ii) Boost Multilevel Direct Current Link Converter (BMLDCLC), and (iii) use of effective snubber modules (SM) are effectively handled to promote the industry readiness of the proposed system. From a detailed system investigation, it is seen that the proposed arrangement has minimized the power loss to ensure better quality in output. Furthermore, the software-based results and hardware setup of the planned comprehensive converter have shown promising results in terms of (i) reduced voltage stress, (ii) reduced total harmonic distortion (THD) without filter component, and (iii) reduced power loss. It is observed that the experimental setup has reported a 12.9% of excess heat removal, 5% decrease in harmonics, and 33% switch reduction than the existing MLI schemes. In addition, the proposed setup is suggested to apply for industrial purposes indicate its efficacy to be a solution in real time.

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Junmin, Wu, Zhang Xizi, Li Cui, Zhang Jun, and Zhao Zhibin. "A Novel Submodule Applied in HVDC Hybrid DC Breaker Topology." E3S Web of Conferences 64 (2018): 04003. http://dx.doi.org/10.1051/e3sconf/20186404003.

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In recent years, with the vigorous development of power electronic technology, renewable energy sources such as wind power and solar energy utilization efficiency continuing to improve, and the application scale expanding unceasingly, DC power grid technology and the development of multiterminal HVDC has become a key link of transmission technology in our country. As the key equipment of biulding DC system, The direct current breaker need to be optimized on the aspect of topology, to promote the development of dc transmission. This article puts forward a new type of submodule which can be applicated in hybrid DC breaker. After a brief review of DC circuit breaker research status, the paper will give the topology structure, and analyzes its working principle. Then, verification and electrical stress calculation will be done in Saber Sketch simulation. Based on this, two other present scheme will be introduced, and finally a comparison will be made between the diffent scheme. As is concluded, the novel submodule can save the power elctronic device cost effectively

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Schulte, Stephan, Christoph Schlensok, and Gerhard Henneberger. "Analytical computation of the RMS current stress on the DC-link capacitor in DC-link PWM converter systems powering N-phase rotating field machines in PWM and square wave mode." International Journal of Applied Electromagnetics and Mechanics 19, no. 1-4 (April 24, 2004): 497–502. http://dx.doi.org/10.3233/jae-2004-615.

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Hossameldin, Abdelsalam, Ibrahim, and Williams. "Enhanced Performance Modified Discontinuous PWM Technique for Three-Phase Z-Source Inverter." Energies 13, no. 3 (January 26, 2020): 578. http://dx.doi.org/10.3390/en13030578.

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Various industrial applications require a voltage conversion stage from DC to AC. Among them, commercial renewable energy systems (RES) need a voltage buck and/or boost stage for islanded/grid connected operation. Despite the excellent performance offered by conventional two-stage converter systems (dc–dc followed by dc–ac stages), the need for a single-stage conversion stage is attracting more interest for cost and size reduction reasons. Although voltage source inverters (VSIs) are voltage buck-only converters, single stage current source inverters (CSIs) can offer voltage boost features, although at the penalty of using a large DC-link inductor. Boost inverters are a good candidate with the demerit of complicated control strategies. The impedance source (Z-source) inverter is a high-performance competitor as it offers voltage buck/boost in addition to a reduced passive component size. Several pulse width modulation (PWM) techniques have been presented in the literature for three-phase Z-source inverters. Various common drawbacks are annotated, especially the non-linear behavior at low modulation indices and the famous trade-off between the operating range and the converter switches’ voltage stress. In this paper, a modified discontinuous PWM technique is proposed for a three-phase z-source inverter offering: (i) smooth voltage gain variation, (ii) a wide operating range, (iii) reduced voltage stress, and (iv) improved total harmonic distortion (THD). Simulation, in addition to experimental results at various operating conditions, validated the proposed PWM technique’s superior performance compared to the conventional PWM techniques.

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Ramesh, A., O. Chandra Sekhar, and M. Siva Kumar. "A Novel Three Phase Multilevel Inverter with Single Dc Link For Induction Motor Drive Applications." International Journal of Electrical and Computer Engineering (IJECE) 8, no. 2 (April 1, 2018): 763. http://dx.doi.org/10.11591/ijece.v8i2.pp763-770.

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All industrial drives need a controlled output and it can be achieved by controlling the input supply. In this regard, the inverter circuit plays an important role in the applications of industrial drives. The industrial drives are operated at high rated power and the conventional inverters cannot be applicable for high power demands because of the large dV/dt (rate of change of voltage) and more switching losses. Therefore, multilevel inverters are introduced for high power-medium voltage applications. For all AC drives the MLIs are reliable in operation. This MLI topology also reduces the harmonics and bearings stress of a motor with low dV/dt. In most applications multilevel inverters are used because we can get more number of voltage levels. To increase the number of voltage levels, circuit needs to have more switches. But, we have to optimize the switch count and switching operations. The power level of the inverter is limited due to high currents and stress. In this paper, we proposed a new circuit topology which enables the switches to be active at different voltage levels, causes reduction of the switching losses and also increases the efficiency of the inverter. In this we have presented two configurations for an eleven level MLI for three phase induction motor drive application. In this an individual DC source is connected for each bridge circuit of each phase in one configuration and only one common DC link is used for three phases in another configuration. With this the size, cost and complexity could be decreased. In both the configurations the controlled output of the inverter is connected to the induction motor drive. The circuits are modeled using Matlab/simulink software and corresponding output waveforms are analyzed for both configurations.

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Kolar, J. W., and S. D. Round. "Analytical calculation of the RMS current stress on the DC-link capacitor of voltage-PWM converter systems." IEE Proceedings - Electric Power Applications 153, no. 4 (2006): 535. http://dx.doi.org/10.1049/ip-epa:20050458.

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Khan, Muhammad Yasir Ali, Haoming Liu, Salman Habib, Danish Khan, and Xiaoling Yuan. "Design and Performance Evaluation of a Step-Up DC–DC Converter with Dual Loop Controllers for Two Stages Grid Connected PV Inverter." Sustainability 14, no. 2 (January 12, 2022): 811. http://dx.doi.org/10.3390/su14020811.

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In this work, a non-isolated DC–DC converter is presented that combines a voltage doubler circuit and switch inductor cell with the single ended primary inductor converter to achieve a high voltage gain at a low duty cycle and with reduced component count. The converter utilizes a single switch that makes its control very simple. The voltage stress across the semiconductor components is less than the output voltage, which makes it possible to use the diodes with reduced voltage rating and a switch with low turn-on resistance. In particular, performance principle of the proposed converter along with the steady state analysis such as voltage gain, voltage stress on semiconductor components, and design of inductors and capacitors, etc., are carried out and discussed in detail. Moreover, to regulate a constant voltage at a DC-link capacitor, back propagation algorithm-based adaptive control schemes are designed. These adaptive schemes enhance the system performance by dynamically updating the control law parameters in case of PV intermittency. Furthermore, a proportional resonant controller based on Naslin polynomial method is designed for the current control loop. The method describes a systematic procedure to calculate proportional gain, resonant gain, and all the coefficients for the resonant path. Finally, the proposed system is simulated in MATLAB and Simulink software to validate the analytical and theoretical concepts along with the efficacy of the proposed model.

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Cizeron, Antoine, Javier Ojeda, Eric Labouré, and Olivier Béthoux. "Prediction of PWM-Induced Current Ripple in Subdivided Stator Windings Using Admittance Analysis." Energies 12, no. 23 (November 21, 2019): 4418. http://dx.doi.org/10.3390/en12234418.

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Subdividing stator winding is a way to lower the DC link voltage value in electric drives and reduce the stress on motor insulation. Coupled windings sharing the same stator teeth are modelled in order to evaluate the link between voltages disparities and current ripple. This paper provides an assessment of current ripple rise in the subdivided windings compared to ordinary topologies through the use of a basic inductive model. A method for PWM-Induced current ripple and high-frequency loss estimation based on admittance measurements is developed and experimentally validated. The use of this subdivided structure does not induce more than a 10% rise of the PWM-induced current ripple compared to a standard winding structure.

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Palanisamy, R., A. Velu, K. Selvakumar, D. Karthikeyan, D. Selvabharathi, and S. Vidyasagar. "A Sub-Region Based Space Vector Modulation Scheme for Dual 2-Level Inverter System." International Journal of Electrical and Computer Engineering (IJECE) 8, no. 6 (December 1, 2018): 4902. http://dx.doi.org/10.11591/ijece.v8i6.pp4902-4911.

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This paper deals the implementation of 3-level output voltage using dual 2-level inverter with control of sub-region based Space Vector Modulation (SR-SVM). Switching loss and voltage stress are the most important issues in multilevel inverters, for keep away from these problems dual inverter system executed. Using this proposed system, the conventional 3-level inverter voltage vectors and switching vectors can be located. In neutral point clamped multilevel inverter, it carries more load current fluctuations due to the DC link capacitors and it requires large capacitors. Based on the sub-region SVM used to control IGBT switches placed in the dual inverter system. The proposed system improves the output voltage with reduced harmonic content with improved dc voltage utilisation. The simulation and hardware results are verified using matlab/simulink and dsPIC microcontroller.

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Bharatiraja, C., Shri Harish, J. L. Munda, P. Sanjeevikumar, M. Sriram Kumar, and Vivek Bhati. "A PWM Strategies for Diode Assisted NPC-MLI to Obtain Maximum Voltage Gain for EV Application." International Journal of Power Electronics and Drive Systems (IJPEDS) 8, no. 2 (June 1, 2017): 767. http://dx.doi.org/10.11591/ijpeds.v8.i2.pp767-774.

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The projected diode assisted Neutral Point Diode Clamed (NPC-MLI) with the photovoltaic system produces a maximum voltage gain that is comparatively higher than those of other boost conversion techniques. This paper mainly explores vector selection approach pulse-width modulation (PWM) strategies for diode-assisted NPC-MLI to obtain a maximum voltage gain without compromising in waveform quality. To obtain a high voltage gain maximum utilization of dc-link voltage and stress on the power switches must be reduced. From the above issues in the diode assisted NPC-MLI leads to vector selection approach PWM technique to perform capacitive charging in parallel and discharging in series to obtain maximum voltage gain. The operation principle and the relationship of voltage gain versus voltage boost duty ratio and switching device voltage stress versus voltage gain are theoretically investigated in detail. Owing to better performance, diode-assisted NPC-MLI is more promising and competitive topology for wide range dc/ac power conversion in a renewable energy application. Furthermore, theoretically investigated are validated via simulation and experimental results.

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Lee, Kevin, Thomas M. Jahns, Thomas A. Lipo, Giri Venkataramanan, and William E. Berkopec. "Impact of Input Voltage Sag and Unbalance on DC-Link Inductor and Capacitor Stress in Adjustable-Speed Drives." IEEE Transactions on Industry Applications 44, no. 6 (2008): 1825–33. http://dx.doi.org/10.1109/tia.2008.2006308.

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Rees, William D., Martin Stahl, Kevan Jacobson, Brian Bressler, Laura M. Sly, Bruce A. Vallance, and Theodore S. Steiner. "Enteroids Derived From Inflammatory Bowel Disease Patients Display Dysregulated Endoplasmic Reticulum Stress Pathways, Leading to Differential Inflammatory Responses and Dendritic Cell Maturation." Journal of Crohn's and Colitis 14, no. 7 (December 4, 2019): 948–61. http://dx.doi.org/10.1093/ecco-jcc/jjz194.

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Abstract Background and Aims Endoplasmic reticulum [ER] stress in intestinal epithelial cells [IECs] contributes to the pathogenesis of inflammatory bowel disease [IBD]. We hypothesized that ER stress changes innate signalling in human IECs, augmenting toll-like receptor [TLR] responses and inducing pro-inflammatory changes in underlying dendritic cells [DCs]. Methods Caco-2 cells and primary human colon-derived enteroid monolayers were exposed to ATP [control stressor] or thapsigargin [Tg] [ER stress inducer], and were stimulated with the TLR5 agonist flagellin. Cytokine release was measured by an enzyme immunoassay. ER stress markers CHOP, GRP78 and XBP1s/u were measured via quantitative PCR and Western blot. Monocyte-derived DCs [moDCs] were cultured with the IEC supernatants and their activation state was measured. Responses from enteroids derived from IBD patients and healthy control participants were compared. Results ER stress enhanced flagellin-induced IL-8 release from Caco-2 cells and enteroids. Moreover, conditioned media activated DCs to become pro-inflammatory, with increased expression of CD80, CD86, MHCII, IL-6, IL-15 and IL-12p70 and decreased expression of CD103 and IL-10. Flagellin-induced IL-8 production correlated with DC activation, suggesting a common stress pathway. Moreover, there were distinct differences in cytokine expression and basal ER stress between IBD and healthy subject-derived enteroid monolayers, suggesting a dysregulated ER stress pathway in IBD-derived enteroids. Conclusions Cellular stress enhances TLR5 responses in IECs, leading to increased DC activation, indicating a previously unknown mechanistic link between epithelial ER stress and immune activation in IBD. Furthermore, dysregulated ER stress may be propagated from the intestinal epithelial stem cell niche in IBD patients.

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Maiello, Daniela, Marianna Varone, Rosario Vicidomini, Valentina Belli, Marina De Rosa, Paola Dama, Maria Furia, and Mimmo Turano. "Dyskerin Downregulation Can Induce ER Stress and Promote Autophagy via AKT-mTOR Signaling Deregulation." Biomedicines 10, no. 5 (May 8, 2022): 1092. http://dx.doi.org/10.3390/biomedicines10051092.

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Dyskerin is an evolutionarily conserved nucleolar protein implicated in a wide range of fundamental biological roles, including telomere maintenance and ribosome biogenesis. Germline mutations of DKC1, the human gene encoding dyskerin, cause the hereditary disorders known as X-linked dyskeratosis congenita (X-DC). Moreover, dyskerin is upregulated in several cancers. Due to the pleiotropic functions of dyskerin, the X-DC clinical features overlap with those of both telomeropathies and ribosomopathies. In this paper, we evaluate the telomerase-independent effects of dyskerin depletion on cellular physiology by using inducible DCK1 knockdown. This system allows the downregulation of DKC1 expression within a short timeframe. We report that, in these cellular systems, dyskerin depletion induces the accumulation of unfolded/misfolded proteins in the endoplasmic reticulum, which in turn induces the activation of the PERK branch of the unfolded protein response. We also demonstrate that the PERK-eIF2a-ATF4-CHOP signaling pathway, activated by dyskerin downregulation, triggers a functional autophagic flux through the inhibition of the PI3K/AKT/mTOR pathway. By revealing a novel unpredicted connection between the loss of dyskerin, autophagy and UPR, our results establish a firm link between the lowering of dyskerin levels and the activation of the ER stress response, that plays a key role in the pathogenesis of several diseases.

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Nagaraju, Sharmila, and Narataj Kanathur Ramaswamy. "Decentralized dynamic power control in an islanded DC microgrid with hybrid energy storage system." International Journal of Power Electronics and Drive Systems (IJPEDS) 13, no. 4 (December 1, 2022): 2190. http://dx.doi.org/10.11591/ijpeds.v13.i4.pp2190-2198.

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The integration of renewable energy resources to utility grid calls for selection of suitable storage system to store generated energy with reliable supply of demand and selection of efficient control system for smooth control of the grid. Battery is the most common energy storage system. Combining a supercapacitor to it makes the system performance better during transients. This paper proposes a hybrid energy storage system with a battery and a supercapacitor to reduce transient power fluctuations and improve the life span of the battery by reducing the charging/discharging cycles with the incorporation of supercapacitor. The battery compensates constant power fluctuations whereas the supercapacitor compensates the transient power fluctuations. This system design offers improved performance, with better regulation of dc link voltage, frequency regulation compared to microgrid with single energy storage. The dynamic performance of the system under varying load conditions has been improved. The work proposes the power management algorithm, which helps in efficient monitoring and smooth control of the entire system. Integration of supercapacitor to the storage system enhances the performance of the microgrid, increases life span of battery and reduces the stress on battery. The DC link bus voltage is efficiently regulated and the demand is supplied reliably.

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Khalid, Hassan, Saad Mekhilef, Marizan Binti Mubin, Mehdi Seyedmahmoudian, Alex Stojcevski, Muhyaddin Rawa, and Ben Horan. "Analysis and Design of Series-LC-Switch Capacitor Multistage High Gain DC-DC Boost Converter for Electric Vehicle Applications." Sustainability 14, no. 8 (April 10, 2022): 4495. http://dx.doi.org/10.3390/su14084495.

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Research into modern transportation systems is currently in progress in order to fully replace the traditional inter-combustible engine with a noiseless, fast, energy-efficient, and environmentally friendly electric vehicle. Electric vehicles depend on an electric motor and require highly efficient converter drive circuits. Among these converters, DC-DC boost converters play a major role in charging not only the battery banks but also in providing the DC-link excitation voltage in transformerless applications. However, the development of these converters, which have higher voltage and current gain with minimum components, minimum voltage, and current stress, is quite challenging. Therefore, this research work aims to address these issues and also to improve overall system performance. These aims are achieved by developing a series LC-based single-stage boost converter, and extending its gain through a multi-stage boost converter using switch capacitor phenomena. This article also presents a complete operating model in continuous conduction mode. The proposed converter is tested under various testing conditions, such as output loading, input voltage levels, and duty cycle ratio for a 50 W resistive load. The results are compared with existing models. The proposed converter is stated to have achieved the highest efficiency, i.e., 96.5%, along with extendable voltage gain with reduced voltage and current stresses, which is a major contribution to this research field.

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Diana, Michela, Riccardo Ruffo, and Paolo Guglielmi. "PWM Carrier Displacement in Multi-N-Phase Drives: An Additional Degree of Freedom to Reduce the DC-Link Stress." Energies 11, no. 2 (February 16, 2018): 443. http://dx.doi.org/10.3390/en11020443.

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Rees, W. D., M. Stahl, K. Jacobson, B. Bressler, L. M. Sly, B. Vallance, and T. Steiner. "A202 DYSREGULATED ENDOPLASMIC RETICULUM STRESS PATHWAYS IN COLON-DERIVED ENTEROIDS FROM INFLAMMATORY BOWEL DISEASE PATIENTS DRIVE DC MATURATION LEADING TO A PRO-INFLAMMATORY PHENOTYPE." Journal of the Canadian Association of Gastroenterology 3, Supplement_1 (February 2020): 75–76. http://dx.doi.org/10.1093/jcag/gwz047.201.

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Abstract Background Intestinal epithelial cells (IECs) rely on danger signals such as adenosine triphosphate (ATP) and endoplasmic reticulum (ER) stress to form an appropriate, coordinated immune response. Moreover, ER stress in IECs contributes to the pathogenesis of inflammatory bowel disease (IBD), and an increase in extracellular ATP concentrations is a risk factor for Crohn’s disease (CD). Aims We hypothesized that cells exposed to ER stress or ATP modulate innate immune responses, creating a pro-inflammatory environment that drives dendritic cell (DC) maturation. Methods Caco-2 cells and human colon-derived enteroid monolayers were exposed to ATP or the ER stress inducer thapsigargin, stimulated with E. coli FliC flagellin, and ER stress markers CHOP, GRP78, and XBP1 s/u were measured via qPCR and western blot, and cytokine release was measured by ELISA. Next, monocyte-derived dendritic cells (moDCs) were cultured in Caco-2 or enteroid conditioned supernatants and their activation status measured via flow cytometry, and cytokine analysis was performed using Luminex platform. We also assessed ER stress markers, TLR5 expression, and cytokine expression differences between IBD and healthy controls (HC). Results We found that ER stress amplified FliC-induced IL-8 and decreased CCL20 in Caco-2 cells. Moreover, in IBD subjects, we found an increase FliC-induced IL-8 response, and decreased TNFa and CCL20. moDCs cultured with conditioned media from Caco-2 or enteroid monolayers showed a proinflammatroy phenotype, with an increase in CD80, CD86, MHCII, and a decrease in CD103. Moreover, moDCs cultured in stressed Caco-2 supernatants increased release of IL-6, TNFa, and IL-12p70, and decreased IL-10, suggesting potential to induce inflammatory Th1 and/or Th17 cells.. DC activation correlated with the amount of FliC-induced IL-8. Interestingly, there were distinct differences in cytokine expression and basal ER stress between IBD and HC enteroid monolayers, suggesting a dysregulated ER stress pathway in IBD-derived enteroids. Conclusions ER stress in Caco-2 cells and colon-derived enteroid monolayers enhances FliC-induced TLR5 responses, leading to a pro-inflammatory environment that drives DC maturation, which may link epithelial ER stress and immune cell activation in IBD. Furthermore, the cytokine and ER stress pathway differences between IBD and HC-derived enteroids suggests that prolonged periods of stress in IBD patients may rewire the IEC stem cell compartment, further perpetuating inflammation and disease. Funding Agencies CCC, CIHR

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Ranjan, Alok, and Sanjay B. Bodkhe. "Fuzzy Logic Controller Based Modified Energy Management Strategy for Battery and UC with Improved Battery Performance." ECS Transactions 107, no. 1 (April 24, 2022): 2457–69. http://dx.doi.org/10.1149/10701.2457ecst.

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The ultracapacitor (UC) acts as a stress reducer for the battery. It is also considered as a fruitful companion for a battery in battery-UC hybrid energy storage system (HESS). Management of power between battery, UC, and drive motor, along with a suitable topology, decides the performance of the battery and drive system. Rule based energy management strategy (EMS) is simple, real-time implementable, ease in control, and based on engineer’s experience. But it lacks in controlling the state-of-charge (SOC) of battery and UC, battery current rate, and its magnitude, dc link voltage control, and UC voltage regulation. In this paper, low pass filter based conventional rule-based EMS is studied and implemented in MATLAB. Then fuzzy logic based modified rule-based EMS is proposed and simulated for the same load profile. Comparative study between conventional and modified EMS shows the proposed EMS is capable to provide constant dc link voltage, stable UC SOC operation, fast response, and reduces the large variation in speed. Proposed EMS saves the 10% of the battery energy for 20 sec load profiles as compared with battery only system. So, by use of UC, shared bus topology, and effective EMS, driving range of the vehicle and battery life can be improved and range anxiety can be reduced.

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Salih, Firas S., and Oday A. Ahmed. "Improved Y-Source Single-Stage Transformerless Micro-Inverter for PV Residential Applications." Engineering and Technology Journal 38, no. 9A (September 25, 2020): 1327–41. http://dx.doi.org/10.30684/etj.v38i9a.1143.

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Y-Source Impedance Network (YSN) is one of the most suitable for providing high voltage gain. It generatesa high voltage gain by using a small shoot-through duty cycle, which makes it suitable in applications require a wide range of input voltages such as the Photovoltaic (PV) power plants. However, traditional (YSNs) are unable to boost low voltages in certain applications to the DC-link voltage (about 400V) since it requires a high number of the turns ratio. Higher turns ratio implies higher leakage inductance resulting in higher DC-link voltage spikes. Also, traditional YSNs have high voltage stresses across the components. In this paper, a developed new transformerless Micro-Inverter (MI) is presented that can overcome all the aforementioned drawbacks. The proposed MI has been developed and designed to eliminate both the leakage inductance due to three-winding coupled transformer and leakage current due to using transformerless MI configuration. In addition, the proposed MI reduced the components' stress significantly and increases the converter voltage gain capability in one single-stage. The proposed high boost ratio transformerless MI is analyzed through the PLECS software simulator and implemented in a small scale MI prototype to ensure the results agree with the analysis and simulation results.

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Jayakumar, Vinoth, Bharatiraja C, Santhakumar C, and Josiah Lange Munda. "Performance Analysis of Five-Phase NPC MLI with Phase Shifting Carrier Pulse Width Modulation." ECS Transactions 107, no. 1 (April 24, 2022): 7581–88. http://dx.doi.org/10.1149/10701.7581ecst.

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The five-phase loads with Multi-Level Inverters (MLI) are preferred by industries in high and medium power applications due to lower switching loss, voltage stress across switches, etc. The controlling of a five-phase motor drive is done by Pulse Width Modulation (PWM) techniques. This paper discusses different multi carrier PWM techniques, such as Level Shifting Carrier (LSC) PWM and Phase Shifting Carrier (PSC) PWM techniques available for controlling the inverter drive. The simulation is carried out for all PWM techniques and load voltage, voltage THD, Common Mode Voltage (CMV), and DC-link voltages are noted and compared among the PWM techniques.

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Lee, Yoo, Yoon, and Jang. "Advanced Fault Ride-through Strategy by an MMC HVDC Transmission for Off-Shore Wind Farm Interconnection." Applied Sciences 9, no. 12 (June 20, 2019): 2522. http://dx.doi.org/10.3390/app9122522.

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In order to solve the problems brought upon by off-shore wind-power plants, it is important to improve fault ride-through capability when an on-shore fault occurs in order to prevent DC overvoltage. In this paper, a coordinated control strategy is implemented for a doubly-fed induction generator (DFIG)-based off-shore wind farm, which connects to on-shore land by a modular multilevel converter (MMC)-based high voltage direct current (HVDC) transmission system during an on-shore fault. The proposed control strategy adjusts the DC voltage of the off-shore converter to ride through fault condition, simultaneously varying off-shore AC frequency. The grid-side converter detects the frequency difference, and the rotor-side converter curtails the output power of the DFIG. The surplus energy will be accumulated at the rotor by accelerating the rotor speed and DC link by rising DC voltage. By the time the fault ends, energy stored in the rotor and energy stored in the DC capacitor will be released to the on-shore side to restore the normal transmission state. Based on the control strategy, the off-shore wind farm will ride through an on-shore fault with minimum rotor stress. To verify the validity of the proposed control strategy, a DFIG-based wind farm connecting to the on-shore side by an MMC HVDC system is simulated by PSCAD with an on-shore Point of Common Coupling side fault scenario.

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Janaki, N., and Dr R.Krishna Kumar. "Effective elimination of harmonics on the part of chosen dc bus in dual active type converter." International Journal of Engineering & Technology 7, no. 2.25 (May 3, 2018): 53. http://dx.doi.org/10.14419/ijet.v7i2.25.12368.

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In order to manage the flow of power in the dual bridge type converter, a modulation technique called phase shifted square wave is employed. As an outcome, increased range of ripples in current is resulted, and that further provokes the vibration in inductance and capacitance circuit. Due to this effect, there exists uncertainty in the value of current and voltage, failure of operating components and stress in the filter. To miti-gate the above ill effects, three level modulation can be done using three phase shift square wave control angles. These three angles now elimi-nate the harmonics in chosen DC link and the harmonic eliminating procedure is justified and simulated.

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S, Anandh, Vijayan S, and Paramasivam Paramasivam. "Design of Three-Phase Three-Switch Buck-Type Rectifier for Pre-Charging Application." International Journal of Power Electronics and Drive Systems (IJPEDS) 7, no. 1 (March 1, 2016): 124. http://dx.doi.org/10.11591/ijpeds.v7.i1.pp124-133.

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The main objective of a pre-charging circuit in variable frequency drives is to pre-charge the DC-bus capacitor without any voltage and current overshoot within the specified time. In exisiting variable frequency drives seperte pre-charging circuits (or) thyristor bridges were used due to this drives power density, cost becomes high and control technique becomes complex. This paper presents about the design of three-phase three-switch buck-type rectifier for pre-charging application used in variable frequency drives which elimates the disadvantages of existing techniques. In this paper we will discuss about design procedure of pre-charging circuit of an 800KW converter with dc-link output voltage of 775V at an input ac voltage of 550V, 60Hz, selection of power and passive components, voltage and current stress of power transistors. In the final this paper discusses about loss distribution of the components and comparison of new converter technique with existing pre-charging techniques.

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Sayed, Hussain, Oday A. Ahmed, Dhari Y. Mahmood, Kanaan A. Jalal, and Waleed H. Habeeb. "Symmetrical high voltage gain half-bridge inverter based double-Y-source networks with reduced voltage stress." International Journal of Power Electronics and Drive Systems (IJPEDS) 11, no. 1 (March 1, 2020): 515. http://dx.doi.org/10.11591/ijpeds.v11.i1.pp515-522.

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<span>A single-stage symmetrical high voltage gain half-bridge (HB) DC-AC converter is proposed in this paper. Using two Y-source impedance networks, the following key features are utilized from the proposed topology: single stage inverter with very high voltage gain compared to conventional HB inverter, symmetrical output voltage waveform, low voltage stress across the passive components because it is distributed across two impedance networks, and only two switching devices are needed for the converter. Furthermore, important merit of the proposed topology is that the current drawn by the Y-coupled inductors is symmetrical around the X-axis which helps to prevent the Y-network cores from reaching the saturation state. And the last compelling feature is a virtual neutral point for the load connection is inherited in the proposed double Y-source impedance networks converter with no need for DC-Link capacitors. For low voltage sources such as photovoltaic (PV) and fuel cell, the converter is designed to achieve continuous input current operation. The operation modes and principles of the inverter are analyzed and discussed deeply in this paper. A detailed mathematical equations system is derived and verified for the presented converter. Finally, PSpice simulation tools are used to simulate the converter and verify the derived mathematical formulas.</span>

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Hassan, Syed, Tariq Kamal, Muhammad Riaz, Syed Shah, Hina Ali, Muhammad Riaz, Muhammad Sarmad, Amir Zahoor, Muhammad Khan, and Julio Miqueleiz. "Intelligent Control of Wind-Assisted PHEVs Smart Charging Station." Energies 12, no. 5 (March 8, 2019): 909. http://dx.doi.org/10.3390/en12050909.

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Two technology opportunities, integration of renewable energy sources and the electrification of vehicles are being encouraged to reduce dependency on fossil fuels and pollution problems. Nevertheless, the huge increase of plug-in hybrid electric vehicles (PHEVs) on roads will cause an additional load in demand, especially at rush hours, and therefore, threatens the stability of existing power grids. Considering PHEV stay for several hours in the workplace, (i.e., university), this may provide an inimitable framework to charge PHEV from wind in the workplace. This paper introduces the possibility of introducing intelligent control of wind power and battery storage units as supplementary power sources for future PHEV charging demands during rush hours. The operation of the proposed algorithm is based on the priority levels of PHEVs charging, and fluctuations in DC link voltage levels due to the variation in wind speed. The priorities of PHEVs charging are developed according to their power requirements, maximum rating of distribution transformer and park duration of PHEVs in the workplace during wind speed. Various non-isolated proportional–integral controllers and improved intelligent fuzzy control are used to keep a minimum critical DC link voltage to permit the power conditioning system to operate a charging station uninterruptedly, even at low wind speed. The improved intelligent fuzzy controller also contributes to minimizing the stress on the DC bus and ensures quality output power. The performance of the proposed charging station is verified for the real PHEV under real-world record of wind speed. All the energy sources, electric charging station and their controllers are designed in MATLAB/Simulink. Finally, the feasibility of proposed charging station is checked experimentally in the laboratory.

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50

Elsayad, Nour, Hadi Moradisizkoohi, and Osama Mohammed. "A New Three-Level Flying-Capacitor Boost Converter with an Integrated LC2D Output Network for Fuel-Cell Vehicles: Analysis and Design." Inventions 3, no. 3 (August 28, 2018): 61. http://dx.doi.org/10.3390/inventions3030061.

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In this paper, a new three-level boost converter with continuous input current, common ground, reduced voltage stress on the power switches, and wide voltage gain range is proposed. The proposed converter is composed of a three-level flying-capacitor switching cell and an integrated LC2D output network. The LC2D output network enhances the voltage gain of the converter and reduces the voltage stress on the power switches. The proposed converter is a good candidate to interface fuel cells to the dc-link bus of the three-phase inverter of an electric vehicle (EV). A full steady-state analysis of the proposed converter in the continuous conduction mode (CCM) is given in this paper. A 1.2 kW scaled-down laboratory setup was built using gallium nitride (GaN) transistors and silicon carbide (SiC) diodes to verify the feasibility of the proposed converter.

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Journal articles on the topic 'DC link stress'

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