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1
Keller, Lisa A. "Current-mode control of a magnetic amplifier post regulator." Thesis, This resource online, 1991. http://scholar.lib.vt.edu/theses/available/etd-02132009-171329/.
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Arpino, Alberto. "Analisi di circuiti di tipo current conveyor e loro possibili applicazioni." Bachelor's thesis, Alma Mater Studiorum - Università di Bologna, 2012. http://amslaurea.unibo.it/4780/.
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Luan, Jiyuan. "Design and Development of High-Frequency Switching Amplifiers Used for Smart Material Actuators With Current Mode Control." Thesis, Virginia Tech, 1998. http://hdl.handle.net/10919/36914.
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This thesis presents the design and development of
two switching amplifiers used to drive the so-called
smart material actuators. Different from conventional
circuits, a smart material actuator is ordinarily a
highly capacitive load. Its capacitance is non-linear
and its strain is hysteretic with respect to its
electrical control signal. This actuator's reactive
load property usually causes a large portion of reactive
power circulating between the power amplifier and the
driven actuator, thus reduces the circuit efficiency
in a linear power amplifier scenario. In this thesis,
a switching amplifier design based on the PWM technique
is proposed to develop a highly efficient power
amplifier, and peak current mode control is proposed
to reduce the actuator's hysteretic behavior. Since
the low frequency current loop gain tends to be low
due to the circuit's capacitive load, average current
mode control is further proposed to boost the low
frequency current loop gain and improve the amplifier's
low frequency performance. Both of the circuits have
been verified by prototype design and their experimental
measurement results are given.Master of Science
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Figueiredo, Michael. "Reference-free high-speed cmos pipeline analog-to-digital converters." Doctoral thesis, Faculdade de Ciências e Tecnologia, 2012. http://hdl.handle.net/10362/8776.
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Submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy in Electrical and Computer Engineering of the Faculdade de Ciências e Tecnologia of Universidade Nova de LisboaMore and more signal processing is being transferred to the digital domain to profit from the technological enhancement of digital circuits. Where technology scaling enhances the capabilities of digital circuits, it degrades the performance of analog circuits. However, it is important to note that the impact that technology scaling has on digital circuits is becoming smaller and smaller, which means that, in nanotechnologies, to enhance energy and area efficiency, we can not simply depend on the benefits of this scaling. Although, a share of the efficiency can be obtained from the technology, new circuit architectures and techniques have to be developed to really push the limits of efficiency. In data converters, more specifically analog-to-digital converters (ADCs), a decision can be made: research energy and area efficient analog circuit techniques and architectures that cope with technological scaling issues, or design algorithms that use digital circuitry to assist the poor analog technological performance. The former option is the premise for the work developed in this thesis. The work reported in this thesis explores various design techniques with the purpose of enhancing the power and area efficiency of building blocks mainly to be used in multiplying digital-to-analog converter based ADCs. Therefore, novel analog techniques are developed for the three main blocks of an MDAC-based stage, namely, the flash quantizer, the amplifier, and the switched capacitor network of the MDAC. These techniques include self-biasing and inverter-based design for the flash quantizer and amplifier. Regarding the MDAC, it combines three techniques: unity feedback factor, insensitivity to capacitor mismatch, and current-mode reference shifting. In the second part of this work, the designed amplifier is implemented and experimentally characterized demonstrating its practical feasibility and performance. The final part of this work explores the design and implementation of a medium-low resolution high speed pipeline ADC incorporating all the developed circuits. Experimental results validate the feasibility of the techniques and demonstrate the attractiveness in terms of power dissipation and reduced area.
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Pisár, Peter. "Metody návrhu aktivních kmitočtových filtrů na základě pasivního RLC prototypu." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2009. http://www.nusl.cz/ntk/nusl-218107.
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The aim of this diploma thesis is to design active frequency filters based on passive RLC prototype. Three methods of the design of active filters and active functional blocks of electronic circuits working in current or mixed mode are used to this purpose. These blocks allow to process electrical signals with frequencies up to low tens of megahertz. In addition they feature for instance with high slew rate and low supply voltage power. Active high-pass and low-pass 2nd order filters are designed using simulation of inductor by active subcircuit method. Grounded and subsequently floating synthetic inductor is made with the current conveyors in the first case and with the current operational amplifiers with single input and differential output in the second case. This method advantage is relatively simple design and disadvantage is great quantity of active functional blocks. Active filters based on passive frequency ladder 3rd order filter while only one floating inductor is connected, are designed with circuit equation method. In the first design differential input / output current followers are used and in the second case current-differencing buffered amplifiers are used. This method benefits by smaller active blocks number and disadvantage is more complex design of the active filter. Active filter based on passive prototype of low-pass 3rd order filter with two floating inductors is designed with Bruton transformation method. Final active filter uses current operational amplifiers with single input and differential output which together with other passive elements replace frequency depending negative resistor, which arise after previous Bruton transform. This method usage is advantageous if the design consists of larger quantity of inductors and less number of capacitors. High-pass 2nd order filter is simulated by tolerance and parametrical analyses. Physical realisation utilising current feedback operational amplifier which substitute commercially hardly accessible current conveyors is subsequently made. Measurements of constructed active filter show that additional modifications, which allow better amplitude frequency characteristics conformity, are necessary.
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Chrást, Jakub. "Návrh a realizace symetrických převodníků U/I a I/U." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2010. http://www.nusl.cz/ntk/nusl-218548.
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Master´s thesis deals about design of symmetrical converters voltage on current and current on voltage. These converters will be used for measuring frequency characteristics of differential frequency filters. Current feedback amplifier was used as active element. Some circuits useful for this function were chosen. Various integrated circuits were put into these circuits. All variations were simulated in computer program Orcad. In terms of computer simulations the best variation was chosen. Selected variants were practically verified and control measuring were realized.
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Uher, Jiří. "Návrh filtračních struktur fraktálního řádu." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2016. http://www.nusl.cz/ntk/nusl-242051.
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This thesis deals with the fractional (1+)-order filters. The proposed filters operate in the current-mode. The derivation of the filters has been achieved using a third-order aproximation of the coresponding fractional-order transfer functions. It also describes active elements such as universal current conveyor, current follower and operational transconductance amplifier. In the end of this thesis some new circuit solutions of the fractional-order filter are proposed. Then the proposed filters are realized and experimentally measured.
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Pánek, David. "Syntéza diferenčních filtračních struktur se složenými aktivními prvky." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2019. http://www.nusl.cz/ntk/nusl-399604.
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This document is focused on already existing single-ended frequency filters with modern active components working in current mode and their modification into fully-differential ended form. After the modification both versions were compared between each other. The first part informs about problems concerning analogue frequency filters. The second part deals with used active components - MO-CF (Multiple Output Current Follower), BOTA (Balanced transconductance amplifier), UCC (universal current conveyor), VDTA (Voltage differencing transconductance amplifier), CDTA (Current differencing transconductance amplifier) and VDCC (voltage differencing current conveyor). Four circuits have been chosen and transformed into their differential form. Two circuits have been chosen and realised into PCB and then practicaly measured in a laboratory. The last part is a summary of simulations and measured results and check of circuits behavior result.
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Michalička, Filip. "Syntéza elektronicky rekonfigurovatelných kmitočtových filtrů." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2020. http://www.nusl.cz/ntk/nusl-413078.
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This diploma thesis deals with design of reconection-less electronically reconfigurable filter structures which have single input and single output using unconventional active elements, which have ability to adjust one of their parameter e.g. gain or transconductance. The first part describes basic parameters of frequency filters, the division of filters by frequency transfer response and used circuit elements, their operational modes, the principle of reconnection-less electronically reconfiguration and the circuit design method MUNV. Second part describes all active elements used in the proposal of filters, their properties and the implementation using existing transistor-level models. The third part contains the design of three reconnection-less electronically reconfigurable filters and the simulations results obtained from simulation programs OrCAD Capture and PSpice. The obtained results were compared with theoretical behaviour. This part also contains results of these analyses: sensitivity, parasitic, Monte Carlo and temperature to determine the behaviour in varied cases.
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Gajdoš, Adam. "Elektronicky rekonfigurovatelné kmitočtové filtry." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2016. http://www.nusl.cz/ntk/nusl-241983.
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The aim of the thesis was design of reconnection-less and electronically reconfigurable filters of SISO type with non-traditional active elements. Adjustability of bandwidth or quality factor is also required. First part of the thesis deals with theoretical analysis of filters, their operation modes and design of frequency filters using Signal-flow graph method aswell. Last but not least, electronical reconfiguration of transfer function and parasitic analysis was discussed. Another part describes active elements used in the practical part of thesis. Behaviors and design of active elements using existing circuits (e.g. UCC,EL2082) are described and their transformation into the Signal-flow graph form too. In the practical part five reconnection-less and reconfigurable filters of SISO type was designed using SNAP program. Simulations were done using Orcad program with ideal and real simulation models of active elements. Last part deals with filter design in EAGLE and experimental measurement.
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Zápeca, Jan. "Spínaný zdroj s digitální řídící smyčkou." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2012. http://www.nusl.cz/ntk/nusl-219759.
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The diploma thesis is describing how forward converter works. The diploma thesis presents the function of forward converter with demagnetizing winding and presents the function of two-switched forward converter. The diploma thesis descibes the behaviour of continuous current mode and discontinuous current mode. The diploma thesis explains the reasons for implementation feedback and presents the basic types of compensations. The project deals with AC analysis of two-switched forward converter with continuous peak current mode control. The Analog prototyping metod is used for digital control design. The function of the converter was tested in laboratory. The laboratory results have been compared with the theoretical and the simulation results.
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Jeřábek, Jan. "Kmitočtové filtry s proudovými aktivními prvky." Doctoral thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2011. http://www.nusl.cz/ntk/nusl-233528.
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This doctoral thesis is focused mainly on research of new current active elements and their applications in frequency filters suitable for current-mode. Work is focused on design of new filtering structures suitable for traditional single-ended signal processing and also on structures suitable for fully-differential applications. The thesis contains three designed general conceptions of KHN-type second-order filters. Adjustability of quality factor and pole frequency is provided by controllable current amplifiers that are placed properly in designed structures. Structures also contain second-generation current conveyors, multiple-output current followers, transconductance amplifiers and their fully-differential equivalents. There are lot of possible solutions that could be obtained from general structures, some of them are presented in the work. The thesis also presents several multifunctional and also single-purpose filtering structures of second-order and two variants of n-th order synthetic elements which are suitable to realize higher order filters both in single ended and fully differential type. In each case, functionality of new solutions is verified by simulations and in several cases also by real measurement.
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Langhammer, Lukáš. "Plně diferenční kmitočtové filtry s moderními aktivními prvky." Doctoral thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2016. http://www.nusl.cz/ntk/nusl-256565.
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Tato disertační práce se zaměřuje na výzkum v oblasti frekvenčních filtrů. Hlavním cílem je navrhnout a analyzovat plně diferenční kmitočtové filtry pracující v proudovém módu a využívající moderní aktivní prvky. Prezentované filtry jsou navrženy za použití proudových sledovačů, operačních transkonduktančních zesilovačů, plně diferenčních proudových zesilovačů a transrezistančních zesilovačů. Návrh se zaměřuje na možnost řídit některý z typických parametrů filtru pomocí řiditelných aktivních prvků, které jsou vhodně umístněny do obvodové struktury. Jednotlivé prezentované filtry jsou navrženy v nediferenční a diferenční verzi. Velký důraz je věnován srovnání plně diferenčních struktur s jejich odpovídajícími nediferenčními formami. Funkčnost jednotlivých návrhů je ověřena simulacemi a v některých případech i experimentálním měřením.
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Vieira, Filipe Costa Beber. "Amplificador de Instrumentação em Modo Corrente com entrada e saída Rail-to-Rail." Universidade Federal de Santa Maria, 2009. http://repositorio.ufsm.br/handle/1/5347.
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This dissertation is aimed at the development of a current mode instrumentation amplifier (CMIA) with a high common mode input range. This characteristic is obtained due
to the rail-to-rail operational amplifiers (opamps). These opamps are built with rail-to-rail differential amplifiers as input stages, and with cascode-based output stages, which are able to copy its current by adding identical branches and connecting their gates without the voltage
degradation as the known CMIA topologies. The main contribution of this work is the development of a rail-to-rail current mode instrumentation amplifier, analyzing the pros and cons of this topology. The functionality of the proposed topology is shown through measured results of a manufactured integrated circuit. This first prototype, although it was operated in a large input common mode range, presented insufficient values of CMRR (Common Mode
Rejection Ratio) and VOS (Offset voltage). These two characteristics were studied and modeled, the instrumentation amplifier was re-designed, and simulated results demonstrate important improvements.Esta dissertação tem como objetivo o desenvolvimento de um amplificador de instrumentação em modo corrente com uma ampla faixa de entrada em modo comum. Esta característica é obtida graças ao emprego de estágios de amplificação rail-to-rail na entrada e a geração do sinal de saída através do espelhamento da corrente diretamente dos gates dos transistores do estágio ao invés da alternativa clássica, onde espelhos são ligados em série e degradam a excursão do sinal de saída. Com esta proposta, é possível a implementação de ampops com entrada e saída rail-to-rail. A principal contribuição deste trabalho é analisar as vantagens e desvantagens da utilização destas soluções na implementação de um amplificador de instrumentação com entrada rail-to-rail. A funcionalidade da topologia proposta é demonstrada através dos resultados medidos de um circuito integrado fabricado. Este primeiro protótipo, apesar do bom funcionamento em toda a faixa de entrada em modo comum, apresentou valores insatisfatórios de CMRR (Common Mode Rejection Ratio) e de VOS (Tensão de offset), o que levou a um aprofundamento no estudo e modelagem destas características. A partir disto, o circuito foi re-projetado e os resultados de simulação demonstram melhorias bastante significativas em suas características.
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Žůrek, Radomil. "Využití grafů signálových toků k návrhu diferenčních filtrů." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2010. http://www.nusl.cz/ntk/nusl-218355.
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The dissertation deals with the design of fully differential frequency filters using the signal flow graphs. It presents the procedures for designing frequency filters, focusing on the active elements such as multiple-output current followers (MO-CF) and digitally adjustable current amplifiers (DACA), which work in a current mode. It is theoretically discussed the issue of designing the M-C graphs, which are the graphic analogy of voltage and current incidence matrices. There are also presented three designs of 2nd order frequency filter circuits using the indirect method of design by M-C graphs and one circuit design using the direct method. The results of each simulation and measurement are presented in a module frequency characteristics. Finally, there is a summary of M-C graphs characteristics and applicability.
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Toumazou, C. "Universal current-mode analogue amplifiers." Thesis, Oxford Brookes University, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.372854.
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Horák, Ondřej. "Fázovací obvody s moderními funkčními bloky." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2009. http://www.nusl.cz/ntk/nusl-218030.
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The present thesis is focused on all pass filters. The principle of all pass filters, their properties, the design of nth degree of these circuits will be analysed in succession and then some of functional blocks, by which these structures can be made, will be described. After that, the allpass filters will be designed and simulated in program OrCAD PSpice. First of all, the analysis will be performed with ideal components, then with real components. After that, the sensitivity and tolerance analysis will be made and the influence of parasite effects on circuit parameters will be examined. Once the experiments are finished, the design of Printed Circuit Board's (PCB) will be realized. Circuit showing the best parameters will be chosen for the design.
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Prát, Marek. "Návrh elektronicky rekonfigurovatelných filtračních struktur s moderními aktivními prvky." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2018. http://www.nusl.cz/ntk/nusl-377113.
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The aim of master's thesis was design of electronically reconfigurable filters. Adjustability of pole frequency or quality factor is possible. First part of thesis deals with theoretical analysis of filters, their operation modes, design of frequency filters using Signal-Flow graph method and parasitic analysis. The next part describes active elements used in thesis. In a third part, three reconfigurable filters are described and designed and their simulations and parasitic analysis are made. Last part deals with filter design in EAGLE and experimental measurement.
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Alves, Luís Filipe Mesquita Nero Moreira. "High gain and bandwidth current-mode amplifiers : study and implementation." Doctoral thesis, Universidade de Aveiro, 2008. http://hdl.handle.net/10773/2216.
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Doutoramento em Engenharia ElectrotécnicaEsta tese aborda o problema do projecto de amplificadores com grandes produtos de ganho por largura de banda. A aplicação final considerada consistiu no projecto de amplificadores adequados à recepção de sinais ópticos em sistemas de transmissão ópticos usando o espaço livre. Neste tipo de sistemas as maiores limitações de ganho e largura de banda surgem nos circuitos de entrada. O uso de detectores ópticos com grande área fotosensível é uma necessidade comum neste tipo de sistemas. Estes detectores apresentam grandes capacidades intrínsecas, o que em conjunto com a impedância de entrada apresentada pelo amplificador estabelece sérias restrições no produto do ganho pela largura de banda. As técnicas mais tradicionais para combater este problema recorrem ao uso de amplificadores com retroacção baseados em configurações de transimpedância. Estes amplificadores apresentam baixas impedâncias de entrada devido à acção da retroacção. Contudo, os amplificadores de transimpedância também apresentam uma relação directa entre o ganho e a impedância de entrada. Logo, diminuir a impedância de entrada implica diminuir o ganho. Esta tese propõe duas técnicas novas para combater os problemas referidos. A primeira técnica tem por base uma propriedade fundamental dos amplificadores com retroacção. Em geral, todos os circuitos electrónicos têm tempos de atraso associados, os amplificadores com retroacção não são uma excepção a esta regra. Os tempos de atraso são em geral reconhecidos como elementos instabilizadores neste tipos da amplificadores. Contudo, se usados judiciosamente, este tempos de atraso podem ser explorados como uma forma da aumentar a largura de banda em amplificadores com retroacção. Com base nestas ideias, esta tese apresenta o conceito geral de reatroacção com atraso, como um método de optimização de largura de banda em amplificadores com retroacção. O segundo método baseia-se na destruição da dualidade entre ganho e impedância de entrada existente nos amplificadores de transimpedância. O conceito de adaptação activa em modo de corrente é neste sentido uma forma adequada para separar o detector óptico da entrada do amplificador. De acordo com este conceito, emprega-se um elemento de adaptação em modo de corrente para isolar o detector óptico da entrada do amplificador. Desta forma as tradicionais limitações de ganho e largura de banda podem ser tratadas em separado. Esta tese defende o uso destas técnicas no desenho de amplificadores de transimpedância para sistemas de recepção de sinais ópticos em espaço livre.
This thesis addresses the problem of achieving high gain-bandwidth products in amplifiers. The adopted framework consisted on the design of a free-space optical (FSO) front end amplifier able to amplify very small optical signals over large frequency bandwidths. The major gain-bandwidth limitations in FSO front end amplifiers arise due to the input circuitry. Usually, it is necessary to have large area optical detectors in order to maximize signal reception. These detectors have large intrinsic capacitances, which together with the amplifier input impedance poses a severe restriction on the gain-bandwidth product. Traditional techniques to combat this gain-bandwidth limitation resort to feedback amplifiers consisting on transimpedance configurations. These amplifiers have small input impedances due to the feedback action. Nevertheless, transimpedance amplifiers have a direct relation between gain and input impedance. Thus reducing the input impedance usually implies reducing the gain. This thesis advances two new methods suitable to combat the above mentioned problems. The first method is based on a fundamental property of feedback amplifiers. In general, all electronic circuits have associated time delays, and feedback amplifiers are not an exception to this rule. Time delays in feedback amplifiers have been recognized as destabilizing elements. Nevertheless, when used with appropriate care, these delays can be exploited as bandwidth enhancement elements. Based on these ideas, this thesis presents the general concept of delayed feedback, as a bandwidth optimization method suitable for feedback amplifiers. The second method is based on the idea of destroying the impedance-gain duality in transimpedance amplifiers. The concept of active current matching is in this sense a suitable method to detach the optical detector from the transimpedance amplifier input. According to this concept, a current matching device (CMD) is used to convey the signal current sensed by the optical detector, to the amplifier’s input. Using this concept the traditional gainbandwidth limitations can be treated in a separate fashion. This thesis advocates the usage of these techniques for the design of transimpedance amplifiers suited for FSO receiving systems.
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Wong, Wai Yu. "Supply-independent current-mode slew rate enhancement design /." View abstract or full-text, 2006. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202006%20WONG.
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Štibraný, Miroslav. "Řízený laboratorní zdroj." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2016. http://www.nusl.cz/ntk/nusl-240809.
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Master’s thesis deals with design of laboratory supply with precise voltage and current measuring. At the beginning it presents properties, advantages and disadvantages of linear and switching supplies, based on these facts it chooses a linear type of regulator. The design continues with detailed description of power and control analog and digital circuits. The thesis includes description of taking control over the supply from the front panel or through computer. The last part is devoted to measurement results and to presentation of some static and dynamic parameters of the designed supply.
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Šotner, Roman. "Studium elektronického řízení a reálného chování variabilních filtračních a oscilačních aplikací moderních aktivních prvků." Doctoral thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2012. http://www.nusl.cz/ntk/nusl-233574.
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The thesis deals with electronically adjustable and configurable applications of the modern active elements. In the field there were presented various active elements in applications of the analog filters and oscillators which stem from basic and more or less similar principles of circuit synthesis and design. However, there is not provided study of real behavior in detail and in most cases electronic control of the various parameters in application is not verified. In the precise design of application is very important to identify problematic features and determine how much it influences functionality of the device. In this work several filtering structures based on common and modified synthesis principles (integrator loops) are compared in the view of multifunctionality, configurability, variability, kind of used electronic control and impact of influences of real elements on behavior. There are used standard methods like adjusting of variable transconductance, intrinsic value of current input resistance and not so common method based on variable current gain in design of modified and improved multifunctional filtering circuits. The last method of mentioned control enabled to find quite unique filter which allows continuous electronic change of transfer from band-reject to all-pass filter of the 2nd order without reconnection. It is much simpler than previous and more common integrator loops. Larger part of this work is focused on electronically controllable oscillators mainly on quadrature types. There is presented several very simply and elementary realizations which require minimal number of active and passive elements. There are also slightly or more complicated solutions which remove some drawbacks of mentioned simpler variants. First of all there is given attention on study of real behavior which make obvious different problems with mutual dependence of oscillation condition and oscillation frequency, dependence of produced amplitudes (quadrature types) on parameter which is controlling oscillation frequency, influence of this parameter on oscillation condition, etc. In the framework of this part of the thesis there was introduced a novel modification of current conveyor transconductance amplifier (CCTA) so called current-gain-controlled current conveyor transconductance amplifier (CGCCCTA). Requirements for novel applications in the field of oscillators for newly developed controllable current amplifier and digitally controllable current amplifier (DACA) at the Department of Telecommunication FEEC BUT lead to creation of several chapters of this work where mentioned active elements can be used. The important contribution of this work (for practical approach) is also experimental testing of most of designed circuits and determination of exact design equations and rules which take into account real behavior of circuits and confirm results obtained from experiments.
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Sobotka, Josef. "Aplikační možnosti programovatelného zesilovače LNVGA." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2015. http://www.nusl.cz/ntk/nusl-220430.
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This thesis deals with the theoretical description of the qualitative characteristics and parameters of some modern active elements, also discusses the theory of signal flow graphs at the level applicable for the following frequency filter design methods. The thesis is also generally discussed the issue with the circuit simulator PSpice modeling theory and voltage amplifiers on the basic 6-levels. The practical part of the work is divided into two parts. The first practical part is dedicated to design four levels of simulation model of components LNVGA element. The second practical part contains detailed theoretical proposals for three circuit structures implementing the frequency filters 2nd order (based on the basic structure of the OTA-C) using signal flow graphs with configuration options of Q and fm based on the parameters of active elements in the peripheral structure and their verification with prepared LNVGA model layers.
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Šotner, Roman. "Vícefunkční přeladitelný aktivní filtr." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2008. http://www.nusl.cz/ntk/nusl-217657.
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The diploma thesis deals about design of the ARC multifunctional filters using modern functional blocks. These active blocks are for example voltage feedback operational amplifiers (OAs), operational transconductance amplifiers (OTAs), current conveyors (CCIIs) or current mode analog multipliers, current feedback amplifiers (CFAs), integrated circuits with switched capacitors building blocks (SCs) and digital potentiometers. The filters are studied with ideal circuit models and models of third level (3) based on voltage controlled voltage sources, voltage controlled current sources etc. (analog behavioral modelling). The professional macromodels are used for example LT 1364 (Linear Technology), EL 2045 (Intersil), LT 1228 (Linear Technology), LM 13700 (National Semiconductor), EL 2082 (Intersil), AD 844 (Analog Devices) and others. The circuits of the designed filters are simulated in PSpice (OrCAD), parasite effects and effects of the real parts are studied. Tuning and electronic adjusting parameters these filters are discussed and controlled by simulation in PSpice. Properties some simulated circuits are compare with experimental results. In conclusion individual filters are discussed and compared their properties. The constructional details of the some filters are presented at the end of this work.
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Vyčítal, Jaroslav. "Realizace jednoduchých aktivních prvků s komerčně dostupnými BJT/MOS poli." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2016. http://www.nusl.cz/ntk/nusl-241043.
Full textAbstract:
The subject of the work is an introduction to the functions of the current mirrors and differential pairs. Consequently, understanding and simulated simple circuits composed of these circuits. The simulation results are in Chapter 5, which are also included diagrams of simulated circuits..
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Novotný, Jakub. "Behaviorální modely aktivních prvků s nezávislým víceparametrovým elektronickým řízením." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2016. http://www.nusl.cz/ntk/nusl-241053.
Full textAbstract:
This thesis is focused on behavioral modelling of active elements with independent multi-parameter electronic control using comercially available components. In a first part of the thesis, CVDIBA, CVDOBA, CVCC and OC elements are discussed. The functionality is verified by simulations using OrCAD PSpice. Used components are diamond transistor OPA860, variable gain amplifier LMH6505, differencing amplifier AD830, low distortion differential driver AD8138, current conveyor EL2082 and current mode four quadrant multiplier EL4083. Four active elements are further built on PCB and measured. Some applications like low pass filter, high pass filter, all pass filter and reconfigurable filter.
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KUMAR, PRADEEP. "CURRENT MODE ADC USING CURRENT DIFFERENCING TRANSCONDUCTANCE AMPLIFIER." Thesis, 2013. http://dspace.dtu.ac.in:8080/jspui/handle/repository/15694.
Full textAbstract:
This dissertation presents the implementation of a two bit flash analog‐to‐digital converter
based on current‐mode technique. The analog‐to‐digital converter presented here employs
three current differencing transconductance amplifier (CDTA) based comparator ,a current
mirror and a priority encoder. The advantages of current ‐mode technique are higher speed,
lower power dissipation, and simple division of reference current based on current mirror. The
new method allows effective and simple high‐speed A/D conversion where the input is a
current signal and the output is a digital voltage signal. By using this technique we have reduced
the power dissipation and response time. This current mode method is highly accurate. The
circuit has been simulated using the PSPICE simulator for .18 m CMOS technology with 1.8V
supply to get satisfactory output.
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Botelho, Cindy. "A universal CMOS current-mode operational amplifier." Thesis, 1990. http://hdl.handle.net/1957/38150.
Full textAbstract:
It has become customary in electrical engineering to think of
signal processing in terms of voltage variables to the exclusion of
current variables. This tendency has resulted in voltage signal
processing circuits such as voltage-controlled voltage sources
(VCVS) and voltage-mode operational amplifiers. However, the VCVS
operational amplifier has several limitations which prevent high
performance operation. One of these limitations is that the product
of the closed loop -3dB bandwidth and the closed loop voltage gain is
approximately a constant. Thus, for a typical internally compensated
operational amplifier the closed loop -3dB bandwidth decreases as
the closed loop voltage gain increases. By taking advantage of a
current-controlled current source (CCCS) to form a current-mode
operational amplifier, this limitation can be overcome.Graduation date: 1991
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Tang, Bing-shiun, and 湯秉勳. "A Low Noise High CMRR Current-Mode Amplifier." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/81511236881776905994.
Full textAbstract:
碩士長庚大學
電子工程學研究所
96
Biomedical signals, such as EEG/ECG signals, are characterized by their low voltage-levels and very low frequencies. Thus, a current-mode instrumentation amplifier (IA) must exhibit very low input-referred noise. Biomedical signals are acquired and transferred to the voltage signals with amplitude of several milli-volts. The IA must have high input impedance, low output impedance, limited bandwidth, adjustable gain and low power consumption. Additionally, it must have adequate gain, high power-supply rejection ratio (PSRR) and high common-mode rejection ratio (CMRR) to suppress noise. To reduce the noise of the amplifier, two design methods have been implemented to improve the prior art in this thesis. 1. PMOS input is used because its flicker noise is less than that of NMOS. 2. Lateral PNP BJT input is used because it has better noise characteristics than that of MOS transistors. In this thesis, a 1.8-V current-mode amplifier has been proposed for both low power and adjustable gain for various biomedical signal processing with an external resistor. Based on post-layout simulation results, the proposed current-mode amplifier achieves an overall gain of 84.2 dB (PMOS type) 、92.5dB (BJTtype), input-referred noise of 107.7443n V/√Hz (PMOS type) 、54.9401n V/√Hz (BJT type), CMRR of 25.3 dB (PMOS type)、121.8dB (BJT type), power consumption of 61.5043 uW (PMOS type)、65.6571uW (BJT type) at a 1.8-V supply using a standard 0.18-um CMOS technology.
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丁子仁. "A Current-Mode Sense Amplifier for Low Power SRAM." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/52441984208968724197.
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Tien, Ji Hong, and 田吉宏. "High-CMRR Current-mode Instrumentation Amplifier for Biomedical Applications." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/78892794033643343909.
Full textAbstract:
碩士長庚大學
電子工程學研究所
97
With the advancement of science and technology to change with each passing day in last few years, medical treatment instruments are not out of the ordinary to develop. Due to the technology of VLSI the idea of SOC has a tendency to become matured. Due to SOC technology, the expensive and large medical instruments will be greatly reduced in both cost and volume. Moreover, the portability and easy-to-use become possible. However, the design and research for biomedical signal detecting system has already become more and more important since 1950, especially biomedical amplifiers even more significant for the system. Since biomedical signals are very weak in magnitude to detect, we need a biomedical amplifier that is different from general amplifiers. In this thesis, we propose a current-mode instrumentation amplifier composed of current conveyors. The features of our current-mode instrumentation amplifier include low power dissipation, low noise, and high CMRR performance suitable for biomedical applications. The low noise combined with high CMRR could effectively isolate from noise effects, amplify the physical signals, as well as reflect the real physical status. Post-layout results of our study achieved CMRR of 171dB and low power of 44.975uW.
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Huang, Wei-Hsiang, and 黃偉祥. "Voltage/Current-Mode Multifunction Filters Using One Current Feedback Amplifier and Grounded Capacitors." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/41552750684685856083.
Full textAbstract:
碩士中原大學
電子工程研究所
100
Abstract One configuration for realizing voltage-mode multifunction filters and another configuration for realizing current-mode multifunction filters using current feedback amplifiers (CFAs) are presented . The proposed voltage-mode circuit exhibit simultaneously lowpass and bandpass fiters. The proposed current-mode circuit exhibit simultaneously lowpass, bandpass and highpass filters. The proposed circuit offer the following features: No requirements for component matching conditions; low active and passive sensitivities; employing only grounded capacitors and the ability to obtain multifunction filters from the same circuit configuration.
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Chen, Hsiuen-Chuen, and 陳炫全. "Current-Mode Operational Amplifier for Low-Voltage High-Speed Operation." Thesis, 1999. http://ndltd.ncl.edu.tw/handle/17691514897993154785.
Full textAbstract:
碩士國立清華大學
電機工程學系
87
A current-mode operational amplifier (COA) for low-voltage high-speed operation is proposed in this dissertation. This COA adopts the current-steering approach, which avoids using a current mirror as the transimpedance stage and improves the frequency response. On the other hand, a high-swing multiple-cascode structure is invoked to pull up the open-loop gain of the COA and to reduce the operating voltage. At last a modified input structure is proposed, which shortens the signal path from the input to the transconductance stage to achieve a higher unit gain bandwidth (UGBW). The proposed COA was simulated using HSPICE, level 28 parameters of TSMC 0.6- single-poly-triple-metal (1P3M) CMOS process. The simulated results showed that it has a higher open-loop gain (~93dB) and a high UGBW (~225MHz). But a larger input resistance of 17.6 results due to the introduction of the modified input structure. Besides, this COA operates under 1.5V power supply voltages with a power dissipation of about 3.9mW.
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"A high performance current mode amplifier with boosted saturation voltage." 2009. http://library.cuhk.edu.hk/record=b5894041.
Full textAbstract:
Tsang, Ka Hung.Thesis (M.Phil.)--Chinese University of Hong Kong, 2009.
Includes bibliographical references.
Abstract also in Chinese.
Abstract
Acknowledgement
Content
Chapter 1. --- Introduction
Chapter 1.1 --- Motivation for Current-Mode Circuit --- p.1-1
Chapter 1.2 --- Basic Current-Mode Building Block --- p.1-3
Chapter 1.3 --- Adjoint Principle --- p.1-5
Chapter 1.4 --- Characteristics of Current Amplifier --- p.1-8
Chapter 1.5 --- Application of Current-Mode Circuit --- p.1-10
Chapter 2. --- Conventional Design
Chapter 2.1 --- System Overview --- p.2-1
Chapter 2.2 --- First Architecture and Circuit (Fully Current Mode) --- p.2-6
Chapter 2.3 --- Second Architecture and Circuit (Voltage Mode) --- p.2-10
Chapter 2.4 --- Performance Indicator --- p.2-15
Chapter 3. --- Proposed Design
Chapter 3.1 --- Design Motivation --- p.3-1
Chapter 3.2 --- Saturation Voltage Gain Stage (SVGS) --- p.3-7
Chapter 3.3 --- Design 1: Current Amplifier with Boosted Saturation Voltage (Fully Current Mode) --- p.3-13
Chapter 3.4 --- Design 2: Current Amplifier with Boosted Saturation Voltage (Voltage Mode) --- p.3-22
Chapter 4. --- IC Measurement
Chapter 5. --- Conclusion
Chapter 5.1 --- Design 1: Current Amplifier with Boosted Saturation Voltage (Fully Current Mode) over Conventional Design --- p.5-1
Chapter 5.2 --- Design 2: Current Amplifier with Boosted Saturation Voltage (Voltage Mode) over Conventional Design --- p.5-2
Chapter 6. --- Future Idea
Chapter 7. --- Reference
Chapter 8. --- Appendix
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Chen, Shin Hung, and 陳信宏. "Design of current-mode filters using the operational amplifier pole." Thesis, 1994. http://ndltd.ncl.edu.tw/handle/17518668658599610090.
Full textAbstract:
碩士中原大學
電機工程研究所
82
A publication by Roberts and Sedra proposed that the circuits based on current amplifiers will operate at higher signal bandwidths, with greater linearity and have larger dynamic range than their voltage-based circuit counterparts. Hence, some current-mode filters using the operational amplifier (op.-amp.) pole were proposed. In this thesis, we propose novel current-mode highpass, notch and allpass filters employing the op.-amp. pole with the advantage suitable for high frequency operation and monolithic IC implementation. Simulation/experimental results agree very well with theory.
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Liang, Funian, and 梁甫年. "A New 1.8V Current Mode Sense Amplifier for Flash Memories." Thesis, 2001. http://ndltd.ncl.edu.tw/handle/11022565876664374739.
Full textAbstract:
碩士國立中興大學
電機工程學系
89
ABSTRACT In many applications, such as portable MP3 players, cellular phones, digital cameras, and other hand-held equipments, flash memories have been widely used as a media for mass storage of audio and video information. Similar to other memories, there is a growing demand for high-density, low-cost and low-power memory cells. Recently, the multilevel cell technique introduced by Intel Corp. realizing high capacity and low-cost flash memories, draw many people’s attention. In this work, we present a novel current mode sense amplifier for multilevel flash memories. The sensing scheme based on the parallel approach achieves high-speed and low power dissipation. A test chip of the circuit has been integrated in TSMC 1P3M 0.6mm process. The measurement results are tally with the simulation. In order to reduce operation voltage without decreasing the performance, we propose a new 1.8V current mode sensing mechanism instead of conventional voltage mode read circuit. This circuit greatly reduces the delay’s dependence on the supply voltage.
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Liu, Chia-Chi, and 劉家驥. "A Current Mode Sense Amplifier for Small Cell Current Non-Volatile Memory with Offset Suppressing Scheme." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/49929196774414808577.
Full textAbstract:
碩士國立清華大學
電機工程學系
98
In today’s SOC chip, non-volatile memory plays an important role to store the data from other peripheral unit and can read out repeatable. With the technology shrink, the cell array in same area is larger and larger. However, the cell current is also decreased not only NOR type flash but also NAND type flash or OTP and difficult to read. With the nanometer technology, the transistor threshold voltage mismatch gets more pronounced and making the sensing failure easily. To solve this problem, we propose a new current mode sense amplifier with offset suppress scheme. In this design, we sample the input current and amplify the difference without regard the threshold voltage variation. Furthermore, we use symmetric array to reduce mismatch between cell side and reference side and use average technique to reduce the variation on reference current due to PVT variation. We apply our design in 90nm CMOS technology within 512Kb OTP. The experiment result shows that, the minimum cell current can be read in 100nA reference current condition and power supply 1.2V is 140nA.
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Lim, Huey-jen, and 林惠禎. "Low-Power Register File with Novel Low-Voltage Current Mode Sense Amplifier." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/37610064619757885057.
Full textAbstract:
碩士國立成功大學
電機工程學系碩博士班
96
High-performance low-power register file design has become one of the critical conditions for the continual advancement in wide-issue and deeply pipelined superscalar microprocessors. Frequent accesses to the register file makes it one of the major sources of power consumption and one of the prime hot-spots. A novel multi-voltage register file with one write port, two read ports and 32x32 bits implemented using TSMC 0.18μm is presented in this thesis. Low voltage techniques are applied onto the register file to reduce the power consumption while having a maximum operating frequency of 200MHz during pre-simulation. A low voltage operation of 0.5V is used for the memory core with adaptive forward body biasing. A novel low-voltage current mode sense amplifier is designed to operate with the low bit-line voltage of 0.5V of which could be used for a larger register file system. Upon simulation, an average power reduction of 80% could be achieved as compare with the normal register file working at nominal voltage.
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Wang, Huei-Chi, and 王惠琪. "Design of Current Mode Operational Amplifier with Differential Input and Differential Output." Thesis, 1997. http://ndltd.ncl.edu.tw/handle/90020224361357870789.
Full textAbstract:
碩士淡江大學
電機工程學系
85
In the last few decades, the analogue designers more thought about processing signal by current mode signal. As the current mode circuit compares with the voltage mode circuit, the former proves to be two conceptual advantages: higher frequency capabilities and larger dynamic range. And the architecture of current mode circuit form, it is more convenient and direct to copy or operate the signal than the voltage mode. Such as the switch current filter in the recently developing. In this thesis, a new CMOS current operational amplifier (COA) with fully differential input and differential output is proposed and analyzed. The amplifier is implemented from a differential current mirror input transimpedance stage followed by a differential output transconductance gain stage. A differential mode design technique is proposed and used in the feedback circuit. The simulation results of the new COA are based upon the 0.5um CMOS process and ±1.5V supply voltage. The new COA exhibits an open-loop differential gain of 51.71dB with the gain-bandwidth product 314MHz and a settling time of 14ns. To design VLSI circuit in the recent, the mix mode circuit design is the future trend in order to cooperate with the digital process. So the low voltage, and low power analogue circuit design is indispensable. Specially in the mobile personal communication system. So in this paper, we first analysis the basis current cell circuits, e.g. low voltage current mirror. And we will discuss the property of the circuit, as follows describe: (a) bandwidth improvement (b) parasitic capacitor effect improvement (c) unit step function time response (d) temperature stability discussion (e) bias circuit and dynamic range discussion In the last, the applications of the COA in processing current signals are proven to be the counterpart of the traditional voltage mode operational amplifier (VOA). The current integrator and the current Biquad filter show their duality with voltage integrator and Biquad. In the domain of filter design, COA is proven to be applicable to MOS-C current filter as well as SC voltage filter. Thus this COA can be used to process the signals on chip.
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Chao, Chi-Cheng, and 趙基程. "A High Folding-Rate Folding Amplifier for Current-Mode Analog-to-Digital Converters." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/83128122173684105326.
Full textAbstract:
碩士國立東華大學
電機工程學系
94
A novel current-mode folding amplifier designed for two current-mode analog-to-digital converter (ADC) is presented in the thesis. The signal in the proposed folding amplifier is copied and delivered by the current mirrors, thus the linearity of the proposed folding amplifier is better than the traditional voltage-mode folding amplifier which is constructed by differential pairs. On the other hand, the folding rate of the proposed folding amplifier is determined by the resolution of the coarse ADC. Thus the folding rate can be increased unlimitedly if the chip area and power consumption is not the issue. This means the resolution of the ADC can be increased. Two current-mode ADCs constructed by the folding amplifiers are proposed. One is the folding and interpolating ADC and the other is folding ADC. A coarse ADC is utilized to analyze the input signal and to control the output current in order to fit the folding function. Due to the good linearity of the current-mode folding amplifier, there is no need for another folding amplifier to covert the non-linearity part of the previous folding amplifier. In other words, the ADCs constructed by the current-mode folding amplifier have the benefits of simpler circuit structure, smaller chip area, and less power consumption. The ADCs are simulated by Hspice with tsmc 0.18mm CMOS technology. The speeds of both ADCs are 500MHz. The resolution of the folding and interpolating ADC is 8-bit. The input signal range is 0~256mA. DNL and INL are +0.4~-0.3 LSB and 0~-1.9 LSB, respectively. SNR is 45dB. The power consumption is 53mW. For the folding ADC, the resolution is 6-bit. The input signal range is 0~256mA. DNL and INL are +0.2~-0.2 LSB and 0~-0.7 LSB, respectively. SNR is 34dB. The power consumption is 16mW.
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Wang, Meng-Ciou, and 王孟丘. "Design of Instrumentation Amplifier and High-Order Tunable Filter Based on Current-Mode Active Elements." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/785y59.
Full textAbstract:
碩士國立臺北科技大學
電腦與通訊研究所
98
This thesis mainly focuses on the implementation of instrumentation amplifier and tunable bandwidth filter by using current current-mode active elements. This thesis can be divided into three parts. The first part of this thesis is to design instrumentation amplifier using fully differential difference current conveyor, which purpose is to amplify signal that is small and weak, but weak signal will be affected strongly by noise, therefore, the design of high common-mode rejection ratio will be the key point. Process technology using TSMC 0.35μm 2P4M process is adopted, the supply voltage is ± 0.9V, the power consumption is 64.23μW, and the chip area is 289μm* 273μm (without PAD). The second part of this thesis is to synthesize active filter using linear transformation methods, the number of active component will aim to achieve the fewest number, and implement a 3rd-order Chebyshev low-pass filter using new device current controlled current conveyor transconductance amplifier, this device has a built-in resistance merit, because of on requiring external resistors when designing a filter, they are very suitable for integration. Process technology using TSMC 0.18μm 1P6M process is adopted, the bandwidth is 2MHz, the supply voltage is ± 0.9V, the power consumption is 5.16mW, and the chip area is 250μm* 160μm (without PAD). The third part of this thesis is also to synthesize active filter using linear transformation methods, and controlling current controlled current conveyor transconductance amplifier using the principle of current controlled and digital signals, then implement a 4th-order tunable Chebyshev low-pass filter to achieve the purpose of adjustable bandwidth. Process technology using TSMC 0.18μm 1P6M process is adopted, the tunable bandwidth range is 185kHz to 575kHz, the supply voltage is ± 0.75V, the power consumption is 2.7mW, and the chip area is 205μm* 389μm (without PAD).
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Sung, Ya-Syuan, and 宋亞軒. "The Design of 8-Channel CMOS Current-mode Analog Front-End Amplifier for EEG Recording." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/u64hyk.
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43
Shusta, Michael J. "Design and Evaluation of an L-Band Current-Mode Class-D Power Amplifier Integrated Circuit." 2014. https://scholarworks.umass.edu/masters_theses_2/44.
Full textAbstract:
Power amplifiers (PAs) convert energy from DC to high frequencies in all radio and microwave transmitter systems be they wireless base stations, handsets, radars, heaters, and so on. PAs are the dominant consumers of energy in these systems and, therefore, the dominant sources of system cost and inefficiency. Research has focused on efficient solid-state PA circuit topologies and their optimization since the 1960s. The 2000s saw the current-mode class-D (CMCD) topology, potentially suitable for today's wireless communications systems, show promise in the UHF frequency band. This thesis describes the design and testing of a high-efficiency CMCD amplifier with an integrated driver stage. In addition, analysis of a merged PA-mixer circuit based on the CMCD is provided.
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Wu, Wei-Chuan, and 吳緯權. "Current Mode Buck-Boost Converter with Fast Reference Tracking Technique in RF Amplifier Supplying Systems." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/62118028015270241075.
Full textAbstract:
碩士國立交通大學
電機與控制工程系所
97
Recently, wireless communication portable devices are increasing. High efficiency radio frequency power amplifiers (PAs) are critical components in many products, like wireless LAN, personal wireless communication system, manufactures using Bluetooth, and so on. Traditionally, linear PAs are implemented by “backing off” the PA, so that their average output power is well below the amplifier saturated power. Unfortunately, this decreases the average efficiency. Therefore, technique like envelope tracking could increase the efficiency of PAs. High efficiency voltage conversion can be obtained with a switch-mode inductive DC/DC converter, but its bandwidth is limited due to practical switching frequency. Alternately, linear regulators enable higher bandwidth at the cost of efficiency. Therefore, someone propose a modulator which combines linear regulator with a switch-mode converter in series connection or parallel connection. This method increase efficiency successfully. However, the switch-mode converter in this modulator is only a pure buck converter. When the supply voltage is higher than the battery voltage, this modulator could not work normally. In other words, extending battery life becomes an important issue. In this thesis, the proposed Current Mode Buck-Boost Converter with Fast Reference Tracking Technique in RF Amplifier Supplying Systems aims to lower down cost, reduce the chip size and increase the integration, inner compensation and high switching frequency. The regulated output and enhanced control accuracy are guaranteed during mode transition. Besides, the converter could modulate the output voltage fast. This converter is implemented in TSMC 1P4M 0.25-μm CMOS technology. The input voltage ranges from 2.7 to 4.5V and adjustable output voltage option from 1V to 4.5V. The switching frequency is designed as 5 MHz.
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Liu, Wen-Hsiung, and 劉文雄. "Design of New Current-Mode Instrumentation Amplifier and Analog Front-End Circuit for Biomedical Applications." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/8v9a5z.
Full textAbstract:
碩士國立臺北科技大學
電腦與通訊研究所
97
The design and improvement of instrumentation amplifier is the focus in this thesis, the author used different current conveyors to complete instrumentation amplifiers , and improve the performance of circuits. The elements used are current conveyor、operational transresistence amplifier、differential difference current conveyor、fully differential difference current conveyor and differential difference operational floating current conveyor. The function of instrumentation amplifier is to amplify signal that is small and weak，but weak signal will be affected strongly by noise, therefore the design of high common-mode rejection ratio will be the key point. A new current-mode switched capacitor tunable filter is designed by differential difference current conveyor in this thesis, it is tunable that by switches with different duty cycle. The way to synthesize filters is so many, follow the leader feedback and cascade is the way to complete four-order filter in this thesis. The max bandwidth is 2 MHz. Finally, the author synthesizes instrumentation amplifier and filter to complete analog front-end circuit for biomedical applications. The instrumentation amplifier is synthesize by differential difference current conveyor. Due to biomedical signal is weak that would be affected strongly by noise , so chopper technology is used in the circuit to reduce flicker noise at low frequency. The low- pass switched capacitor filter is synthesized by operational transconductance amplifier , the key design of the biomedical system is low power and low noise. Those designed chips are implemented by TSMC 0.35 um process and TSMC 0.18 um process.
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Li, Chih-Chen, and 李志琛. "High Sensitivity CMOS Voltage-to-Frequency Converter and High-Speed Current-Mode Sense Amplifier for SRAMs." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/93936796067858463112.
Full textAbstract:
碩士國立中山大學
電機工程學系研究所
91
The first topic of this thesis is to propose a novel voltage-to-frequency converter (VFC) to provide high sensitivity. The VFC circuit is composed of one current mirror, one current multiplier, and voltage window comparators. The proposed VFC tracks the variations of the stored charge of a built-in capacitor. The voltage window comparator monitors the voltage of the capacitor to determine whether the output is pulled high or pulled down. The worth-case linear range of the output frequency of the proposed VFC is 0 to 55 MHz provided that the input voltage is 0 to 0.9 V. The error is less than 9% while the power dissipation is 0.218 mW. The second topic is to carry out a novel CMOS current-mode high- speed sense amplifier (SA). The proposed SA is composed by cascading a current-mode sense amplifier and a voltage-mode sense amplifier. The small input impedance of the current-mode amplifier alleviates the loading effect on the bitlines of SRAM cells such that the sensing speed is enhanced. The voltage-mode amplifier is responsible for boosting the logic levels to full swing. The worst access time of the proposed design is found to be less than 1.26 ns with a 1 pF load on outputs. The power dissipation is merely 0.835 mW at 793 MHz.
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Cheng, Chia-tsung, and 城嘉聰. "Design of the High Speed Current Mode Sense Amplifier for Spin Torque Transfer Magnetoresistive Random Access Memory." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/52215294734896797653.
Full textAbstract:
碩士國立中央大學
電機工程研究所
98
According to the rapid evolution of hand-held products, the cell phone、PDA、digital camera and iPOD are more popular with people. The requirements of memory are more than before. The applications of memory circuits are the added value and the key technique for those components. Therefore, the embedded memory is more and more important in SoC. A high-speed current mode sense amplifier for Spin Torque Transfer Magnetoresistive Random Access Memory (STT MRAM) is proposed. The circuit is fabricated by TSMC 0.18 μm 1P6M, the MTJ (Magnetic tunnel junction) utilizes ITRI EOL 65 nm process. The supply voltage are 1.8 V and 2.5 V. The resistance values of high state is 2132 Ω, low state is 1215 Ω, and reference state is 1512 Ω, respectively. The proposed sense amplifier decreases the dropping rate of input bias. In particular, it can reduce the sensing time and the power-delay-product (PDP). The proposed sense amplifier has faster sensing delay than generally current mode sense amplifiers. The reductions of Power-Delay-Product (PDP) are also being. Furthermore, the proposed sense amplifier spends less sensing delay time under various resistances than the others.
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Sundar, Arun. "A 3-Bit Current Mode Quantizer for Continuous Time Delta Sigma Analog-to-Digital Converters." Thesis, 2011. http://hdl.handle.net/1969.1/ETD-TAMU-2011-12-10515.
Full textAbstract:
The summing amplifier and the quantizer form two of the most critical blocks in a continuous time delta sigma (CT ΔΣ) analog-to-digital converter (ADC). Most of the conventional CT ΔΣ ADC designs incorporate a voltage summing amplifier and a voltage-mode quantizer. The high gain-bandwidth (GBW) requirement of the voltage summing amplifier increases the overall power consumption of the CT ΔΣ ADC. In this work, a novel method of performing the operations of summing and quantization is proposed. A current-mode summing stage is proposed in the place of a voltage summing amplifier. The summed signal, which is available in current domain, is then quantized with a 3-bit current mode flash ADC. This current mode summing approach offers considerable power reduction of about 80% compared to conventional solutions [2]. The total static power consumption of the summing stage and the quantizer is 5.3mW. The circuits were designed in IBM 90nm process. The static and dynamic characteristics of the quantizer are analyzed. The impact of process and temperature variation and mismatch tolerance as well as the impact of jitter, in the presence of an out-of-band blocker signal, on the performance of the quantizer is also studied.
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Chen, Shi-Xuan, and 陳世軒. "A 2.5V 8-bit 100MHzS/s 16mW Current Mode Folding and Interpolation Analog to Digital Converter Using Back-end Amplifier." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/75054812375954127312.
Full textAbstract:
碩士國立中山大學
電機工程學系研究所
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A 2.5V 8-bit 100MSample/sec folding and interpolation analog to digital converter is described in this thesis. First, a cascoding folding amplifier is used for improve power consumption. The differential pairs of the folding amplifier are cascoded to reduce the numbers of reference current source, so the power consumption is reduced. In order to reduce more power consumption, we drop the power supply down to 2.5V. However, the power supply is not large enough to keep the folding amplifier working normally and it causes the output signal aberration. Hence, we propose a back-end amplifier to connect the folding amplifier to overcome the problem. Therefore, the power consumption of all circuit is reduced to 15.292mW. Moreover, the capacitive loading at the output of the cascoded differential pairs is smaller than that of conventional cascaded differential pairs, and we employ a distributed folding technique to reduce the folding factors of each folding amplifier. Therefore, we improve the frequency multiplication effect to increase the analog input signal bandwidth. Beside, in order to heave the input signal range of the voltage mode comparator, we employ an n-channel input stage. Because the input signal range of n-channel is higher than that of p-channel input stage. By using these techniques, the input signal bandwidth and the power consumption of overall circuit are improved greatly. The proposed analog to digital converter is designed by TSMC 0.35μm 2P4M CMOS process, and it operates at 2.5V power supply voltage with 1V to 2.4V reference voltage. The simulation results show that the power consumption is 15.292mW, DNL is +/- 0.55LSB, and INL is 1.7LSB ~ -0.8LSB.
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Frebrowski, Daniel Jordan. "Investigation of Time Domain Modulation and Switching-Mode Power Amplifiers Suitable for Digitally-Assisted Transmitters." Thesis, 2010. http://hdl.handle.net/10012/5492.
Full textAbstract:
Innovation in wireless communication has resulted in accelerating demand for smartphones using multiple communications protocols such as WiFi, Bluetooth and the many cellular standards deployed around the world. The variety of frequency, bandwidth and power requirements associated with each standard typically calls for the implementation of separate radio frequency (RF) front end hardware for each standard. This is a less-than-ideal solution in terms of cost and device area. Software-defined radio (SDR) promises to solve this problem by allowing the RF hardware to be digitally reconfigurable to adapt to any wireless standard. The application of machine learning and cognition algorithms to SDR will enable cognitive radios and cognitive wireless networks, which will be able to intelligently adapt to user needs and surrounding radio spectrum conditions.
The challenge of fully reconfigurable transceivers is in implementing digitally-controlled RF circuits which have comparable performance to their fixed-frequency counterparts. Switching-mode power amplifiers (SMPA) are likely to be an important part of fully reconfigurable transmitters since their switching operation provides inherent compatibility with digital circuits, with the added benefit of very high efficiency. As a step to understanding the RF requirements of high efficiency and switching PAs, an inverse class F PA in push-pull configuration is implemented. This configuration is chosen for its similarity to the current mode class D (CMCD) topology. The fabricated PA achieves a peak drain efficiency of over 75% with 42.7 dBm (18.6 W) output power at 2.46 GHz.
Since SMPAs cannot directly provide the linearity required by current and future wireless communications standards, amplitude information must be encoded into the RF signal in a different way. Given the superior time resolution of digital integrated circuit (IC) technology, a logical solution is to encode this information into the timing of the signal. The two most common techniques for doing so are pulse width modulation and delta-sigma modulation. However, the design of delta-sigma modulators requires simulation as part of the design process due to the lack of closed-form relationships between modulator parameters (such as resolution and oversampling) and performance figures (such as coding efficiency and signal quality). In particular, the coding efficiency is often ignored although it is an important part of ensuring transmitter efficiency with respect to the desired signal. A study of these relationships is carried out to observe the tradeoffs between them. It is found that increasing the speed or complexity of a DS modulated system does not necessarily translate to performance benefits as one might expect. These observations can have a strong impact on design choices at the system level.