Academic literature on the topic 'CRYSTALS-KYBER'

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Journal articles on the topic "CRYSTALS-KYBER"

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Huang, Yiming, Miaoqing Huang, Zhongkui Lei, and Jiaxuan Wu. "A pure hardware implementation of CRYSTALS-KYBER PQC algorithm through resource reuse." IEICE Electronics Express 17, no. 17 (September 10, 2020): 20200234. http://dx.doi.org/10.1587/elex.17.20200234.

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Chen, Zhaohui, Yuan Ma, Tianyu Chen, Jingqiang Lin, and Jiwu Jing. "High-performance area-efficient polynomial ring processor for CRYSTALS-Kyber on FPGAs." Integration 78 (May 2021): 25–35. http://dx.doi.org/10.1016/j.vlsi.2020.12.005.

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Bisheh-Niasar, Mojtaba, Reza Azarderakhsh, and Mehran Mozaffari-Kermani. "Instruction-Set Accelerated Implementation of CRYSTALS-Kyber." IEEE Transactions on Circuits and Systems I: Regular Papers, 2021, 1–12. http://dx.doi.org/10.1109/tcsi.2021.3106639.

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Chen, Zhaohui, Yuan Ma, Tianyu Chen, Jingqiang Lin, and Jiwu Jing. "High-performance area-efficient polynomial ring processor for CRYSTALS-Kyber on FPGAs." Integration, January 2021. http://dx.doi.org/10.1016/j.vlsi.2020.12.005.

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Xing, Yufei, and Shuguo Li. "A Compact Hardware Implementation of CCA-Secure Key Exchange Mechanism CRYSTALS-KYBER on FPGA." IACR Transactions on Cryptographic Hardware and Embedded Systems, February 23, 2021, 328–56. http://dx.doi.org/10.46586/tches.v2021.i2.328-356.

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Post-quantum cryptosystems should be prepared before the advent of powerful quantum computers to ensure information secure in our daily life. In 2016 a post-quantum standardization contest was launched by National Institute of Standards and Technology (NIST), and there have been lots of works concentrating on evaluation of these candidate protocols, mainly in pure software or through hardware-software co-design methodology on different platforms. As the contest progresses to third round in July 2020 with only 7 finalists and 8 alternate candidates remained, more dedicated and specific hardware designs should be considered to illustrate the intrinsic property of a certain protocol and achieve better performance. To this end, we present a standalone hardware design of CRYSTALS-KYBER, amodule learning-with-errors (MLWE) based key exchange mechanism (KEM) protocol within the 7 finalists on FPGA platform. Through elaborate scheduling of sampling and number theoretic transform (NTT) related calculations, decent performance is achieved with limited hardware resources. The way that Encode/Decode and the tweaked Fujisaki-Okamoto transform are implemented is demonstrated in detail. Analysis about minimizing memory footprint is also given out. In summary, we realize the adaptive chosen ciphertext attack (CCA) secure Kyber with all selectable module dimension k on the smallest Xilinx Artix-7 device. Our design computes key-generation, encapsulation (encryption) and decapsulation (decryption and reencryption) phase in 3768/5079/6668 cycles when k = 2, 6316/7925/10049 cycles when k = 3, and 9380/11321/13908 cycles when k = 4, consuming 7412/6785 LUTs, 4644/3981 FFs, 2126/1899 slices, 2/2 DSPs and 3/3 BRAMs in server/client with 6.2/6.0 ns critical path delay, outperforming corresponding high level synthesis (HLS) based designs or hardware-software co-designs to a large extent.
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Banerjee, Utsav, Tenzin S. Ukyab, and Anantha P. Chandrakasan. "Sapphire: A Configurable Crypto-Processor for Post-Quantum Lattice-based Protocols." IACR Transactions on Cryptographic Hardware and Embedded Systems, August 9, 2019, 17–61. http://dx.doi.org/10.46586/tches.v2019.i4.17-61.

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Public key cryptography protocols, such as RSA and elliptic curve cryptography, will be rendered insecure by Shor’s algorithm when large-scale quantum computers are built. Cryptographers are working on quantum-resistant algorithms, and lattice-based cryptography has emerged as a prime candidate. However, high computational complexity of these algorithms makes it challenging to implement lattice-based protocols on low-power embedded devices. To address this challenge, we present Sapphire – a lattice cryptography processor with configurable parameters. Efficient sampling, with a SHA-3-based PRNG, provides two orders of magnitude energy savings; a single-port RAM-based number theoretic transform memory architecture is proposed, which provides 124k-gate area savings; while a low-power modular arithmetic unit accelerates polynomial computations. Our test chip was fabricated in TSMC 40nm low-power CMOS process, with the Sapphire cryptographic core occupying 0.28 mm2 area consisting of 106k logic gates and 40.25 KB SRAM. Sapphire can be programmed with custom instructions for polynomial arithmetic and sampling, and it is coupled with a low-power RISC-V micro-processor to demonstrate NIST Round 2 lattice-based CCA-secure key encapsulation and signature protocols Frodo, NewHope, qTESLA, CRYSTALS-Kyber and CRYSTALS-Dilithium, achieving up to an order of magnitude improvement in performance and energy-efficiency compared to state-of-the-art hardware implementations. All key building blocks of Sapphire are constant-time and secure against timing and simple power analysis side-channel attacks. We also discuss how masking-based DPA countermeasures can be implemented on the Sapphire core without any changes to the hardware.
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Dissertations / Theses on the topic "CRYSTALS-KYBER"

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Novosadová, Tatiana. "Postkvantové šifry." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2021. http://www.nusl.cz/ntk/nusl-442406.

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Národný inštitút pre štandardy a technológie (NIST) zahájil proces na získanie, vyhodnotenie a štandardizáciu jedného alebo viacerých kryptografických algoritmov využívajúcich verejný kľúč prostredníctvom verejnej súťaže. Cieľom tejto dimplomovej práce je naštudovať dostupné postkvantové algoritmy pre ustanovenie kľúča, ktoré boli zverejnené v treťom kole tejto súťaže. Po dôkladnej analýze a porovnaní bol jeden zo študovaných algoritmov implementovaný s využitím knižníc dostupných pre daný algoritmus, následne bol program optimalizovaný a zdokumentovaný.
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Conference papers on the topic "CRYSTALS-KYBER"

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Ricci, Sara, Petr Jedlicka, Peter Cibik, Petr Dzurenda, Lukas Malina, and Jan Hajny. "Towards CRYSTALS-Kyber VHDL Implementation." In 18th International Conference on Security and Cryptography. SCITEPRESS - Science and Technology Publications, 2021. http://dx.doi.org/10.5220/0010580407600765.

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Zhao, Yixuan, Zhiteng Chao, Jing Ye, Wen Wang, Yuan Cao, Shuai Chen, Xiaowei Li, and Huawei Li. "Optimization Space Exploration of Hardware Design for CRYSTALS-KYBER." In 2020 IEEE 29th Asian Test Symposium (ATS). IEEE, 2020. http://dx.doi.org/10.1109/ats49688.2020.9301498.

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Bos, Joppe, Leo Ducas, Eike Kiltz, T. Lepoint, Vadim Lyubashevsky, John M. Schanck, Peter Schwabe, Gregor Seiler, and Damien Stehle. "CRYSTALS - Kyber: A CCA-Secure Module-Lattice-Based KEM." In 2018 IEEE European Symposium on Security and Privacy (EuroS&P). IEEE, 2018. http://dx.doi.org/10.1109/eurosp.2018.00032.

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Yao, Kan, Dur-E.-Shahwar Kundi, Chenghua Wang, Maire O'Neill, and Weiqiang Liu. "Towards CRYSTALS-Kyber: A M-LWE Cryptoprocessor with Area-Time Trade-Off." In 2021 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 2021. http://dx.doi.org/10.1109/iscas51556.2021.9401253.

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Yarman, Ferhat, Ahmet Can Mert, Erdinc Ozturk, and Erkay Savas. "A Hardware Accelerator for Polynomial Multiplication Operation of CRYSTALS-KYBER PQC Scheme." In 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 2021. http://dx.doi.org/10.23919/date51398.2021.9474139.

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Ma, Liejun, Xingjun Wu, and Guoqiang Bai. "Parallel polynomial multiplication optimized scheme for CRYSTALS-KYBER Post-Quantum Cryptosystem based on FPGA." In 2021 International Conference on Communications, Information System and Computer Engineering (CISCE). IEEE, 2021. http://dx.doi.org/10.1109/cisce52179.2021.9445987.

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