Books on the topic 'Computer language verification'

The E hardware verification language. Norwell, MA: Kluwer Academic Publishers, 2004.

Spear, Chris. System Verilog for Verification: A Guide to Learning the Testbench Language Features. 2nd ed. Boston, MA: Springer Science+Business Media, LLC, 2008.

Spear, Chris. SystemVerilog for Verification: A Guide to Learning the Testbench Language Features. 3rd ed. Boston, MA: Springer US, 2012.

Richard, Lai. Communication protocol specification and verification. Boston: Kluwer Academic, 1998.

IEEE Computer Society. Design Automation Standards Committee. IEEE standard for SystemVerilog--unified hardware design, specification, and verification language. 2nd ed. New York: Institute of Electrical and Electronics Engineers, 2010.

Verilog digital system design: RT level synthesis, testbench, and verification. 2nd ed. New York: McGraw-Hill, 2006.

Step-by-step functional verification with SystemVerilog and OVM. San Francisco, CA: Hansen Brown Publishing, 2008.

Robinson, David. Aspect-oriented programming with the e verification language: A pragmatic guide for testbench developers. Morgan Kaufmann/Elsevier: Amsterdam ; Boston, 2007.

Berglund, Tim. Building and testing with Gradle. Sebastopol, CA: O'Reilly Media, 2011.

Sánchez, Arantza Díaz de Ilarraza. Verificación de programas y metodología de la programación. Bilbao: Servicio Editorial, Universidad del Pais Vasco, 1990.

Yoeli, Michael. Verification of systems and circuits using LOTOS, Petri Nets, and CCS. Hoboken, N.J: John Wiley & Sons, 2008.

Bening, Lionel. Principles of verifiable RTL design: A functional coding style supporting verification processes in Verilog. 2nd ed. New York: Kluwer Academic, 2002.

Bening, Lionel. Principles of verifiable RTL design: A functional coding style supporting verification processes in Verilog. 2nd ed. Boston: Kluwer Academic Publishers, 2001.

Bening, Lionel. Principles of verifiable RTL design: A functional coding style supporting verification processes in Verilog. 2nd ed. Boston: Kluwer Academic Publishers, 2001.

1956-, Foster Harry, ed. Principles of verifiable RTL design: A functional coding style supporting verification processes in Verilog. Norwell, Mass: Kluwer Academic Publishers, 2000.

The power of assertions in SystemVerilog. New York: Springer, 2010.

James, Peet. Verification Plans: The Five-Day Verification Strategy for Modern Hardware Verification Languages. Boston, MA: Springer US, 2004.

Shyamasundar, Rudrapatna. Real time programming: Languages, specification and verification. Singapore: World Scientific, 2010.

Programming logics: An introduction to verification and semantics. New York: Wiley, 1989.

PLPV, '07 (2007 Freiburg Germany). PLPV'07: Proceedings of the 2007 workshop on Programming Languages meets Program Verification, Freiburg, Germany, October 5, 2007. New York, N.Y: Association for Computing Machinery, 2007.

Kaplan, Simon M. Specification and verification of context conditions for programming languages. Urbana, Ill: Dept. of Computer Science, University of Illinois at Urbana-Champaign, 1985.

1962-, Altenkirch Thorsten, Millstein Todd, ACM Special Interest Group on Programming Languages, Association for Computing Machinery, and ACM Symposium on Principles of Programming Languages (36th : 2009 : Savannah, Ga.), eds. PLPV '09: Proceedings of the 2009 ACM SIGPLAN Workshop on Programming Languages meets Program Verification, Savannah, Georgia, USA, January 20, 2009. New York, N.Y: Association for Computing Machinery, 2009.

Goossens, K. G. W. Structure and behaviour in hardware verification. Edinburgh: LFCS, Dept. of Computer Science, University of Edinburgh, 1993.

Bergeron, Janick. Writing testbenches: Functional verification of HDL models. New York: Kluwer Academic, 2002.

Writing testbenches: Functional verification of HDL models. 2nd ed. Boston: Kluwer Academic Publishers, 2003.

Writing testbenches: Functional verification of HDL models. Boston: Kluwer Academic, 2000.

R, Valk, ed. Petri nets for systems engineering: A guide to modeling, verification, and applications. Berlin: Springer, 2003.

Adam, Krolnik, and Lacey David, eds. Assertion-based design. 2nd ed. Boston: Kluwer Academic Publishers, 2004.

Foster, Harry. Assertion-based design. 2nd ed. Boston: Kluwer Academic Publishers, 2004.

Adam, Krolnik, and Lacey David, eds. Assertion-based design. Boston, MA: Kluwer Academic, 2003.

Clarke, Dave. Aliasing in Object-Oriented Programming. Types, Analysis and Verification. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013.

Formal specification and verification of digital systems. London: McGraw-Hill, 1994.

Foster, Harry. Assertion-based design. Boston, MA: Kluwer Academic Pub., 2003.

Mads, Dam, ed. Analysis and verification of multiple-agent languages: 5th LOMAPS Workshop, Stockholm, Sweden, June 24-26, 1996 : selected papers. Berlin: Springer, 1997.

Montali, Marco. Specification and verification of declarative open interaction models: A logic-based approach. Berlin: Springer, 2010.

João, Lourenço, Shehory Onn M. 1963-, and SpringerLink (Online service), eds. Hardware and Software: Verification and Testing: 7th International Haifa Verification Conference, HVC 2011, Haifa, Israel, December 6-8, 2011, Revised Selected Papers. Berlin, Heidelberg: Springer Berlin Heidelberg, 2012.

A, Seshia Sanjit, and SpringerLink (Online service), eds. Computer Aided Verification: 24th International Conference, CAV 2012, Berkeley, CA, USA, July 7-13, 2012 Proceedings. Berlin, Heidelberg: Springer Berlin Heidelberg, 2012.

Eduard, Cerny, and Delgado Kloos Carlos, eds. Hardware description languages and their applications: Specification, modelling, verification and synthesis of microelectronic systems : IFIP TC10 WG10.5 International Conference on Computer Hardware Description Languages and their Applications, 20-25 April, 1997, Toledo, Spain. London: Chapman & Hall, 1997.

Koushik, Sen, and SpringerLink (Online service), eds. Runtime Verification: Second International Conference, RV 2011, San Francisco, CA, USA, September 27-30, 2011, Revised Selected Papers. Berlin, Heidelberg: Springer Berlin Heidelberg, 2012.

Andrey, Rybalchenko, and SpringerLink (Online service), eds. Verification, Model Checking, and Abstract Interpretation: 13th International Conference, VMCAI 2012, Philadelphia, PA, USA, January 22-24, 2012. Proceedings. Berlin, Heidelberg: Springer Berlin Heidelberg, 2012.

Tadanori, Mizuno, International Federation for Information Processing., and IFIP TC 6/WG 6.1 International Conference on Protocol Specification, Testing and Verification (17th : 1997 : Osaka, Japan), eds. Formal description techniques and protocol specification, testing and verification: FORTE X / PSTV XVII '97 : IFIP TC6 WG6.1 Joint International Conference on Formal Description Techniques for Distributed Systems and Communication Protocols (FORTE X) and Protocol Specification, Testing and Verification (PSTV XVII), 18-21 Nov. 1997, Osaka, Japan. London: Chapman & Hall, 1997.

Reinhard, Gotzhein, Bredereke Jan, International Federation for Information Processing., and IFIP WG 6.1 International Symposium on Protocol Specification, Testing and Verification (16th : 1996 : Kaiserslautern, Germany), eds. Formal description techniques, IX: Theory, application and tools : IFIP TC6 / 6.1 International Conference on Formal Description Techniques IX/Protocol Specification, Testing and Verification XVI, Kaiserslautern, Germany, 8-11 October, 1996. London: published by Chapman & Hall on behalf of the International Federation for Information Processing, 1996.

David, Parker, and SpringerLink (Online service), eds. Model Checking Software: 19th International Workshop, SPIN 2012, Oxford, UK, July 23-24, 2012. Proceedings. Berlin, Heidelberg: Springer Berlin Heidelberg, 2012.

Iman, Sasan. The e Hardware Verification Language. Springer-Verlag New York, LLC, 2004.

Joshi, Sunita, and Sasan Iman. The e Hardware Verification Language. Springer, 2013.

Joshi, Sunita, and Sasan Iman. The e-Hardware Verification Language (Information Technology: Transmission, Processing & Storage). Springer, 2004.

Spear, Chris, and Greg Tumbush. SystemVerilog for Verification: A Guide to Learning the Testbench Language Features. Springer, 2012.

Hunter, Alan, Eduard Cerny, and Janick Bergeron. Verification Methodology Manual for SystemVerilog. Springer, 2008.

Hunter, Alan, Eduard Cerny, Andy Nightingale, and Janick Bergeron. Verification Methodology Manual for SystemVerilog. Springer, 2005.

Hardware Verification with C++: A Practitioners Handbook. Springer, 2006.