Relevant bibliographies by topics / Computation Tree Logics

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
  6. Reports

Academic literature on the topic 'Computation Tree Logics'

Author: Grafiati
Published: 6 September 2023
Last updated: 7 September 2023

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Journal articles on the topic "Computation Tree Logics"

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Kamide, Norihiro. "Logical foundations of hierarchical model checking." Data Technologies and Applications 52, no. 4 (September 4, 2018): 539–63. http://dx.doi.org/10.1108/dta-01-2018-0002.

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Purpose The purpose of this paper is to develop new simple logics and translations for hierarchical model checking. Hierarchical model checking is a model-checking paradigm that can appropriately verify systems with hierarchical information and structures. Design/methodology/approach In this study, logics and translations for hierarchical model checking are developed based on linear-time temporal logic (LTL), computation-tree logic (CTL) and full computation-tree logic (CTL*). A sequential linear-time temporal logic (sLTL), a sequential computation-tree logic (sCTL), and a sequential full computation-tree logic (sCTL*), which can suitably represent hierarchical information and structures, are developed by extending LTL, CTL and CTL*, respectively. Translations from sLTL, sCTL and sCTL* into LTL, CTL and CTL*, respectively, are defined, and theorems for embedding sLTL, sCTL and sCTL* into LTL, CTL and CTL*, respectively, are proved using these translations. Findings These embedding theorems allow us to reuse the standard LTL-, CTL-, and CTL*-based model-checking algorithms to verify hierarchical systems that are modeled and specified by sLTL, sCTL and sCTL*. Originality/value The new logics sLTL, sCTL and sCTL* and their translations are developed, and some illustrative examples of hierarchical model checking are presented based on these logics and translations.
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DALLA CHIARA, MARIA LUISA, ROBERTO GIUNTINI, and ROBERTO LEPORINI. "LOGICS FROM QUANTUM COMPUTATION." International Journal of Quantum Information 03, no. 02 (June 2005): 293–337. http://dx.doi.org/10.1142/s0219749905000943.

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The theory of logical gates in quantum computation has suggested new forms of quantum logic, called quantum computational logics. The basic semantic idea is the following: the meaning of a sentence is identified with a quregister (a system of qubits) or, more generally, with a mixture of quregisters (called qumix). In this framework, any sentence α of the language gives rise to a quantum tree: a kind of quantum circuit that transforms the quregister (qumix) associated to the atomic subformulas of α into the quregister (qumix) associated to α. A variant of the quantum computational semantics is represented by the quantum holistic semantics, which permits us to represent entangled meanings. Physical models of quantum computational logics can be built by means of Mach–Zehnder interferometers.
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Goranko, Valentin. "Temporal Logics with Reference Pointers and Computation Tree Logics." Journal of Applied Non-Classical Logics 10, no. 3-4 (January 2000): 221–42. http://dx.doi.org/10.1080/11663081.2000.10510998.

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BALTAZAR, P., R. CHADHA, and P. MATEUS. "QUANTUM COMPUTATION TREE LOGIC — MODEL CHECKING AND COMPLETE CALCULUS." International Journal of Quantum Information 06, no. 02 (April 2008): 219–36. http://dx.doi.org/10.1142/s0219749908003530.

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Logics for reasoning about quantum states and their evolution have been given in the literature. In this paper, we consider quantum computation tree logic (QCTL), which adds temporal modalities to exogenous quantum propositional logic. We give a sound and complete axiomatization of QCTL and combine the standard CTL model-checking algorithm with the dEQPL model-checking algorithm to obtain a model-checking algorithm for QCTL. Finally, we illustrate the use of the logic by reasoning about the BB84 key distribution protocol.
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Kamide, Norihiro, and Daiki Koizumi. "Method for Combining Paraconsistency and Probability in Temporal Reasoning." Journal of Advanced Computational Intelligence and Intelligent Informatics 20, no. 5 (September 20, 2016): 813–27. http://dx.doi.org/10.20965/jaciii.2016.p0813.

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Computation tree logic (CTL) is known to be one of the most useful temporal logics for verifying concurrent systems by model checking technologies. However, CTL is not sufficient for handling inconsistency-tolerant and probabilistic accounts of concurrent systems. In this paper, a paraconsistent (or inconsistency-tolerant) probabilistic computation tree logic (PpCTL) is derived from an existing probabilistic computation tree logic (pCTL) by adding a paraconsistent negation connective. A theorem for embedding PpCTL into pCTL is proven, thereby indicating that we can reuse existing pCTL-based model checking algorithms. A relative decidability theorem for PpCTL, wherein the decidability of pCTL implies that of PpCTL, is proven using this embedding theorem. Some illustrative examples involving the use of PpCTL are also presented.
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Walker, Matt, Parssa Khazra, Anto Nanah Ji, Hongru Wang, and Franck van Breugel. "jpf-logic." ACM SIGSOFT Software Engineering Notes 48, no. 1 (January 10, 2023): 32–36. http://dx.doi.org/10.1145/3573074.3573083.

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We present jpf-logic, an extension of the model checker Java PathFinder (JPF). Our extension jpf-logic provides a framework to check properties expressed in temporal logics such as linear temporal logic (LTL) and computation tree logic (CTL). To support a logic in our framework, we (1) implement a parser for the logic, (2) develop a hierarchy of classes that represent the abstract syntax of the logic and implement a transformation from parse trees of formulas to the corresponding abstract syntax trees, and (3) implement a model checking algorithm that takes as input an abstract syntax tree of a formula and a partial transition system. The latter represents a model of the Java application. All three components have been implemented for CTL. The first two have been implemented for LTL.
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JACOBS, BART. "The temporal logic of coalgebras via Galois algebras." Mathematical Structures in Computer Science 12, no. 6 (December 2002): 875–903. http://dx.doi.org/10.1017/s096012950200378x.

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This paper introduces a temporal logic for coalgebras. Nexttime and lasttime operators are defined for a coalgebra, acting on predicates on the state space. They give rise to what is called a Galois algebra. Galois algebras form models of temporal logics like Linear Temporal Logic (LTL) and Computation Tree Logic (CTL). The mapping from coalgebras to Galois algebras turns out to be functorial, yielding indexed categorical structures. This construction gives many examples, for coalgebras of polynomial functors on sets. More generally, it will be shown how ‘fuzzy’ predicates on metric spaces, and predicates on presheaves, yield indexed Galois algebras, in basically the same coalgebraic manner.
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PENCZEK, WOJCIECH. "TEMPORAL LOGICS FOR TRACE SYSTEMS: ON AUTOMATED VERIFICATION." International Journal of Foundations of Computer Science 04, no. 01 (March 1993): 31–67. http://dx.doi.org/10.1142/s0129054193000043.

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We investigate an extension of CTL (Computation Tree Logic) by past modalities, called CTL P, interpreted over Mazurkiewicz’s trace systems. The logic is powerful enough to express most of the partial order properties of distributed systems like serializability of database transactions, snapshots, parallel execution of program segments, or inevitability under concurrency fairness assumption. We show that the model checking problem for the logic is NP-hard, even if past modalities cannot be nested. Then, we give a one exponential time model checking algorithm for the logic without nested past modalities. We show that all the interesting partial order properties can be model checked using our algorithm. Next, we show that is is possible to extend the model checking algorithm to cover the whole language and its extension to [Formula: see text]. Finally, we prove that the logic is undecidable and we discuss consequences of our results on using propositional versions of partial order temporal logics to synthesis of concurrent systems from their specifications.
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Latte, Markus. "Branching-time logics and fairness, revisited." Mathematical Structures in Computer Science 31, no. 9 (October 2021): 1135–44. http://dx.doi.org/10.1017/s0960129521000475.

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AbstractEmerson and Halpern (1986, Journal of the Association for Computing Machinery33, 151–178) prove that the Computation Tree Logic (CTL) cannot express the existence of a path on which a proposition holds infinitely often (fairness for short).The scope is widened from CTL to a general branching-time logic. A path quantifier is followed by a language with temporal descriptions. In this extended setting, the said inexpressiveness is strengthened in two aspects. First, universal path quantifiers are unrestricted. In this way, they are relieved of any temporal quantifiers such as of those in $\mathtt{AU}$ and $\mathtt{AR}$ from CTL. Second, existential path quantifiers are allowed with any countable language. Instances are the temporal quantifiers in $\mathtt{EU}$ and $\mathtt{ER}$ from CTL. By contrast, the fairness statement is an existential path quantifier with an uncountable language. Both aspects indicate that this inexpressiveness is optimal with respect to the polarity of path quantifiers and to the cardinality of their languages.
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Chun, Seung Su. "The Pattern Based Visual Property Specification Language and Supporting System for Software Verifications." Applied Mechanics and Materials 752-753 (April 2015): 1090–96. http://dx.doi.org/10.4028/www.scientific.net/amm.752-753.1090.

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This paper deals with issue of properties specification for software verifications and translation between formal languages. Through this paper, the unique framework of property specifications including most kinds of formal specifications logics, automatic methods are shown by a property specifications guided system and PVSL(The Pattern based Visual property Specification Language).Additionally, a properties to specify and structures, Interconnection of them are also described by property charts. In this study, the pattern based visual property specification language (PVSL) is defined and property specifications method is also designed by convenience specifications of required property.Required properties can be described by its charts and analyzes its meaning and structures as using patterns diagrams and property and-or tree. On the other hands, it also guarantees stability and limitation of utilizations of patterns using much stronger specifying Dwyer`s meaning based property classification. The PVSL and property charts use hierarchical state machine notation to take advantage of knowledge a person who is one of practitioners has as much as possible, and for Nu-SMV, CW-CNC. They can be adapted to describe property charts and analyze into examples of CTL(Computation Tree Logic) and Modal Mu-Calculus logic that have been already used.Keywords: Patterns, Property specifications, model checking, Software verification
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Dissertations / Theses on the topic "Computation Tree Logics"

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Wagner, Daniel. "Finite-state abstractions for probabilistic computation tree logic." Thesis, Imperial College London, 2011. http://hdl.handle.net/10044/1/6348.

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Probabilistic Computation Tree Logic (PCTL) is the established temporal logic for probabilistic verification of discrete-time Markov chains. Probabilistic model checking is a technique that verifies or refutes whether a property specified in this logic holds in a Markov chain. But Markov chains are often infinite or too large for this technique to apply. A standard solution to this problem is to convert the Markov chain to an abstract model and to model check that abstract model. The problem this thesis therefore studies is whether or when such finite abstractions of Markov chains for model checking PCTL exist. This thesis makes the following contributions. We identify a sizeable fragment of PCTL for which 3-valued Markov chains can serve as finite abstractions; this fragment is maximal for those abstractions and subsumes many practically relevant specifications including, e.g., reachability. We also develop game-theoretic foundations for the semantics of PCTL over Markov chains by capturing the standard PCTL semantics via a two-player games. These games, finally, inspire a notion of p-automata, which accept entire Markov chains. We show that p-automata subsume PCTL and Markov chains; that their languages of Markov chains have pleasant closure properties; and that the complexity of deciding acceptance matches that of probabilistic model checking for p-automata representing PCTL formulae. In addition, we offer a simulation between p-automata that under-approximates language containment. These results then allow us to show that p-automata comprise a solution to the problem studied in this thesis.
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Doczkal, Christian [Verfasser], and Gert [Akademischer Betreuer] Smolka. "A machine-checked constructive metatheory of computation tree logic / Christian Doczkal. Betreuer: Gert Smolka." Saarbrücken : Saarländische Universitäts- und Landesbibliothek, 2016. http://d-nb.info/1097263258/34.

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Rahpeymai, Neda. "Data Mining with Decision Trees in the Gene Logic Database : A Breast Cancer Study." Thesis, University of Skövde, Department of Computer Science, 2002. http://urn.kb.se/resolve?urn=urn:nbn:se:his:diva-710.

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Data mining approaches have been increasingly used in recent years in order to find patterns and regularities in large databases. In this study, the C4.5 decision tree approach was used for mining of Gene Logic database, containing biological data. The decision tree approach was used in order to identify the most relevant genes and risk factors involved in breast cancer, in order to separate healthy patients from breast cancer patients in the data sets used. Four different tests were performed for this purpose. Cross validation was performed, for each of the four tests, in order to evaluate the capacity of the decision tree approaches in correctly classifying ‘new’ samples. In the first test, the expression of 108 breast related genes, shown in appendix A, for 75 patients were used as input to the C4.5 algorithm. This test resulted in a decision tree containing only four genes considered to be the most relevant in order to correctly classify patients. Cross validation indicates an average accuracy of 89% in classifying ‘new’ samples. In the second test, risk factor data was used as input. The cross validation result shows an average accuracy of 87% in classifying ‘new’ samples. In the third test, both gene expression data and risk factor data were put together as one input. The cross validation procedure for this approach again indicates an average accuracy of 87% in classifying ‘new’ samples. In the final test, the C4.5 algorithm was used in order to indicate possible signalling pathways involving the four genes identified by the decision tree based on only gene expression data. In some of cases, the C4.5 algorithm found trees suggesting pathways which are supported by the breast cancer literature. Since not all pathways involving the four putative breast cancer genes are known yet, the other suggested pathways should be further analyzed in order to increase their credibility.

In summary, this study demonstrates the application of decision tree approaches for the identification of genes and risk factors relevant for the classification of breast cancer patients

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Oliveira, Paulo de Tarso Guerra. "Revisão de modelos CTL." Universidade de São Paulo, 2010. http://www.teses.usp.br/teses/disponiveis/45/45134/tde-25032014-092409/.

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Verificação de modelos é uma das mais eficientes técnicas de verificação automática de sistemas. No entanto, apesar de poder lidar com verificações complexas, as ferramentas de verificação de modelos usualmente não fornecem informação alguma sobre como reparar inconsistências nestes modelos. Nesta dissertação, mostramos que abordagens desenvolvidas para a atualização de modelos CTL inconsistentes não são capazes de lidar com todos os tipos de alterações em modelos. Introduzimos então o conceito de revisão de modelos: uma abordagem baseada em revisão de crenças para o reparo de modelos inconsistentes em um contexto estático. Relacionamos nossa proposta com trabalhos clássicos em revisão de crenças. Definimos um operador de revisão de modelos e mostramos que este obedece postulados de racionalidade clássico de revisão de crenças. Propomos um algoritmo de revisão com base no algoritmo utilizado pela abordagem de atualização de modelos. Discutimos sobre problemas e limites do algoritmo proposto, e mostramos que essa estratégia de adaptação não é uma solução apropriada.
Model checking is one of the most robust techniques in automated system verification. But, although this technique can handle complex verifications, model checking tools usually do not give any information on how to repair inconsistent system models. In this dissertation, we show that approaches developed for CTL model update cannot deal with all kinds of model changes. We introduce the concept of CTL model revision: an approach based on belief revision to handle system inconsistency in a static context. We relate our proposal to classical works on belief revision. We define an operator for model revision and we show that it obeys the classical rationality postulates of belief revision. We propose an algorithm for model revision based on the algorithm used by the model update approach. We discuss problems and limitations of our proposed algorithm and show that this strategy of adaptation is not an appropriate solution.
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Amein, Hussein Aly Abbass. "Computational intelligence techniques for decision making : with applications to the dairy industry." Thesis, Queensland University of Technology, 2000. https://eprints.qut.edu.au/36867/1/36867_Digitised%20Thesis.pdf.

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Ye, Xin. "Model checking self modifying code." Thesis, Université de Paris (2019-....), 2019. http://www.theses.fr/2019UNIP7010.

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Le code auto-modifiant est un code qui modifie ses propres instructions pendant le temps d'exécution. Il est aujourd'hui largement utilisé, notamment dans les logiciels malveillants pour rendre le code difficile à analyser et à été détecté par les anti-virus. Ainsi, l'analyse de tels programmes d'auto-modifiant est un grand défi. Pushdown System(PDSs) est un modèle naturel qui est largement utilisé pour l'analyse des programmes séquentiels car il permet de modéliser précisément les appels de procédures et de simuler la pile du programme. Dans cette thèse, nous proposons d'étendre le modèle du PDS avec des règles auto-modifiantes. Nous appelons le nouveau modèle Self-Modifying PushDown System (SM- PDS). Un SM-PDS est un PDS qui peut modifier l’ensemble des règles de transitions pendant l'exécution. Tout d'abord, nous montrons comment les SM-PDS peuvent être utilisés pour représenter des programmes auto- et nous fournissons des algorithmes efficaces pour calculer les configurations précédentes et suivantes des SM-PDS accessibles. Ensuite, nous résolvons les problèmes sur la vérification de propriétés LTL et CTL pour le code auto-modifiant. Nous implémentons nos techniques dans un outil appelé SMODIC. Nous avons obtenu des résultats encourageants. En particulier, notre outil est capable de détecter plusieurs logiciels malveillants auto-modifiants ; il peut même détecter plusieurs logiciels malveillants que les autres logiciels anti-virus bien connus comme McAfee, Norman, BitDefender, Kinsoft, Avira, eScan, Kaspersky, Qihoo-360, Avast et Symantec n'ont pas pu détecter
A Self modifying code is code that modifies its own instructions during execution time. It is nowadays widely used, especially in malware to make the code hard to analyse and to detect by anti-viruses. Thus, the analysis of such self modifying programs is a big challenge. Pushdown Systems (PDSs) is a natural model that is extensively used for the analysis of sequential programs because it allows to accurately model procedure calls and mimic the program’s stack. In this thesis, we propose to extend the PushDown System model with self-modifying rules. We call the new model Self-Modifying PushDown System (SM-PDS). A SM-PDS is a PDS that can modify its own set of transitions during execution. First, we show how SM-PDSs can be used to naturally represent self-modifying programs and provide efficient algorithms to compute the backward and forward reachable configurations of SM-PDSs. Then, we consider the LTL model-checking problem of self-modifying code. We reduce this problem to the emptiness problem of Self-modifying Büchi Pushdown Systems (SM-BPDSs). We also consider the CTL model-checking problem of self-modifying code. We reduce this problem to the emptiness problem of Self-modifying Alternating Büchi Pushdown Systems (SM-ABPDSs). We implement our techniques in a tool called SMODIC. We obtained encouraging results. In particular, our tool was able to detect several self-modifying malwares; it could even detect several malwares that well-known anti-viruses such as McAfee, Norman, BitDefender, Kinsoft, Avira, eScan, Kaspersky, Qihoo-360, Avast and Symantec failed to detect
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Bathelt-Tok, Franziska. "Controller-Synthese für Services mit Daten." Doctoral thesis, Humboldt-Universität zu Berlin, 2017. http://dx.doi.org/10.18452/18605.

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Die steigende Nachfrage an immer komplexeren Systemen in verschiedensten wirtschaftlichen Bereichen, erfordert Strategien, die Wartbarkeit und Wiederverwendbarkeit unterstützen. An diesem Punkt setzen service-orientierte Architekturen (SOAn) an. Dieses Paradigma fordert die Aufspaltung von Funktionalität in Services, die komponiert werden können, um eine gewünschte, komplexe Funktionalität zu erreichen. Besonders in sicherheitskritischen Bereichen, kann eine fehlerbehaftete Komposition jedoch zu hohen finanziellen Einbußen oder sogar zu lebensbedrohlichen Situationen führen. Um die Korrektheit sicherzustellen, müssen Kompositionsmethoden im Vorfeld definierte Eigenschaften garantieren und die, durch die unabhängige Entwicklung auftretenden, Interface-Inkompatibilitäten behandeln. Existierende Ansätze zur automatisierten Service-Komposition durch Controller-Synthese beinhalten jedoch keine formale Datenbehandlung und können daher nicht mit datenabhängigem Verhalten umgehen. In der vorliegenden Arbeit, löse ich dieses Problem durch die Bereitstellung eines Ansatzes zur automatisierten Synthese datenabhängiger, korrekter Service-Controller. Dabei wird ein Controller direkt aus den spezifizierten Anforderungen und dem Verhalten der Services erzeugt. Basierend auf den Annahmen, dass die Anforderungen in RCTL, einer Untermenge der Computational Tree Logic (CTL), spezifiziert und die Services als Algebraische Petrinetze (APNe) gegeben sind, vereinigt mein neuartiger Ansatz die beiden Formalismen und unterstützt eine zuverlässige Extraktion des Controller-Verhaltens. Durch die Nutzung der APNe, erlaubt der Ansatz eine formale Datenbehandlung und somit eine Betrachtung datenabhängigen Verhaltens. Die Anwendbarkeit meines Ansatzes habe ich an drei Fallstudien aus dem medizinischen Bereich gezeigt, wo Geräte sicher miteinander kommunizieren müssen.
The continuously increasing demand for more complex systems in various economical domains requires a strategy that supports maintainability and reusability. This is addressed by the service-oriented architecture (SOA)}-paradigm that encourages the encapsulation of functionality into services. To achieve a specific functionality, services can be composed. Especially in safety-critical systems, an incorrect composition of various components can lead to high financial losses or even life threatening situations. To ensure the correctness, composition methods must particularly be able to guarantee pre-specified requirements and to overcome interface incompatibilities, which result from the independent development of the single services. However, current approaches for automated service composition via controller synthesis do not support a formal data-treatment and do not cope with data-dependent behavior. In this thesis, we overcome this problem by providing an approach for the automated synthesis of data-dependent service controllers that are correct-by-construction. The core idea is to synthesize such a controller directly from given requirements and the behavior of the services. Based on the assumptions that the requirements are specified using a subset of Computational Tree Logic (CTL), called RCTL, and that the services are given as algebraic Petri Nets (APNs), our novel synthesis process unifies the two formalisms and enables a reliable extraction of the controller behavior. Especially due to the use of APNs, our approach supports a formal data-treatment and enables a consideration of data-dependent behavior. With our synthesis process, which is based on a successive combination of requirements and services, we provide a practical applicable approach that works fully automatically. We show the applicability of our approach using three case studies in which medical devices interact with each other.
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Kommineni, Vasanta Lakshmi. "Model Checking Temporal Properties of Presburger Counter Systems." Thesis, 2018. https://etd.iisc.ac.in/handle/2005/4388.

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Counter systems are a well-known and powerful modeling notation for specifying infnite state systems. In this thesis we target the problem of checking temporal properties of counter systems. We address three predominant families of temporal property specifications, namely Computation Tree Logics (CTL and CTL*) and Linear Temporal Logic (LTL). We provide two novel techniques to model check LTL and CTL properties of counter systems. We then provide a third technique to model check CTL temporal properties, which uses our LTL model checking technique as a sub-routine and is a modified version of an existing technique for finite-state systems. Each of our techniques returns a Presburger formula, which encodes the set of reachable states of the given system that satisfy the given temporal property. A novel aspect of our techniques is that they perform iterative analysis using reachability analysis sub-routines of counter systems. This brings two advantages to the table. The first is that these algorithms are able to compute precise answers on a much wider class of systems than previous approaches. Secondly, they compute results by iterative expansion or contraction, and hence permit an over-approximated or under- approximated solution to be obtained at any point even in cases where termination may not occur.For each of the three techniques we propose in this thesis, we formally prove its correctness, and also give a theoretical characterization of the class of counter systems for which it can terminate with precise results. We also provide an implementation of our CTL and LTL model checking techniques. We present experimental results on standard benchmarks (such as cache coherence protocols, communication protocols, control mechanisms etc. modeled as counter systems), which demonstrate the precision as well as efficiency of our techniques.
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王常餘. "Application of computation tree logic methodon railway signaling system testing." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/37566064529019320893.

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碩士
國立臺灣科技大學
電機工程系
91
The application of the computation tree logic method on railway signaling system testing is studied in this thesis. The function of the railway signaling system is to ensure transportation safety, and to increase traffic efficiency and density. The traditional design and maintenance of the interlocking mechanism of the signaling system mostly depend on the experiences of engineers. Much time and high human cost are needed in the processing of design and maintenance. Thus, the computation tree logic is proposed to test the interlocking mechanism of the signaling system such that the development and maintenance cost can be reduced. First, the principle of the signaling system is analyzed in this thesis. Then, the software tool, LabVIEW, is used to design the railway signaling system simulator. Meantime, wireless network is adopted as the communication media in the railway signaling system simulator. Finally, a look-up table and the computation tree logic method are used to test the interlocking mechanism of railway signaling system. The experimental results show that the elapsed time of using the computation tree logic method is less then that of using look-up table method. That is, objective to shorten the design and maintenance time of the interlocking mechanism can be achieved through the use of the computation tree logic method.
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Kelly, Michael A. "The tree-like local model update with domain constraints." Thesis, 2011. http://handle.uws.edu.au:8081/1959.7/512105.

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Model update is the logical extension of model checking, allowing automated modification to models found not to satisfy a given property in the checking process. In local model update, counterexamples are derived from model checking sessions where some ACTL formula has been found unsatisfied. By updating the localised models to satisfy the underlying property, we may derive modifications to the original global model. Constraints also play an essential role in describing allowable system behaviour. Variable and action constraints can be defined which describe allowable updates on a counterexample in the update process, extending developer control over what is a valid update on the original system. In previous attempts, methods of update required the processing of the entire model. With larger scale industrial models, this was not feasible due to the inherent complexity. Further, constraints placed on the model in question were not addressed, and as such critical functionality could be circumvented (e.g. breaking a resource deadlock using some method should not cause some critical functionality of the module to cease functioning). In this dissertation, the foundations of ACTL tree-like local model update are thoroughly studied. We define necessary elements of ACTL local model update, describing ordering metrics for determining which updates are simpler with respect to weak bisimulation ordering. Further to this, we look at the link between local model update and belief revision, semantic characterisations for typical updates, analyse the complexity for general cases of update and present the theory underlying constraint automata.
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Books on the topic "Computation Tree Logics"

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1954-, Kolb Hans-Peter, and Mönnich Uwe 1939-, eds. The mathematics of syntactic structure: Trees and their logics. Berlin: M. de Gruyter, 1999.

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Bělohlávek, Radim, Joseph W. Dauben, and George J. Klir. Fuzzy Logic in the Narrow Sense. Oxford University Press, 2017. http://dx.doi.org/10.1093/oso/9780190200015.003.0004.

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The chapter examines the various propositional and predicate many-valued logics that were studied prior to the emergence of the concept of a fuzzy set in the mid-1960s, which led to the genesis of fuzzy logic in broad and narrow senses. Early ideas regarding formal systems of fuzzy logic allowed for deduction from partially true premises to partially true consequences, as suggested first by Goguen in the 1960s and further developed by Pavelka in the 1970s, and these ideas were developed from the 1990s onward. The systematic development of fuzzy logics based on t-norms and their residua, pursued under the leadership of Hájek in the 1990s, is discussed in some detail. An overview is presented of fuzzy logics that are not truth-functional, such as probabilistic, possibilistic and modal fuzzy logic. The chapter concludes by reviewing relevant additional issues, such as issues of computational complexity for fuzzy logic or higher-order fuzzy logics.
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Anderson, James A. The Brain Works by Logic. Oxford University Press, 2018. http://dx.doi.org/10.1093/acprof:oso/9780199357789.003.0007.

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Brains and computers were twins separated at birth. In 1943, it was known that action potentials were all or none, approximating TRUE or FALSE. In that year, Walter Pitts and Warren McCulloch wrote a paper suggesting that neurons were computing logic functions and that networks of such neurons could compute any finite logic function. This was a bold and exciting large-scale theory of brain function. Around the same time, the first digital computer, the ENIAC, was being built. The McCulloch-Pitts work was well known to the scientists building ENIAC. The connection between them appeared explicitly in a report by John von Neumann on the successor to the ENIAC, the EDVAC. It soon became clear that biological brain computation was not based on logic functions. However, this idea was believed by many scientists for decades. A brilliant wrong theory can sometimes cause trouble.
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(Editor), Hans-Peter Kolb, and Uwe Monnich (Editor), eds. The Mathematics of Syntactic Structure: Trees and Their Logics (Studies in Generative Grammar, 44) (Studies in Generative Grammar). Mouton de Gruyter, 1999.

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Book chapters on the topic "Computation Tree Logics"

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Mogavero, Fabio. "Graded Computation Tree Logic." In Logics in Computer Science, 3–62. Paris: Atlantis Press, 2013. http://dx.doi.org/10.2991/978-94-91216-95-4_1.

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Mansutti, Alessio. "An Auxiliary Logic on Trees: on the Tower-Hardness of Logics Featuring Reachability and Submodel Reasoning." In Lecture Notes in Computer Science, 462–81. Cham: Springer International Publishing, 2020. http://dx.doi.org/10.1007/978-3-030-45231-5_24.

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AbstractWe describe a set of simple features that are sufficient in order to make the satisfiability problem of logics interpreted on trees Tower-hard. We exhibit these features through an Auxiliary Logic on Trees (), a modal logic that essentially deals with reachability of a fixed node inside a forest and features modalities from sabotage modal logic to reason on submodels. After showing that admits a Tower-complete satisfiability problem, we prove that this logic is captured by four other logics that were independently found to be Tower-complete: two-variables separation logic, quantified computation tree logic, modal logic of heaps and modal separation logic. As a by-product of establishing these connections, we discover strict fragments of these logics that are still non-elementary.
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Konikowska, Beata, and Wojciech Penczek. "Model Checking for Multi-valued Computation Tree Logics." In Beyond Two: Theory and Applications of Multiple-Valued Logic, 193–210. Heidelberg: Physica-Verlag HD, 2003. http://dx.doi.org/10.1007/978-3-7908-1769-0_8.

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Thomas, Wolfgang. "Computation tree logic and regular ω-languages." In Linear Time, Branching Time and Partial Order in Logics and Models for Concurrency, 690–713. Berlin, Heidelberg: Springer Berlin Heidelberg, 1989. http://dx.doi.org/10.1007/bfb0013041.

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Bednarczyk, Bartosz, and Oskar Fiuk. "Presburger Büchi Tree Automata with Applications to Logics with Expressive Counting." In Logic, Language, Information, and Computation, 295–308. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-15298-6_19.

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Axelsson, Roland, Matthew Hague, Stephan Kreutzer, Martin Lange, and Markus Latte. "Extended Computation Tree Logic." In Logic for Programming, Artificial Intelligence, and Reasoning, 67–81. Berlin, Heidelberg: Springer Berlin Heidelberg, 2010. http://dx.doi.org/10.1007/978-3-642-16242-8_6.

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Nayak, Satya Prakash, Daniel Neider, Rajarshi Roy, and Martin Zimmermann. "Robust Computation Tree Logic." In Lecture Notes in Computer Science, 538–56. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-06773-0_29.

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Ciesinski, Frank, and Marcus Größer. "On Probabilistic Computation Tree Logic." In Lecture Notes in Computer Science, 147–88. Berlin, Heidelberg: Springer Berlin Heidelberg, 2004. http://dx.doi.org/10.1007/978-3-540-24611-4_5.

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Kaivola, Roope. "Axiomatising extended computation tree logic." In Trees in Algebra and Programming — CAAP '96, 87–101. Berlin, Heidelberg: Springer Berlin Heidelberg, 1996. http://dx.doi.org/10.1007/3-540-61064-2_31.

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Rensink, Arend. "Model Checking Quantified Computation Tree Logic." In CONCUR 2006 – Concurrency Theory, 110–25. Berlin, Heidelberg: Springer Berlin Heidelberg, 2006. http://dx.doi.org/10.1007/11817949_8.

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Conference papers on the topic "Computation Tree Logics"

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McCabe-Dansted, John Christopher, and Mark Reynolds. "Verification of Rewrite Rules for Computation Tree Logics." In 2014 21st International Symposium on Temporal Representation and Reasoning (TIME). IEEE, 2014. http://dx.doi.org/10.1109/time.2014.25.

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Bianco, Alessandro, Fabio Mogavero, and Aniello Murano. "Graded Computation Tree Logic." In 2009 24th Annual IEEE Symposium on Logic In Computer Science (LICS). IEEE, 2009. http://dx.doi.org/10.1109/lics.2009.28.

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Aboul-Enein, Omar, Yaping Jing, and Roger Bostelman. "Formalizing Performance Evaluation of Mobile Manipulator Robots Using CTML." In ASME 2020 International Mechanical Engineering Congress and Exposition. American Society of Mechanical Engineers, 2020. http://dx.doi.org/10.1115/imece2020-23234.

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Abstract Computation Tree Measurement Language (CTML) is a newly developed formal language that offers simultaneous model verification and performance evaluation measures. While the theory behind CTML has been established, the language has yet to be tested on a practical example. In this work, we wish to demonstrate the utility of CTML when applied to a real-world application based in manufacturing. Mobile manipulators may enable more flexible, dynamic workflows within industry. Therefore, an artifact-based performance measurement test method for mobile manipulator robots developed at the National Institute of Standards and Technology was selected for evaluation. Contributions of this work include the modeling of robot tasks implemented for the performance measurement test using Petri nets, as well as the formulation and execution of sample queries using CTML. To compare the numerical results, query support, ease of implementation, and empirical runtime of CTML to other temporal logics in such applications, the queries were re-formulated and evaluated using the PRISM Model Checker. Finally, a discussion is included that considers future extensions of this work, relative to other existing research, that could potentially enable the integration of CTML with Systems Modeling Language (SysML) and Product Life-cycle Management (PLM) software solutions.
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Bolotov, Alexander, Oleg Grigoriev, and Vasilyi Shangin. "Natural Deduction Calculus for Computation Tree Logic." In IEEE John Vincent Atanasoff 2006 International Symposium on Modern Computing (JVA'06). IEEE, 2006. http://dx.doi.org/10.1109/jva.2006.34.

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Imre, Kayhan. "Simulating the Programmable Networks for HLA Compatible High-Performance Simulators." In 36th ECMS International Conference on Modelling and Simulation. ECMS, 2022. http://dx.doi.org/10.7148/2022-0291.

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This paper explores a parallel discrete event simulator that simulates a programmable fat tree network. The programmable networks can be programmed to perform application specific tasks. The task explored in our research is a time management functionality offloaded to the network switches. Specifically, the network switches used for constructing the fat tree run Greatest Available Logical Time (GALT) computation. In this paper, this switch-based GALT computation is compared against two node-based GALT computations using the simulator developed.
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Matas, Petr, Eva Dokladalova, Mohamed Akil, Vjaceslav Georgiev, and Martin Poupa. "Parallel Hardware Implementation of Connected Component Tree Computation." In 2010 International Conference on Field Programmable Logic and Applications (FPL). IEEE, 2010. http://dx.doi.org/10.1109/fpl.2010.23.

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Liu, Yuxin, Ziyuan Zhu, Yusha Zhang, Zhongkai Tong, Wenjing Cai, and Dan Meng. "Analysis of DRAM Vulnerability Using Computation Tree Logic." In ICC 2022 - IEEE International Conference on Communications. IEEE, 2022. http://dx.doi.org/10.1109/icc45855.2022.9839097.

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Kernberger, Daniel, and Martin Lange. "Model Checking for the Full Hybrid Computation Tree Logic." In 2016 23rd International Symposium on Temporal Representation and Reasoning (TIME). IEEE, 2016. http://dx.doi.org/10.1109/time.2016.11.

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Qian, Li, and Jing Liu. "Safe Reinforcement Learning via Probabilistic Timed Computation Tree Logic." In 2020 International Joint Conference on Neural Networks (IJCNN). IEEE, 2020. http://dx.doi.org/10.1109/ijcnn48605.2020.9207384.

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Lukács, Gábor, and Tamás Bartha. "Transformation domain requirements specification into computation tree logic language." In 2022 IEEE 1st International Conference on Cognitive Mobility (CogMob). IEEE, 2022. http://dx.doi.org/10.1109/cogmob55547.2022.10117911.

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Reports on the topic "Computation Tree Logics"

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Lutz, Carsten. PDL with Intersection and Converse is Decidable. Technische Universität Dresden, 2005. http://dx.doi.org/10.25368/2022.148.

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In its many guises and variations, propositional dynamic logic (PDL) plays an important role in various areas of computer science such as databases, artificial intelligence, and computer linguistics. One relevant and powerful variation is ICPDL, the extension of PDL with intersection and converse. Although ICPDL has several interesting applications, its computational properties have never been investigated. In this paper, we prove that ICPDL is decidable by developing a translation to the monadic second order logic of infinite trees. Our result has applications in information logic, description logic, and epistemic logic. In particular, we solve a long-standing open problem in information logic. Another virtue of our approach is that it provides a decidability proof that is more transparent than existing ones for PDL with intersection (but without converse).
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