Relevant bibliographies by topics / CMOS weak inversion

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Book chapters
  4. Conference papers

Academic literature on the topic 'CMOS weak inversion'

Author: Grafiati
Published: 4 June 2021
Last updated: 13 February 2022

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Journal articles on the topic "CMOS weak inversion"

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Dokic, Branko, Tatjana Pesic-Brdjanin, and Rados Dabic. "Analytic models of CMOS logic in various regimes." Serbian Journal of Electrical Engineering 11, no. 2 (2014): 269–90. http://dx.doi.org/10.2298/sjee140106022d.

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In this paper, comparative analytic models of static and dynamic characteristics of CMOS digital circuits in strong, weak and mixed inversion regime have been described. Term mixed inversion is defined for the first time. The paper shows that there is an analogy in behavior and functional dependencies of parameters in all three CMOS regimes. Comparative characteristics of power consumption and speed in static regimes are given. Dependency of threshold voltage and logic delay time on temperature has been analyzed. Dynamic model with constant current is proposed. It is shown that digital circuit
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De Jesus-Peregrina, Rogelio, Alejandro Diaz-Sanchez, Esteban Tlelo-Cuautle, and Jose Miguel Rocha-Pérez. "A novel CMOS exponential transconductor operating in weak inversion." International Journal of Electronics 95, no. 12 (2008): 1221–28. http://dx.doi.org/10.1080/00207210802354965.

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BOZOMITU, R. G., and V. CEHAN. "New ELIN Systems Using CMOS Transistors in Weak Inversion Operation." Advances in Electrical and Computer Engineering 13, no. 4 (2013): 99–102. http://dx.doi.org/10.4316/aece.2013.04017.

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Akbari, Meysam, Omid Hashemipour, and Farshad Moradi. "Input Offset Estimation of CMOS Integrated Circuits in Weak Inversion." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26, no. 9 (2018): 1812–16. http://dx.doi.org/10.1109/tvlsi.2018.2830749.

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WANG, KEPING, XUEMEI LEI, KAIXUE MA, KIAT SENG YEO, XIANG CAO, and ZHIGONG WANG. "A CMOS LOW-POWER TEMPERATURE-ROBUST RSSI USING WEAK-INVERSION LIMITING AMPLIFIERS." Journal of Circuits, Systems and Computers 22, no. 10 (2013): 1340034. http://dx.doi.org/10.1142/s0218126613400343.

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This paper presents a low-power CMOS receiving signal strength indicator (RSSI). The main architecture of the circuit adopts a six-stage limiting amplifier (LA) in a logarithmic-linear form, which shows a good performance in weak signal detection. The RSSI achieves high tolerance to process, voltage, and temperature (PVT) variations by utilizing the unique nature of branch currents in a transconductance amplifier. The power consumption is decreased by using the weak-inversion LAs. Full-waveform current rectification and summation are employed in the RSSI circuit to achieve high precision while
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Georgiou, Pantelis, and Christofer Toumazou. "ISFET characteristics in CMOS and their application to weak inversion operation." Sensors and Actuators B: Chemical 143, no. 1 (2009): 211–17. http://dx.doi.org/10.1016/j.snb.2009.09.018.

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Papadimitriou, Konstantinos I., and Emmanuel M. Drakakis. "CMOS weak-inversion log-domain glycolytic oscillator: a cytomimetic circuit example." International Journal of Circuit Theory and Applications 42, no. 2 (2012): 173–94. http://dx.doi.org/10.1002/cta.1847.

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Malits, Maria, Dan Corcos, Alexander Svetlitza, Danny Elad, and Yael Nemirovsky. "Thermal performance of CMOS-SOI transistors from weak to strong inversion." IEEE Instrumentation & Measurement Magazine 15, no. 5 (2012): 28–34. http://dx.doi.org/10.1109/mim.2012.6314512.

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Prodanov, V. I., and M. M. Green. "Bipolar/CMOS (weak inversion) rail-to-rail constant-gm input stage." Electronics Letters 33, no. 5 (1997): 386. http://dx.doi.org/10.1049/el:19970263.

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Ma, Bill, and Feng Qi Yu. "A 1.2-V 1.76-Ppm/°C Low Voltage CMOS Band-Gap Reference." Applied Mechanics and Materials 303-306 (February 2013): 1798–802. http://dx.doi.org/10.4028/www.scientific.net/amm.303-306.1798.

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This paper proposes an innovative CMOS band-gap reference (BGR) topology with a curvature-compensation by using MOS transistors operating in weak inversion region. The mechanism is analyzed thoroughly and the corresponding BGR circuit has been implemented in standard CMOS 0.18u technology. The proposed BGR achieves 1.76 ppm/°C in the range of -40°C to 120°C at 1.2V supply voltage. In addition, it consumes only 30uA current.
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Dissertations / Theses on the topic "CMOS weak inversion"

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SALAZAR, FABIO DE ALMEIDA. "DESIGN OF LOW POWER ANALOG CMOS CELLS FROM TRANSISTORS BIAS IN WEAK INVERSION." PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO DE JANEIRO, 1996. http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=8599@1.

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COORDENAÇÃO DE APERFEIÇOAMENTO DO PESSOAL DE ENSINO SUPERIOR<br>A indústria eletrônica tem apresentado uma demanda crescente pela fabricação de aparelhos onde o baixo consumo de energia é uma das características mais importantes. Como exemplo, temos os telefones celulares, os computadores pessoais portáteis e os implantes biomédicos. Este trabalho investiga o projeto e o layout de células analógicas de consumo mil vezes menos (micropower) que os circuitos convencionais. As células desenvolvidas tanto podem ser usadas em aplicações analógicas quanto em circuitos híbridos formados por
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Remund, Craig Timothy. "Design of CMOS Four-Quadrant Gilbert Cell Multiplier Circuits in Weak and Moderate Inversion." Diss., CLICK HERE for online access, 2004. http://contentdm.lib.byu.edu/ETD/image/etd611.pdf.

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Tumati, Sanjay. "Design of large time constant switched-capacitor filters for biomedical applications." Thesis, Texas A&M University, 2004. http://hdl.handle.net/1969.1/1479.

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This thesis investigates the various techniques to achieve large time constants and the ultimate limitations therein. A novel circuit technique for the realization of large time constants for high pass corners in switched-capacitor filters is also proposed and compared with existing techniques. The switched-capacitor technique is insensitive to parasitic capacitances and is area efficient and it requires only two clock phases. The circuit is used to build a typical switched-capacitor front end with a gain of 10. The low pass corner is fixed at 200 Hz. The high pass corner is varied from 0.159H
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Singh, Rishi Pratap. "A High-Gain, Low-Power CMOS Operational Amplifier Using Composite Cascode Stage in the Subthreshold Region." BYU ScholarsArchive, 2011. https://scholarsarchive.byu.edu/etd/2510.

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This thesis demonstrates that the composite cascode differential stage, operating in the subthreshold region, can form the basis of a high gain (113 dB) and low-power op amp (28.1 µW). The circuit can be fabricated without adding a compensation capacitance. The advantages of this architecture include high voltage gain, low bandwidth, low harmonic distortion, low quiescent current and power, and small chip area. These advantages suggest that this design might be well-suited for biomedical applications where low power, low noise bio-signal amplifiers capable of amplifying signals in the milliher
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Shiraishi, Hisako. "Design of an Analog VLSI Cochlea." University of Sydney. Electrical and Information Engineering, 2003. http://hdl.handle.net/2123/556.

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The cochlea is an organ which extracts frequency information from the input sound wave. It also produces nerve signals, which are further analysed by the brain and ultimately lead to perception of the sound. An existing model of the cochlea by Fragni`ere is first analysed by simulation. This passive model is found to have the properties that the living cochlea does in terms of the frequency response. An analog VLSI circuit implementation of this cochlear model in CMOS weak inversion is proposed, using log-domain filters in current domain. It is fabricated on a chip and a measurement of a bas
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Qureshi, Muhammad Shakeel. "Integrated front-end analog circuits for mems sensors in ultrasound imaging and optical grating based microphone." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/29613.

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Thesis (Ph.D)--Electrical and Computer Engineering, Georgia Institute of Technology, 2009.<br>Committee Chair: Hasler, Paul; Committee Co-Chair: Degertekin, Levent; Committee Member: Anderson, David; Committee Member: Ayazi, Farrokh; Committee Member: Brand, Oliver; Committee Member: Hesketh, Peter. Part of the SMARTech Electronic Thesis and Dissertation Collection.
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Lin, Shin-Ta, and 林信太. "The Design and Implementation of an Ultra Low Power and Small Area CMOS Voltage Reference Based on MOSFET Operated in Weak Inversion Region." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/8492jn.

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碩士<br>國立交通大學<br>電信工程系所<br>96<br>This thesis uses standard CMOS 0.18μm process technique to design and realize a stable voltage reference which does not change with temperature. In the recent years, battery-operated systems are used extensively. Along with this tendency, we demand low-power, small-area, and high performance when designing circuits. Many analog circuits need a stable voltage reference, so the thesis shows a low-power and small-area voltage reference to apply in battery-operated systems. Proposed circuits work in weak inverse region to replace the bipolar devices in conventional
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Book chapters on the topic "CMOS weak inversion"

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Vittoz, Eric. "Weak Inversion for Ultimate Low-Power Logic." In Low-Power CMOS Circuits. CRC Press, 2005. http://dx.doi.org/10.1201/9781420036503.ch16.

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Vittoz, Eric A. "Weak Inversion for Ultimate Low-Power Logic." In Low-Power CMOS Circuits. CRC Press, 2018. http://dx.doi.org/10.1201/9781315220710-16.

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Fiorelli, Rafaella, Eduardo Peralías, and Fernando Silveira. "An All-Inversion-Region gm/ID Based Design Methodology for Radiofrequency Blocks in CMOS Nanometer Technologies." In Advances in Wireless Technologies and Telecommunication. IGI Global, 2012. http://dx.doi.org/10.4018/978-1-4666-0083-6.ch002.

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This chapter presents a design optimization methodology for analog radiofrequency (RF) blocks based on the gm/ID technique and on the exploration of all-inversion regions (from weak inversion or sub-threshold to strong inversion or above threshold) of the MOS transistor in nanometer technologies. The use of semi-empirical models of MOS transistors and passive components, as inductors or capacitors, assures accurate designs, reducing time and efforts for transferring the initial block specifications to a compliant design. This methodology permits the generation of graphical maps to visualize the evolution of the circuit characteristics when sweeping both the inversion zone and the bias current, allowing reaching very good compromises between performance aspects of the circuit (e.g. noise and power consumption) for a set of initial specifications. In order to demonstrate the effectiveness of this methodology, it is applied in the design of two basic blocks of RF transceivers: low noise amplifiers (LNAs) and voltage controlled oscillators (VCOs), implemented in two different nanometer technologies and specified to be part of a 2.4 GHz transceiver. A possible design flow of each block is provided; resulting designs are implemented and verified both with simulations and measurements.
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Conference papers on the topic "CMOS weak inversion"

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Katsiamis, A. G., and E. M. Drakakis. "Sinh filters in weak inversion CMOS technology." In 48th Midwest Symposium on Circuits and Systems, 2005. IEEE, 2005. http://dx.doi.org/10.1109/mwscas.2005.1594431.

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Cracan, Arcadie, Gabriel Bonteanu, and Radu-Gabriel Bozomitu. "A Weak-Inversion Cmos Analog Multiplier/Divider Circuit." In 2018 IEEE 24th International Symposium for Design and Technology in Electronic Packaging (SIITME). IEEE, 2018. http://dx.doi.org/10.1109/siitme.2018.8599269.

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Glaros, K. N., A. G. Katsiamis, and E. M. Drakakis. "Harmonic vs. geometric mean Sinh integrators in weak inversion CMOS." In 2008 IEEE International Symposium on Circuits and Systems - ISCAS 2008. IEEE, 2008. http://dx.doi.org/10.1109/iscas.2008.4542065.

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Anders, Jens, and Maurits Ortmanns. "Frequency noise of CMOS LC tank oscillators operating in weak inversion." In 2013 European Conference on Circuit Theory and Design (ECCTD). IEEE, 2013. http://dx.doi.org/10.1109/ecctd.2013.6662207.

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Seunghwan Baek, Hyungtae Kim, Changhwee Choi, Seungkwon Lee, and Kye eon Chang. "Large temperature coefficient PTAT current reference using weak inversion CMOS FET resistor." In 2007 Joint 50th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) and the IEEE Northeast Workshop on Circuits and Systems (NEWCAS 2007). IEEE, 2007. http://dx.doi.org/10.1109/mwscas.2007.4488789.

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Jaeger, Richard C., and Jeffrey C. Suhling. "First and Second Order Piezoresistive Characteristics of CMOS FETs: Weak through Strong Inversion." In 48th European Solid-State Device Research Conference (ESSDERC 2018). IEEE, 2018. http://dx.doi.org/10.1109/essderc.2018.8486881.

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Wang, Keping, Jiangmin Gu, Kok Meng Lim, et al. "A CMOS low-power receiving signal strength indicator using weak-inversion limiting amplifiers." In 2011 International Conference of Electron Devices and Solid-State Circuits (EDSSC). IEEE, 2011. http://dx.doi.org/10.1109/edssc.2011.6117642.

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Kompitaya, Pantre, and Khanittha Kaewdang. "A low-voltage low-power CMOS weak inversion true rms-to-dc converter." In 2011 8th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON 2011). IEEE, 2011. http://dx.doi.org/10.1109/ecticon.2011.5947779.

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Velarde-Ramirez, J., G. Vicente-Sanchez, T. Serrano-Gotarredona, and B. Linares-Barranco. "A mismatch characterization and simulation environment for weak-to-strong inversion CMOS transistors." In Microtechnologies for the New Millennium 2005, edited by Jose F. Lopez, Francisco V. Fernandez, Jose Maria Lopez-Villegas, and Jose M. de la Rosa. SPIE, 2005. http://dx.doi.org/10.1117/12.607710.

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Han, Dong, and Yuanjin Zheng. "A Low-Voltage Low-Power CMOS Weak Inversion Log Domain Auto Gain Control Module." In 2007 International Symposium on Integrated Circuits - ISIC 2007. IEEE, 2007. http://dx.doi.org/10.1109/isicir.2007.4441904.

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