Dissertations / Theses on the topic 'Class-D'
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Caballero, Angel A. 1981. "A class-D-tracking-rail class-A audio power amplifier." Thesis, Massachusetts Institute of Technology, 2004. http://hdl.handle.net/1721.1/28384.
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Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2004.Includes bibliographical references (p. 63-64).
A tracking-rail power audio amplifier was designed and partially implemented to deliver up to 100W into an 8Q load with very low signal distortion and high power efficiency. The design uses a class-A amplifier, known for its low signal distortion but low power efficiency (less than 50%), to amplify the audio signal. Class-D amplifiers, known for their high power efficiency (greater than 85%) but high signal distortion, provide a signal output that will serve as the supply voltages of the output stage of the class-A amplifier. Thus, the rails will track the audio signal, highly increasing the power efficiency of the Class-A amplifier. This amplifier can achieve a theoretical efficiency of 80%, but, in practice, it is closer to 70%.
by Angel A. Caballero.
M.Eng.
2
Hall, Fenella T. H. "Mathematical models for class-D amplifiers." Thesis, University of Nottingham, 2011. http://eprints.nottingham.ac.uk/11891/.
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We here analyse a number of class-D amplifier topologies. Class-D amplifiers operate by converting an audio input signal into a high-frequency square wave output, whose lower-frequency components can accurately reproduce the input. Their high power efficiency and potential for low distortion makes them suitable for use in a wide variety of electronic devices. By calculating the outputs from a classical class-D design implementing different sampling schemes we demonstrate that a more recent method, called the Fourier transform/Poisson resummation method, has many advantages over the double Fourier series method, which is the traditional technique employed for this analysis. We thereby show that when natural sampling is used the input signal is reproduced exactly in the low-frequency part of the output, with no distortion. Although this is a known result, our calculations present the method and notation that we later develop. The classical class-D design is prone to noise, and therefore negative feedback is often included in the circuit. Subsequently we incorporate the Fourier transform/Poisson resummation method into a formalised and succinct analysis of a first-order negative feedback amplifier. Using perturbation expansions we derive the audio-frequency part of the output, demonstrating that negative feedback introduces undesirable distortion. Here we reveal the next order terms in the output compared with previous work, giving further insight into the nonlinear distortion. We then further extend the analysis to examine two more complex negative feedback topologies, namely a second-order and a derivative negative feedback design. Modelling each of these amplifiers presents an increased challenge due to the differences in their respective circuit designs, and in addition, for the derivative negative feedback amplifier we must consider scaling regimes based on the relative magnitudes of the frequencies involved. For both designs we establish novel expressions for the output, including the most significant distortion terms.
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Burrow, Stephen George. "Low power, high efficiency Class D amplifiers." Thesis, University of Bristol, 2002. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.271779.
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Goodfellow, John Kevin. "D-class amplifiers for current waveform generation." Thesis, Imperial College London, 1999. http://hdl.handle.net/10044/1/7266.
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Pettersson, Robin, and Sahag Normanian. "Low-Consuming Class D Amplifier For Rough Environments." Thesis, Mälardalens högskola, Akademin för innovation, design och teknik, 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-12272.
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Quibell, Jason. "Digital control of a Class-D Audio Amplifier." Thesis, Cape Peninsula University of Technology, 2011. http://hdl.handle.net/20.500.11838/1116.
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Thesis (MTech (Electrical Engineering))--Cape Peninsula University of Technology, 2011Modern technologies have led to extensive digital music reproduction and distribution. It is fitting then that digital audio be amplified directly from its source rather than being converted to an analogue waveform before amplification. The benefits of using a digital controller for audio processing include being able to easily reconfigure the system and to add additional functions at a later stage.Digital audio is primarily stored as Pulse Code Modulation (PCM) while Pulse Width Modulation (PWM) is the most popular scheme used to drive a class-D amplifier. The class-D amplifier is selected in many applications due to its very high energy efficiency. Conventional PCM to PWM conversion is inherently nonlinear. Various interpolation schemes are presented in this research project which help to address the nonlinearity.Digitally generated PWM has a limited resolution which is constrained by the system clock. This thesis presents noise shaping techniques which increase the effective resolution of the PWM process without having to use an excessively high system clock. Noise shaping allows a low resolution modulator to be used to reproduce high resolution audio.
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Kong, Youxin. "Structural studies of Class A and D plexins." Thesis, University of Oxford, 2015. https://ora.ox.ac.uk/objects/uuid:e5e4aa99-e348-4dd9-97a8-bc5825c79a69.
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Semaphorin signalling via the plexin receptors, important in the nervous, cardiovascular, immune and skeletal systems, requires cytoplasmic domain dimerisation but its extracellular regulation and activation mechanisms remain unclear. In the thesis I conducted structural characterisation for two particular classes of verterbrate plexins, PlxnAs and PlxnD1. Here I present crystal structures of PlxnA1, PlxnA2 and PlxnA4 full ectodomains. The first nine domains of PlxnAs forma 230 Å long ring-like stalk fromwhich the tenth C-terminal domain points away. In agreement, negative stain electron microscopy of the PlxnA1 ectodomain reveals a predominant ring-like conformation and a minor twisted-open conformation of the stalk. All PlxnA crystal structures also make intermolecular "head-to-stalk" (domain 1 to domain 4-5) interactions, which are confirmed by structure-guided biophysical assays and live cell fluorescence microscopy. Functional assays performed in COS-7 cell and dentate gyrus growth cones revealed an autoinhibitory mechanism for PlxnAs based on this head-to-stalk interface. My results reveal a two-fold role for the PlxnA ectodomains: imposing a presignalling autoinhibitory separation of the PlxnA membrane proximal domains via a head-to-stalk, intermolecular interaction and supporting PlxnA cytoplasmic domain dimerisation post semaphorin-binding. For PlxnD1, I present high-resolution crystal structures of its semaphorinbinding segment (domains 1-2) as well as an initial structural model of its complete ectodomain (domains 1-10). The sema (domain 1) of PlxnD1 has the classic fold of a plexin sema domain as well as distinct insertions potentially important for its ligand-binding specificity. The PlxnD1 ectodomain adopts a closed-ring conformation in its crystal structure, in which the tail (domain 9) interacts with the sema domain head. In-solution experiments suggest structural variability and potential weak oligomerization for the PlxnD1 ectodomain. These new structures shed light on the unique and previously uncharacterised structural basis for PlxnD1 signalling.
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BURRA, RAVIKANTH. "DESIGN METHODOLOGIES OF CLASS D AUDIO SWITCHING AMPLIFIERS." University of Cincinnati / OhioLINK, 2005. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1123767048.
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Stark, Stefan. "Direct Digital Pulse Width Modulation for Class D Amplifiers." Thesis, Linköping University, Department of Electrical Engineering, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-8476.
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Class D amplifiers are becoming increasingly popular in audio devices. The strongest reason is the high efficiency which makes it advantageous for portable battery-driven products.
Infineon Technologies is developing products in this area, and has recently filed a patent application regarding an implementation of a part of the class D amplifier. The aim of this Master’s thesis is to evaluate a digital open-loop implementation of a class D amplifier, using the pending patent solution, and discuss the differences from an analog closed-loop implementation.
The focus has been on generating a high resolution PWM signal with a relatively low clock frequency. To achieve this, a hybrid of a counter and a self-calibrating tapped delay-line are used as a pulse generator. A model of the pulse generator was developed which made it possible to study how sampling frequency and different types of quantization affected quality parameters such as THD and SNR. With the results from the model two systems were implemented and simulated in HDL and as circuit schematics.
The proposed digital open-loop class D amplifier was found to be useful in voice-band applications and for music. Since the open-loop structure suffers from poor rejection of power supply ripple, either error correction or a regulated power supply is needed. If much effort is put on the different parts of the amplifier the result can be really good but, depending on other constraints on the system, it may be simpler and less time consuming to use the analog circuit with feedback to achieve hi-fi quality.
In summary, the combination of a counter and a self-calibrating tapped delay-line as a pulse generator is very useful in high resolution low-power systems. To avoid errors the delay-line and calibration can be made very accurate but with the expense of higher power consumption and area. However, the technique benefits from the small and fast logic devices available in deep sub-micron process technologies, which may finally lead to an advantage in power consumption and cost over the closed-loop analog solution.
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Jacobs, Deon. "Digital pulse width modulation for Class-D audio amplifiers." Thesis, Stellenbosch : University of Stellenbosch, 2006. http://hdl.handle.net/10019.1/1574.
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Thesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2006.Digital audio data storage mediums have long been used within the consumer market. Today, because of the advancement of processor clock speeds and increased MOSFET switching capabilities, digital audio data formats can be directly amplified using power electronic inverters. These amplifiers known as Class-D have an advantage over there analogue counterparts because of their high efficiency. This thesis deals with the signal processing algorithms necessary to convert the digital audio data obtained from the source to a digital pulse width modulated signal which controls a full bridge inverter for audio amplification. These algorithms address difficulties experienced in the past which prevented high fidelity digital pulse width modulators to be implemented. The signal processing algorithms are divided into modular blocks, each of which are defined in theory, designed and simulated in Matlab® and then implemented within VHDL firmware. These firmware blocks are then used to realize a Class-D audio amplifier.
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PONNAMANENI, SANJITH KUMAR. "A NOVEL AUDIO AMPLILFIER COMBINING LINEAR AND SWITCHING TECHNIQUES." University of Cincinnati / OhioLINK, 2005. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1109274094.
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Maughan, Steven Ashley. "High efficiency wide-band line drivers in low voltage CMOS using Class-D techniques." Thesis, University of Edinburgh, 2016. http://hdl.handle.net/1842/19570.
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In this thesis, the applicability of Class-D amplifiers to integrated wide-band communication line driver applications is studied. While Class-D techniques can address some of the efficiency limitations of linear amplifier structures and have shown promising results in low frequency applications, the low frequency techniques and knowledge need further development in order to improve their practicality for wide band systems. New structures and techniques to extend the application of Class-D to wide-band communication systems, in particular the HomePlug AV wire- line communication standard, will be proposed. Additionally, the digital processing requirements of these wide-band systems drives rapid movement towards nanometer technology nodes and presents new challenges which will be addressed, and new opportunities which will be exploited, for wide-band integrated Class-D line drivers. There are three main contributions of this research. First, a model of Class-D efficiency degradation mechanisms is created, which allows the impact of high-level design choices such as supply voltage, process technology and operating frequency to be assessed. The outcome of this section is a strategy for pushing the high efficiency of Class-D to wide band communication applications, with switching frequencies up to many hundreds of Megahertz. A second part of this research considers the design of efficient, fast and high power Class-D output stages, as these are the major efficiency and bandwidth bottleneck in wide-band applications. A novel NMOS-only totem pole output stage with a fast, integrated drive structure will be proposed. In a third section, a complete wide-band Class-D line driver is designed in a 0.13μm digital CMOS process. The line driver is systematically designed using a rigorous development methodology and the aims are to maximise the achievable signal bandwidth while minimising power dissipation. Novel circuits and circuit structures are proposed as part of this section and the resulting fabricated Class-D line driver test chip shows an efficiency of 15% while driving a 30MHz wide signal with an MTPR of 22dB, at 33mW injected power.
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Engstrand, Johan, Niklas Kavathatzopoulos, and Jonathan Nordenholm. "Simulation and Construction of a Half-Bridge Class D Audio Amplifier." Thesis, Uppsala universitet, Fasta tillståndets elektronik, 2018. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-353789.
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Usage of class D audio amplifiers has become increasingly widespread in recent years, mainly due to their high efficiency, which can reach almost 100 %. Class D amplifiers can also be compact, making them suitable for mobile applications. In contrast, the most efficient conventional amplifiers such as class B can reach a maximum efficiency of 78.5 %. The high efficiency of class D amplifiers can be attributed to the switching stage, which in the case of a half-bridge design consists of two amplifying MOSFETs. These MOSFETs are never on at the same time, which minimizes the quiescent current and thereby the power losses. The goal of this project was to design, simulate and construct a half-bridge class D audio amplifier. A working amplifier with 80 % efficiency was built, with power losses occuring mainly in the voltage regulators. Simulations of the amplifier corresponded well with the constructed amplifier apart from issues originating from the aforementioned voltage regulation as well as the triangle wave generator. The goal of the project was achieved and the finished amplifier possessed good sound quality and little unwanted noise. To further improve on the design, better voltage regulation, a full-bridge configuration and a feedback loop could be utilized.
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Carroll, Matthew J. "First Order Self-Oscillating Class-D Circuit with Triangular Wave Injection." DigitalCommons@CalPoly, 2021. https://digitalcommons.calpoly.edu/theses/2303.
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An investigation into performance improvements to the modulator stage of a class-D amplifier is conducted in this thesis. Two of the standard topologies, namely class-D open-loop pulse-width modulation (PWM), and the improved self-oscillating feedback system are benchmarked against a topology which includes both a hysteretic comparator in a feedback loop and triangle wave injection. Circuit performance is analyzed by comparing how the triangle injection circuit handles known issues with open-loop and self-oscillating circuits. Using this analysis, it is shown that the triangle injection topology offers an improved power supply rejection ratio relative to open-loop PWM and reduces distortion generated by frequency modulation characteristic of the self-oscillating topology.
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Mohsin, Taif. "Design of a predriver for an EDMOS-based Class-D power amplifier." Thesis, Linköpings universitet, Elektroniska komponenter, 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-98133.
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This thesis addresses the potential of implementing a predriver for class-D power amplifier for WLAN in 65 nm CMOS technology. In total, eight different predrivers have been created using Cadence Virtuoso CAD tools. All designs have been tested using Agilent's Advance Design System (ADS) and simulated using the ADS-Cadence dynamic link. Furthermore, a comparison between the eight designs and the reference design has been done. The examined parameters were output power (Pout), efficiency, and effective area consumption. The simulation results show that most of the proposed designs obtain higher output power, higher efficiency, and lower effective area than the reference design. For the reference design, output power of 34.2 dBm, efficiency of 20.8 %, and effective area of 63952 um2 were obtained. For design No.1, the effective area was 31511um2, which was almost half of the area occupied by the reference design. For design No.3, the efficiency was 71.2 %, which was almost 3 and half times higher than the efficiency of the reference design. Furthermore, all designs, except design NO.7, gave more or less the same output power (around 34.4 dBm).
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Totir, Monica Andreea. "RAMAN CRYSTALLOGRAPHIC STUDIES OF INHIBITOR REACTIONS IN CLASS A AND D BETA-LACTAMASES." online version, 2007. http://rave.ohiolink.edu/etdc/view?acc%5Fnum=case1171039284.
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Kemp, Pieter Stephanus. "The design of an analogue class-D audio amplifier using Z-domain methods." Thesis, Stellenbosch : Stellenbosch University, 2012. http://hdl.handle.net/10019.1/20084.
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Thesis (MScEng)--Stellenbosch University, 2012ENGLISH ABSTRACT: The class-D audio power amplifier has found widespread use in both the consumer and professional audio industry for one reason: efficiency. A higher efficiency leads to a smaller and cheaper design, and in the case of mobile devices, a longer battery life. Unfortunately, the basic class-D amplifier has some serious drawbacks. These include high distortion levels, a load dependent frequency response and the potential to radiate EMI. Except for EMI, the aforementioned issues can be mitigated by the proper implementation of global negative feedback. Negative feedback also has the potential to indirectly reduce EMI, since the timing requirements of the output devices can be relaxed. This thesis discusses the design of a clocked analogue controlled pulse-width modulated class-D audio amplifier with global negative feedback. The analogue control loop is converted to the z-domain by modelling the PWM comparator as a sampling operation. A method is implemented that improves clip recovery and ensures stability during over-modulation. Loop gain is shaped to provide a high gain across the audio band, and ripple compensation is implemented to minimize the negative effect of ripple feedback. Experimental results are presented.
AFRIKAANSE OPSOMMING: Die klas-D klankversterker geniet wydverspreide gebruik in beide die verbruiker en professionele oudio industrie vir een rede: benuttingsgraad. ’n Hoër benuttingsgraad lei tot ’n kleiner en goedkoper ontwerp, en in die geval van draagbare toestelle, tot langer batterylewe. Ongelukkig het die basiese klas-D klankversterker ernstige tekortkominge, naamlik hoë distorsievlakke, ’n lasafhanklike frekwensierespons en die vermoë om EMI te genereer. Behalwe vir EMI kan hierdie kwessies deur die korrekte toepassing van globale negatiewe terugvoer aangespreek word. Negatiewe terugvoer het ook die potensiaal om EMI indirek te verminder, aangesien die tydvereistes van die skakel stadium verlaag kan word. Hierdie tesis bespreek die ontwerp van ’n geklokte analoog-beheerde pulswydte-modulerende klas-D klankversterker met globale negatiewe terugvoer. Die analoogbeheerlus word omgeskakel na die z-vlak deur die PWM vlakvergelyker as ’n monster operasie te modelleer. ’n Metode word geïmplementeer wat die stabiliteit van die lus verseker tydens oormodulasie. Die lusaanwins word gevorm om ’n hoë aanwins in die oudioband te verseker en riffelkompensasie word geïmplementeer om die negatiewe effek van terugvoerriffel teen te werk. Eksperimentele resultate word voorgelê.
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Peruzzi, Robert O. "A novel amplifier system combining class D D/A conversion and low-power class AB operation /." Diss., 2004. http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqdiss&rft_dat=xri:pqdiss:3154563.
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Liao, Ching-Chuan, and 廖慶全. "Low Power Class D Audio Amplifiers." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/18167353982077172633.
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碩士逢甲大學
電子工程所
94
Discrete amplifier designs based on the class-D topology are not new, but recent advances in semiconductor technology have generated a renewed interest in using the topology in integrated circuit based audio power amplifiers. The motivating factor driving research in class-D-based ICs is efficiency. Their increased efficiency provides two main advantages over class-AB amplifiers. The first advantage is the reduction of supply current required which translates to longer run-time on batteries, or reduced power supply requirements which translates to lower-cost, smaller power supply designs. The second advantage class-D audio power amplifiers offer is the reduction of heat generated which translates to more output power in a smaller package, and elimination of heat sinks. These two advantages make class-D audio power amplifiers attractive to consumer electronics. A single-chip high-efficiency 1.5V class-D audio power amplifier is presented in this paper. This class-D audio power amplifier has the efficiency of 90%. A 8ohms load is used for amplifier design. The lowest total harmonic distortion is 0.38% when 500kHz triangle wave is used. In this work, the designed circuit fabricated by TSMC 0.35 m CMOS technology is a kind of analog integrated circuit.
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Friedberg, Andrew Seth. "Characterization of class D VPS proteins." 2003. http://edissertations.library.swmed.edu/pdf/FriedbergA031103/FriedbergAndrew.pdf.
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Liao, Tze Ru. "Delta Sigma Modulated Class D Audio Amplifier." 2006. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-1907200611045200.
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Ming-Jhe, Du. "CMOS Highly-Efficient Class-D Audio Amplifier." 2006. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-2507200601495000.
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Huang, Yanfu, and 黃彥輔. "A Class D Amplifier With EMI Reduction." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/52790726521083903022.
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碩士國立臺北大學
電機工程研究所
100
This paper presented a single-chip Class-D audio amplifier with electromagnetic interference (EMI) reduction. It was fabricated using TSMC 0.35-µm standard CMOS process. Passive components has been implemented in ratio which made them process and voltage insensitive. It has a simulated EMI reduction of 12dB, total harmonic distortion (THD) at the speaker terminals of less than 0.17%. An efficiency of 92% can be achieved with an 8-Ω speaker. The maximum output power was 191mW (rms) from a single 3.3-V power supply, and the stand-by power consumption was only 1.44mW (load connected). This work demonstrated the feasibility of implementing Class-D amplifiers with a high-end audio performance for portable devices.
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HWA-YUAN, LIU, and 劉華元. "Digital Input Class-D Audio Amplifier Design." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/04894591351221180693.
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碩士中華技術學院
電子工程研究所碩士班
96
Abstract Due to power saving is current trend for portable electronic product and it is very import to design a system. Although audio amplifier design and application focus quality before,but people are leading concern for efficiency to use consumer product now. First, this master thesis introduce traditional audio amplifier structure and characteristic of Class A,B,AB, moreover, we compare with digital input audio amplifier Class D.we also detail various characteristics and advantage of Class D in the preceding chapter. The major content is discussed how to design a digital input modulator of Class D. We design this digital structure include gain control、3 stage filter、5 order 6 bits sigma-delta modulator and PWM. Per our analysis form actual measurement we have to observe if we achieve original opinion, or not? Maybe we can obtain a way to improve the defects further.
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Tsai, Chun-Hao, and 蔡俊豪. "Design of Filterless Class D Audio Amplifier." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/22201137769579819716.
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碩士國立臺灣大學
電機工程學研究所
95
Over the years, the commercial audio amplifiers are dominated by Class AB amplifier. However, most of Class AB amplifier power efficiency is below 70%, which reduces the overall system battery lifetime and increases the heat dissipation. Therefore, the Class D amplifier with the advantages of high efficiency has been widely investigated recently comparing to the Class AB amplifier. A Class-D amplifier with conventional PWM modulation requires an output filter which needs large area and increasing cost. Therefore, we use unipolar switching pulse width modulation scheme to realize a filterless Class-D power amplifier. In this thesis, we focus on the implementation of Class D amplifier on a monolithic integrated circuit. We observed that the total harmonic distortion (THD) increases due to non-linearity in the triangular wave. To overcome this problem, negative feedback is applied to reduce the harmonic distortion. The circuit is designed using TSMC (2P4M) 0.35um 3.3V CMOS process. The entire circuit contains an error amplifier, two hysteresis comparators, a triangular wave generator, gate-driver circuits, and the H-bridge. The details of the entire circuit will be described thoroughly in this thesis. When a 0.4V, 1KHz input sine wave is applied, the maximum THD is 0.13% and the efficiency is 88.5%.
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Ru, Liao Tze, and 廖澤儒. "Delta Sigma Modulated Class D Audio Amplifier." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/15258309802344855509.
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碩士國立臺灣大學
電子工程學研究所
94
In the portable devices such as PDA, MP3 player or mobile phone and mobile amusement system, the battery life is a very important issue. In order to strengthen the battery lifetime, the high power efficiency will be better. The efficiency of power amplifier is very important. The traditional class A or class AB have lower efficiency than class D. The efficiency of class D will achieve 100% theoretically. The class D audio amplifier is usually with PWM modulator or delta sigma modulator to transform the input signal to a series of pulse signal to control the class D circuit. The traditional PWM modulator or delta sigma modulator are all with clock circuit inside. In order to reduce the clock circuit, a delta sigma modulator with hysteresis comparator is presented in this thesis. In this topology, we can save the chip area and also can achieve a good performance in THD and efficiency. The THD is 0.9% and the efficiency is 87% with 10K Hz input signal in this thesis.
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Du, Ming-Jhe, and 杜明哲. "CMOS Highly-Efficient Class-D Audio Amplifier." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/06790414067614930660.
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碩士國立臺灣大學
電子工程學研究所
94
A one-chip integrated circuit of a 2-W class-D audio power amplifier with very high efficiency using a CMOS technology is presented. Compared with traditional class-AB amplifiers that are very poor at efficiency, most below 50%, the proposed class-D amplifier has the efficiency of 90% at the smaller distortion level. The class-D amplifiers generate pulse-width-modulated (PWM) signals by comparing a triangle-wave with input-signals. An output stage with zero dead time and high efficiency is applied to improve the linearity and reduce wasted battery energy. An approach to reducing distortion is applied by using feedback calibration.
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Chen-Si, Lin, and 林岑思. "A Full-Bridge Class-D Amplifier Using." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/h263r4.
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碩士國立交通大學
電機與控制工程系所
93
The objective of this thesis is to design a Class D audio amplifier based on Finite Receding Horizon Quadratic Optimal Control. Comparing to the traditional Class A or Class AB amplifiers, audio amplifiers based on Class D topology are more efficient in terms of energy conversion and have low cost. An important aspect of digital signal processing is the impact of quantization errors. In this thesis, we focus on the topic about quantization errors and define a cost function, which is utilized to minimize a measure of the quantization distortion by using finite receding horizon quadratic optimal control. We propose a Multi-Step Optimal Converter, which can be implemented as a feedback loop. It embeds Sigma-Delta Modulation in a more general setting and typically provides better performance. Class D amplifiers commonly rely on Pulse-Width Modulation to generate the output switching waveforms which gives rise to more serious problems in unwanted harmonics . On the other hand, using Multi-Step Optimal Converter, it is possible to design the loop filter so that the harmonic distortion is reduced. This thesis will analyze and implement a stable digital Multi-Step Optimal Converter, USB interfaces, and a switching power stage to complete a full digital audio amplifier.
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Wen, Tsai-sheng, and 溫在勝. "A FILTERLESS DIGITAL CLASS-D AUDIO AMPLIFIER." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/77717355543363797232.
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碩士大同大學
電機工程學系(所)
105
Class-D amplifiers become more and more important on the personal mobile system, because of their high efficiency. A conventional class-D amplifier needs a low-pass filter between the output stage and the speaker, but these filters which need to endure high output power usually quite bulky. This design uses filterless technology to eliminate the problem and reduce the circuit area. These days, many companies use USB interface to replace the traditional audio jack. Filterless class-D amplifiers output the digital signal directly, and thus have the potential on these kinds of applications. This thesis will review analog UPWM, digital PWM, digital PDM, and mixed-signal architectures, and make comparison. A chip using digital PDM architecture has been implemented with TSMC 0.18μm CMOS process and the standard cell library provided by TSMC. There is a 16-bit input data bus on this chip. The simulated THD of this chip could achieve 0.000059%. The chip area of the circuit is about 1.27 .
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LIN, MENG-TSUNG, and 林孟聰. "A Study on Class D Power Amplifiers." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/95485157620106631756.
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碩士中華大學
電機工程學系
105
In recent years, portable devices are very popular, such as Notebook computer, smart phone, mobile phone, handheld electric toys, and portable video game. The battery life, power efficiency and standby time are expected and required, so high power-efficient devices will be used in portable devices. Likewise, the most efficient Class D power amplifiers are used for audio. This thesis gives a brief introduction to the linear audio power amplifiers, and discusses their problems, such as low efficiency and high power consumption. In this thesis, in order to design the target class D amplifier to make comparison, I briefly introduced the linear audio power amplifiers and discussed their problems, such as low efficiency and high power consumption. In the thesis, the design of Class D amplifier circuit, and the use of computer-aided design software simulation and implementation of the test to verify the characteristics of Class D amplifier, such as magnification, total harmonic distortion, and efficiency. In this design, negative feedback, anti-aliasing filter, comparator, dead time control, output power driver, and output LC filter are included. The goal of design is based on 30W output power and 20dB voltage gain. After the implementation and tested, got a set of result, such as gain, total harmonic distortion, and power efficiency. The gain error is less than 5%, and its total harmonic distortion is less than 0.58% at 1W output. The power efficiency is better than 90% when output power is in the maximum. The DC power consumption increasing follows output power linearly. There still needs basic power consumption in the absence of output signal. The basic power consumption is derived from the linear regulator and the internal circuit. It can be improved by changing the regulator to a switching-mode regulator.
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SHIH-HSIANG, LIN, and 林世祥. "High Efficiency Class-D Audio Amplifier Design." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/17599257173454224387.
Full textAbstract:
碩士聖約翰科技大學
電子工程系碩士班
97
For the fast growing of electric products, the consumer electronic products are designed toward the direction of tiny and portable. Audio amplifiers are mass needed in these products. The major demands of the consumer products, for example, are: power dissipation, product volume, and heat radiation. The most important design parameter of these is power efficiency. Increasing the power efficiency, it not only lasts the Class-D amplifier battery lives, but also operates in an extra low operating temperature. This paper designs Class-D amplifies based on self-tuning master-slave architecture and sliding mode control architecture. They are implemented with TSMC 0.35um 2P4M CMOS process. By using double triangle-wave generators and double feedback circuits in self-tuning mater-slave architecture, the efficiency of Class-D amplifier is increased and the total harmonic distortion (THD) is decreased. The chip size is 1.575mm x 1.575mm. The measure results show that when the input voltage is 0.6V, the power dissipation is 204mW, and the power efficiency is 89%. Second, the sliding mode control Class-D amplifier is using the sliding mode control modulation and bridge-configured architecture. The chip size is 1.575mm x 1.575mm. The simulation results show that when the input voltage is 0.6V, the power dissipation is 2.13W, and the power efficiency is 90.2%.
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Chen, Ruei-Chang, and 陳瑞昌. "A Novel Class－D Amplifiers Chip Design." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/96319750878183260955.
Full textAbstract:
博士大葉大學
電機工程學系
101
ABSTRACT This paper presents the design and implementation of a novel Class-D amplifiers chip. With low-power, high-performance, small area, and high speed, these circuits are employed in portable computer systems, such as the power circuits, electronic circuits, video and music amplifiers circuits, communications and control circuits, wireless communication and high-frequency circuit systems. This Class-D chip followed the chip implementation center advanced design flow, and then was fabricated using Taiwan Semiconductor Manufacturing Company 0.35-μm 2P4M mixed-signal CMOS process. The chip supply voltage is 3.3 V which can operate at a maximum frequency of 100 MHz. The total power consumption is 2.8307 mW, and the chip area size is 1.016 mm ×1.016 mm. Finally, the Class-D chip was tested and the experimental results are discussed. From the excellent performance of the chip verified that it can be applied to audio amplifiers, communications control, etc. Key Words : Class-D, audio amplifier, pulse width modulation, control system
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KuhWun-Rung and 柯文仁. "Design and Implementation of Class D Audio Amplifier." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/45953404292422340546.
Full textAbstract:
碩士崑山科技大學
電機工程研究所
95
This thesis is a study on Class D audio amplifier. By using unipolar pulse width modulation(PWM), current tracking, and PID compensator, the output current can follow the input acoustic signal. This design is quite different from those of traditional amplifiers. The output filter is not required here as the output current is such close to the input signal. First the Matlab and Simulink is used to find the constants of the PID controller by trial and error. Secondly, the Pspice is used to simulate the entire circuit. High speed elements have been chosen for the circuit application to make the design results satisfactory. The simulation results and the implementation ones are quite matched.
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Cheng, Yuan-Kai, and 鄭元凱. "A Class D Amplifier Using Current Controlled PWM." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/08917668981814968442.
Full textAbstract:
碩士國立臺北大學
電機工程研究所
98
This paper presents a single-chip digital audio amplifier based on a current controlled pulse width modulator and a power-efficient switching (Class-D) output-stage fabricated in TSMC 0.18-µm standard CMOS process. It has a measured total harmonic distortion (THD) at the speaker terminals of less than 0.2%. An efficiency of 86% can be achieved with an 8-Ω speaker. The maximum output power is 191mW (rms) from a single 1.8-V power supply, and the stand-by power consumption is only 1.44mW (load connected). This work demonstrates the feasibility of implementing Class-D amplifiers with a high-end audio performance for portable devices.
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Liu-Pane-you and 劉邦祐. "Sigma-Delta Modulation Class-D Dgital Power Amplifier." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/89847845166835096545.
Full textAbstract:
碩士國立臺灣科技大學
電子工程系
93
A Class D power amplifier by sigma-delta modulation (SDM) is proposed. Cycle-by-cycle control loop is adopted in converting the analog signal into a digital one. Except a constant pulse time to detect the sampled input signal level, a duty period is generated by a discharging/charging rate generated in SDM and its length is dependent on the detected input level and is a multiple of the constant sampling pulse time. Signal process and system model for converting the analog signal into digital one through the SDM modulator is explored. A prototype of 100W class D power amplifier is examined for assessing the theoretical investigation and practicality. The power efficiency is over 87%. The total harmonic distortion (THD) measured without EMI filter is less than 4%.
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Li, Jian-hui, and 李建輝. "Low Voltage Low Power Class D Power Amplifier." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/17460053027990432960.
Full textAbstract:
碩士國立中山大學
電機工程學系研究所
92
Class D power amplifier applies in high efficiency circuit. In hearing aid system, we require high power efficiency, low-voltage and low-power. The operation of frequency is low frequency. All the circuits are designed based on the TSMC 035 CMOS process technology. The supply voltage is 1.5V and the input signal is 4KHz. Simulation results show that the Class D power efficiency is high efficiency amplifier. When 0.3V of 2KHz input signal is applied, The maximum THD is 0.63% and static current is 4uA and the efficiency is 83.6%.
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Li, Jyun-Yu, and 李俊育. "Battery chargers with Class D-E Resonant converter." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/g7f4zg.
Full textAbstract:
碩士崑山科技大學
電機工程研究所
97
The lead-acid batteries has economic benefits, and widely used in various applications such as automotive power system, uninterruptible power system telecom power supply, and so on. However, charge the battery with the charger after the electric energy is used. The main aim of this thesis is to improve the charge efficiency and prolong the battery lifetime. Accordingly, a battery charge with class D-E resonant converter is proposed in this thesis. In the proposed battery chargers with Class D-E resonant converter bears the advantages such as simpler circuit structures, smaller volume, lighter weight, higher efficiency, low switching loss, as well as lower cost. An L-C resonant tank is used that results in oscillating output voltage and charging current and thus provides zero-voltage and/or zero-current switching. The operating principles and equivalent circuit are analyzed and discussed in detail. Simulation and experimental results are conducted for a 12V-12Ah lead-acid battery to verify the feasibility, can reach an efficiency higher than 80%.
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Lin, Sheng-Chi, and 林聖淇. "A Delta-Sigma Modulator-Based Class-D Amplifier." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/5a7vbz.
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SU, PO-KAI, and 蘇柏愷. "Electromagnetic interference analysis for Class-D Audio Amplifier." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/6r76wx.
Full textAbstract:
碩士國立雲林科技大學
電子工程系
105
Electromagnetic Interference may be generated by operating of Electrical equipment and electronic product, so as to interfere in operation of other equipment, and even affecting human health. Switching frequency of each transistor must work rapidly in order to obtain better performance of Class D audio amplifier. This is the main source of Electromagnetic Interference. This thesis proposes that used frequency-hopping triangular wave as a carrier of Class D audio amplifier. It causes high power of harmonic no longer concentrated on switching frequency, and spreading the power into a narrow frequency range. This method can obviously reduce Electromagnetic Interference of output signal. Frequency Hopping triangular wave consists of Linear Feedback Shift Register、 Window Comparator, and the setting current circuit in this thesis. Linear Feedback Shift Register consisted of D flip flops and XOR gate. It generates numbers of pseudo random codes when triggered, and these codes separately control the transistors that cause different current to charge or discharge the capacitor of the setting circuit, so we can obtain a triangular wave with difference frequency; Window Comparator fixes the voltage on the range of and of capacitor. This circuit is fabricated by TSMC 3.3V-0.18μm process, load of the buzzer is 8ohm. According to experiment results, the total-harmonic distortion (THD) is about 53dB、 the signal-to-noise ratio (SNR) is about 74dB and the reduction of EMI is about 13dB of the thesis.
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Wu, Chi-Shuo, and 吳啟碩. "Design and Implementation of Class-D Audio Amplifier." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/45775832435825156603.
Full textAbstract:
碩士國立中央大學
電機工程研究所碩士在職專班
98
The purpose of this paper is to explore the design and implementation of class-D audio amplifier. It is known that class-D amplifier is a nonlinear system. Somehow, in conventional method, class-D amplifier is usually designed through linear model. This indirect method in class-D amplifier design could not analyze the stability of the system directly. In this study, several significant class-D amplifiers in the literatures have been reviewed, and DSMs (Delta-Sigma Modulators) was chosen to be the A/D (Analog to Digital) converter for the class-D audio amplifier due to the low cost, simple circuit and accuracy in A/D converting. The sliding mode control design methodology is developed for designing the continuous time integrator DSMs. It effectively solves the problem for not analyzing the system on the stability in conventional way of designing DSMs. Meanwhile it also improves the drawbacks of DSMs which could only reach up to 50% modulation in stable operation and output data rates are more than 1MHz. In this paper, the design of second and third order DSMs are presented. The proposed DSMs enables the modulation rate up to 75% in stable operation and output data rate are decreased to 100kHz〜250kHz. Furthermore, some parts of the D/A(Digital to Analog) in the system, which includes the shift of DSMs output levels, power MOSFET gate driver, switching output stage, and lossless low-pass filter for filtering high frequency switching noise, are analyzed and implemented as the practical needs. A completed design method of class-D audio amplifier is presented in this study. The proposed amplifier exhibits the features in fast response, strong robustness, easy to implement, and can be produced directly by the commercial electronic elements. Experimental result confirms that the proposed design approach is surely feasible. In the 3.5 ohm load with the RMS output power of 100 watts, the measured maximum power efficiency is 80%, and THD+N that is less than 0.73%, and SNR of 75dB.The proposed class-D audio amplifier can be applied to general audio needs, and is more suitable for the application of the public broadcasting systems that require high efficiency, high power output, such as the air defense alarm system, disaster warning system, outdoor public address system, etc.
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Chang, Chin-Han, and 張晉漢. "Design & Comparison of the Class D & Class E Power Amplifiers for Ultrasonic Frequencies." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/85133086829535082785.
Full textAbstract:
碩士國立臺灣大學
工程科學及海洋工程學研究所
103
Ultrasound technology began to develop in the late 19 century. With the related study, there are many applications and integrations; for example, one of mechanical and electrical integration method in thesis mentioned that PA signals transform into acoustic energy and spread the energy, and then the acoustic energy converts into electrical energy as computing. In this case, we must know the correct ultrasounic piezoelectric transducer impedance values during working time first. In order to make the measurement of impedance values in limited environment more close to the measurement of impedance values in the no-flection interference, we have adopted a new method of calculation, discussing in whether limited environment will cause the impedance error. Generally speaking, in the transmitting system, it cause much more energy in the power amplifier. The higher efficiency the power amplifier can reach, the less unnecessary consumption the system can reduce and the device can also be used longer. There are more Class D PAs applications deigned than Class E PAs for ultrasounic frequencies, so we want to design Class D & E power amplifiers and compare them in overall transfer efficiency. Compared with Class E sine wave signal, Class D output is square wave signal and the latter efficiency will not be 100 % correspond to the theory. This article will focus on designing Class D & E power amplifiers and compare with their advantages & disadvantages in the same load; moreover, Class E PAs have better power and efficiency than Class D PAs for ultrasoundic frequencies.
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Chuang, Yao-Jen, and 莊耀任. "A Class D Power Amplifier with Passive RC Feedback." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/97534591938302323752.
Full textAbstract:
碩士國立中山大學
電機工程學系研究所
93
The primary advantage of Class D amplifier is high power efficiency (typically >90%). However, there are two problems in open-loop Class D design: Total Harmonic Distortion (THD) and output dc static current (the power efficiency will be degraded). The THD is rising from non-ideal sample carrier in Pulse Width Modulation circuit, and output dc static current is due to the non-match transfer characteristic in output stage. For designer to have such problems will be a large load. To improve these two problems, we proposed a Class D power amplifier with passive feedback design. Simulation and Measurement results show that the power efficiency is higher than 90% at 250Hz ~ 4KHz. Furthermore, the THD is less than 0.24% at 4 KHz in both simulation and experimental results.
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CHEN, WEI-MING, and 陳威銘. "Multilevel Class D Audio Amplifier Using Active Inductor Technique." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/ftwxxp.
Full textAbstract:
碩士國立雲林科技大學
電子工程系
106
With the advancement and trend of technology, it is nothing more than portable electronic products that are small in size, low in cost, high in efficiency, and so on. In the field of audio systems, Class D Audio Amplifier has been widely used in it, especially 4C products. Because of its high efficiency and small size, it is not available in other types of audio amplifiers. In this study, we propose a multilevel converter based on active inductor architecture to design a class D audio amplifier with multilevel output signals to convert the original two-level signal into a multi-level signal. The multilevel technique is composed of a time-division-adder (TDA) and a multilevel converter with an active-inductor (AI) followed by modulator. Each active inductor is segmented into a small set of multiple equal-sized, small drive current active inductors, and the modulated two-level signal is quickly quantized into a decimal number by using a time-division-adder. The number of small sets that are required to be activated by the active inductor is controlled according to the drive current required by its load, and the same output power is achieved with a minimum of working circuits, which greatly reduces unnecessary power consumption on the circuit. Active inductors are composed of several operational transconductance amplifiers (OTAs) and a fixed capacitor. The circuit characteristics are similar to those of general inductors. According to its use of the differential loop of the operational transconductance amplifier, and control the input bias current source of the operational transconductance amplifier, the equivalent inductance of the elastically adjustable transconductance value g_m can be formed. However, the active inductor is applied to the multilevel converter, and the voltage division characteristic between the inductors is utilized to generate a multi-level output signal of equal voltage difference.
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Liao, Yu-Cheng, and 廖育晟. "Filterless Class-D Audio Amplifier with Multi-Level Converter." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/64940196094663101083.
Full textAbstract:
碩士國立暨南國際大學
電機工程學系
101
In this thesis, we implement two different audio amplifiers architecture, research target is purpose to improve better SNR and THD. This thesis can be divided two part： The first part, we use 0.18μm CMOS technology provided by TSMC, design a clock free class-D audio amplifier. In circuit architecture, we use a simple two-stage operation amplifier as a comparator, generating pulse width modulation. Make analog signal convert to digital signal, and reduce distortion situation, and through the power amplification circuit to increase the current, purpose to increase power of pulse width modulation. The last part is a low pass filter composition of inductance, capacitance and speaker. It can revert pulse width modulation to original analog signal, and drive to latter stage speaker load. The second part, this circuit is also use 0.18μm CMOS technology provided by TSMC, design a filterless class-D audio amplifier with multi-level converter. The basic architecture is multi-level signal. Multi-level architecture can roughly divided to five parts：1. Comparator 2.Shift registers 3.Combined full adder 4.Decoder 5.Multi-level converter. In this method, pulse width modulation signal is arrange too many time divisions and integrate into a binary form. Binary form is decoded to control signal for multi-level converter. Multi-level converter will convert multi-level signal to speaker, replace traditional two-stage signal. So improve THD and SNR without sacrificing power efficiency. Since, this work can be used in any class-D audio amplifier, designing by insert shift registers and adder behind modulator and replace output stage with multi-level converter.
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Chang, Bo-Chun, and 張博鈞. "EMF of Class-D Audio Amplifier on Biological Effect." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/18274522921760725698.
Full textAbstract:
碩士國立臺灣科技大學
電子工程系
97
The research in this literature is intended to explore the Class-D audio power amplifier; a digitized traditional analog audio power amplifier which could generate ELF & RF electromagnetic effect on humankind body. A particular setup environment of experiment in this research results the ELF & RF powers generated from Class-D audio power amplifier are larger than the traditional analog audio power amplifier, the ELF power is significant and its electromagnetic effect must be considerable on humankind body is in according with the ICNIRP regulation. Two live examples of ELF protective methods of the experimental device have been demonstrated as well at the chapter 6 of this literature.
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Sun, Shao-Ming, and 孫紹茗. "Circuit Implementation of A PWM Class-D Audio Amplifier." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/44144231676284639499.
Full textAbstract:
碩士國立成功大學
電機工程學系碩博士班
94
The Class-D amplifier, for its high efficiency, has drawn much attentions recently. However, due to its switching operation, the linearity is needed to be improved by comparing with conventional linear amplifiers. Therefore, the negative feedback is applied in this thesis to reduce the harmonic distortion for better linearity. In addition, to avoid the shoot through current due to both power transistors are switched on at the same time, the dead time control is adopted. The over-current protection circuit is also added to prevent the short circuit by poor wire connection. The large current induced by the short circuit would destroy the overall system potentially. A single-ended input, differential output Class-D audio amplifier with pulse-width modulation (PWM) is implemented with TSMC 0.35um 2P4M 3.3V/5V Mixed Signal CMOS process. The active area of the amplifier is around 0.99 x 0.93 mm2, and the total area is 1.3 x 1.3 mm2. The simulation results show 90dB of SNR and 82% of efficiency can be achieved. THD is around 0.045% while Class-D amplifier deliver 240mW.
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Hsu, Ming-Jeng, and 許明政. "Tissue Thermal Effect Studies of Class D RF Transmission." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/22611326969713406278.
Full textAbstract:
碩士中原大學
醫學工程研究所
94
In general, implantable biomedical devices require electrical power to perform its functionality. In this course, a class-D based radio frequency (RF) power amplifier was developed for transmitting electrical energy from an external device to an implanted unit. The output power of the transmitter can be as high as several hundred watts (W) which is significantly higher than those emitted from class-E based transmitters. As the high output power can potentially damage tissues caused by thermal effects, safety issues must be taken into account. Specific Absorption Rate (SAR) in watts per kilogram (W/kg) is a measure at which RF energy is exposed to an element or mass of a biological body. In other words, the SAR is a measurement of the heat absorbed by tissues. Thus understanding the distribution of the SAR in tissues is important in studying potential tissue damage when RF power is applied. In conducting the SAR distribution studies, the RF electromagnetic frequency and energy of 1.1 MHz/10 W were exposed on a stack of pork for 5 minutes. The pork was either lean meat or fat with densities 969.7 kg/m3 and 729.3 kg/m3, respectively. Both lean meat and fat were examined on a set of pre-defined locations. For those locations, the amplitudes of the electrical field and the temperatures before and after the RF exposures were recorded. The SAR values can be derived from the recorded electric fields. The study results show that the maximum SAR values are 5.58 and 2.95 in lean and fat tissues, respectively. Based on these values, it means that the heat produced by the RF power can be used to predict the lean and fat tissues raise 0.4787±0.0705 ℃ and 0.4027±0.0151 ℃, respectively. As to the recorded temperature changes, the lean meat and the fat tissue increased 0.3171±0.0723 ℃ and 0.5028±0.0360 ℃, respectively.
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Sung, Tsai-Yi, and 宋彩義. "The Modulation Design of Filterless Class-D Power Ampliifer." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/01251727905384279246.
Full textAbstract:
碩士國立清華大學
電子工程研究所
93
Abstract Amplifiers play an important role in audio system. Class-AB amplifiers seem to be the dominative design in recent market. Compared to power efficiency, class-D amplifiers have better performance than class-AB amplifiers. It is based on the fact that class-D amplifiers use the switching operation to fully turn on or off the transistors. Class-D amplifiers have less power dissipation than class-AB amplifiers. The focus on this thesis is to develop the modulation of class-D amplifier with high power efficiency. This circuit uses TSMC 0.35 2P4M (Mixed-Signal) process to design and simulate. It includes two error amplifiers, two comparators, triangular wave generator, buffer, gate-driver, and H-bridge. All the modulation simulations are shown in this thesis, and we can obviously compare their advantages and disadvantages. If THD < 1 % is desired, then it’s better to choose the amplitude of the input signal to be within 0.7 times of the carrier wave. In fact, the power efficiency of class-D is about 85 % to 95 % generally. If we still want to increase the power efficiency, then we must make our mind to balance the power efficiency against the chip size.
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Feng, Yu. "Integrated Distortion Suppression Circuit for a High Fidelity Digital Class-D Audio Amplifier." Thesis, 2009. http://hdl.handle.net/1807/18294.
Full textAbstract:
Due to the lack of feedback networks, digital class D amplifiers operating in open loop typically have inferior performance when compared to analog class D amplifiers in closed loop configuration. This thesis presents an integrated distortion suppression circuit design for digital class D amplifiers, which forms a feedback loop around the output stage. This circuit suppresses the output stage distortion and noise by equalizing the modulator effective duty ratio and the output stage effective duty ratio. The suppression circuit is integrated with the class D modulator. An integrated class D amplifier output stage is implemented separately using a 0.35μm HV-CMOS technology. Experimental results confirm that the closed loop PSRR is improved by 15dB. The THD+N value is reduced by a factor of 2 to 30. The minimum THD+N is 0.03%, which is among the state of the art class D amplifiers.
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Ben-Jong, Yu, and 于本中. "Realization Study of Class-D Dimmable Fluorescent Lamp Electronic Ballast." Thesis, 1998. http://ndltd.ncl.edu.tw/handle/50307485559509904580.
Full textAbstract:
碩士國立臺灣科技大學
電子工程技術研究所
86
This thesis presents an analysis and design of Class-D series resonant parallel loaded dimmable fluorescent lamp electronic ballast. The igniting behavior and dimming performance of the fluorescent lamp operating in high-frequency are explored. In this paper, The models of fluorescent lamp before and after ignition are built, those emphasize that the fluorescent lamp is actually treated as an impedance consisting of resistance and capacitance. Energy conservation is used to estimate the ignition condition for fluorescent lamp. Preheating time, igniting voltage and current are derived according to the presented models. These parameters are dependent one another for a constant ignition energy, and are almost independent of the operation frequency. A new harmonized strategy for breaking the acoustic resonance in the fluorescent lamp under low-level dimmer is proposed. Due to the energy spread, the acoustic resonance disappears and no helical form (Snake-Like) occurs in the lamp at low-level dimmer. A prototype of realizing a 80W dimmable electronic ballast is conducted. The computer simulations and experimental results from a lab prototype are provided to verify the theoretical predictions. Realization Study of Class-D Dimmable Fluorescent Lamp Electronic Ballastzeng