Dissertations / Theses on the topic 'Circuiti analogici'
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Cota, Erika Fernandes. "ATPG para teste de circuitos analogicos e mistos." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 1997. http://hdl.handle.net/10183/117097.
Full textThis work aims at studying the testing problems related to analog and mixedsignal circuits. This kind of research is very useful nowadays, since there is a great demand for circuits that need some kind of interaction between analog and digital blocks. This document presents a method and an automatic test pattern generation tool aplicable to the detection of soft, large and hard fault in linear and non-linear circuits. This method considers, also, interaction faults and computes diagnose vectors that garantee maximal fault coverage. At first. a brief review of methods. approaches and related works is presented. Then. the fault model used and the test methodology are defined. and an ATPG tool is proposed. Next, the ATPG algorithm is applied to a linear and to a non-linear circuit. The test vector generation process and the test vectors computed are then shown. After that a way to automatize the ATPG tool is discussed under the light of those commercial tools that were used in this work. Finally. the conclusions and results are presented.
Silva, Jose Carlos da. "Conversor digital quaternario para analogico." [s.n.], 2005. http://repositorio.unicamp.br/jspui/handle/REPOSIP/260604.
Full textTese (doutorado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de Computação
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Resumo: Neste trabalho é apresentada a lógica múltiplo valor como opção para substituir ou ser usada como interface com a lógica binária. A lógica múltiplo valor difere da lógica binária clássica devido ao fato que os seus dígitos estão além de zeros e uns. Utilizando a lógica múltiplo valor consegue-se comunicação em entre blocos ou com o mundo externo a um chip com menor número de interconexões, o que acarretará a diminuição da área do circuito integrado e redução de custos. Pesquisadores e industria caminham para a pesquisa e desenvolvimento de circuitos múltiplos valores, que podem substituir ou ser utilizados como interface com os circuitos de dois valores (binários). Este trabalh o apresenta o desenvolvido do projeto de um conversor digital quaternário para analógico que tem quatro entradas e resolução equivalente a um conversor digital binário para analógico de oito entradas. Este conversor foi confeccionado totalmente em tecnologia CMOS 0.35µm, tendo como resultado um protótipo de um circuito integrado múltiplo valor que contém todas as células de um conversor digital binário para analógico. Este conversor apresenta consumo de potência abaixo de 1mW, alimentação simples de 5V e compactação (900µm x 235µm)
Abstract: In this work is presented the multiple value logic as option to substitute or to be used as interface with the binary logic. The multiple value logic differs of the classic binary logic to the fact that its digits are beyond zeros and ones. Using the multiple logic value obtains communication in between blocks or with the external world to one chip with lesser number of interconnections, what it will cause the reduction of the area of the integrated circuit and reduction of costs. Researchers and industry walk for the research and development of multiple values circuits, that can substitute or be used as interface with the circuits of two values (binary). This work presents the developed one of the project of a quaternary digital to analog converter that it has four inputs and resolution equivalent to a binary digital to analog converter of eight inputs. This converter was confectioned totally in technology CMOS 0.35µm, having as resulted an prototype of an integrated circuit multiple value that contains all the cells of a binary digital to analog converter. This converter presents consumption of power below of 1mW, simple voltage of 5V and compacting (900µm x 235µm)
Doutorado
Eletrônica, Microeletrônica e Optoeletrônica
Doutor em Engenharia Elétrica
Seixas, Junior Luis Eduardo. "Interface analogica de um circuito integrado decodificador F-2F." [s.n.], 2003. http://repositorio.unicamp.br/jspui/handle/REPOSIP/260339.
Full textDissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e Computação
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Mestrado
Galan, Carla de Freitas. "Simulação analogica de linhas de transmissão utilizando-se circuitos integrados." [s.n.], 1994. http://repositorio.unicamp.br/jspui/handle/REPOSIP/261411.
Full textDissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica
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Resumo: Este trabalho tem por objetivo o desenvolvimento de uma ferramenta didática, baseada em circuitos integrados para a simulação analógica de linhas de transmissão. Os resultados obtidos proporcionam uma análise quantitativa das tensões e correntes presentes ao longo de uma linha de transmissão. Realizar uma Simulação Analógica de uma Linha de Transmissão requer a escolha do modelo para representá-la e dispor dos parâmetros estimados da mesma. Neste sentido, foi feito um estudo das Linhas de Transmissão com a finalidade de determinar o modelo a ser implementado. Assim como, realizou-se um estudo das configurações possíveis de serem obtidas através de Amplificadores Operacionais. Na implementação foram consideradas as relações entre as equações dos parâmetros da linha s das aplicações com operacionais, fazendo-se uma analogia, bem como, uma equivalência das grandezas envolvidas na Linha de Transmissão e no hardware desenvolvido. Para implementar o circuito proposto, utilizou-se como exemplo três linhas reais, do sistema ANDE/ITAIPU, sendo uma curta, uma média e uma longa. Os resultados foram verificados através de cálculos analógicos e simulações no software SPICE íd2, tanto das linhas reais como do circuito projetado. Tais resultados mostraram-se adequados aos propósitos iniciais deste presente trabalho
Abstract: The main goal of this work was the development of a didatic tool, based on integrated circuits, for the analog simulation of transmission lines. The obtained results allow for a quantitative analysis of the currents and voltages along the line. Initially, a study of transmission line models were carried out. As the circuit was implemented with operational amplifiers based cells, this components and its basic configurations were also analysed. The basic idea of the circuit, was to simulate each transmission line equation by a suitable operational amplifier based circuit, in wich the mathematical relation between output and input voltages were the same of the equation being represented. The units of the quantities being represented were scaled to be compatible with the voltage levels present at the simulating circuit. To test the circuit, comparisons were made between circuit analysis, SPICE simulations and the results provided by the circuit for three real lines, a short, a medium and a long one, chosen from the ANDE/ITAIPU system. Good concordancy were achieved for all cases and the circuit has considered to have fulfilled the initial proposal of the project
Mestrado
Mestre em Engenharia Elétrica
França, Eliane. "Projeto de um circuito integrado para geração de sinais analogicos." [s.n.], 1989. http://repositorio.unicamp.br/jspui/handle/REPOSIP/261414.
Full textDissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica
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Resumo: Não informado
Abstract: Not informed.
Mestrado
Mestre em Engenharia Elétrica
Rossini, Michael. "Progettazione e realizzazione di un circuito per l'amplificazione di segnali analogici provenienti da una pedana dinamometrica." Bachelor's thesis, Alma Mater Studiorum - Università di Bologna, 2017. http://amslaurea.unibo.it/13890/.
Full textCouto, Andre Luis do. "Caracterização de memorias analogicas implementadas com transistores MOS floating gate." [s.n.], 2005. http://repositorio.unicamp.br/jspui/handle/REPOSIP/260078.
Full textDissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de Computação
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Resumo: A integração de memórias e circuitos analógicos em um mesmo die oferece diversas vantagens: redução de espaço nas placas, maior confiabilidade, menor custo. Para tanto, prescindir-se de tecnologia específica à confecção de memórias e utilizar-se somente de tecnologia CMOS convencional é requisito para tal integração. Essa pode ser tanto mais eficiente quanto maior a capacidade de armazenagem de dados, ou seja, maior a densidade de informação. Para isso, memórias analógicas mostram-se bem mais adequadas, posto que em uma só célula (um ou dois transistores) podem ser armazenados dados que precisariam de diversas células de memórias digitais e, portanto, de maior área. Neste trabalho, transistores MOS com porta flutuante mostraram-se viáveis de serem confeccionados e resultados de caracterização como tipos de programação, retenção de dados e endurance foram obtidos. O trabalho apresenta as principais características dos FGMOS (Floating Gate MOS) e presta-se como referência à futuros trabalhos na área
Abstract:Monolithic integration of memories and analog circuits ,in the same die offers interesting advantages like: smaller application boards, higher robustness and mainly lower costs. Today, a profitable integration of these kind of circuit can only be possible using conventional CMOS technology, which allows efficiently extraordinary levels of integration. Thus, the possibility of integrating analog memories looks more suitable since one single cell (usually use one or two transistors) serves for storing the same data stored by few digital memory cells, therefore, they requiring less area. In this work, it was implemented different memory cells together with few devices using floating gate MOS transistors and manufactured by a conventional CMOS technology. Differemt sort of programrning', data retention, and endurance were characterized as well as the main characteristics of the FGMOS (Floating Gate MOS) were obtained. The results of their characterization reveal that is possible to make and' to program fIoating gate MOSFETS analog memories and must serve as starting-point and reference for new academic studies
Mestrado
Eletrônica, Microeletrônica e Optoeletrônica
Mestre em Engenharia Elétrica
Telles, Antonio Carlos da Costa 1963. "Desenvolvimento de um sistema de controle adaptativo LMS visando implementação analogica." [s.n.], 2001. http://repositorio.unicamp.br/jspui/handle/REPOSIP/264117.
Full textDissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Mecanica
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Resumo: As vantagens inerentes do controle adaptativo tais como flexibilidade e otimização estão hoje restritas a aplicações onde esquemas tradicionais não apresentam o desempenho esperado. Tal situação se deve principalmente ao alto custo dos sistemas adaptativos, que normalmente se apoiam em técnicas de processamento digital de sinais. Contudo sistemas adaptativos em hardware de baixo custo vem sendo propostos para a área de comunicações há vários anos. Este trabalho investiga a viabilidade do desenvolvimento de um sistema de controle em hardware com a aplicação dos sistemas adaptativos anteriormente citados. O esquema proposto é uma variação do controle feedjorward LMS, amplamente utilizado no controle de vibração e ruído. Este esquema é modificado com a introdução de um modelo a ser seguido pelo controlador, o que lhe atribui maior flexibilidade de desempenho. O esquema é avaliado através do controle de vibração de uma viga flexível por meio de simulações e experimentos. O esquema, originalmente apresentado para controle em tempo discreto, é modificado para que o processamento seja feito totalmente em tempo contínuo. Este novo esquema é avaliado por meio de simulações, novamente através do controle da viga flexível. Os resultados mostram que o sistema proposto pode ser uma opção viável aos esquemas tradicionais de controle, alargando o espectro de aplicações do controle adaptativo LMS pela apresentação de uma solução em hardware de baixo custo
Abstract: The inherent advantages of adaptive control such as flexibility and optimization are nowadays restricted to the areas where other conventional schemes do not reach the specified performance. Such situation is due mainly to the high cost of these systems, which are normally based on Digital Signal Processing techniques. However low cost adaptive hardware solutions have been proposed to the communications area for a long time. This work investigates the feasibility of the development of a LMS adaptive control hardware, with the application of the adaptive systems solutions already mentioned. The proposed system is a variation of the LMS feedforward control, which has broad application in noise and vibration control. This scheme is modified with the introduction of a model to be followed by the controller which introduces more flexibility to its performance. The system performance is evaluated in the control of a flexible beam vibration, through simulations and experiments. The original scheme, developed to discrete time control, is then modified to continuous time processing. Simulations of this new scheme are developed again in the control of the flexible beam. The results show that the proposed system can be an option to more conventional control schemes, broadening the field of applications of LMS adaptive control by means the presentation of a low cost hardware implementation
Mestrado
Mecanica dos Sólidos e Projeto Mecanico
Mestre em Engenharia Mecânica
Santos, Marilia dos. "Projeto de um circuito somador analogico de tensões integrado de baixo erro, em tecnologia CMOS." [s.n.], 1994. http://repositorio.unicamp.br/jspui/handle/REPOSIP/262035.
Full textDissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica
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Resumo: Neste trabalho é apresentado o procedimento de projeto e os resultados do desenvolvimento de um circuito somador de tensões, integrado em tecnologia CMOS, cuja faixa dinâmica dos sinais de entrada abrange os limites da fonte de alimentação. Diferente da configuração clássica, que utiliza um amplificador operacional numa estrutura realimentada, o circuito desenvolvido opera em malha aberta e resulta da combinação de dois blocos operacionais mais simples, um conversor linear Tensão-Corrente com saídas complementares e um espelho de corrente. A soma ou subtração das tensões de entrada resulta da soma ou subtração das correntes produzidas por dois conversores lineares Tensão-Corrente as quais são refletidas sobre um mesmo conversor Corrente-Tensão (ativo ou passivo) através de espelhos de corrente. Sob o ponto de vista sistêmico estes blocos operacionais mais simples ocupam um nível hierárquico inferior ao do circuito somador. Este, por sua vez, combinado com outros circuitos que também ocupam níveis hierárquicos de complexidade dentro de uma biblioteca de células, comporão blocos mais complexos, permitindo assim, a síntese de sistemas analógicos de forma estruturada. O trabalho descreve as etapas de desenvolvimento do somador, onde se incluem circuitos realizados em duas rodadas do programa PMU, o CMOS-7 e CMOS-8. O desenvolvimento do conversor linear Tensão-Corrente é descrito no Capítulo 1: O projeto deste conversor enfoca a tecnologia CMOS poço-N para a sua implementação, tendo em vista sua disponibilidade via o programa PMU. Como resultado, foi constatado que devido ao efeito de corpo nos transistores canal-N, o conversor apresenta uma não linearidade na conversão V/I, cuja amplitude ultrapassa o erro máximo correspondente à precisão de 10 bits pretendida. Para compensar este erro induzido pelo efeito de corpo é mostrado que uma simples mudança nas razões geométricas dos transistores é uma solução eficiente. A análise e justificativas para a determinação do espelho de corrente mais apropriado são apresentadas no Capítulo 2. A descrição do projeto, resultados de análises e medidas do circuito somador são apresentados no Capítulo 3. O trabalho inclue, no Apêndice A, a análise do comportamento AC de um espelho de corrente simples MOS, evidenciando que em certas condições este se comporta como um sistema de fase não mínima
Abstract: Not informed.
Mestrado
Mestre em Engenharia Elétrica
Acco, Edson Santos. "Contribuição ao estudo do fenomeno de injeção de carga em chaves analogicas MOS." [s.n.], 1994. http://repositorio.unicamp.br/jspui/handle/REPOSIP/261317.
Full textDissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica
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Resumo: Este trabalho apresenta um estudo teórico-experimental sobre o fenômeno de injeção de carga, que ocorre em circuitos a capacitores chaveados durante a transição de abertura das chaves analógicas MOS. Inicialmente é feita uma análise teórica sobre esse fenômeno, abordando as estratégias reportadas até então, para minimizar o efeito de injeção de carga. Um estudo sobre a formação de cargas no canal do transistor MOS é apresentado. Comprovam-se, experimentalmente, as curvas teóricas que a literatura apresenta. É apresentada, tanibém, uma proposta para equiparticionar a injeção de carga que, entretanto, não pode ser caracterizada devido ao não funcionamento do CI implementado no PMUCMOS.5. Finalmente, apresenta-se um circuito experimental bastante consistente que corrige o erro causado pela injeçào de carga introduzida pela chave MOS
Mestrado
Mestre em Engenharia Elétrica
Silva, Marly Guimarães da. "Metodologia semi-custom : um ambiente de projeto de circuitos analogicos dedicado a um "analog-array"." [s.n.], 1988. http://repositorio.unicamp.br/jspui/handle/REPOSIP/259318.
Full textDissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica
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Resumo: Os circuitos integrados analógicos de pequena e media complexidade podem, a exemplo dos circuitos digitais, ser confeccionados usando circuitos integrados semidedicados ("semi-custom"). Com esta técnica o projetista necessita apenas realizar as interconexões entre os dispositivos pré-difundidos na lâmina de silício. Entre as várias vantagens da utilização desta metodologia de projeto, podemos citar: baixo custo; rapidez na execução do projeto; rapidez na correção de algum eventual erro no projeto; rapidez na confecção do circuito integrado. Neste trabalho apresentamos o projeto de um "chip semi-custom" do tipo ¿array¿-analógico, em tecnologia bipolar, bem como o desenvolvimento de um suporte de C.A.D. dedicado ao "array"-analógico projetado. Este C.A.D., denominado "Array-Software", consiste de Editor Gráfico, Extrator de Interconexões, Verificador de Regras de Projeto a nível de metalização e Gerador de Padrões para cortes de máscara em Rubylith, compatível com o sistema usado no LED/UNICAMP. Por fim, analisamos os resultados obtidos nos ensaios de implementação de funções analógicas típicas, com o auxílio das ferramentas de projeto desenvolvidas
Abstract: Analog SSI and MSI Integrated Circuits. as the digital circuits, can be fabricated with semi-custom master-slíces. When using this technique, the design engineer needs only to make the ínterconnectíon of pre-diffused devices on the silicon wafer. Among the advantages of using this lmethodology. we can mention: low cost. fast design turn-around time. easy and quick correction of eventual mistakes. extremely fast processing turn-around for the IC. This work presents the design of an analog-array in bipolar technology and the development of a CAO suport for this master-slice. The CAO consists of a Graphics Editor, a Circuit Extractor,a Design Rule Checker and Pattern Generator, that is compatible with the Rubylith art-work generator system that is currently being used in the LED/UNICAMP. Finally, the results obtained with the complete design cycle with some typical analog cells implemented in the ànalog-array are discussed.
Mestrado
Mestre em Engenharia Elétrica
Teixeira, Margarida Rosa dos. "A abordagem da electricidade através do uso de analogias: caso de circuitos eléctricos simples." Master's thesis, Universidade de Aveiro, 2010. http://hdl.handle.net/10773/1083.
Full textA Dissertação que se apresenta resulta da necessidade de concretizar uma nova perspectiva de escola e de ensino das ciências, num novo conceito de ensino por pesquisa, baseado numa actividade experimental que procura fazer a analogia do circuito eléctrico com o circuito da água, tendo em conta o interesse crescente na utilização de analogias na área da Educação em Ciências, numa tentativa de colmatar as dificuldades sentidas pelos profissionais da educação na leccionação de conceitos tão abstractos como os da electricidade. Numa primeira fase pretendeu-se construir material didáctico para ser implementado no ensino da Física do Ensino Básico, nomeadamente no estudo do circuito eléctrico, recorrendo ao estudo do circuito da água e da relação entre as suas grandezas, que possibilita o aluno visualizar fenómenos análogos aos do circuito eléctrico. Numa segunda fase e após a confirmação dos resultados obtidos da analogia, elaborou-se um guião para professores, com o fim de contribuir para a formação dos docentes com mais uma ferramenta pedagógica alternativa numa perspectiva de ensino por pesquisa. Foi realizada uma Oficina Pedagógica com professores e os resultados obtidos são muito interessantes. Espera-se que esta dissertação possa contribuir para melhorar práticas lectivas.
The thesis that is presented on the need to achieve a new perspective on school and teaching of science, a new concept of education for research, based on experimental work which seeks to make the analogy of electrical circuit with the circuit water in an attempt to address the difficulties faced by education in the teaching of abstract concepts such as electricity. Initially we intended to build material to be implemented in physics teaching of basic education, particularly in the study of the electrical circuit, by studying the water circuit and the relationship between their magnitudes, which allows the student to see similar phenomena in the electrical circuit. The second phase of the confirmation of the results of the analogy has been drawn up a guide for teachers, in order to contribute to the training of more teachers with a pedagogical alternative perspective for educational research. Educational Workshop was realized to teachers and the results are very interesting. It will be hoped that this work can contribute to better teaching practices.
Abel, Jerian. "Students' conceptual modeling of simple DC electric circuits during computer-based instruction." Diss., This resource online, 1995. http://scholar.lib.vt.edu/theses/available/etd-06062008-170004/.
Full textPereira, Adriano Marques. "Estudo dos problemas para implementação de uma biblioteca de espelhos de corrente dinamicos aplicada a projetos de circuitos analogicos." [s.n.], 1997. http://repositorio.unicamp.br/jspui/handle/REPOSIP/261898.
Full textDissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de Computação
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Resumo: Devido a enorme gama de aplicações onde os espelhos SI são empregadas, tais como redes neurais, filtros, conversores D/A e ND, toma-se interessante a implementação de uma biblioteca de espelhos de corrente dinâmicos. Considerando-se o espelho SI como um bloco de uma biblioteca, tal como um flip-flop ou uma porta lógica, as aplicações onde ele é utilizada podem ser implementadas empregando-se uma metodologia "standard cell". Além disso, toma-se possível o projeto de circuitos analógicos mais complexos utilizando quase que somente um simulador comportamental, tipo o HDLA [16]. Para viabilizar a implementação desta biblioteca, é necessário a definição de uma metodologia de projeto para os espelhos, bem como encontrar soluções para as dificuldades na caracterização dos espelhos. Para definir a metodologia de projeto, são investigados e equacionados todos os problemas que acarretam erros na memorização da corrente e definidas alternativas para minimiza-los. Como conseqüência, obteve-se uma topologia de circuito que é facilmente ajustada em função da precisão e freqüência de operação do espelho. A precisão e a freqüência geralmente são grandezas inversamente proporcionais. As alternativas de projeto para os problemas que acarretam erros na cópia da corrente memorizada, são escolhidas de forma não implicar em grandes perdas na freqüência de operação, de tal forma que se possa obter espelhos de corrente dinâmicos de alta precisão e alta freqüência de operação. As soluções encontradas para a caracterização de espelhos SI levaram ao projeto de um sistema de medição, que permite a completa caracterização do espelho. No projeto do sistema de medição esta incluído o projeto de um circuito integrado de interface necessário para realizar as medições no espelho dinâmico. A caracterização dos protótipos dos circuitos de interface mostrou que o mesmo possui uma THD menor que 0,04%. O sistema de medição é capaz de caracterizar espelhos SI com precisão da ordem de 450 ppm operando a freqüência de 3 MHz
Mestrado
Mestre em Engenharia Elétrica
Simayi, Ayanda Njongi. "The use of contextually appropriate analogies to teach direct current electric circuit concepts to isiXhosa speaking learners." Thesis, Nelson Mandela Metropolitan University, 2014. http://hdl.handle.net/10948/d1016161.
Full textFARY, FEDERICO. "Integrated Circuits Design in Down-scaled Technologies for Wireless Applications." Doctoral thesis, Università degli Studi di Milano-Bicocca, 2021. http://hdl.handle.net/10281/301984.
Full textIn the last 30 years, Mobile Telecommunication (TLC) electronics proved to be one of the major driving motors in the development of new Complementary Metal-OxideSemiconductor (CMOS) technologies. This limited branch of the electronics world managed to move billions of dollars worldwide, some of which unavoidably ended up in financing advanced research projects to answer market demands. People all around the world ask for extremely performing portable devices, faster, more reliable, low power consuming and with impressive memory capability. To answer all these requests, physics and engineers developed new and incredibly down-scaled technology nodes, which met the high speed and low power consumption requirement, granting an impressive circuital density. Nowadays foundries such as TSMC or Samsung are able to manufacture incredibly small transistor devices, with channel length in the order of only 7 nm and transition frequency in the order of several hundreds of GHz. This situation has become extremely favorable for the development of high-performance digital devices, which are able to reach speed and memory capability previously unbelievable. Nonetheless, also analog building blocks must be integrated in deeply down-scaled node, in order to adapt with digital ICs. First task of this thesis work is to develop analog ICs in deep sub-micron technology nodes, such as 28 nm bulk-CMOS and 16 nm FinFET (Fin Field Effect Transistor). This has been accomplished facing several difficulties given by the very poor analog behavior of such advanced technologies, especially in terms of low transistor intrinsic gain and limited signal headroom, caused by the low supply voltage. The second task of this work is to develop these same analog ICs in order that they meet requirements of the most advanced TLC standards, such as LTE and 5G. The increased number of portable devices worldwide made in fact unavoidable the introduction of new communication standards, in order to face the huge number of connected devices. This work presents 4 building blocks that can be exploited in every next generation transceiver device. In detail, this work analyzes though extended simulations and measurements 3 Base-Band analog filters and 1 variable gain amplifier, suitable for 5G applications. These designs have been developed in 28nm CMOS and 16 nm FinFET. Each design shows the most important difficult that was faced for its realization and highlight the most important performances of every prototype device, with an extensive confrontation with the State-of-the Art. The first device is a 6th Order Rauch based analog filter, which exploit a large bandwidth amplifier to achieve low quality factor sensitivity and high linearity performances. The second is a 3rd order variable gain amplifier, with low noise and high linearity performances, suitable to be integrated in a Full-Duplex 5G transceiver Base-Band section. The third and fourth devices are Source-Follower-based 4th order filters with very low noise and low power performances. One exploit the Flipped-Source-Follower architecture, while the second integrates an innovative Fully-Differential Super-Source-Follower topology. This last design also exploits the advanced FinFET technology, which shows better intrinsic gain, in order to maintain high linearity performances, despite the Fully-Differential configuration.
Fazanaro, Filipe Ieda 1980. "Estudos e implementações de dinamica caotica utilizando dispositivos analogicos reconfiguraveis." [s.n.], 2007. http://repositorio.unicamp.br/jspui/handle/REPOSIP/259582.
Full textDissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de Computação
Made available in DSpace on 2018-08-10T17:06:39Z (GMT). No. of bitstreams: 1 Fazanaro_FilipeIeda_M.pdf: 19685014 bytes, checksum: ee8bcce451b826c1bc278cf9a7e3d214 (MD5) Previous issue date: 2007
Resumo: Este trabalho teve como principal objetivo estudar a tecnologia baseada em dispositivos Field Programmable Analog Arrays (FPAAs) e identificar os benef'icios quanto ao seu uso em aplicações de identificação de fenômenos inerentes aos sistemas dinâmicos não-lineares, tais como bifurcações e caos. Esses dispositivos permitem que diferentes tipos de circuitos possam ser implementados sem a necessidade de alteração da topologia do circuito, ou seja, existe a possibilidade de que os sistemas possam ser reconfigurados em tempo de execução à medida que novas alterações sejam necessárias. Com base na Teoria do Caos e na Teoria de Sistemas de Controle, foi implementado o sistema conhecido como Circuito de Chua, que serviu para demonstrar os ganhos que se podem obter com o uso da abordagem proposta quando aplicada ao estudo de sistemas dinâmicos operando no caos em relação às técnicas consideradas mais convencionais. Resultados obtidos pela análise de séries temporais de sinais adquiridos, comprovam a grande eficiência dessa abordagem quanto ao tempo de desenvolvimento e ao tempo para a obtenção dos resultados em comparação com implementações de modelos dinâmicos bastante conhecidos na literatura em relação às implementações dos mesmos em computadores
Abstract: This work had as main objective to study the technology based on Field Programmable Analog Arrays (FPAAs) devices and to identify the benefits to use these devices in applications of identification of inherent phenomena to the nonlinear dynamic systems as bifurcations and chaos. These devices allow that different types of circuits can be implemented without the necessity of alteration of the topology of the circuit, that is, the systems implemented in the FPAA can be reconfigured in execution when new alterations are necessary. On the basis of the Chaos Theory and in the Control Systems Theory, was implemented the system known as Chua¿s Circuit which served to demonstrate the profits that can be gotten with the use of the boarding proposal when applied to the study of dynamic systems operating in chaos in relation to the considered techniques conventional. Gotten results, for the analysis of time series of acquired signals, prove the great efficiency of this boarding in the time of development and the time for obtain the results when comparing implementations of dynamic models sufficiently known in literature in relation with the implementations of the same ones in digital computers
Mestrado
Automação
Mestre em Engenharia Elétrica
VALLICELLI, ELIA ARTURO. "Design of Mixed-Signal Electronic Instrumentation for Proton Sound Detectors." Doctoral thesis, Università degli Studi di Milano-Bicocca, 2021. http://hdl.handle.net/10281/301978.
Full textAcoustic proton range experimental verification technique (iono-acoustics) is based on sensing the weak thermoacoustic signal emitted by the fast energy deposition (and/or the heating process) at the end of the beam range (Bragg Peak). In this context, this thesis presents the main characteristics of the micro-electronics instrumentation used for proton sound detectors introducing specific design techniques strongly oriented to both maximization of the acoustic Signal-to-Noise-Ratio (at the Acoustic Sensor level) and Noise-Figure minimization (at analog amplifier level). The first part of this thesis addresses all the instrumentation challenges related to iono-acoustic experiments providing specific technical details regarding both acoustic sensor design (i.e. how to build the sensor while maximizing the SNR) and the LNA design. The experimental results of a first experiment carried out at Maier-Leibniz Laboratory in Garching, Munich, with a proton beam at 20 MeV (sub-clinical energy) will be presented and it will be shown how a dedicated mixed-signal electronics design allows to significantly improve the signal-to-noise ratio and the accuracy of the BP localization by 6 dB. In this context, this first detector development achieves two important objectives: the improvement of the acoustic SNR and a strong simplification of the detector instrumentation w.r.t. state-of-the-art, enabling increasing accuracy of the acoustic pulse measurement, and at the same time the portability and compactness of the device. In clinical hadron-therapy applications, variable beam energy (from 65 MeV up to 200 MeV) and variable doses are used as a function of the selected medical treatment. This induces different acoustic pulses amplitude and bandwidth, forcing advanced technological solutions capable of handling a wide spectrum of signals in terms of bandwidth, amplitude, and noise. For this reason, the second part of this thesis proposes an efficient and innovative Matlab Model of the ionoacoustic physical phenomenon, based on englobing in a single mathematical Linear-Time-Invariant-System all energy conversion processes involved in iono-acoustics. The proposed ionoacoustics model replaces classical and complex simulation tools (used to characterize the proton induced acoustic signal) and facilitates the development of dedicated detectors. Finally, the design of a second version of the Proton Sound Detector will be presented that introduces the concept of space-domain averaging (instead of time-domain averaging based on multiple beam shot processing for noise attenuation and thus extra-doses). This detector uses a multi-channel sensor to perform a spatial average of the acquired signals and increase the SNR by 18 dB at the same dose compared to the classic single channel approach. This approach however requires the development of highly miniaturized electronics that cannot be implemented with off-the-shelf components on Printed Circuit Boards. The design and characterization of a multichannel analog front-end implemented on a CMOS 28 nm Application-Specified-Integrated-Circuit (ASIC) which allows to process the 64 channels of the acoustic sensor in parallel is then presented. This High-Resolution Proton Sound Detector (HR-ProSD) is completed by digital circuits implemented on Field Programmable Gate Array (FPGA) that allow to locate in real time the deposition of energy in space.
Oliveira, Vlademir de Jesus Silva [UNESP]. "Sintetizador analógico de sinais ortogonais: projeto e construção usando tecnologia CMOS." Universidade Estadual Paulista (UNESP), 2004. http://hdl.handle.net/11449/90796.
Full textConselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)
Nesse trabalho, propõe-se o projeto e implementação de um sintetizador de sinais ortogonais utilizando técnicas de circuito integrado e processo CMOS. O circuito do sintetizador baseia-se em um modelo matemático que utiliza multiplicadores e integradores analógicos, para geração de bases de funções ortogonais, tais como os polinômios de Legendre, as funções de base coseno e seno, a smoothed-cosine basis e os polinômios de Hermite. Funções ortogonais são bastante empregadas em processamento de sinais, e a implementação deste método matemático é capaz de gerar vários tipos de funções em um mesmo circuito integrado. O projeto proposto utiliza blocos analógicos funcionais para implementar o sintetizador. Os blocos que compõem o sintetizador foram projetados utilizando circuitos diferenciais, processamento em modo de corrente e técnicas de low-voltage. Algumas topologias utilizadas estão descritas na literatura, sendo que algumas foram adaptadas e mesmo modificadas, como no caso do multiplicador de corrente. Outras tiveram que ser propostas. As simulações e os resultados experimentais mostraram que o sintetizador é capaz de gerar funções ortogonais com amplitude e distorções satisfatórias. O sintetizador pode ser alimentado em 3V, tal qual foi projetado, tem faixa de entrada de ±20 μA e apresenta DHT (distorção harmônica total) inferior a 4% no quinto e último estágio em cascata.
In this work, a design and implementation of a synthesizer of orthogonal signals using CMOS technology and design technique for integrated circuits is proposed. The synthesizer circuit used analog multipliers and integrators for produce orthogonal functions such as Legendre polynomials, cosine and sine basis of functions, smoothed-cosine basis and Hermite polynomials. Orthogonal functions can be employed in signal processing and the implementation proposed can generate several kinds of functions in the same integrated circuit. In the synthesizer design building blocks was employed. The synthesizer’s blocks were design using differential circuits, low-voltage and current-mode techniques. Some topologies from papers were adapted or modified, as in the case of the current multiplier. Other topologies had to be proposed. The simulation and experimental results have shown that the synthesizer is able to produce orthogonal functions with satisfactory quality in distortions and amplitude. The synthesizer has a 3V supply voltage, a input current range of ±20 μA and it presents less than 4% of THD (Total Harmonic Distortion) in the last output in cascade.
Gal, Stéphan. "Conception assistée de blocs analogiques pour capteurs intelligants." Montpellier 2, 1998. http://www.theses.fr/1998MON20230.
Full textPesenti, Giovani Cheuiche. "Desenvolvimento e otimização de tecnologia CMOS com porta de silício policristalino." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2008. http://hdl.handle.net/10183/16127.
Full textAn analog-to-digital converter chip was fabricated with a new developed poly-Si gate 5μm p-well CMOS technology in the Laboratory of Microelectronics of Instituto de Física, Universidade Federal do Rio Grande do Sul. New equipments were purchased or built for the development of this technology. Test structures like p-type and n-type Poly-Si/SiO2/Si MOS capacitors, PMOS and NMOS transistors, inverter and output buffer were included in the chip design. The set of 8 chromium lithography masks was ordered from DuPont, USA. After processing the chip, electrical measurements of the test structures, and circuit modules were performed. The ISE_TCAD simulation software was used for technology adjustment. These simulations were used to obtain data like effective channel length, junction depth, and also to determine the critical steps of the technological process. Measurements in test wafers during processing, DC electrical measurements of the fabricated PMOS and NMOS transistors and Agilent ADS (Advanced Design System) software were used during the design parameters extraction, applying the SPICE level 3 model. The analysis of the collected data permitted the technology list verification and pointed two main problems: very high boron concentration in the well and high sheet resistance of source/drain regions of PMOS transistors. The main result of this work was the integration between the ISE_TCAD simulation tool and the installed set of equipments in the clean room of the Laboratory of Microelectronics, giving the necessary infrastructure for new technologies and microdevices developments.
U, Seng-Pan. "Tecnicas de interpolacao em filtros multiritmo com condensadores comutados para Interfaces Analogicas com filtragem de alta-frequencia = Multirate Switched-Capacitor interpolation techniques for very high-frequency Analog Front-End filtering." Thesis, University of Macau, 2002. http://umaclib3.umac.mo/record=b1873496.
Full textLanot, Alisson Jamie Cruz. "Estudo de falhas transientes e técnicas de tolerância a falhas em conversores de dados do tipo SAR baseados em redistribuição de carga." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2014. http://hdl.handle.net/10183/114478.
Full textSuccessive Approximation Register (SAR) Analog to Digital Converters (ADCs) based on charge redistribution are frequently used in data acquisition systems, especially those requiring low power and low area, and good conversion speed. This topology is present on several mixed-signal programmable devices. These devices, when exposed to harsh environments, such as radiation, which is the case for space applications, are prone to Single Event Effects (SEEs). These effects may cause temporary failures, such as transient effects or memory upsets or even permanent failures on the circuit. This work presents the behavior of this type of converter after the occurrence of a transient fault on the circuit, by means of SPICE simulations. These transient faults may cause an inversion on the conversion due to a transient on the control logic of the switches, or a charge or discharge of the capacitors when a transient occur on the switches, as well as a failure on the comparator, which may propagate to the remainder stages of conversion, due to the sequential nature of the converter. A discussion about the possible fault mitigation techniques is also presented.
Almeida, Tiago da Silva [UNESP]. "Ambiente computacional para projetos de sistemas com tecnologia mista." Universidade Estadual Paulista (UNESP), 2009. http://hdl.handle.net/11449/87055.
Full textCoordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)
Neste trabalho, apresenta-se o desenvolvimento e a avaliação de duas ferramentas que auxiliam projetos de circuitos eletrônicos, sejam eles projetos de sistemas digitais ou de sistemas mistos (sinais digitais e sinais analógicos). A partir de um diagrama de transição de estados, modelado em ambiente Stateflow®, a primeira ferramenta, denominada SF2HDL, realiza a extração de linguagens de descrição de hardware, podendo ser VHDL ou Verilog HDL. Sendo ainda capaz de extrair uma tabela de transição de estados padronizada, que, posteriormente, foi utilizada como entrada pelo programa TABELA, o qual realiza a minimização do sistema digital. A máquina de estados finitos, alvo da tradução, pode ser descrita tanto pelo modelo de Mealy como pelo modelo de Moore. Como estudos de caso, foram utilizados quatro códigos de linhas empregados em sistemas de telecomunicações. A segunda ferramenta é um aperfeiçoamento de uma ferramenta já existente, denominada MS2SV, empregada na síntese de sistemas mistos. O MS2SV é capaz de gerar uma descrição em VHDL-AMS estrutural, a partir de um modelo descrito em alto nível de abstração no ambiente Simulink®. Toda a estrutura de projeto necessária para a simulação e análise do sistema no ambiente SystemVision™, também é gerado pelo MS2SV. Foram utilizados quatro modelos de conversor de dados do tipo DAC (Digital to Analog Conversor), para avaliar o desempenho da ferramenta. Nesse contexto, as duas ferramentas permitem maior flexibilidade ao projetista, traduzindo descrições em níveis de abstração diferentes, o que permite uma análise mais detalhada do funcionamento do sistema e facilitando a sua implementação física
In this work, it’s shown the development and evaluation of two tools to aid in electronic circuits projects, be them digital systems projects or for mixed systems (digital and analogical signs). From a states transition diagram modeled in Stateflow® environment, the first tool, named SF2HDL, performs the extraction of hardware description languages, which could be VHDL or Verilog HDL. It is also capable of extracting states transition table standardized, which later was used as a TABELA program, which accomplishes the minimization of the digital system. The target finite state machine of the translated can be described by the Mealy model as much as the Moore model. As case studies were used four code lines employed in telecommunications systems. The second tool is an improvement of an already existent tool, known as MS2SV, used in the synthesis of mixed systems. The MS2SV is able to generate a description in structural VHDL-AMS, from a model described in high level of abstraction in the Simulink® environment. The whole project structure necessary for the simulation and analysis of the system by the SystemVision™ environment is also generated by MS2SV. Four DAC (Digital to Analog Converter) were used to evaluate the tool is performance. In that context, both tools allow a greater flexibility to the planner, translating descriptions in different abstraction levels, which allows a more detailed analysis of the systems behavior and making its physical implementation easier
Chenet, Cristiano Pegoraro. "Análise de soft errors em conversores analógico-digitais e mitigação utilizando redundância e diversidade." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2015. http://hdl.handle.net/10183/127693.
Full textThe present thesis addresses the soft errors in analog-to-digital data converters and mitigation of such errors using redundancy and diversity. In modern CMOS technologies, the Single Event Effects (SEEs) comprises an important group of space radiation effects that influence the reliability and availability of the systems. Soft errors are SEEs that do not directly damage the system and that can be further corrected. Their main subgroups are the Single Event Upset (SEU), the Single Event Transient (SET) and the Single Event Functional Interrupt (SEFI). One of the system level techniques broadly used to protect the electronic circuits against these effects is the Triple Modular Redundancy (TMR), which may be improved with the addition of the diversity technique. In this context, this work proposes a scheme based on these two techniques to implement a tolerant analog-to-digital data acquisition system (DAS). The main objectives are to observe the behavior of the data converters under soft errors, and evaluate the effectiveness of a system based on TMR and spatial-temporal diversity on mitigating these radiation effects. The implementation of this DAS in a Programmable SoC (System-on-Chip) from Cypress Semiconductor (PSoC 5LP) manufactured in 130 nm CMOS, allowed the development of two studies. In the first one, an irradiation with neutrons is performed, case of particular interest to electronic equipment embedded on planes. In the second study, runtime software fault injections are performed at the peripheral control registers and SRAM of the studied device. As a result from irradiation on the first study no errors were found, what does not allowed meet the objectives of this test. This situation allow two main observations: first, the neutron flux of the experiment is a key feature that influences the ability to observe the radiation effects, mainly when the cross section of the circuit in analysis is low; and second, the probability of occurring SETs masking in combinational and analog circuits is high, which contributes significantly to reduce the sensibility of these circuits. To evaluate the effectiveness of a system based on TMR and spatial-temporal diversity then was performed a theoretical investigation based on combinatorial analysis, and the results show that the addition of temporal diversity generates a significant gain in tolerating double and multiple faults, if compared to the classical TMR, at the price of an increase in the circuit delay. The results of the second study, performed by runtime software fault injections at the peripheral control registers and SRAM, showed that only a low percentage of injected faults is detected as errors, according to the justification that no errors were found on irradiation of neutrons due to masking. Also was verified that at the application level the peripheral control registers are more important than the data stored in the SRAM memory. Considerations for faults self-injection and self-monitoring were done, suggesting that the use of these concepts may bring numerous limitations to the test.
Sienkiewicz, Lukasz Krzysztof. "Concept, implementation and analysis of the piezoelectric resonant sensor / Actuator for measuring the aging process of human skin." Thesis, Toulouse, INPT, 2016. http://www.theses.fr/2016INPT0047/document.
Full textThe main goal of the dissertation was following: preparation of a new concept, implementation and analysis of the piezoelectric resonant sensor/actuator for measuring the aging process of human skin. The research work has been carried out in the framework of cooperation between the INP-ENSEEIHT-LAPLACE, Toulouse, France, and at the Gdansk University of Technology, Faculty of Electrical and Control Engineering, Research Group of Power Electronics and Electrical Machines, Gdask, Poland. A concept of transducer for the characterization of mechanical properties of soft tissues was presented. The piezoelectric resonant, bending transducer, referred to as “unimorph transducer” was chosen from different topologies of piezoelectric benders based on the fulfillment of the stated requirements. The innovation of the project lies in the integration of the dynamic indentation method by using a unimorph as an indentation device. This allows the use of a number of attractive electromechanical properties of piezoelectric transducers. The thesis is divided into seven chapters. Chapter 1 states the thesis and goals of the dissertation. Chapter 2 presents piezoelectric phenomenon and piezoelectric applications in the fields of medicine and bioengineering. Chapter 3 describes the requirements for the developed transducer. The choice of unimorph transducer is justified. Chapter 4 presents an analytical description of the unimorph transducer, including the calculations of static deformations, equivalent circuit description, and description of the contact conditions between the transducer and the tested materials. Chapter 5 contains the numerical analysis of the unimorph transducer using FEM virtual model. Results of static and modal simulations are described for two considered geometries of the transducer. Chapter 6 describes the experimental verification process of analytic and numerical models developed for unimorph transducer. The final chapter includes general conclusions concerning obtained research results and achievements, as well as possible future works. In order to verify the proposition of the thesis a full research cycle was carried out, that covered: analytical study, numerical analysis (FEM simulations), prototype realization, and experimental verification of the considered (developed) piezoelectric sensor/actuator structures
GRASSO, FRANCESCO. "Metodi innovativi per la diagnosi di guasto nei circuiti analogici." Doctoral thesis, 2003. http://hdl.handle.net/2158/593523.
Full textFontana, Giuseppe. "Progressi nell'Analisi di Testabilità e nella Teoria Generale dei Circuiti Analogici." Doctoral thesis, 2018. http://hdl.handle.net/2158/1121856.
Full textSalvador, Andreia Isabel Nunes. "O Ensino e a Aprendizagem dos Circuitos Elétricos: utilização de Analogias e da Resolução de Problemas." Doctoral thesis, 2017. http://hdl.handle.net/10316/32627.
Full textCada vez mais o modo como a nossa sociedade evolui exige respostas rápidas por parte das escolas e do sistema educativo. Este facto, aliado às dificuldades reveladas pelos alunos dos Ensinos Básico e Secundário, sentidas essencialmente nas transições entre diferentes ciclos de ensino, e aos avanços e recuos nas reformas educativas e nos programas, aumentam o nível de insucesso e de consequente abandono escolar. A necessidade de compreensão de conceitos abstratos, bem como os conteúdos matemáticos que exige fazem com que a Física se revele como a disciplina onde muitos alunos apresentam sérias dificuldades. Tentar aprender os conceitos e modelos da Física por intuição é impossível. Muitas vezes, as relações causa-efeito que traduzem concretizam-se através de expressões matemáticas entre conceitos abstratos (uns de aprendizagem direta outros bastante mais complicados) que envolvem, frequentemente, variáveis que não se detetam através de uma análise ingénua do dia-a-dia. No que concerne ao tema circuitos elétricos, a sua compreensão requer dominar e relacionar conceitos todos significativamente abstratos, não palpáveis e dificilmente percetíveis para a maioria dos nossos alunos. Este trabalho de investigação teve início com três turmas, num estudo piloto, realizado num colégio em Coimbra, tendo sido posteriormente alargado a mais quatro escolas do país. O seu objetivo geral é melhorar o ensino e a aprendizagem desta disciplina, nomeadamente do tema circuitos elétricos, focalizado no recurso a analogias e à resolução de problemas de modo a tornar as aprendizagens mais significativas. Estas técnicas pretendem induzir nos discentes um espírito científico baseado na aquisição de conteúdos, de desenvolvimento de competências, de busca de causas e argumentos – espírito “inquiry” – que lhes possibilite resolver problemas diversificados através dos seus conhecimentos, ou que lhes mostre a necessidade de procurar soluções, levando-os a proceder como futuros cidadãos ativos, cientes dos seus conhecimentos e dúvidas bem como dos seus direitos e deveres. ABSTRACT The way our society is evolving requires, more and more, quick answers from schools a nd from the Educational System. This fact, together with the difficulties felt by the primary and secondary school students, revealed mainly in the transaction of different teaching cycles, the advances and the retreats concerning the Educational System an d the Curricula reforms, increase the failure level and consequently lead students to quit school. The difficulty in understanding abstract concepts along with the mathematical contents that are required turn Physics into a subject in which a lot of studen ts demonstrate serious difficulties. Within this subject it is impossible to learn concepts and models by intuition. The cause - effect relationships that they indicate are frequently conveyed through mathematical expressions ( among abstract concepts, some o f them of more direct learning, others much more complicated ) often involving variables which are undetectable by means of a naive daily analyses. In what concerns the topic electrical circuits, its understanding requires to dominate and to relate concepts , all significantly abstract, non - palpable and hardly perceptible for most of our students. The present investigation started with three classes within a pilot study, carried out in a private school in Coimbra, being afterwards extended to four more school s in the country. Its main objective is to improve the teaching within this subject, regarding namely the topic electrical circuits, by focusing on the usage of analogies and problem solving. By using these teaching techniques it is intended to induce in s tudents a scientific spirit of content acquisition, the development of skills and the search for causes and arguments - an "inquiry" spirit - that enhances the possibility of the students to solve any kind of problems using the knowledge they already have, or making them realize that they have to research, leading them to behave as future active citizens aware of their knowledge and their doubts, of their rights and their duties
The way our society is evolving requires, more and more, quick answers from schools and from the Educational System. This fact, together with the difficulties felt by the primary and secondary school students, revealed mainly in the transaction of different teaching cycles, the advances and the retreats concerning the Educational System and the Curricula reforms, increase the failure level and consequently lead students to quit school. The difficulty in understanding abstract concepts along with the mathematical contents that are required turn Physics into a subject in which a lot of students demonstrate serious difficulties. Within this subject it is impossible to learn concepts and models by intuition. The cause-effect relationships that they indicate are frequently conveyed through mathematical expressions (among abstract concepts, some of them of more direct learning, others much more complicated) often involving variables which are undetectable by means of a naive daily analyses. In what concerns the topic electrical circuits, its understanding requires to dominate and to relate concepts, all significantly abstract, non-palpable and hardly perceptible for most of our students. The present investigation started with three classes within a pilot study, carried out in a private school in Coimbra, being afterwards extended to four more schools in the country. Its main objective is to improve the teaching within this subject, regarding namely the topic electrical circuits, by focusing on the usage of analogies and problem solving. By using these teaching techniques it is intended to induce in students a scientific spirit of content acquisition, the development of skills and the search for causes and arguments - an "inquiry" spirit - that enhances the possibility of the students to solve any kind of problems using the knowledge they already have, or making them realize that they have to research, leading them to behave as future active citizens aware of their knowledge and their doubts, of their rights and their duties.
Chang, Chih-Wei, and 張智偉. "The Effect of direct circuit learning integrated cycle of analogical-learning with Edison computer simulation." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/69662317477607823606.
Full text國立彰化師範大學
物理學系
94
In the era for the rapid progress of information technologies, teaching integrated with computer becomes a major trend at present and future. On the other hand, the “Cycle of analogical-learning (CAL)” has been proved to be an effective tool in instruction strategy. In this study, I have designed a teaching course for the DC circuit, in which electronics simulation program EDISON was included. In addition, the CAL was also integrated into the teaching session. The purpose of this study is to test the effects for this course and the response of the students was also recorded. The study was based on the quasi-experimental research. Two 8th grade classes with similar achievement were chosen and respectively assigned to be experimental group A and control group B. The previous mentioned teaching course was adopted in group A, while didactic instruction with general textbook was adopted by another science teacher in group B. The effectiveness of the instruction for both groups was administered by performing tests before and after. Analysis of covariance (ANCOVA) was conducted with pretest as covariate and posttest as dependent variable. After the course implemented, group A was surveyed to know their response on teaching integrated computer simulation. Based on the data analysis, the posttest result of the experimental group A was better than those of the control group B with statistical significance (p = 0.013 < 0.05), and so was the follow-up result (p = 0.026 < 0.05). I may conclude that the designed course is a successful for DC circuit teaching. As to the response of the experimental group, most students considered that the course was the most remarkable on raising their learning interest and promoting their learning effects. Using Edison software, cooperation learning, and the water flow model as cycle of analogical-learning also help them to learn the circuit. They also suggested: the water flow chart of the task could be color-printed, the water flow model could present more vividly such as by animation. Finally, the familiar of the circuit section learned in elementary school, and manipulation of the computer and simulation software may further promote the effectiveness of the learning.
Lai, Hui-Fen, and 賴惠芬. "The Sixth Graders’ Analogy-based Modeling Ability and Its Relationship between the Concepts of Electric Circuits and Analogical Mapping." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/79703138443406554413.
Full text臺北市立大學
應用物理暨化學系自然科學教學碩士班
102
Abstract This study aimed to investigate the sixth graders’ analogy-based modeling ability and its relationship between the concepts of electric circuits and analogical mapping. First, this study sought to understand the sixth graders’ analogy-based modeling ability about the electric circuits. Secondly, it explored students the relationship between the analogy-based modeling ability and achievement of electric circuits concepts. Finally, it explored the relationship between analogical mapping and the analogy-based modeling ability. This study adopted the analogy-based modeling assessment (Lin, 2013) which took electric circuits as an example to investigate 205 sixth graders analogy-based modeling . The stages of modeling process of this assessment were mainly took Halloun’s (1996) framework as the reference. The scoring system was took Structure of the Observed Learning Outcome (SOLO) taxonomy Biggs &; Collis (1982) as the reference to evaluate students’ levels of modeling. The study used convenience sampling to collect all sixth graders’ (205students) analog-modeling process from an elementary school in Jhonghe District, and then used the statistical software SPSS18.0 to analysze students’ ability at each stage. Pearson’s Correlation was used to analyze the correlation between the analogy-based modeling ability at different stages and the achievement of electric circuit concepts and the analogical mapping ability. The results show: (1) the sixth graders’ analogy-based modeling ability is inefficient. Students’ best performance is at the stage of model analysis, while the worst performance is at the stage of model deployment. As for the levels of modeling ability, modeling the students’ best level presents a variety of factors and their relationships related to the theory (Level 3) at the stage of model analysis displays the most students are unable to respond or correct the factors associated with the theory of reaction (Level 0) at the stage of model deployment. (2) Except model deployment stage, the sixth graders’ analogy-based modeling ability at different stages had low to medium degree significant correlation with their achievement of electric circuit concepts (p &;lt; .01). (3) The sixth graders’ analogy-based modeling ability at different stages had low degree significant correlation with their analogical mapping ability (p &;lt; .01). In summary, the sixth graders’ analogy-based modeling ability for a specific topic at different stages are closely related to the understanding for specific scientific concepts and analogical mapping ability. Enhancing students' scientific concepts and ability of analogical mapping helps students’ analogy-based modeling ability, and vice versa. This study suggests: teachers should provide group discussion for students in the teaching process, in order to promote students’ ability of model validation. Teachers also may introduce the relationship between the “scientific theory” and “everyday experience”, to enhance students analogy-based modeling ability at stages of " model application"and" model deployment ". Keywords: Analogy-based modeling ability, Analogical mapping, Concepts of electric circuits