Journal articles on the topic 'Circuit non-linearity'
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1
Zhao, Ruiyong, Zhenghui Gong, Yulan Liu, and Jing Chen. "A High-Precision Voltage-Quantization-Based Current-Mode Computing-in-Memory SRAM." Micromachines 14, no. 12 (November 29, 2023): 2180. http://dx.doi.org/10.3390/mi14122180.
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Non-linear distortion of signals is a serious problem in computing-in-memory SRAM (CIM-SRAM) circuits in current mode. This problem greatly limits the performance of calculations and directly affects the computing power of the CIM-SRAM. In this study, the causes of non-linearity and inconsistency were investigated. Based on detailed analyses, we proposed a high-precision, fully dynamic range IV (HFIV) conversion circuit. The HFIV circuit was added to each bit line (BL) for voltage clamping and proportionally mirroring the read current. We applied the structure to numerous prior studies and evaluated them using the 55 nm complementary metal-oxide semiconductor process. The results showed the proposed HFIV circuit could increase the CIM-SRAM’s calculation linearity to 99.92% (8~32 SRAM bit-cells) and 99.8% (32~64 SRAM bit-cells) with a 1.2 V supply.
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Di Pasquo, Alessio, Enrico Monaco, Nicola Ghittori, Claudio Nani, and Luca Fanucci. "A Track-and-Hold Circuit with Tunable Non-Linearity and a Calibration Loop for PAM-8 SerDes Receivers." Electronics 11, no. 14 (July 13, 2022): 2199. http://dx.doi.org/10.3390/electronics11142199.
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In this brief, we propose a 60 GS/s high-linearity two-stage 8 × 8 time-interleaved track-and-hold circuit where it is possible to tune the static non-linearities of the second-stage buffer by applying a proper bias voltage. This allows us to maximize the static linearity of the buffer or introduce effects that counterbalance the non-linearities of other blocks of the analog front-end. To validate the proposed circuit, a prototype in TSMC 5 nm technology is designed and a linearity calibration loop is proposed for a Pulse Amplitude Modulation SerDes receiver. For the analog buffer, circuit-level simulations are performed in Cadence Virtuoso, while the calibration loop is simulated in MATLAB. The optimal bias voltage value can be found by modeling the track-and-hold linearity using a Taylor series and implementing the linearity calibration loop in MATLAB. By applying this result to the circuit-level simulation, we obtain a total harmonic distortion of over 50 dB, which matches with the maximum value achievable across the complete bias voltage control range. Lastly, the linearity of the system is also verified using a PAM-8 pseudorandom stream signal.
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Li, Xiangyu, Jianping Hu, and Xiaowei Liu. "Harmonic Distortion Optimization for Sigma-Delta Modulators Interface Circuit of TMR Sensors." Sensors 20, no. 4 (February 14, 2020): 1041. http://dx.doi.org/10.3390/s20041041.
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The tunneling magnetoresistance micro-sensors (TMR) developed by magnetic multilayer material has many advantages, such as high sensitivity, high frequency response, and good reliability. It is widely used in military and civil fields. This work presents a high-performance interface circuit for TMR sensors. Because of the nonlinearity of signal conversion between sensitive structure and interface circuit in feedback loop and forward path, large harmonic distortion occurs in output signal spectrum, which greatly leads to the reduction of SNDR (signal noise distortion rate). In this paper, we analyzed the main source of harmonic distortion in closed-loop detection circuit and establish an accurate harmonic distortion model in TMR micro-sensors system. Some factors are considered, including non-linear gain of operational amplifier unit, effective gain bandwidth, conversion speed, nonlinearity of analog transmission gate, and nonlinearity of polycrystalline capacitance in high-order sigma-delta system. We optimized the CMOS switch and first-stage integrator in the switched-capacitor circuit. The harmonic distortion parameter is optimally designed in the TMR sensors system, aiming at the mismatch of misalignment of front-end system, non-linearity of quantizer, non-linearity of capacitor, and non-linearity of analog switch. The digital output is attained by the interface circuit based on a low-noise front-end interface circuit and a third-order sigma-delta modulator. The digital interface circuit is implemented by 0.35μm CMOS (complementary metal oxide semiconductor) technology. The high-performance digital TMR sensors system is implemented by double chip integration and the active interface circuit area is about 3.2 × 2 mm. The TMR sensors system consumes 20 mW at a single 5 V supply voltage. The TMR sensors system can achieve a linearity of 0.3% at full scale range (±105 nT) and a resolution of 0.25 nT/Hz1/2(@1Hz).
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Abuelma'atti, Muhammad Taher. "An Approximate Analysis and Its Application to The Non-Linear Performance of Three Mosfet Transconductance Amplifiers." Active and Passive Electronic Components 17, no. 3 (1994): 135–49. http://dx.doi.org/10.1155/1994/30565.
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A simple procedure for approximating the input-output characteristic of non-linear electronic circuits is presented. Using this procedure, closed-form analytical expressions, in terms of the ordinary Bessel functions, are obtained for the output spectra of a non-linear electronic circuit resulting from a multisinusoidal input. Using these expressions, the non-linear performance of three basic MOSFET transconductance amplifiers is considered in an attempt to determine the transistor parameters for best linearity.
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Zhu, Can, and Rong Bin Hu. "An Improved Bootstrapped Switch." Advanced Materials Research 1049-1050 (October 2014): 775–78. http://dx.doi.org/10.4028/www.scientific.net/amr.1049-1050.775.
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For the first time, the capacitive non-linearity is considered and calibrated. Based on the traditional bootstrapped switch, a cell is added to eliminate the first-order capacitive non-linearity. The measurement shows that the sampling and holding circuit using the improved bootstrapped switch can achieve a SFDR of 86dB with respect to 76dB for the traditional one.
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Liu, Qiao Ping, Yan Ning Yang, and Wei Xia Li. "Study on the Driving Circuit of Carbon Nanotube Field Emission Display Based on Luminance Control." Applied Mechanics and Materials 635-637 (September 2014): 1109–13. http://dx.doi.org/10.4028/www.scientific.net/amm.635-637.1109.
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Carbon nanotube field emission display (CNT-FED) is one of the most significant subjects due to its unique qualities and perfect performance. But there are still some problems in FED, for example, the modulation of each pixel unit of field emission display device is discrete, and the traditional voltage pulse-width modulation driving mode cannot solve luminance non-uniformity and non-linearity of FED. So a novel driving circuit based on cathode current source is proposed. The current driving circuit can be fabricated on Si substrate in advance, and then carbon nanotube is grown at room temperature, carbon nanotube and constant current source circuits are integrated on the same Si substrate. Current source circuit and cathode emission part are integrated together, which not only can solve the FED luminance problem, but also can meet FED thin design.
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Steijl, René. "Quantum Circuit Implementation of Multi-Dimensional Non-Linear Lattice Models." Applied Sciences 13, no. 1 (December 30, 2022): 529. http://dx.doi.org/10.3390/app13010529.
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The application of Quantum Computing (QC) to fluid dynamics simulation has developed into a dynamic research topic in recent years. With many flow problems of scientific and engineering interest requiring large computational resources, the potential of QC to speed-up simulations and facilitate more detailed modeling forms the main motivation for this growing research interest. Despite notable progress, many important challenges to creating quantum algorithms for fluid modeling remain. The key challenge of non-linearity of the governing equations in fluid modeling is investigated here in the context of lattice-based modeling of fluids. Quantum circuits for the D1Q3 (one-dimensional, three discrete velocities) Lattice Boltzmann model are detailed along with design trade-offs involving circuit width and depth. Then, the design is extended to a one-dimensional lattice model for the non-linear Burgers equation. To facilitate the evaluation of non-linear terms, the presented quantum circuits employ quantum computational basis encoding. The second part of this work introduces a novel, modular quantum-circuit implementation for non-linear terms in multi-dimensional lattice models. In particular, the evaluation of kinetic energy in two-dimensional models is detailed as the first step toward quantum circuits for the collision term of two- and three-dimensional Lattice Boltzmann methods. The quantum circuit analysis shows that with O(100) fault-tolerant qubits, meaningful proof-of-concept experiments could be performed in the near future.
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Widodo, Arif. "Optimasi Linieritas Rangkaian R-2R Ladder DAC Menggunakan Algoritma Genetika." INAJEEE : Indonesian Journal of Electrical and Eletronics Engineering 1, no. 1 (February 1, 2018): 7. http://dx.doi.org/10.26740/inajeee.v1n1.p7-11.
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Abstrak - rangkaian R-2R ladder digital-to-analog converter (DAC) adalah rangkaian elektronika sederhanayang dapat dibuat dengan dua nilai resistor serta banyak digunakan untuk proses konversi nilai digital keanalog secara langsung. Pemilihan nilai serta penempatan resistor pada rangkaian ini sangat berpengaruhpada linieritas sinyal hasil konversi. Penelitian ini bertujuan untuk memberikan solusi dalam merancangrangkaian R-2R ladder DAC dengan linieritas yang medekati optimal menggunakan komponen resistor yangada di pasaran. Dengan bantuan algoritma genetika, komponen resistor yang ada dapat dirangkai sedemikianrupa sehingga menghasilkan rangkaian DAC dengan nilai integral non-linearity (INL) yang mendekatioptimal. Hasil yang didapatkan dari simulasi rangkaian DAC dengan jumlah bit 6 sampai 12 menunjukkanbahwa algoritma genetika dapat digunakan untuk mengoptimalkan linieritas rangkaian R-2R ladder DACdengan INL hingga di bawah 0.5 LSB dalam waktu kurang dari 1.5 menit.Kata Kunci: algoritma genetika, R-2R ladder, digital-to-analog converter, integral non-linearityAbstract - R-2R ladder digital-to-analog converter (DAC) is a simple electronic circuit that can beimplemented with only two resistor values. It is used for converting digital values to analog voltagedirectly. The resistor selection and placement in this circuit have a significant effect on the DAClinearity. This research aims to provide solution in designing R-2R ladder DAC circuit with close-tooptimumlinearity using only resistors available on the market. With the help of genetic algorithm, theexisting resistors can be sequenced in such a way to produce a DAC circuit with close-to-optimumintegral non-linearity (INL). The results obtained from the simulation using 6 to 12 bits DAC circuitsshow that the genetic algorithm can be used to optimize the linearity of R-2R ladder DAC with INLless than 0.5 LSB in less than 1.5 minutes.Keywords: genetic algorithm, R-2R ladder, digital-to-analog converter, integral non-linearity
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Roy, Suvajit, Tapas Kumar Paul, and Radha Raman Pal. "Simple Current-Mode Squaring and Square-Rooting Circuits: Applications of MO-CCCCTA." Trends in Sciences 18, no. 23 (November 15, 2021): 721. http://dx.doi.org/10.48048/tis.2021.721.
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This work provides new designs of simple current-mode squaring and square-rooting circuits using multiple-output current controlled current conveyor transconductance amplifier (MO-CCCCTA) as an active building block. Since the proposed circuits need no other external components, they are capable of high-frequency operation and well fitted for IC fabrication. Furthermore, they are insensitive to ambient temperature and their gains can be controlled easily by adjusting the bias currents of MO-CCCCTA. Additionally, the effects of MO-CCCCTA non-idealities on the designed circuits have also been investigated and discussed. Simulation results generated through PSPICE software using TSMC 0.18 µm CMOS process parameters have been presented to justify the theoretical analysis. The static power consumption, bandwidth, and maximum linearity error in dc transfer characteristic measurement for the square-rooting circuit are found to be 0.17 mW, 445.63 MHz and 1.12 %, while for the squaring circuit they are 0.326 mW, 61.15 MHz and 2.38 %, respectively. The application of the reported circuits as a 2-input vector summation circuit has also been included to strengthen the design ideas.
HIGHLIGHTS
Simple structures of fully integrable current-mode squarers and square-rooters with low component count and lower power dissipation
The circuits are insensitive to temperature drift and their gains can be controlled easily by adjusting the bias currents of MO-CCCCTA
Bandwidth, static power dissipation, linearity error of square-rooter are 445.63 MHz, 0.17 mW & ≤ 1.12 %; and for the squarer 61.15 MHz, 0.326 mW & 2.38 %, respectively
GRAPHICAL ABSTRACT
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Huang, Shi Zhao, Yong Feng Liu, and Zhe Wei. "The Realization of Random Frequency Modulation Pulse Compression Signal Based on AD9858." Applied Mechanics and Materials 427-429 (September 2013): 2022–24. http://dx.doi.org/10.4028/www.scientific.net/amm.427-429.2022.
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A scheme producing non-linearity frequency-modulated signal which can be updated on-line based on AD9858 is mentioned. A method to design NLFM signal using immediate data update is introduced. Circuit structure is designed. Major factor that impacting data is analyzed and its solution is presented. Experiments certify that this method can generate broadband and narrow pulse width non-linearity frequency-modulated signal, whose frequency spectrum can be updated on-line in real time.
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Sicignano, A., D. Eremin, and A. V. Nikitin. "Diagnosis of Magnification Stability and Non-Linearity in SEMs." Microscopy and Microanalysis 6, S2 (August 2000): 1132–33. http://dx.doi.org/10.1017/s1431927600038150.
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Summary: In recent years the SEM has advanced from an instrument used primarily for imaging to a tool for performing precise and accurate measurements of features. The SEM has been widely adapted by workers in diverse technical fields such as: integrated circuit (IC) processing, micro electro-mechanical devices (MEMs) design and molecular biology research. The SEM user in need of acquiring accurate dimensional information about their samples normally relies on the magnification readings and settings provided by the instrument maker. Tools to evaluate the precision of these physical dimensions or to assist in understanding the state of the SEM are not currently available. This paper presents a new methodology based on novel software and hardware to provide the user with capability of diagnosing the magnification stability and non-linearity of their SEMs prior to attempting accurate and precise feature measurements. Examples will be presented demonstrating the diagnosis of magnification stability and non-linearity in SEMs located at 4 independent sites.
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Li, Qin, Huifeng Zhu, Guyue Huang, Zijie Yu, Fei Qiao, Qi Wei, Xinjun Liu, and Huazhong Yang. "Low-power in-pixel buffer circuit for smart image sensor." Sensor Review 40, no. 5 (September 23, 2020): 585–90. http://dx.doi.org/10.1108/sr-03-2019-0067.
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Purpose The smart image sensor (SIS) which integrated with both sensor and smart processor has been widely applied in vision-based intelligent perception. In these applications, the linearity of the image sensor is crucial for better processing performance. However, the simple source-follower based readout circuit in the conventional SIS introduces significant nonlinearity. This paper aims to design a low-power in-pixel buffer circuit applied in the high-linearity SIS for the smart perception applications. Design/methodology/approach The linearity of the SIS is improved by eliminating the non-ideal effects of transistors and cancelling dynamic threshold voltage that changes with the process variation, voltage and temperature. A low parasitic capacitance low leakage switch is proposed to further improve the linearity of the buffer. Moreover, an area-efficient SIS architecture with a sharing mechanism is presented to further reduce the number of in-pixel transistors. Findings A low parasitic capacitance low leakage switch and a gate-source voltage pre-storage method are proposed to further improve the linearity of the buffer. Nonlinear effects introduced by parasitic capacitance switching leakage, etc., have been investigated and solved by proposing low-parasitic and low-leakage switches. The linearity is improved without a power-hungry operational amplifier-based calibration circuit and a noticeable power consumption increment. Originality/value The proposed design is implemented using a standard 0.18-µm CMOS process with the active area of 102 µm2. At the power consumption of 5.6 µW, the measured linearity is −63 dB, which is nearly 27 dB better than conventional active pixel sensor (APS) implementation. The proposed low-power buffer circuit increase not only the performance of the SIS but also the lifetime of the smart perception system.
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Pellicer-Porres, J., and M. V. Andrés. "Non-linear resonance in the simplest RLC circuit." European Journal of Physics 43, no. 3 (March 17, 2022): 035204. http://dx.doi.org/10.1088/1361-6404/ac56b3.
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Abstract We describe an undergraduate experiment demonstrating a non-linear oscillator based on a simple RLC circuit. Non-linearity is introduced by a single, reverse biased, diode. The response curves are described as a function of the generator amplitude and reverse polarization voltage. The oscillator can be modeled making use of the skeleton curve, which relates the resonance frequency with the amplitude of the oscillations, reducing the complexity of the mathematical description. We also give some insights on the physics of the skeleton curve and deduce information about the diode.
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Kim, Younghee, Hongzhou Jin, Dohoon Kim, Panbong Ha, Min-Kyu Park, Joon Hwang, Jongho Lee, et al. "Design of Synaptic Driving Circuit for TFT eFlash-Based Processing-In-Memory Hardware Using Hybrid Bonding." Electronics 12, no. 3 (January 29, 2023): 678. http://dx.doi.org/10.3390/electronics12030678.
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This paper presents a synaptic driving circuit design for processing in-memory (PIM) hardware with a thin-film transistor (TFT) embedded flash (eFlash) for a binary/ternary-weight neural network (NN). An eFlash-based synaptic cell capable of programming negative weight values to store binary/ternary weight values (i.e., ±1, 0) and synaptic driving circuits for erase, program, and read operations of synaptic arrays have been proposed. The proposed synaptic driving circuits improve the calculation accuracy of PIM operation by precisely programming the sensing current of the eFlash synaptic cell to the target current (50 nA ± 0.5 nA) using a pulse train. In addition, during PIM operation, the pulse-width modulation (PWM) conversion circuit converts 8-bit input data into one continuous PWM pulse to minimize non-linearity in the synaptic sensing current integration step of the neuron circuit. The prototype chip, including the proposed synaptic driving circuit, PWM conversion circuit, neuron circuit, and digital blocks, is designed and laid out as the accelerator for binary/ternary weighted NN with a size of 324 × 80 × 10 using a 0.35 μm CMOS process. Hybrid bonding technology using bump bonding and wire bonding is used to package the designed CMOS accelerator die and TFT eFlash-based synapse array dies into a single chip package.
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Reverter, Ferran. "Two Proposals of a Simple Analog Conditioning Circuit for Remote Resistive Sensors with a Three-Wire Connection." Sensors 24, no. 2 (January 10, 2024): 422. http://dx.doi.org/10.3390/s24020422.
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This article proposes and experimentally characterizes two implementations of a novel front-end circuit for three-wire connected resistive sensors with a wire-resistance compensation. The first implementation relies on two twin diodes, whereas the second on a switch; in both cases, those devices are non-remote (i.e., they are placed at the circuit end). The two circuit proposals have a square-wave input excitation so that a constant current with the two polarities is alternatively generated. Then, depending on that polarity, the current goes through either the sensor and the wire parasitic resistances or just the parasitic resistances. This generates a square-wave bipolar output signal whose average value, which is obtained by a low-pass filter, is proportional to the sensor resistance and only depends on the mismatch between two of the three wire resistances involved. Experimental tests applied to resistances related to a Pt100 thermal sensor show a remarkable linearity. For example, the switch-based front-end circuit offers a non-linearity error lower than 0.01% full-scale span, and this is practically insensitive to both the presence and the mismatch between the wire resistances.
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Sun, Junwei, Yangyang Wang, Peng Liu, and Yanfeng Wang. "Memristor-Based Circuit Design of Non Associative Learning Mechanism." Journal of Nanoelectronics and Optoelectronics 17, no. 3 (March 1, 2022): 505–15. http://dx.doi.org/10.1166/jno.2022.3222.
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Associative learning and memory are widely studied, but non associative learning is rarely discussed. A non associative learning circuit based on memristor is proposed in this paper, including habituation, sensitization, presynaptic facilitation, secondary habituation, long and short term habituation, cross habituation, long and short timescale habituation. Habituation and sensitization in non associative learning are achieved through memristive non-volatility and non-linearity, and presynaptic facilitation is also discussed. Long and short term habituation and secondary habituation are considered through the synaptic module and the voltage module. Cross habituation and long and short timescale habituation are introduced through the suppression module and synaptic module. The more realistic brain is simulated by artificial neural network through the study of non associative learning.
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Elmeligy, Karim, and Hesham Omran. "Fast Design Space Exploration and Multi-Objective Optimization of Wide-Band Noise-Canceling LNAs." Electronics 11, no. 5 (March 5, 2022): 816. http://dx.doi.org/10.3390/electronics11050816.
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Design optimization of RF low-noise amplifiers (LNAs) remains a time-consuming and complex process. Iterations are needed to adjust impedance matching, gain, and noise figure (NF) simultaneously. The process can involve more iterations to adjust the non-linear behavior of the circuit which can be represented by the input-referred third-order intercept (IIP3). In this work, we present a variation-aware automated design and optimization flow for a wide-band noise-canceling LNA. We include the circuit non-linearity in the optimization flow without using a simulator in the loop. By describing the transistors using precomputed lookup tables (LUTs), a design database that contains 200,000 design points is generated in 3 s only without non-linearity computation and 10 s when non-linearity is taken into account. Using a gm/ID-based correct-by-construction design procedure, the generated design points automatically satisfy proper biasing, input matching, and gain matching requirements. The generated database enables the designer to visualize the design space and explore the design trade-offs. Moreover, multi-objective optimization across corners for a given set of specifications is applied to find the Pareto-optimal fronts of the design figures-of-merit. We demonstrate the presented flow using two design examples in a 65 nm process and the results are verified using Cadence Spectre.
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Corti, Fabio, Alberto Reatti, Gabriele Maria Lozito, Ermanno Cardelli, and Antonino Laudani. "Influence of Non-Linearity in Losses Estimation of Magnetic Components for DC-DC Converters." Energies 14, no. 20 (October 11, 2021): 6498. http://dx.doi.org/10.3390/en14206498.
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In this paper, the problem of estimating the core losses for inductive components is addressed. A novel methodology is applied to estimate the core losses of an inductor in a DC-DC converter in the time-domain. The methodology addresses both the non-linearity and dynamic behavior of the core magnetic material and the non-uniformity of the field distribution for the device geometry. The methodology is natively implemented using the LTSpice simulation environment and can be used to include an accurate behavioral model of the magnetic devices in a more complex lumped circuit. The methodology is compared against classic estimation techniques such as Steinmetz Equation and the improved Generalized Steinmetz Equation. The validation is performed on a practical DC-DC Buck converter, which was utilized to experimentally verify the results derived by a model suitable to estimate the inductor losses. Both simulation and experimental test confirm the accuracy of the proposed methodology. Thus, the proposed technique can be flexibly used both for direct core loss estimation and the realization of a subsystem able to simulate the realistic behavior of an inductor within a more complex lumped circuit.
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YUCE, ERKAN, SHAHRAM MINAEI, NORBERT HERENCSAR, and JAROSLAV KOTON. "REALIZATION OF FIRST-ORDER CURRENT-MODE FILTERS WITH LOW NUMBER OF MOS TRANSISTORS." Journal of Circuits, Systems and Computers 22, no. 01 (January 2013): 1250071. http://dx.doi.org/10.1142/s0218126612500715.
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In this paper, a new current-mode (CM) circuit for realizing all of the first-order filter responses is suggested. The proposed configuration contains low number of components, only two NMOS transistors both operating in saturation region, two capacitors and two resistors. Major advantages of the presented circuit are low voltage, low noise and high linearity. The proposed filter circuit can simultaneously provide both inverting and non-inverting first-order low-pass, high-pass and all-pass filter responses. Computer simulation results achieved through SPICE tool and experimental results are given as examples to demonstrate performance and effectiveness of the proposed topology.
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Liu, Hai Tao, Zhi Yu Wen, Li Chen, and Zhong Quan Wen. "System Simulation and Test of a Field Emission Accelerometer." Key Engineering Materials 562-565 (July 2013): 306–10. http://dx.doi.org/10.4028/www.scientific.net/kem.562-565.306.
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Field emission accelerometer work in vacuum environment, the negative exponential relationship between the current and the distance of the cathode and anode electrode make the accelerometer has high sensitivity and serious non-linearity. A system simulation method by using SIMULINK tools was put forward, and the system simulation model was proposed. The system simulation was carried out under low vacuum and high vacuum environment. On the guidance of the simulation result, the circuit was designed and the performance of accelerometer was tested. The result indicated that the accelerometer have good linearity and sensitivity.
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Asl, S. N., M. Tarkhan, and M. S. Nia. "A Gain Programmable Analog Divider Circuit Based on a Data Converter." Engineering, Technology & Applied Science Research 7, no. 6 (December 18, 2017): 2251–55. http://dx.doi.org/10.48084/etasr.1436.
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Analog dividers are widely used in analog systems. Analog realization of such circuits suffer from limited dynamic range and non-linearity issues, therefore, extra circuitry should be required to compensate these types of shortcomings. In this paper a gain controllable, analog divider is proposed based on data converters. Our circuit can be implemented both in current and voltage mode by selecting proper architectures. The resolution, power consumption and operation speed can be controlled by proper selecting of components. Another advantage of our circuit is its gain programmability. Moreover, the gain can be adjusted independently based on the relationship between input signals. Our proposed method offers two different gain control abilities, one for situation that the numerator signal is bigger than the denominator, and another gain is applied when the denominator is larger than the numerator. As a result, no extra amplifier is required for signal amplification. Moreover, the input and output signal nature can be chosen arbitrarily in this circuit, i.e. input signal may be a voltage signal while the output signal is current. Simulation results from SPICE confirm the proper operation of the circuit.
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Kassa, Wosen-Eshetu, Anne-Laure Billabert, Salim Faci, and Catherine Algani. "Simulation of heterodyne RoF systems based on 2 DFB lasers: application to an optical phase-locked loop design." International Journal of Microwave and Wireless Technologies 6, no. 2 (February 19, 2014): 207–11. http://dx.doi.org/10.1017/s1759078714000117.
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This paper presents a simulation approach of optical heterodyne systems by using the equivalent circuit representation of a distributed feedback laser (DFB) in the electrical domain. Since the electrical representation of the DFB laser is developed from the rate equations, its characteristics such as non-linearity, relative intensity noise (RIN), and phase noise can be predicted precisely for various biasing conditions. The model is integrated in a heterodyne radio over fiber (RoF) system where two DFB lasers are used to generate a millimeter-wave (mm-wave) signal. An optical phase-locked loop is also introduced to reduce the phase noise on the mm-wave signal. The optical phase noise contribution of individual lasers to the mm-wave signal is evaluated and compared with theoretical results. It is shown that the phase noise of the mm-wave is reduced considerably depending on the loop bandwidth and propagation delay. With the circuit simulation approach proposed, optical and mm-wave phase noises can be studied together with other circuit environments such as parasitic effects and driver circuits.
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Lanh, Dang, Nguyen Son, and Le Doan Dinh Duc. "Study and construction of a successive approximation ADC8K for multichannel analyzer system." Tạp chí Khoa học 15, no. 3 (September 20, 2019): 11. http://dx.doi.org/10.54607/hcmue.js.15.3.2247(2018).
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Multi-channel Analyzer (MCA) is one of very essential equipment in nuclear physics and nuclear engineering for the measurement of ionization radiation. Generally, an MCA system consists of radiation detector, amplifier system, ADC circuit, and MCD connected with computer for data processing. Among them, ADC is a functional electronic block, which plays an important role for converting analog to digital signals. Corresponding to the domestic needs in development of nuclear instruments, this work presents a design and construction of an ADC8K module with successive approximation method. Some experimental results are as follows: Differential non-linearity (DNL%) = 1.42, Integral non-linearity (INL% = 0.58), and χ2 = 8.109 proved that mentioned system can be used with considerable reliability in practical nuclear engineering.
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Jiangbo, Zhao, and Wang Junzheng. "The fractional order PI control for an energy saving electro-hydraulic system." Transactions of the Institute of Measurement and Control 39, no. 4 (October 30, 2015): 505–19. http://dx.doi.org/10.1177/0142331215610184.
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In an electro-hydraulic system (EHS), the throttling phenomenon of the hydraulic valve leads to the problem of low utilization efficiency of hydraulic energy and severe increases in temperature. To alleviate this problem, this paper presents a type of one-chamber-controlled hydraulic circuit. In some applications where elastic load is dominant, this hydraulic circuit can achieve a significant energy-saving effect. For a valve-controlled system, the orifice non-linearity and the slowly varying parameter significantly influence the control performance of the electro-hydraulic system. With this aim in mind, the orifice compensation method is proposed to deal with the orifice non-linearity. Based on the compensation, the fractional order proportional–integral (FOPI) controller is adopted to deal with the problem of fluid parameter variation. In the controller designing process, this paper proposes a controller parameter tuning method based on system frequency characteristic data. Simulation and experiment results show that the strategy presented in this paper can reduce the energy losses dramatically and, at the same time, the control performance of electro-hydraulic system can be guaranteed.
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Palsodkar, Prachi, Pravin Dakhole, and Prasanna Palsodkar. "Reduced Complexity Linearity Improved Threshold Quantized Comparator Based Flash ADC." Journal of Circuits, Systems and Computers 26, no. 03 (November 21, 2016): 1750046. http://dx.doi.org/10.1142/s0218126617500463.
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This paper describes a standard cell-based new approach of comparator design for flash ADC. Conventional flash ADC comparator consumes up to 60% of the power due to resistive ladder network and analog comparators. Threshold inverter quantized (TIQ) comparators reported earlier have improved speed and provide low-power, low-voltage operation. But they need feature size variation and have non-linearity issues. Here, a new standard cell comparator is proposed which retains all advantages of TIQ comparator and provides improved linearity with reduced hardware complexity. A 4-bit ADC designed using the proposed comparator requires 206 minimum-sized transistors and provides large area saving compared to previously proposed designs. Thermometer code is partitioned using algebraic division theorem. This conversion is used for mathematical modeling and complexity reduction of decoder circuit using semi-parallel organization of comparators. Circuit is designed using 90 nm technology which exhibits satisfactory performance even in process variation.
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Yoshida, Yasunori, Konami Izumi, and Hirobumi Ushijima. "Piezo Inkjet Equivalent Circuit Analysis Modeling the Non-Linearity of Fluid Movement near the Orifice." Journal of The Japan Institute of Electronics Packaging 24, no. 3 (May 1, 2021): 257–67. http://dx.doi.org/10.5104/jiep.jiep-d-20-00118.
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Vasudeva, G., and B. V. Uma. "Design and Implementation of High Speed and Low Power 12-bit SAR ADC using 22nm FinFET." WSEAS TRANSACTIONS ON SYSTEMS AND CONTROL 17 (January 3, 2022): 1–15. http://dx.doi.org/10.37394/23203.2022.17.1.
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Successive Approximation Register (SAR) Analog to Digital Converter (ADC) architecture comprises of sub modules such as comparator, Digital to Analog Converter and SAR logic. Each of these modules imposes challenges as the signal makes transition from analog to digital and vice-versa. Design strategies for optimum design of circuits considering 22nm FinFET technology meeting area, timing, power requirements and ADC metrics is presented in this work. Operational Transconductance Amplifier (OTA) based comparator, 12-bit two stage segmented resistive string DAC architecture and low power SAR logic is designed and integrated to form the ADC architecture with maximum sampling rate of 1 GS/s. Circuit schematic is captured in Cadence environment with optimum geometrical parameters and performance metrics of the proposed ADC is evaluated in MATLAB environment. Differential Non Linearity and Integral Non Linearity metrics for the 12-bit ADC is limited to +1.15/-1 LSB and +1.22/-0.69 LSB respectively. ENOB of 10.1663 with SNR of 62.9613 dB is achieved for the designed ADC measured for conversion of input signal of 100 MHz with 20dB noise. ADC with sampling frequency upto 1 GSps is designed in this work with low power dissipation less than 10 mW.
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Yang, Lin Yu, Run Qiao Yu, and Yu Lan Qiu. "Eddy Current Testing Sensor Design and Comparative Experiment Study Based on Amorphous Alloy." Applied Mechanics and Materials 182-183 (June 2012): 416–21. http://dx.doi.org/10.4028/www.scientific.net/amm.182-183.416.
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After comparing the principle features of MnZn ferrite material of high permeability and amorphous alloy of FeCuNbSiB, this paper produced an improved solution to sensor performance by applying highly magnetic non-brilliant alloy of iron base to the testing windings of eddy current testing sensors and designed the two-dimensional decomposition testing circuit in terms of sensor testing signal. It ended with a comparison between new sensors and traditional ferrite winding sensors in terms of sensibility and linearity. The experiment results showed that the new eddy current sensors have much better sensibility and linearity compared with their traditional peers.
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Tsypin, B. V., S. A. Zdobnov, and K. E. Utkin. "CORRECTION OF CHARACTERISTICS OF SENSITIVE ELEMENTS PRESSURESENSORS." Izvestiya of Samara Scientific Center of the Russian Academy of Sciences 24, no. 4 (2022): 148–54. http://dx.doi.org/10.37313/1990-5378-2022-24-4-148-154.
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Methods for correcting the nonlinearity and temperature dependence of the conversion function of primary measuring transducers are given. On the example of pressure sensors, the advantages and disadvantages of correcting in the elements of the primary transducer, adjusting only in individual links, and correcting introduced into subsequent elements of the measuring circuit are considered. Options for introducing automatic correction are shown. A classification of methods for correcting the nonlinearity of the transformation function and methods for correcting the temperature error is given. Keywords: primary measuring transducer, pressure sensor, conversion function, measuring circuit, non-linearity error, temperature error, correction.
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Li, Shu Han, Ning Yang, Li Cheng, and Sheng Hua Zhang. "A High-Speed and High-Linearity BiCMOS Optically Coupled Isolation Amplifier." Applied Mechanics and Materials 241-244 (December 2012): 2200–2203. http://dx.doi.org/10.4028/www.scientific.net/amm.241-244.2200.
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To improve the current non-linear optically coupled isolation amplifier and high power consumption, we designed a low-power, high-speed and high-linearity BiCMOS optically isolation amplifier. There are only two push-pull output stages configuration bipolar transistor (BJT) in the design process, the rest of the circuit is the CMOS device. To improve amplifier gain linearity and stability, we introduce the complementary symmetrical photodiode, in the optically coupled part and every amplifier, negative feedback is introduced. Experimental results indicate that the design of optically isolation amplifier ± 3 dB bandwidth increases 40 kHz than optically isolation amplifier ISO100 bipolar, When the power supply voltage is 4.8 V, the delay - power product of DP is lower than ISO100 37.3 pJ, gain linearity is up to 5.5 × 10-5, which is suitable for high-speed control system.
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Moura, Luis. "On the Amplitude Analysis of MOS Differential LC Oscillators." International Journal of Electrical Engineering & Education 47, no. 2 (April 2010): 95–103. http://dx.doi.org/10.7227/ijeee.47.2.1.
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In this paper we discuss the application of the negative resistance concept to estimate the amplitude of oscillation of MOS differential LC oscillators in a steady-state regime. This is done by approximating the large-signal non-linearity, associated with the negative resistance, by a piecewise linear model. The analytical findings are in very good agreement with the results provided by transient circuit simulation.
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Caruso, Roberta, Davide Massarotti, Alessandro Miano, Vitaly Bolginov, Aymen Hamida, Liubov Karelina, Igor Vernik, et al. "Ferromagnetic Josephson Junctions for High Performance Computation." Proceedings 12, no. 1 (June 25, 2019): 16. http://dx.doi.org/10.3390/proceedings2019012016.
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Josephson junctions drive the operation of superconducting qubits and they are the key for the coupling and the interfacing of superconducting qubit components with other quantum platforms. They are the only means to introduce non linearity in a superconducting circuit and offer direct solutions to tune the properties of a superconducting qubit, thus enlarging the possible qubit layouts. Junctions performances and tunability can take advantage of using a large variety of barriers and their special functionalities. We mention pertinent results on the advances in understanding the properties of ferromagnetic junctions, which makepossible the use of these devices either as memory elements and as core circuit elements.
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Wei, Jing, Yan Su, and Xin Hua Zhu. "Design of Micromachined Thermal Expansion Gas Gyroscope Signal Detection Circuit." Advanced Materials Research 791-793 (September 2013): 1036–40. http://dx.doi.org/10.4028/www.scientific.net/amr.791-793.1036.
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Micromachined thermal expansion gas gyroscope has the advantages of simple configuration, large working range and high shock resistance and can be widely used in the military and civilian field. However, as with other MEMS sensors,the output signal of micromachined thermal expansion gas gyroscope's sensitive structure is weak and difficult to detect are designed. In this paper, the design of the detecting circuits for micromachined thermal expansion gas gyroscope based on the phase sensitive detector is introduced. The measurement results of the prototype show a system scale factor of 2.3419 mV/(°·s-1), a non-linearity of 0.22%, a symmetry of 0.0037, and a zero-bias stability of 1.0182 °/s.
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Chandrakar, K., P. L. Venkateshwara Rao, P. Rajendran, and C. Satyanarayana. "Dynamic Analysis of HSDB System and Evaluation of Boundary Non-linearity through Experiments." Defence Science Journal 66, no. 3 (April 25, 2016): 210. http://dx.doi.org/10.14429/dsj.66.8936.
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<p class="FAIMTextBody">This paper deals with mechanical design and development of high speed digital board (HSDB) system which consists of printed circuit board (PCB) with all electronic components packaged inside the cavity for military application. The military environment poses a variety of extreme dynamic loading conditions, namely, quasi static, vibration, shock and acoustic loads that can seriously degrade or even cause failure of electronics. The vibrational requirement for the HSDB system is that the natural frequency should be more than 200 Hz and sustain power spectrum density of 14.8 Grms in the overall spectrum. Structural integrity of HSDB is studied in detail using finite element analysis (FEA) tool against the dynamic loads and configured the system. Experimental vibration tests are conducted on HSDB with the help of vibration shaker and validated the FE results. The natural frequency and maximum acceleration response computed from vibration tests for the configured design were found. The finite element results show a good correlation with the experiment results for the same boundary conditions. In case of fitment scenario of HSDB system, it is observed that the influence of boundary non-linearity during experiments. This influence of boundary non-linearity is evaluated to obtain the closeout of random vibration simulation results.</p>
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Nawito, M., H. Richter, A. Stett, and J. N. Burghartz. "A programmable energy efficient readout chip for a multiparameter highly integrated implantable biosensor system." Advances in Radio Science 13 (November 3, 2015): 103–8. http://dx.doi.org/10.5194/ars-13-103-2015.
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Abstract. In this work an Application Specific Integrated Circuit (ASIC) for an implantable electrochemical biosensor system (SMART implant, Stett et al., 2014) is presented. The ASIC drives the measurement electrodes and performs amperometric measurements for determining the oxygen concentration, potentiometric measurements for evaluating the pH-level as well as temperature measurements. A 10-bit pipeline analog to digital (ADC) is used to digitize the acquired analog samples and is implemented as a single stage to reduce power consumption and chip area. For pH measurements, an offset subtraction technique is employed to raise the resolution to 12-bits. Charge integration is utilized for oxygen and temperature measurements with the capability to cover current ranges between 30 nA and 1 μA. In order to achieve good performance over a wide range of supply and process variations, internal reference voltages are generated from a programmable band-gap regulated circuit and biasing currents are supplied from a wide-range bootstrap current reference. To accommodate the limited available electrical power, all components are designed for low power operation. Also a sequential operation approach is applied, in which essential circuit building blocks are time multiplexed between different measurement types. All measurement sequences and parameters are programmable and can be adjusted for different tissues and media. The chip communicates with external unites through a full duplex two-wire Serial Peripheral Interface (SPI), which receives operational instructions and at the same time outputs the internally stored measurement data. The circuit has been fabricated in a standard 0.5-μm CMOS process and operates on a supply as low as 2.7 V. Measurement results show good performance and agree with circuit simulation. It consumes a maximum of 500 μA DC current and is clocked between 500 kHz and 4 MHz according to the measurement parameters. Measurement results of the on-chip ADC show a Differential Non Linearity (DNL) lower than 0.5 LSB, an Integral Non Linearity (INL) lower than 1 LSB and a Figure of Merit (FOM) of 6 pJ/conversion.
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Bendecheche, Hichem, Said Sadoudi, Houari Sayah, and Achour Ouslimani. "A novel 0.2–7 GHz microwave hyperchaotic generator based on Hartley oscillator." Physica Scripta 97, no. 5 (March 29, 2022): 055202. http://dx.doi.org/10.1088/1402-4896/ac5ce1.
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Abstract In this paper, a miniaturized microwave-band hyperchaotic generator prototype has been designed and realized. By improving the topology of Hartley oscillator, the proposed single-stage common-collector structure oscillator enables us to generate a microwave 0.2–7 GHz smooth spectrum signal with a power around −30 dBm. Using BFP650 SiGe transistor as a non-linear component, the proposed circuit has been implemented and simulated then experimentally approved. Introducing the parasitic capacitors C BC and C BE and using the exponential model to describe the active component non-linearity, a simplified electrical model for the developed circuit has been proposed. To exhibit the deterministic chaotic character of the mentioned circuit, mathematical and schematic implementation results using Matlab and Advanced Design System (ADS) simulations have been presented. The concordance between the two simulation results permits us to adopt the simplified state equation model to describe the circuit behavior. The Lyapunov spectrum exponents representation allowed us to verify the hyperchaotic behavior in the presented generator. Finally, an autonomous simple prototype architecture of the generator using the PTFE (Polytetrafluoroethylene) substrate with ε r = 2.2 has been realized and experimentally validated. The achieved performances made the proposed circuit suitable for various fields of telecommunications.
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Omri, B., L. Fakhfakh, K. Ammous, and A. Ammous. "Validation of a Nonlinear Average Model of NPC Inverters Based on Experimental Investigations." International Journal of Emerging Electric Power Systems 17, no. 6 (December 1, 2016): 717–29. http://dx.doi.org/10.1515/ijeeps-2016-0090.
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Abstract This paper proposes a nonlinear average model of three levels NPC inverter. This model takes into account the semiconductor non-linearity and static characteristics of these devices. The proposed technique uses experimental results to evaluate the different devices parameters. The developed nonlinear average model allows dissipated power and junction temperature evaluation. Unlike the circuit model (fine model), the proposed method has less computational burden. It can be applied to three levels Neutral-Point-Clamped inverter (NPC).
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Mayacela, Margarita, Leonardo Rentería, Luis Contreras, and Santiago Medina. "Comparative Analysis of Reconfigurable Platforms for Memristor Emulation." Materials 15, no. 13 (June 25, 2022): 4487. http://dx.doi.org/10.3390/ma15134487.
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The memristor is the fourth fundamental element in the electronic circuit field, whose memory and resistance properties make it unique. Although there are no electronic solutions based on the memristor, interest in application development has increased significantly. Nevertheless, there are only numerical Matlab or Spice models that can be used for simulating memristor systems, and designing is limited to using memristor emulators only. A memristor emulator is an electronic circuit that mimics a memristor. In this way, a research approach is to build discrete-component emulators of memristors for its study without using the actual models. In this work, two reconfigurable hardware architectures have been proposed for use in the prototyping of a non-linearity memristor emulator: the FPAA (Field Programing Analog Arrays) and the FPGA (Field Programming Gate Array). The easy programming and reprogramming of the first architecture and the performance, high area density, and parallelism of the second one allow the implementation of this type of system. In addition, a detailed comparison is shown to underline the main differences between the two approaches. These platforms could be used in more complex analog and/or digital systems, such as neural networks, CNN, digital circuits, etc.
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Delwar, Tahesin Samira, Unal Aras, Abrar Siddique, Yangwon Lee, and Jee-Youl Ryu. "A Reformed PSO-Based High Linear Optimized Up-Conversion Mixer for Radar Application." Sensors 24, no. 3 (January 29, 2024): 879. http://dx.doi.org/10.3390/s24030879.
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A reformed particle swarm optimization (RPSO)-based up-conversion mixer circuit is proposed for radar application in this paper. In practice, a non-optimized up-conversion mixer suffers from high power consumption, poor linearity, and conversion gain. Therefore, the RPSO algorithm is proposed to optimize the up-conversion mixer. The novelty of the proposed RPSO algorithm is it helps to solve the problem of local optima and premature convergence in traditional particle swarm optimization (TPSO). Furthermore, in the RPSO, a velocity position-based convergence (VPC) and wavelet mutation (WM) strategy are used to enhance RPSO’s swarm diversity. Moreover, this work also features novel circuit configurations based on the two-fold transconductance path (TTP), a technique used to improve linearity. A differential common source (DCS) amplifier is included in the primary transconductance path (PTP) of the TTP. As for the subsidiary transconductance path (STP), the enhanced cross-quad transconductor (ECQT) is implemented within the TTP. A benchmark function verification is conducted to demonstrate the effectiveness of the RPSO algorithm. The proposed RPSO has also been compared with other optimization algorithms such as the genetic algorithm (GA) and the non-dominated sorting genetic algorithm II (NSGA-II). By using RPSO, the proposed optimized mixer achieves a conversion gain (CG) of 2.5 dB (measured). In this study, the proposed mixer achieves a 1 dB compression point (OP1dB) of 4.2 dBm with a high linearity. In the proposed mixer, the noise figure (NF) is approximately 3.1 dB. While the power dissipation of the optimized mixer is 3.24 mW. Additionally, the average time for RPSO to design an up-conversion mixer is 4.535 s. Simulation and measured results demonstrate the excellent performance of the RPSO optimized up-conversion mixer.
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Hou, Jun Fang, Wei Hua Zhang, Min Jing, He Ping Wang, and Yong Chang Guo. "Design and Test Research on Voice Coil Actuator Used for Active Isolation Platform." Applied Mechanics and Materials 628 (September 2014): 261–65. http://dx.doi.org/10.4028/www.scientific.net/amm.628.261.
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According to the actuating requirement of active isolation platform, magnetic circuit and moving coil structure of non-contact installing type of voice coil actuator was designed, and the magnetic filed of the working gap was simulated. A programmable current supply used for driving the voice coil actuator was designed and the circuit was simulated. Output force performance of the designed voice coil actuator driving by programmable current supply was tested. The test results indicate that the designed voice coil actuating system has excellent output force performance at low frequency band with good linearity and low noise and waviness. The measured output force coefficient of the voice coil actuator matches with the designed value, and the designed actuating system can meet the requirement of active isolation platform.
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Zhou, Shi Guan, and Zai Fei Luo. "Application of Fuzzy Neural Network to Analog Circuit Fault Diagnosis." Applied Mechanics and Materials 182-183 (June 2012): 1179–83. http://dx.doi.org/10.4028/www.scientific.net/amm.182-183.1179.
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Considering the discreteness and non-linearity of the component parameter and the advancement and limitations of neural network in the analogous circuit fault diagnosis and as the combination of the fuzzy logic and neural network, the fuzzy neural network’s having the merits of both, involving learning, association, recognition, adaptation and fuzzy information processing, a method with fuzzy neural network for the analogous circuit fault diagnosis is proposed. In this paper, the structure and training methods of the fuzzy neural network are presented and the specific implementation of the diagnosis system is illustrated with examples. Simulation results show that the mathematical model has a better diagnostic effect. Compared with other methods, this diagnostic method, with the broad application prospect of its structure and method, is scientific, simple, and practical and so on.
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Huang, Chao, and Wan-Jun Yin. "Design of High Performance Low-Noise Amplifier Circuit Based on Complementary Metal Oxide Semiconductor Technology." Journal of Nanoelectronics and Optoelectronics 16, no. 4 (April 1, 2021): 559–64. http://dx.doi.org/10.1166/jno.2021.2949.
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This paper designs a body-biased (BB) differential cascode low-noise amplifier (LNA) with current bias (CR) and capacitor cross-coupling (CCC) technology that meets the bandwidth requirements of 5 GHz wireless applications. In the design, the CCC technology in the differential cascode topology is used to effectively suppress the common mode noise, thereby improving the noise figure. The series resonant network eliminates parasitic capacitance at the input and output ends, thereby improving the power transmission efficiency. The CR technology formed by the intermediate capacitor shares the DC current input to the output device, thereby increasing the gain. This paper uses BB technology in the design to lower the threshold of the cascode device and improve the transconductance, which further improves the gain and reduces the power consumption. The CCC technology used in the paper improves linearity by eliminating the non-linear components present in the input device, which will not interfere with the transconductance of the output stage. This article has obtained excellent performance parameters including gain, noise figure (NF) and linearity without affecting the power consumption, integration and cost of the proposed design.
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Li, Yanchao, Ruichuan Li, Junru Yang, Jikang Xu, and Xiaodong Yu. "Effect of Excitation Signal on Double-Coil Inductive Displacement Transducer." Sensors 23, no. 7 (April 6, 2023): 3780. http://dx.doi.org/10.3390/s23073780.
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A double-coil inductive displacement transducer is a non-contact element for measuring displacement and is widely used in large power equipment systems such as construction machinery and agricultural machinery equipment. The type of coil excitation signal has an impact on the performance of the transducer, but there is little research on this. Therefore, the influence of the coil excitation signal on transducer performance is investigated. The working principle and characteristics of the double-coil inductive displacement transducer are analyzed, and the circuit simulation model of the transducer is established. From the aspects of phase shift, linearity, and sensitivity, the effects of a sine signal, a triangle signal, and a pulse signal on the transducer are compared and analyzed. The results show that the average phase shift, linearity, and sensitivity of the sine signal were 11.53°, 1.61%, and 0.372 V/mm, respectively; the average phase shift, linearity and sensitivity of the triangular signal were 1.38°, 1.56%, and 0.300 V/mm, respectively; and the average phase shift, linearity, and sensitivity of the pulse signal were 0.73°, 1.95%, and 0.621 V/mm, respectively. It can be seen that the phase shift of a triangle signal and a pulse signal is smaller than that of a sine signal, which can result in better signal phase-locked processing. The linearity of the triangle signal is better than the sine signal, and the sensitivity of the pulse signal is better than that of the sine signal.
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Baral, Biswajit, Sudhansu Mohan Biswal, Debashis De, and Angsuman Sarkar. "Radio frequency/analog and linearity performance of a junctionless double gate metal–oxide–semiconductor field-effect transistor." SIMULATION 93, no. 11 (April 20, 2017): 985–93. http://dx.doi.org/10.1177/0037549717704308.
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The analog/radio frequency (RF) and linearity performance of a junctionless double gate metal–oxide–semiconductor field-effect transistor (JL DGMOS) is investigated using the numerical TCAD device simulator. JL DGMOSs have shown great promise for high-performance digital applications due to their superior short channel effect performance and ease of fabrication. In analog and RF circuit applications, linearity testing and RF performance is a major issue that is encountered due to non-linear behavior of the devices. Therefore, in this paper, different RF/analog and linearity performance figures of merits such as transconductance, intrinsic gain, the transconductance generation factor, the cut off frequency, the maximum frequency of oscillation, the gain bandwidth product, the variable intercept point of second order, the variable intercept point of third order, inter modulation distortion, the third-order intercept point, and 1-dB compression have been presented. Moreover, the effect of gate-length downscaling on these performance parameters has been carried out. The results indicate that the down scaled JL DGMOS shows great promise to become a competitive contender for analog/mixed signal system on chip applications by demonstrating a significant improvement in its RF performance with gate-length downscaling.
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Kwon, Soon-Kyu, and Hyeon-June Kim. "A Dynamic Range Preservation Readout Integrated Circuit for Multi-Gas Sensor Array Applications." Chemosensors 12, no. 4 (April 9, 2024): 60. http://dx.doi.org/10.3390/chemosensors12040060.
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This study introduces a readout integrated circuit (ROIC) tailored for multi-gas sensor arrays featuring a proposed baseline calibration scheme aimed at mitigating the issue of sensor baseline variation. Unlike previous approaches, the proposed scheme stores each sensor’s baseline value and dynamically updates the signal extraction range accordingly during ROIC operation. This adjustment allows for the optimal use of the ROIC’s dynamic range, enhancing sensor uniformity and accuracy without the need for complex additional circuitry or advanced post-processing algorithms. We fabricated a prototype ROIC using a 180 nm CMOS process, achieving a low power consumption of 0.43 mW and a conversion rate of 50 kSPS. The prototype boasts an integrated noise level of 9.9 μVRMS across a frequency range of 0.1 Hz to 5 kHz and a dynamic range of 142.6 dB, coupled with superior linearity, indicated by a maximum integral non-linearity (INL) of −75.71 dB. This design significantly reduces sensor offset scattering to within 1 LSB of the A/D reference scale. In this study, the efficacy of the proposed scheme was validated using Figaro TGS-2600. The ROIC targets a sensitivity range from 0.54 to 0.23 for gas concentrations ranging from 5 ppm to 20 ppm and a resolution of 39 Ω for sensor resistance range from 10 kΩ to 90 kΩ. The enhancements in performance make the proposed ROIC a promising solution for precise gas concentration detection in sensor applications.
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Zang, Xiaoxuan, Jianting Zhao, Yunfeng Lu, and Qing He. "Precision Measurement System of High-Frequency Signal Based on Equivalent-Time Sampling." Electronics 11, no. 13 (July 5, 2022): 2098. http://dx.doi.org/10.3390/electronics11132098.
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A high frequency periodic signal measurement system based on equivalent sampling method is developed. A high-speed sampling voltage tracking circuit, the core component of the system, is described in detail. The circuit can transform the amplitude corresponding to different phase points of the signal undertest into the equivalent DC level through successive approximation of multiple periods. The measurement system designed in this paper completes digital sampling with high accuracy only by connecting the low-cost voltage tracking circuit to the existing commercial instruments, such as two-channel waveform generator and high-precision digital multimeter, which makes the method easy to be generalized. The special structure of the sampling tracking circuit greatly reduces the influence of random noise and time jitter on the measurement results. The experimental results show that the non-linearity error of the system is as low as 0.002%, the bandwidth can reach 200 MHz, and the uncertainty of measuring the RMS of AC voltage with peak value of ±1 V and frequency of 10 kHz, 100 kHz and 1 MHz can reach 2.8 × 10−4 V, 4.6 × 10−4 V and 2.0 × 10−4 V (k = 2), respectively.
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Liu, Li Juan, Jun Bo Wang, De Yong Chen, and Jian Chen. "Non-Invasive Wireless and Passive MEMS Intraocular Pressure Sensor Based on Flexible Substrate." Applied Mechanics and Materials 748 (April 2015): 115–27. http://dx.doi.org/10.4028/www.scientific.net/amm.748.115.
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The intraocular pressure (IOP) is an indicator for the diagnosis and treatment of glaucoma. The traditional measurement of IOP cannot provide a continuous measurement within 24 hours with compromised functionality in glaucoma diagnosis. This paper presents a wireless, passive and non-invasive contact lens sensor (CLS) for continuous monitoring of IOP based on the flexible substrate. This curvature-sensitive sensor includes an inductor and two capacitors to form a C-L-C resonant circuit, which were embedded in parylene C using PDMS as the intermediate medium layer. The C-L-C resonant circuit is used for passive and wireless sensing and simplifying the wireless bonding step. Compared to parylene C, PDMS has a much lower Young Modulus, enabling the quantification of the sensor curvatures, as an indicator of IOP. To fit human eyeballs, the size of the sensor was designed as follows: the outer diameter: 12 mm, the radius of curvature: 8.5 mm. The sensor was characterizedin vitroto obtain the frequency response, and the results show that the sensor has a linearity R>0.97 and a sensitivity>9.7 kHz/kPa. This sensor can be used to monitor IOP together with the reading circuit continuously, enabling the diagnosis of glaucoma without impacting the daily life of users.
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Poornesh Kumar, K. S., and K. Ranjith Kumar. "Robust Dissipative-based PI Observer Design for the State of Charge estimation of a Lithium-Ion Battery." March 2022 4, no. 1 (April 26, 2022): 41–56. http://dx.doi.org/10.36548/jeea.2022.1.005.
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As the battery is a non-linear system, a robust dissipative-based Proportional Integral (PI) observer is proposed in this work to estimate the SoC. As special cases based on energy-related concerns, the theory of the dissipative concept incorporates H∞, passivity, and L2 performances. In particular, developing Dissipative PI Observer for the SoC system with disturbances, uncertainty and non-linearity are the major novelties in this study. The suggested system's findings are compared to the results of the Equivalent circuit model method and Coulomb-Counting method. MATLAB/SIMULINK is used to simulate the proposed system. Moreover, using Lyapunov stability theory, a novel set of adequate necessities in terms of LMI is erected to secure the conservative outcome.
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Jose, Julia Tholath, and Adhir Baran Chattopadhyay. "Modeling of the magnetizing phenomena of doubly fed induction generator using neuro-fuzzy algorithm considering non-linearity." International Journal of Electrical and Computer Engineering (IJECE) 9, no. 1 (February 1, 2019): 23. http://dx.doi.org/10.11591/ijece.v9i1.pp23-33.
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Doubly fed Induction Generators (DFIGs) are quite common in wind energy conversion systems because of their variable speed nature and the lower rating of converters. Magnetic flux saturation in the DFIG significantly affect its behavior during transient conditions such as voltage sag, sudden change in input power and short circuit. The effect of including saturation in the DFIG modeling is significant in determining the transient performance of the generator after a disturbance. To include magnetic saturation in DFIG model, an accurate representation of the magnetization characteristics is inevitable. This paper presents a qualitative modeling for magnetization characteristics of doubly fed induction generator using neuro-fuzzy systems. Neuro-fuzzy systems with one hidden layer of Gaussian nodes are capable of approximating continuous functions with arbitrary precision. The results obtained are compared with magnetization characteristics obtained using discrete fourier transform, polynomial and exponential curve fitting. The error analysis is also done to show the effectiveness of the neuro fuzzy modeling of magnetizing characteristics. By neuro-fuzzy algorithm, fast learning convergence is observed and great performance in accuracy is achieved.
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Zhao, Chengxuan, Yuantao Wang, Chuankun Ni, Hu Chen, Yunlong Xu, Wei Ma, and Yaxin Su. "Development of the Line Protection Measurement and Control Device based on Domestic MCU." Journal of Physics: Conference Series 2108, no. 1 (November 1, 2021): 012017. http://dx.doi.org/10.1088/1742-6596/2108/1/012017.
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Abstract In this paper, the dual MCU hardware architecture of protection measurement and control device was presented by analyzing the current situation of domestic MCU and chip selection. The problems existing in ADC sampling accuracy and ADC integral non-linearity were studied. The design scheme of high-precision ADC acquisition system based on dual MCU architecture was proposed, which could meet the requirements of technical specifications by using oversampling and adaptive processing of sampling nonlinear area. In terms of reliability, the EMC performance of the device was promoted by the improvement of outlet and ADC acquisition circuit.