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Wijarnako, Sahid Wahyu, Latif Kusairi, Martina Safitry, and Sucipto Sucipto. "Dari Kultural Menuju Struktural - Perkembangan Nahdlatul Ulama di Kecamatan Manisrenggo, Klaten Tahun 1983-2017." heritage 2, no. 2 (December 31, 2021): 152–61. http://dx.doi.org/10.35719/hrtg.v2i2.56.
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Abstract Nahdlatul Ulama is a socio-religious organization founded by K.H. Hasyim Asy'ary with the elderly Kyai in East Java by carrying out the ideals of civilization, namely to create a harmonious and just world order based on morality. Manisrenggo is an area where people do not understand the teachings of Islam, so the majority of people still behave in violation of religious norms such as drinking, gambling, and believing in animism and dynamism. NU began to be known in Manisrenggo District around 1983 which was brought by K.H Masyhudi Hamid, a local Ulama from Wonokromo who moved to Klaten to carry out his duties as a Projo Pager or Satpol PP, as well as preaching to spread Islam to the Manisrenggo Community. This research uses the theory of great tradition and little tradition or big tradition and small tradition introduced by Robert Redfield. The results obtained from this study indicate that Manisrenggo which was originally a small area on the slopes of Mount Merapi where even the people know very little about Islam and their daily lives are still filled with activities that violate religious and community norms such as gambling, drinking, stealing, and others. After the arrival of Nahdlatul Ulama in Manisrenggo, the people became more acquainted with Islam and gradually began to know the teachings of Islam and leave their old culture. NU in Manisrenggo also plays an active role in social, religious, and educational fields which can be seen from the establishment of madrasas, Islamic boarding schools, TPAs, assemblies, mosques, prayer rooms, and various other activities with the community.
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Mandal, Anamika, Puran Gour, and Braj Bihari. "Review Paper on Efficient VLSI Architecture for Carry Select Adder." International Journal of Computer Applications 161, no. 4 (March 15, 2017): 4–7. http://dx.doi.org/10.5120/ijca2017913137.
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Willemson, Jan. "Bits or paper: Which should get to carry your vote?" Journal of Information Security and Applications 38 (February 2018): 124–31. http://dx.doi.org/10.1016/j.jisa.2017.11.007.
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You, Yuan, Tang, and Qiao. "An Energy and Area Efficient Carry Select Adder with Dual Carry Adder Cell." Electronics 8, no. 10 (October 7, 2019): 1129. http://dx.doi.org/10.3390/electronics8101129.
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In this paper, an energy and area efficient carry select adder (CSLA) is proposed. To minimize the redundant logic operation of a regular CSLA, a dual carry adder cell is proposed. The proposed dual carry adder is composed of an XOR/XNOR cell and two pairs of sum-carry cells. Both CMOS logic and a transmission gate were applied to the dual carry adder cell to achieve fast and energy efficient operation. Eight-bit, 16b, and 32b square-root (SQRT) CSLAs based on the proposed dual carry adder were developed. The post-layout simulation based on a SMIC 55 nm process demonstrated that the proposed CSLAs reduced power consumption by 68.4–72.2% with a slight delay increase for different bit widths. As the dual carry adder had much fewer transistors than the two regular full adders, the area of the proposed CSLAs was reduced by 45.8–51.1%. The area-power-delay product of the proposed CSLA improved 5.1×–6.73× compared with the regular CSLA.
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McTighe, Laura. "Our Relationships Carry the Movement." Radical History Review 2021, no. 140 (May 1, 2021): 186–96. http://dx.doi.org/10.1215/01636545-8841778.
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Abstract The radical HIV prison activist movement has always been, in practice, an abolitionist movement. Set in Philadelphia in the early 2000s, this article centers the relationships through which leaders of ACT UP Philadelphia, the Philadelphia County Coalition for Prison Health Care, TEACH Outside, and Project UNSHACKLE worked to transform the social conditions for which prisons have been posited as the solution and to create a prison-free future in real time. Its pages unfold a three-part methodological toolkit for HIV prevention justice. First, harm reduction demands that one show up and provide relief, no questions asked. Second, mutual aid grounds the forging of new social relations that are more survivable than those produced by HIV stigma, mass criminalization, and organized abandonment. Third, transformative justice offers both a vision and a practice for challenging criminalization in all its intimate, communal, and structural forms, and building a racially just and strategic HIV movement.
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BALASUBRAMANIAN, P., D. A. EDWARDS, and W. B. TOMS. "SELF-TIMED SECTION-CARRY BASED CARRY LOOKAHEAD ADDERS AND THE CONCEPT OF ALIAS LOGIC." Journal of Circuits, Systems and Computers 22, no. 04 (April 2013): 1350028. http://dx.doi.org/10.1142/s021812661350028x.
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This paper makes two important contributions to the domain of self-timed computer arithmetic. Firstly, a gate-level synthesis of self-timed carry lookahead (CLA) adders based on the notion of section-carry is discussed. Three types of CLA adder architectures have been conceived and both homogeneous and heterogeneous delay-insensitive (DI) data encoding schemes are considered. In general, for higher-order additions, the self-timed CLA adder is found to result in reduced latency than the carry ripple version by 38.6%. However, the latter occupies less area and dissipates less power than the former by 37.8% and 17.4%, respectively. Secondly, a new concept of alias logic is introduced in this work which is useful for delay optimization of iterative circuit specifications — here; this concept is applied to effect latency reduction in self-timed CLA adders. By incorporating alias logic, the propagation delay of the intermediate carries in a CLA structure is further minimized to the tune of 27.2% on average, whilst accompanied by marginal area and power penalties of the order of just 2% and 1.5%, respectively.
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Okoloko, Innocent E. "Discrete Time Convolution is Multiplication without Carry." European Journal of Electrical Engineering and Computer Science 5, no. 5 (October 31, 2021): 64–68. http://dx.doi.org/10.24018/ejece.2021.5.5.358.
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In this paper an analysis of discrete-time convolution is performed to prove that the convolution sum is polynomial multiplication without carry, whether the sequences are finite or not, by using several examples to compare the results computed using the existing approaches to the polynomial multiplication approach presented here. In the design and analysis of signals and systems the concept of convolution is very important. While software tools are available for calculating convolution, for proper understanding it is important to learn now to calculate it by hand. To this end, several popular methods are available. The idea that the convolution sum is indeed polynomial multiplication without carry is demonstrated in this paper. The concept is further extended to deconvolution, N-point circular convolution and the Z-transform approach.
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Chen, Chien-In Henry, and Mahesh Wagh. "Testability Synthesis for Jumping Carry Adders." VLSI Design 14, no. 2 (January 1, 2002): 155–69. http://dx.doi.org/10.1080/10655140290010079.
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Synthesis for testability ensures that the synthesized circuit is testable by exploring the fundamental relationship between don't care and redundancy. With the exploration of the relationship, redundancy removal can be applied to improve the testability, reduce the area and improve the speed of a synthesized circuit. The test generation problems have been adequately solved, therefore an innovative testability synthesis strategy is necessary for achieving the maximum fault coverage and area reduction for maximum speed. This paper presents a testability synthesis methodology applicable to a top–down design method based on the identification and removal of redundant faults. Emphasis has been placed on the testability synthesis of a high-speed binary jumping carry adder. A synthesized 32-bit testable adder implemented by a 1.2 μm CMOS technology performs addition in 4.09 ns. Comparing with the original synthesized circuit, redundancy removal yields a 100% testable design with a 15% improvement in speed and a 25% reduction in area.
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Shangguan, Jin-Wen, Yu Liu, Jian-Bin Pan, Bi-Yi Xu, Jing-Juan Xu, and Hong-Yuan Chen. "Microfluidic PDMS on paper (POP) devices." Lab on a Chip 17, no. 1 (2017): 120–27. http://dx.doi.org/10.1039/c6lc01250g.
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Lin, Yu Shen, and Damu Radhakrishnan. "Delay Efficient 32-Bit Carry-Skip Adder." VLSI Design 2008 (April 2, 2008): 1–8. http://dx.doi.org/10.1155/2008/218565.
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The design of a 32-bit carry-skip adder to achieve minimum delay is presented in this paper. A fast carry look-ahead logic using group generate and group propagate functions is used to speed up the performance of multiple stages of ripple carry adders. The group generate and group propagate functions are generated in parallel with the carry generation for each block. The optimum block sizes are decided by considering the critical path into account. The new architecture delivers the sum and carry outputs in lesser unit delays than existing carry-skip adders. The adder is implemented in 0.25 m CMOS technology at 3.3 V. The critical delay for the proposed adder is 3.4 nanoseconds. The simulation results show that the proposed adder is 18 faster than the current fastest carry-skip adder.
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Beal, Brian. "Making older workers happy to carry on." Development and Learning in Organizations: An International Journal 30, no. 2 (March 7, 2016): 22–24. http://dx.doi.org/10.1108/dlo-12-2015-0098.
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Purpose The paper aims to examine the influences of the competencies, social skills and continuous learning ability on career success and career satisfaction among workers aged 50 and over. Design/methodology/approach A mixed methods approach consisted of 920 surveys and 11 semi-structured interviews with working individuals aged 50 or above, registered at a job agency specialized in older employees in The Netherlands. Multiple regression and content analysis were used to analyze the findings. Findings The survey showed a positive relationship between the competencies and career success and career satisfaction. However, the interviews revealed that not all older workers perceived the need to continuously stay up-to-date as positive, pushing them into retirement. Originality/value The influence of competencies on career success and career satisfaction of older workers has received only little attention from researchers.
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Rohman, Fandi Nur. "Model Carry Over Dalam Pembentukan Undang-Undang." Jurnal Lex Renaissance 7, no. 2 (April 1, 2022): 213–25. http://dx.doi.org/10.20885/jlr.vol7.iss2.art1.
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A number of laws passed by the House of Representatives (DPR) are anticipated with amendments to Law No. 12 of 2011 which sparked the carry over system. The formulation of the research problem in this paper is: First, what is the concept of carry over in the formation of laws in Indonesia? Second, how problematic is the carry over system in the formation of laws in Indonesia? The results of the study conclude that first, the carry-over system is a continuation system of the discussion of draft laws that can be re-incorporated into the next National Legislation Program. Second, the problem with the carry-over system is the disconnection of the people's aspirations, the stagnation of national law development, the decline in the performance of the DPR, and the public distrust of their representatives in the DPR.
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Schulze, Gordon. "Carry Trade Returns and Segmented Risk Pricing." Atlantic Economic Journal 49, no. 1 (March 2021): 23–40. http://dx.doi.org/10.1007/s11293-021-09698-2.
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AbstractThe returns to carry trades are controversially discussed. There seems to be no unifying risk-based explanation of currency returns and stock returns, while the countries’ interest rate differential plays a leading part in the carry-trade performance. Therefore, this paper addresses carry-trade returns from a risk-pricing perspective and examines if these returns can be connected to cross-country differences in risk pricing in the interest-rate market compared to the stock market. Data from Thomson Reuters Datastream and Federal Reserve Economic Data covering Australia, Japan, New Zealand, Switzerland and the United States were analyzed based on GMM estimation. The results indicate significant and persistent cross-country differences in risk aversion in the interest-rate market compared to the implied risk aversion in the stock market. This may offer opportunities for risk arbitrage and, therefore, a risk pricing-related explanation of carry-trade returns.
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Filipozzi, Fabio, and Kersti Harkmann. "Optimal currency hedge and the carry trade." Review of Accounting and Finance 19, no. 3 (August 24, 2020): 411–27. http://dx.doi.org/10.1108/raf-10-2018-0219.
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Purpose This paper aims to investigate the efficiency of different hedging strategies for an investor holding a portfolio of foreign currency bonds. Design/methodology/approach The simplest strategies of no hedge and fully hedged are compared with the more sophisticated strategies of the ordinary least squares (OLS) approach and the optimal hedge ratios found by the dynamic conditional correlation-generalised autoregressive conditional heteroskedasticity approach. Findings The sophisticated hedging strategies are found to be superior to the simple strategies because they lower the portfolio risk in domestic currency terms and improve the Sharpe ratios for multi-asset portfolios. The analyses also show that both the OLS and dynamic hedging strategies imply holding a limited carry position by being long in high-yielding currencies but short in low-yielding currencies. Originality/value The performance of multi-currency portfolios is examined using more realistic assumptions than in the previous literature, including a weekly frequency and a constraint of no short selling. Furthermore, carry trades are shown to be part of an optimal portfolio.
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Schulze, Gordon. "Correction to: Carry Trade Returns and Segmented Risk Pricing." Atlantic Economic Journal 49, no. 1 (March 2021): 41. http://dx.doi.org/10.1007/s11293-021-09708-3.
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Schmitt, Lisa B. "Norma Carr-Ruffino.Diversity Success Strategies. Butterworth-Heinemann, 1999, 322 pages." Human Resource Management 41, no. 2 (2002): 273–74. http://dx.doi.org/10.1002/hrm.10037.
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Suresh, Kandula, and Bahniman Ghosh. "Ripple Carry Adder Using Two XOR Gates in QCA." Applied Mechanics and Materials 467 (December 2013): 531–35. http://dx.doi.org/10.4028/www.scientific.net/amm.467.531.
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Quantum-dot Cellular Automata (QCA) is a very recent technology which can be used for developing new digital circuits which use very less power [1-2]. This paper mainly aims at using XOR gates to implementation of adder circuit in lesser number of cells and with a higher density.
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Burignat, Stéphane, and Alexis De Vos. "A Review on Performances of Reversible Ripple-Carry Adders." International Journal of Electronics and Telecommunications 58, no. 3 (September 2012): 205–12. http://dx.doi.org/10.2478/v10177-012-0028-0.
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Abstract Quantum computing and circuits are of growing interest and so is reversible logic as it plays an important role in the synthesis of quantum circuits. Moreover, reversible logic provides an alternative to classical computing machines, that may overcome many of the power dissipation problems in the near future. Some ripple-carry adders based on a do-spy-undo structure have been designed and tested reversibly. This paper presents a brief overview of the performances obtained with such chips processed in standard 0.35 μm CMOS technology and used in true reversible calculation (computations are performed forwards and backwards such that addition and subtraction are made reversibly with the same chip). Adiabatic signals used are known to allow the signal energy stored on the various capacitances of the circuit to be redistributed rather than being dissipated as heat while allowing to avoid calculation errors introduced by the use of conventional rectangular pulses. Through the example of both simulations and experimental results, this paper aims at providing a base of knowledge and knowhow in physical implementation of reversible circuits.
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Naga Babu, Ch, P. Naga Siva Sai, Ch Priyanka, K. Hari Kishore, M. Bindu Bhargavi, and K. Karthik. "Comparative Analysis of High Speed Carry Skip Adders." International Journal of Engineering & Technology 7, no. 2.24 (April 25, 2018): 121. http://dx.doi.org/10.14419/ijet.v7i2.24.12015.
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In this paper we compared a high speed carry skip adders by considering parameters such as area, LUT’S, delay, power. When compared to conventional CSKA and other adders. Here in this project in first stage CSKA designed by using multiplexer as skip logic so by using this speed gets increased by skipping of carry. so here area gets increased so to reduce area another hybrid variable latency carry skip adder(Brent-kung adder) is designed .here power utilization also gets decreased, speed gets increased, but some delay is produced here to overcome that we followed a another method called Kogge-Stone adder here so it reduces the critical path delay. In Kogge-stone adder power is highly consumed due to more no of wiring connections so another adder was designed to reduce power consumption which is Sklansky adder which reduces power Consumption. This is done in Xilinx ISE 14.7 and power was analyzed using Xilinx power analyzer.
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Durley, Jennifer L., and Rob C. de Loë. "Empowering communities to carry out drought contingency planning." Water Policy 7, no. 6 (December 1, 2005): 551–67. http://dx.doi.org/10.2166/wp.2005.0033.
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Drought is a pervasive natural hazard, even in relatively water rich areas such as the Province of Ontario, Canada. A common response to drought in many jurisdictions has been crisis management, especially involving drought relief during or after a drought event. Proactive drought contingency planning, which takes a risk management approach to reduce vulnerability, is much more appropriate. Unfortunately, the extent to which local communities have the capacity to participate effectively in this activity is highly variable. This paper explores factors that facilitate and constrain locally led drought contingency planning and highlights several that relate to management capacity, or the ability of local actors to accomplish their objectives and participate effectively in implementing appropriate drought responses. Drought planning experiences in Australia and the United States are used to frame an evaluation of Ontario's new drought contingency planning approach. We conclude that while Ontario's approach has many desirable features (e.g. organized around watersheds; locally driven), it also has several shortcomings, relating especially to the way in which droughts are understood, coordination of roles and responsibilities and community disempowerment during severe droughts.
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Watanabe, Toyohide, and Kenta Matsushima. "Paper Wrapping, Using Connectivity Among Paper Faces." International Journal of Knowledge Society Research 3, no. 2 (April 2012): 75–86. http://dx.doi.org/10.4018/jksr.2012040107.
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The paper wrapping is one of traditional cultures in Japan, like the paper folding Origami. The technical interest is related to how to decorate goods beautifully along the shapes, and also the requests from daily-life usage are to resolve how to protect goods from external shocks, to carry out materials/goods safely, and so on. Thus, the paper wrapping is intelligent and creative work. This paper addresses a method which can design the target-oriented wrapping procedure successfully and support users’ wrapping works effectively. In order to attain this objective, the authors introduce the knowledge usable in the paper wrapping process and then construct a stage tree to represent various kinds of wrapping means systematically under this knowledge. The authors propose a framework which makes up the paper wrapping process so as to be appropriate to individual target-objects and describe an approach to support the wrapping process visually.
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Arulmurugan, R. "Design and Fabrication of Load Carry Electrical Vehicle." Journal of Alternative and Renewable Energy Sources 8, no. 3 (November 22, 2022): 30–33. http://dx.doi.org/10.46610/joares.2022.v08i03.004.
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The main purpose of this project is to carry the five hundred to seven hundred load short distances. The problem identified is automobile vehicles used to transfer goods for short duration, everywhere. On the other hand, automobile fuel cost has increased abruptly. Due to rises in fuel cost, it is directly and indirectly affected by the cost of living. That means it directly raises all items' cost rise such as vegetable prices, construction materials, cosmetics, etc. On the other hand, automobile vehicles produce more pollutants in the environment. The main object of this paper is to design the fabrication of load-carry electrical vehicles. In the exciting electrical vehicle, auto-rickshaw cost is too high it cannot be afforded by average and below average people. The drawback of the exciting vehicle is the carriage covers 20% of the total load. In the proposed method design weightless carriage and more space as well comfort to carry the load on short as well long distances. The main merit of the proposed method are to reduce the 40% cost compared to the market price. The proposed fabrication 3D diagram and practical implementation as detailed in the following paragraph.
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Bonga-Bonga, Lumengo, and Sefora Motena Rangoanana. "Carry Trade and Capital Market Returns in South Africa." Journal of Risk and Financial Management 15, no. 11 (October 27, 2022): 498. http://dx.doi.org/10.3390/jrfm15110498.
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This paper assesses the extent to which carry trade operations affect the performance of equity and bond markets in a target country, South Africa, by considering the US and the euro area as the funding countries. A two- and three-factor capital asset pricing model (CAPM) is employed to assess whether the pricing of equity and bond markets in South Africa depends on the US dollar/rand and euro/rand carry trade returns. Moreover, the paper uses the quantile regression technique to assess whether this pricing varies with the distribution of the equity and bond returns. The findings support that the US- and euro-funded carry trade are essential factors for the pricing of equity and bond markets in South Africa. Moreover, the results of the two-factor model show a negative relationship between the equity excess return and the US-carry trade returns at lower quantiles of the equity market returns. The positive relationship is observed in the upper quantiles of the equity market. The negative relationship means that carry trade activities reduce equity market returns during a bear market as investors close out their position when conditions in the equity market become unfavourable. The results of the three-factor model, controlling for the global volatility or uncertainty, show that carry trade investors exit the equity market to invest in the bond market when global uncertainty rises. This finding shows that carry trade investors choose less risky assets during rising global uncertainty.
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Dhandapani, Vaithiyanathan. "An efficient architecture for carry select adder." World Journal of Engineering 14, no. 3 (June 12, 2017): 249–54. http://dx.doi.org/10.1108/wje-08-2016-0043.
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Purpose Adders play a vital role in almost all digital designs, as all four arithmetic operations can be confined within addition. Hence, area and power optimization of the adders will result in overall circuit optimization. Being the fastest adder, the carry select adder (CSLA) gains higher importance among the different adder styles. However, it suffers from the drawback of increased power and area. The implementation of CSLA in digital circuits requires lots of study for optimization. Hence, to overcome this problem, various improvements were made to the CSLA structure to reduce area and, consequently, reduce power. Among these, modified CSLAs show a significant improvement, as they utilize a binary excess-1 code (BEC) to replace the add-one circuit. Design/methodology/approach This paper presents further enhancement in the modified CSLA by proposing a decision-based CSLA, which activates BEC on demand. This leads to reduced switching activity. The performance of the proposal is done by analyzing and comparing it with different adders. The comparison is done on the basis of three performance parameters: area, speed and power consumption. This is done by implementing the architecture on Xilinx Virtex5 XC5VLX30 in Verilog environment and is synthesized using Cadence® RTL Compiler® using TSMC 180-nm CMOS cell library. Findings Optimization of power, area and increasing the speed of operation are the three main areas of research in very-large-scale integration (VLSI) design for portable devices. As adders are the most fundamental units for any VLSI design, optimization at the adder level has a huge impact on the overall circuit. The modified CSLA has a BEC which continuously switches irrespective of the previous carry bit generated. The unwanted switching results in excess power consumption while also introducing additional delay. Hence, the author has proposed a decider circuit to avoid this excess switching activity. This allows switching of the BEC only when a previous carry is generated. The modified CSLA is based on the ripple carry adder, while the decider-based CSLA utilizes a carry look-ahead adder. This makes a decider-based CSLA faster while utilizing less area and power consumption when compared to the modified CSLA. Originality/value The efficiency of the proposed decider-based CSLA has been verified using Cadence RTL Compiler using TSMC 180-nm CMOS cell library and has been found to have 17 per cent power and 11.57 per cent area optimization when compared to the modified CSLA, while maintaining operating frequency.
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Bian, Jianying. "How to Carry out Aesthetic Education in Art Education." Lifelong Education 9, no. 4 (July 22, 2020): 168. http://dx.doi.org/10.18282/le.v9i4.949.
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In recent years, aesthetic education has been gradually emphasized by higher education. Colleges and universities actively apply aesthetic education in the cultivation of various professional talents, and integrate aesthetic education through courses such as ideological and political education. With a view to enhancing the aesthetic consciousness and ability of higher talents. Art education is the most important and direct way of aesthetic education. Based on this, this paper analyzes the current problems of aesthetic education in colleges and universities, and mainly uses the application of aesthetic education in art teaching as an example to explore the effective ways and methods of aesthetic education.
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Barbosa-Filho, Nelson H. "Carry Trade, Exchange Rates, and the Balance-of-Payments." Journal of Globalization and Development 12, no. 1 (June 1, 2021): 103–16. http://dx.doi.org/10.1515/jgd-2021-0029.
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Abstract This paper presents a partial equilibrium model that integrates interest rate arbitrage with the balance-of-payments constraint to determine the real exchange rate. The sequential logic is the following: (i) carry-trade determines the term premium, with the spot rate showing greater volatility than the forward rate, (ii) uncovered interest rate parity determines the spot rate based on the real exchange rate consistent with a financial constraint, defined as a stable ratio of foreign reserves to foreign debt; and (iii) the trade balance consistent with the financial constraint determines the long-run real exchange rate for a given ratio of domestic to foreign income.
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Tinkl, Laura, and Syd Hiskey. "Keep NICE and carry on? Reflections on evidence-based practice." Clinical Psychology Forum 1, no. 269 (May 2015): 40–44. http://dx.doi.org/10.53841/bpscpf.2015.1.269.40.
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This paper considers the term evidence-based practice by way of its relationship to empirically supported therapies and NICE guidance, before critiquing the randomised control trial methodology. We feel psychologists need to engage in such debates to inform those who commission services.
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Tinkl, Laura, and Syd Hiskey. "Keep NICE and carry on? Reflections on evidence-based practice." Clinical Psychology Forum 1, no. 289 (January 2017): 48–52. http://dx.doi.org/10.53841/bpscpf.2017.1.289.48.
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This paper considers the term evidence-based practice by way of its relationship to empirically supported therapies and NICE guidance, before critiquing the randomised control trial (RCT) methodology. We feel psychologists need to engage in such debates to inform those who commission services.
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Kelly, Paul. "Cary cooper's paper 'the changing nature of work'-an alternative view." Community, Work & Family 2, no. 1 (April 1999): 89–91. http://dx.doi.org/10.1080/13668809908414251.
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Bobba, Ramyabanu, and Pooja Illa. "XOR Based Carry Select Adder for Area and Delay." International Journal of Innovative Science and Research Technology 5, no. 6 (July 28, 2020): 1615–21. http://dx.doi.org/10.38124/ijisrt20jun1117.
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Low power and area proficient high-speed circuits are the most important areas in VLSI design research. Carry select adder is one of the fastest adders with the low area and power consumption. The paper introduces a 16-bit carry select adder with an optimized multiplexer based full adder circuit using Gate Diffusion Input logic (GDI) technology. Comparison is done on Area, Power and Delay parameters. Our circuit requires only two XOR gates and a multiplexer. In this, each logic gate is designed using GDI technology. This further reduces the transistor count resulting in Area, power, delay and complexity minimization. The proposed 16-bit carry select adder provides better results compared to the conventional 16-bit carry select adder with Area and delay.
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Yang, Ching Been, Hsiu Lu Chiang, and Chein Chung Chen. "Simulative Analysis of Carry Out Fontusing near Field Photolithography." Applied Mechanics and Materials 120 (October 2011): 418–25. http://dx.doi.org/10.4028/www.scientific.net/amm.120.418.
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Adopting the concepts of integration and cumulative sum of exposure energy in the intersecting region between two fabricated line segments, an analytical method of exposure energy density equation for near field photolithography of font fabrication is established. At the same time, cutting photoresist into limited nodes, together with the use of the integral equation of exposure energy density and Mack’s developing model, the full-width at half maximum (FWHM) and fabrication profile of font can be calculated. As analyzed in the study, in the intersecting region between two fabricated line segments, the greater the exposure energy, the deeper the fabrication depth; while in the straight-line region of fabricated lines, as the exposure energy is equal, all the fabrication depths are the same. The research analysis of the paper can be a reference for near field photolithography of font.
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Leistikow, Dean, and Ren-Raw Chen. "Carry Cost Rate Regimes and Futures Hedge Ratio Variation." Journal of Risk and Financial Management 12, no. 2 (May 3, 2019): 78. http://dx.doi.org/10.3390/jrfm12020078.
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This paper tests whether the traditional futures hedge ratio (hT) and the carry cost rate futures hedge ratio (hc) vary in accordance with the Sercu and Wu (2000) and Leistikow et al. (2019) “hc” theory. It does so, both within and across high and low spot asset carry cost rate (c) regimes. The high and low c regimes are specified by asset across time and across currency denominations. The findings are consistent with the theory. Within and across c regimes, hT is inefficient and hc is biased. Across c regimes, hc’s Bias Adjustment Multiplier (BAM) does not vary significantly. Even though hc’s bias-adjusted variant’s BAM is restricted to old data that is from a different c regime, the hedging performance of hc and its bias-adjusted variant (=hc × BAM), are superior to that for hT. Variation in c may account for the hT variation noted in the literature and variation in c should be incorporated into ex ante hedge ratios.
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Hudson, Ian. "The Currency Carry Trade: Selection Skill or Behavioral Bias." International Business Research 9, no. 9 (August 29, 2016): 176. http://dx.doi.org/10.5539/ibr.v9n9p176.
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<p>Many attempts have been undertaken to solve the forward premium puzzle with little to no success. The global currency market is considered the most information efficient and transparent of all financial markets since it demonstrates a balance between over and under-reaction to information with remarkable consistency. The Efficient Market Hypothesis espouses investors cannot systematically outperform a benchmark since all investors have access to the same information. Therefore, the expected long-term rate of return for currencies is essentially zero. The Arbitrage Pricing Theory asserts investment returns are random. As such, traders cannot avail themselves of mispriced currencies. The assertion of Uncovered Interest Rate Parity is that bi-national interest rate variance is equal to the expected differential in exchange rates. This paper asks the following questions: does alpha persistence exist in currency carry trade funds or are its excess returns merely a collection of behavioral biases?</p>
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Kumar, Mukesh, and Pratap Mohanty. "Does maternal overnutrition carry child undernutrition in India?" PLOS ONE 17, no. 6 (June 17, 2022): e0265788. http://dx.doi.org/10.1371/journal.pone.0265788.
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Background and objectives Studies in low-and middle-income countries where nutrition transition is underway provides mixed evidence of double burden of maternal overnutrition and child undernutrition among mother-child pairs. Shifting dietary pattern and rapid increase in overweight/obesity among adults with persistent child undernutrition indicate that India is experiencing nutrition transition and double burden of malnutrition. Hence, the study explores the presence of and the factors associated with mother-child dyads of over- and undernutrition in India. Methods and materials The study uses National Family Health Survey 2015–16 data. The analytic sample consists of 28,817 weighted mother-child pairs where an overweight/obese mother is paired with an undernourished child. The nutritional status of children is defined according to WHO 2006 child growth standards as underweight (i.e., low weight-for-age), stunting (i.e., low height-for-age) and wasting (i.e., low weight-for-height). Maternal overweight/obesity (i.e., BMI ≥ 25 kg/m2) is defined using adult BMI criterion. Descriptive, bivariate, and adjusted multivariable logistic regression analysis are conducted. Results Of the overweight/obese mothers, 21.3%, 26.5%, and 14% have underweight, stunted, and wasted children respectively. In adjusted models, maternal short stature (aOR: 2.94, 95% CI: 2.30–3.75), age of child (aOR: 3.29, 95% CI: 2.76–3.92), and poorest wealth status (aOR: 2.01, 95% CI: 1.59–2.54) are significant predictors of overweight/obese mothers and stunted child pairs. Similarly, poor wealth status (aOR: 1.68, 95% CI:1.32–2.14), maternal stature (aOR: 2.70, 95% CI: 2.08–3.52), and child aged 2–5 years (aOR: 1.77, 95% CI:1.51–2.08) are also significantly associated with higher occurrence of overweight/obese mother and-underweight child pairs. Conclusion Findings of the study are consistent with the phase of nutrition transition and double burden of malnutrition. The paper concludes with suggestions to improve the socioeconomic condition, more strategic nutrition specific investments and policy interventions to eliminate all forms of malnutrition for achieving SDGs.
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Bonga-Bonga, Lumengo, and Tebogo Maake. "The Relationship between Carry Trade and Asset Markets in South Africa." Journal of Risk and Financial Management 14, no. 7 (July 1, 2021): 300. http://dx.doi.org/10.3390/jrfm14070300.
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This paper investigates the extent of volatility or risk spillovers between the currency carry trade and asset markets, namely the equity and bond markets, in South Africa to infer the extent of the connectivity between the two markets. The carry trade operation examined in this paper involves two strategies, both of which use the South African rand as the investment currency, with the U.S. dollar and the Japanese yen as the funding currencies. The vector autoregressive BEKK-Generalised Autoregressive Conditional Heteroscedastic (multivariate VAR-BEKK-GARCH) model is used to this end. Moreover, the paper assesses the dynamic correlation between each currency carry trade and asset markets to infer the time-varying dependence between the two markets. The results of the empirical analysis show evidence of volatility spillover between the carry trade returns and the two asset market returns. The extent of the spillover depends on the choice of the funding currency, with the U.S. dollar-funded strategy transmitting more shocks to the South African equity market compared to the bond market. Moreover, the synchronisation of the dynamic correlation between each asset market and the currency carry trade returns shows that any possibility of arbitrage is precluded in the currency carry trade market.
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Leistikow, Dean, Yi Tang, and Wei Zhang. "Dynamic Conditional Bias-Adjusted Carry Cost Rate Futures Hedge Ratios." Journal of Risk and Financial Management 15, no. 1 (January 3, 2022): 12. http://dx.doi.org/10.3390/jrfm15010012.
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This paper proposes new dynamic conditional futures hedge ratios and compares their hedging performances along with those of common benchmark hedge ratios across three broad asset classes. Three of the hedge ratios are based on the upward-biased carry cost rate hedge ratio, where each is augmented in a different bias-mitigating way. The carry cost rate hedge ratio augmented with the dynamic conditional correlation between spot and futures price changes generally: (1) provides the highest hedging effectiveness and (2) has a statistically significantly higher hedging effectiveness than the other hedge ratios across assets, sub-periods, and rolling window sizes.
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Fisher, Robert M. "Posters Platform Presentations Pages & Pages of Publications." Microscopy Today 1, no. 1 (February 1993): 8. http://dx.doi.org/10.1017/s1551929500066384.
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1992 was certainly a banner year for microscopy in terms of an incredible total of nearly 3000 presentations given world-wide - at the largest ever joint (E)MSA/MAS/MSC meeting in Boston and at the 3 IFSEM-sanctioned Regional Conferences in Spain, China and Venezuela. Several of the local affiliate societies also mounted well-attended symposia and contributed to the outpouring of words and images. The apparently continuously growing volume of microscopy-related presentations has impacted both conference organizers and publishers.Poster presentations are being used to an increasing extent to avoid an excessive number of parallel sessions. There is also an economic incentive as a poster session probably costs the organizers less than half that of a platform session of contributed papers. The poster trend draws a mixed response. Most microscopists love to look at posters but hate to prepare them as they are much more work to put together and are costly. They are awkward to carry and often have a one-time use whereas slides are for ever.
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Graves, Darci M. "Guns on campus: An autoethnography of “concealed carry” policies." Feminism & Psychology 32, no. 2 (January 28, 2022): 265–80. http://dx.doi.org/10.1177/09593535221074133.
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In the United States, school shootings are a common social problem and frequently occur on both K-12 and college campuses. High profile school shootings have resulted in a growing number of state governments legalizing “concealed carry” on college campuses, increasing the presence of guns in classrooms. This research study employs qualitative autoethnography to present the author's experiences teaching on a campus where concealed carry was implemented in 2014. Through autoethnographic narratives, the author describes her lived experiences. This paper analyses these narratives using intersectional feminist theory and situates the narratives within the broader socio-cultural context of gun culture in the Pacific Northwestern USA. The author spent four years immersed in the culture of concealed carry, and has written multiple narratives detailing these experiences. Two narratives are presented in this work. Important findings in this work include examinations of: how the presence of guns in college classrooms shapes power dynamics; the use of fear-based curricula in active-shooter survival trainings; the cultural construction of the “good guy with a gun”; and the implications of the author's positionalities within gun culture. This research study encourages the reader to engage with and learn from the lived experiences of the author.
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Costa, James. "Nathalie Carré et Raphaël Thierry (dir.), Langues minorées, Paris, Bibliodiversity, 2021, 187 pages." Langage et société N° 175, no. 1 (January 3, 2022): 184–87. http://dx.doi.org/10.3917/ls.175.0186.
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Madden, Seán P., James P. Downing, and Jocelyne M. Comstock. "Paper Moon: Simulating a Total Solar Eclipse." Mathematics Teacher 99, no. 5 (January 2006): 312–20. http://dx.doi.org/10.5951/mt.99.5.0312.
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This article describes a classroom activity in which a solar eclipse is simulated and a mathematical model is developed to explain the data. Students use manipulative devices and graphing calculators to carry out the experiment and then compare their results to those collected in Koolymilka, Australia, during the 2002 eclipse. Includes a description of how to set up the simulation and examples of student work.
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Peele, Roger, and Mahrokh Shayanpour. "Madness Crackedby Mick Power; Cary, NC, Oxford University Press, 2014, 304 pages." Psychiatric Services 67, no. 8 (August 2016): e11-e11. http://dx.doi.org/10.1176/appi.ps.660702.
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Saravanakumar, Saravanakumar, Vijeyakumar Vijeyakumar, and Sakthisudhan Sakthisudhan. "FPGA Implementation of High Speed Hardware Efficient Carry Select Adder." International Journal of Reconfigurable and Embedded Systems (IJRES) 7, no. 1 (May 30, 2018): 43. http://dx.doi.org/10.11591/ijres.v7.i1.pp43-47.
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This paper presents a novel architecture for high speed and hardware efficient carry select addition. We modify the two operand ripple carry addition followed in conventional Carry SeLect Adder(CSLA) with a simple and efficient gate level circuit to reduce area and delay significantly. For this, we use an increment 1 block for generating the sum outputs with carry input 1 instead of second pair ripple carry adder as in conventional CSLA. The novelty of the proposed approach is that it reduces area, and the delay due to carry propagation in second pair of adder cells. The proposed CSLA adder has been designed using structural VHDL code and synthesized using Altera Quartus II. Experimental results show that the proposed design outperform the previous approaches in terms of delay and area reduction.
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Balasubramanian, Padmanabhan, and Nikos E. Mastorakis. "High-Speed and Energy-Efficient Carry Look-Ahead Adder." Journal of Low Power Electronics and Applications 12, no. 3 (August 10, 2022): 46. http://dx.doi.org/10.3390/jlpea12030046.
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The carry look-ahead adder (CLA) is well known among the family of high-speed adders. However, a conventional CLA is not faster than other high-speed adders such as a conditional sum adder (CSA), a carry-select adder (CSLA), and the Kogge–Stone adder (KSA), which is the fastest parallel-prefix adder. Further, in terms of power-delay product (PDP) that characterizes the energy of digital circuits, the conventional CLA is not efficient compared to CSLA and KSA. In this context, this paper presents a high-speed and energy-efficient architecture for the CLA. Many adders ranging from ripple carry to parallel-prefix adders were implemented using a 32-28 nm CMOS standard digital cell library by considering a 32-bit addition. The adders were structurally described in Verilog and synthesized using Synopsys Design Compiler. From the results obtained, it is observed that the proposed CLA achieves a reduction in critical path delay by 55.3% and a reduction in PDP by 45% compared to the conventional CLA. Compared to the CSA, the proposed CLA achieves a reduction in critical path delay by 33.9%, a reduction in power by 26.1%, and a reduction in PDP by 51.1%. Compared to an optimized CSLA, the proposed CLA achieves a reduction in power by 35.4%, a reduction in area by 37.3%, and a reduction in PDP by 37.1% without sacrificing the speed. Although the KSA is faster, the proposed CLA achieves a reduction in power by 39.6%, a reduction in PDP by 6.5%, and a reduction in area by 55.6% in comparison.
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Senhadji-Navarro, Raouf, and Ignacio Garcia-Vargas. "Mapping Arbitrary Logic Functions onto Carry Chains in FPGAs." Electronics 11, no. 1 (December 22, 2021): 27. http://dx.doi.org/10.3390/electronics11010027.
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Current Field Programmable Gate Arrays (FPGAs) provide fast routing links and special logic to perform carry operations; however, these resources can also be used to implement non-arithmetic circuits. In this paper, a new approach for mapping logic functions onto carry chains is presented. Unlike other approaches, the proposed technique can be applied to any logic function. The presented technique includes: (1) an architecture that is composed of blocks that implement AND and OR functions (called CANDs and CORs, respectively) by means of Look-Up-Tables (LUTs) and carry-chain resources; and (2) a mapping algorithm to reduce both the delay of the critical path and the number of used FPGA resources. The algorithm uses a heuristic to interconnect CORs and CANDs in order to reduce the delay. The problem of mapping the maxterms (or minterms) of a function to LUTs has been modelled as a Set Bin Packing (SBP) problem. Since SBP is NP-Hard, a greedy algorithm has been proposed, which is based on the First Fit Decreasing (FFD) heuristic. The results obtained have been compared with the conventional technique using both speed and area optimization. For this purpose, a large synthetic set of test cases has been generated. The proposed technique improves both the speed and area results for the vast majority of functions whose conventional implementation requires more than four logic levels. It is important to highlight that the improvement of one parameter (speed or area) is not achieved at the expense of the other.
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Shylashree, N., and D. S. Mahesh. "Latency and throughput analysis of a pipelined GDI ripple carry adder." International Journal of Engineering & Technology 7, no. 2.21 (April 20, 2018): 123. http://dx.doi.org/10.14419/ijet.v7i2.21.11848.
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Latency and Throughput are deemed parameters of prime importance that determine the speed of an Adder Circuit. Ongoing research in the field of Digital Signal Processing involves optimizing an Adder regarding these parameters. This article picks up the study of a ripple carry adder and presents the use of two methods towards ameliorating the performance of an adder – viz., the use of GDI (Gate Diffusion Input) technology for reduced Latency, and implementation of a pipelined architecture towards increasing the throughput. In this paper, we have dileneated the function of a basic GDI cell, with which a 1-bit ripple carry full adder was designed, which in turn formed the basic building blocks of 8-bit and 32-bit ripple carry adders. These full adders were designed using GDI technology while employing the concept of pipelining resulting in a novel structure optimizing both latency and throughput. This paper also presents a comparison among CMOS and GDI RCAs of 8 and 32bits with and without pipelining.On simulating 32-bit RCAs in Cadence virtuoso tool using gpdk 180nm technology ,those with pipelining had a 4.5 times increase in throughput with 42.8% increase in latency.
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Malik, Hasmat, Tarkeshwar, and R. K. Jarial. "Make Use of DGA to Carry Out the Transformer Oil-Immersed Paper Deterioration Condition Estimation with Fuzzy-Logic." Procedia Engineering 30 (2012): 569–76. http://dx.doi.org/10.1016/j.proeng.2012.01.900.
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Alkurwy, Salah Hasan, and Isam Salah Hameed. "A novel pipelined carry adder design based on half adder." Indonesian Journal of Electrical Engineering and Computer Science 25, no. 2 (February 1, 2022): 763. http://dx.doi.org/10.11591/ijeecs.v25.i2.pp763-770.
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<span lang="EN-US">A new design of binary parallel adder circuit is presented in this paper. The pipeline technique is applied to implement a group of a half adder (HA) blocks to architect the proposed adder. The pipelined carry adder (PCA) method is suitable for carrying out the desired adder by using the HA circuits of XOR and AND gates. The applied technique reduces the critical path delay by 27% compared with the ripple carry adder (RCA) and relatively lowers logic gates by 55% compared with the carry look-ahead adder (CLA). The coded design of the proposed circuit is implemented and simulated on the Cyclone IV FPGA kit platform. Results show that the circuit needs a 7.69 ƞ Sec delay time to provide the output values. The suggested PCA circuit is more attractive than the conventional ripple carry adder for future electronic applications. </span>
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Chu, Shunan. "Comparative Analysis of Optimization Schemes of Carry Look-ahead Adder." Journal of Physics: Conference Series 2290, no. 1 (June 1, 2022): 012008. http://dx.doi.org/10.1088/1742-6596/2290/1/012008.
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Abstract Conventional CLA adder has has a large number of transistors and high input impedance, which affects various performance aspects, resulting in high delay and power consumption. Therefore, to increase the performance and reduce delay, several optimized structures of CLA are proposed. From the perspective of structure and power, this paper selects four different design schemes and uses Cadence Virtuoso 90nm technology to compare and analyze the optimization results in aspects of circuit area, delay and power consumption. The analysis results show that the conventional 4-bit adder structure can be improved by designing the carry term Field Effect Transistor (FET) network and replacing the existing gate circuit with a hybrid Gate diffusion technology (GDI) gate, which can reduce the number of transistors and the design circuit area. They also contribute to improving the power consumption, delay, power delay product (PDP) and other performance parameters. Pipeline technology and multi-layer CLA block technology are suitable for carry look-ahead adder with more bits and longer carry chain, which can shorten carry propagation time, further optimize processor performance and improve CPU computing efficiency.
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Colish, Marcia L. "HabitusRevisited: A Reply to Cary Nederman." Traditio 48 (1993): 77–92. http://dx.doi.org/10.1017/s0362152900012885.
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In a recentTraditioarticle, Cary J. Nederman has added another valuable study to the series of papers he has been publishing over the past few years. This body of work has the laudable goal of showing that, across the twelfth century, thinkers were taking an increasingly Aristotelian line in the fields of ethics and political theory, on the basis of ideas transmitted indirectly via works available in Latin well before the appearance of the integral Latin translations of the texts of the Stagirite deemed to have launched the “Aristotelian revolution” of the thirteenth century in these fields. Throughout this burgeoning oeuvre, Nederman has been quite successful in supporting his case for a more gradual and less cataclysmic reception of Aristotle in the Latin West than the standard accounts acknowledge. It is not the purpose of this paper to challenge that larger argument. Nonetheless, with respect to the Aristotelian doctrine ofhabituson which Nederman focuses in hisTraditioarticle, we would like to suggest that his analysis needs to be reconsidered. We offer the following pages as anamplificatioof his thesis, with the aim of adding nuance to it by bringing forward material that he omits. Our intention here is not so much to criticize Nederman's reading of the texts onhabitusin the twelfth century that he does adduce, and certainly not to object to his larger project, but rather to indicate that there is more to the story, and so to refine his analysis in the hope of strengthening it.
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Cheng, Wei, and jianping Hu. "A Structured Approach for Optimizing 4-Bit Carry-Lookahead Adder." Open Electrical & Electronic Engineering Journal 8, no. 1 (November 13, 2014): 133–42. http://dx.doi.org/10.2174/1874129001408010133.
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This paper presents a comparative research of low-power and high-speed 4-bit full adder circuits. The representative adders used are a ripple carry adder (RCA) and a carry-lookahead adder (CLA). We also design a proposed carrylookahead adder (PCLA) using a new method that uses NAND gate for modification which helps in reducing the powerdelay product (PDP) for high performance applications. To yield more realistic rise and fall times in the simulations, layouts have been made in a 0.13 m process for the RCA circuit, CLA circuit and PCLA circuit. The layouts designed were simulated by HSPICE based on 130 nm CMOS technology at 1.2 V supply voltages. Four sets of frequencies were operated: 10 MHz, 50 MHz, 100 MHz and 500 MHz with 50% duty cycle in different technology corner models. A comprehensive comparison and analysis were also carried out to test the performance of the adders. The three adders also yield different performances in terms of power consumption, PDP, and area. The simulation results of this research are expected to help designers to select the appropriate 4-bit adder cell that meets their specific applications.