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Academic literature on the topic 'Capacités flottantes'
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Journal articles on the topic "Capacités flottantes"
Deroo, Luc, Yves Sahut, and Benoit Defrance. "Hydro-solaire : une nouvelle utilisation des réservoirs." E3S Web of Conferences 346 (2022): 04005. http://dx.doi.org/10.1051/e3sconf/202234604005.
Full textGilloteaux, Jean-Christophe, and Sandrine Aubrun. "Éolien en mer : du fixe au flottant." Reflets de la physique, no. 77 (February 2024): 92–95. http://dx.doi.org/10.1051/refdp/202477092.
Full textHervieu-Léger, Danièle. "Le miroir de l'islam en France." Vingtième Siècle. Revue d'histoire 66, no. 2 (April 1, 2000): 79–90. http://dx.doi.org/10.3917/ving.p2000.66n1.0079.
Full textDouarche, Carine, Virginie Bailleux, Catherine Even, Jean-Marc Allain, Christophe Regeard, and Éric Raspaud. "La mécanique des biofilms à la surface de liquides." Reflets de la physique, no. 56 (January 2018): 20–24. http://dx.doi.org/10.1051/refdp/201856020.
Full textJeanjean, Philippe. "Conférence Coulomb prononcée le 18 juin 2019 : Aperçu des défis de la géotechnique offshore." Revue Française de Géotechnique, no. 159 (2019): 1. http://dx.doi.org/10.1051/geotech/2019013.
Full textDrèze, Jacques H., and Edmond Malinvaud. "Croissance et emploi : l'ambition d'une initiative européenne." Revue de l'OFCE 49, no. 2 (June 1, 1994): 247–88. http://dx.doi.org/10.3917/reof.p1994.49n1.0247.
Full textMartin, Brigitte. "Cosmopolitisme." Anthropen, 2019. http://dx.doi.org/10.17184/eac.anthropen.120.
Full textDissertations / Theses on the topic "Capacités flottantes"
Bensaid, Rédha. "Observateurs des tensions aux bornes des capacités flottantes pour les convertisseurs multicellulaires séries." Toulouse, INPT, 2001. http://www.theses.fr/2001INPT013H.
Full textPasquet, Bastien. "Etude d'un convertisseur DC-DC-20kW pour application aéronautique : prototypages et développement d'un algorithme d'optimisation Mixed-Discrete Geometric Programming." Electronic Thesis or Diss., Université de Toulouse (2023-....), 2024. https://theses.hal.science/tel-04947953.
Full textAs the industry strives to reduce its consumption of fossil fuels and the associated greenhouse gas emissions, vehicle electrification plays a major role in the Ecological Transition. There is a growing number of studies aiming at evaluating and increasing Hydrogen Fuel Cells viability as a power supply for aircraft. This work aims to study the implementation of a hydrogen Fuel Cell as an electrical power supply for an aircraft 28V DC, 20kW on-board electrical network. More specifically, the subject of this thesis is the development of a low-voltage, high current Power Converter adapting the power flowing from the Fuel Cell, to the on-board electrical network. Converter mass, volume and efficiency are major optimization criteria in aircraft design. A comparison between several converter topologies has been realized, and a 3-level Flying Capacitor Converter has been selected.GaN transistors were selected for heir low on-state resistance and their high switching speed, allowing the reduction of the converter power losses and of the passive components and heat sink sizes. Particular attention was provided to printed circuit board routing in order to reduce parasitic impedance and to parallelize two transistors for each power switch. A prototype has been realized, measurements show an experimental average efficiency of 98.25%.In order to enhance the speed and pertinence of optimization studies for electrical converters design, a new optimization algorithm has been developed based on pre-existing works. This Mixed-Discrete Geometric Programming algorithm (MDGP) can solve physics problems composed of a mix of many continuous and discrete optimization variables, in a reasonable calculation time while still guaranteeing convergence to the global optimum. It can handle multidimensional discrete variables, as well as substitutable functions. The algorithm allows to evaluate and select specific electrical components, instead of representing a range of components by a single continuous and imprecise modeling. Specifically, transistors are modeled as collections of functions, different for each component, fitted on simulation results. A Pareto Front for the converter mass and efficiency was generated in a 25h calculation time on a laptop, for an optimization problem involving 161.28 million possible discrete combinations
BONANNO, GIOVANNI. "Controllo di corrente digitale-predittivo per convertitori Buck multilivello con capacità flottanti." Doctoral thesis, Università degli studi di Padova, 2022. http://hdl.handle.net/11577/3444331.
Full textThis thesis investigates the use of digital predictive current-mode control (DPCMC) in dc-dc multi-level flying-capacitor (MLFC) Buck converters. In particular, stability and flying-capacitor (FC) voltages balancing properties of predictive peak, average and valley current-mode controllers are studied when operated in single-sampled and multi-sampled mode. In fact, although the DPCMC technique has been extensively studied for traditional dc-dc converters, its application to MLFC converters is not documented in the current literature. This thesis proposes a unified analysis methodology that can be used for predicting the FC voltages stability properties in such converters. The developed analysis approach can be used for the generic MLFC Buck converters with generic number of levels as well for all operating modes. In addition to stability analysis tools, this thesis provides an implementation methodology for DPCMC control that takes full advantage of the multi-level topology. In fact, when MLFC converters operate with stable and balanced FC voltages, the output LC filter is excited by signal whose frequency is integer multiple of the switching frequency. Precisely, by indicating with N-LFC Buck the MLFC step-down converter which has N voltage levels available at the switching node, it is possible to show that during the steady-state operation the output LC filter is excited by a signal with frequency equal to N-1 times the switching frequency. This equivalent frequency multiplication effect allows the N-LFC Buck converter to gain advantages deriving from the increasing of the switching frequency without actually increasing it. In addition to the advantages in terms of inductance and output capacitance reduction, it is possible to exploit this property to increase dynamic performance. The proposed control called multi-sampled DPCMC (MS-DPCMC) exploits exactly this opportunity and allows to obtain a faster inner-current loop, thus increasing the available bandwidth for the outer-voltage loop. Additionally, a variant of the MS-DPCMC obtained through a fast-update of the duty cycle command is disclosed and analyzed. When the available hardware makes it possible, the fast-update implementation increase the speed of the corrective action on the inductor current error, further increasing the available bandwidth for the outer-voltage control loop. For the 3-LFC Buck converter, simulating and experimental results indicate that single-sampled peak, valley and average DPCMC are always stable, and that fast-update approaches can strongly improve the converter dynamic response. Multi-sampled controllers are also shown to be inherently more robust than single-sampled ones against timing mismatches in the control signals, resulting in a smaller flying-capacitor voltage imbalance. All developed stability results regarding the 3-LFC Buck converter are validated in simulation and experimentally on a custom prototype.
Puget, Sophie. "Performance de la mémoire DRAM embarquée sans capacité sur film mince." Aix-Marseille 1, 2009. http://www.theses.fr/2009AIX10143.
Full textConventional embedded DRAM memory has to cope with miniaturization of access transistor and storage capacitor. Technological solutions proposed today lead to complex manufacturing process and density loss. In this context, emerging solutions appear such as embedded DRAM without additional storage element. These architectures use only one transistor to amplify and store the data. Memory charge is stored in a floating substrate. In miniaturization race, thin film device remains relevant candidate for 22 nm technology node and beyond. This thesis explores thin film transistor potential as capacitorless embedded DRAM. In a first step, electrical characteristics are carried out on FDSOI devices to demonstrate the possible programming mechanisms. Then a modeling is proposed taking into account physical phenomena occurring during memory operations. Based on a charge approach, the model is calibrated with SWB simulations. Main parasitic effects related to miniaturization, Short Channel Effects and Quantum Effects are detailed. The study is following by the modeling of dynamic memory behaviour until data retention. The model is subsequently used throug a Design Of Experiment to evaluate technological parameters impact on memory characteristics like amplitude, data retention, write and erase time. Finally, Independent Double Gate transistor proposed to solve selectivity issue of FDSOI erasing operation is discussed and technological process step are exposed