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Dissertations / Theses on the topic 'Cache codé'

Author: Grafiati

Published: 25 May 2024

Last updated: 31 July 2025

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1

Parrinello, Emanuele. "Fundamental Limits of Shared-Cache Networks." Electronic Thesis or Diss., Sorbonne université, 2021. http://www.theses.fr/2021SORUS491.

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Dans le contexte des réseaux de diffusion de contenu, les avantages puissants de la combinaison du cache et de la multidiffusion codée ont été démontrés pour les réseaux où chaque utilisateur est équipé de son propre cache isolé. Cette thèse vise à fournir les principes fondamentaux des réseaux à cache partagé où la communication avec les utilisateurs est assistée par un petit ensemble de caches, chacun d'entre eux servant un nombre arbitraire d'utilisateurs. Notre modèle de cache partagé, non seulement capture les réseaux cellulaires sans fil hétérogènes où les petites stations de base assist

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Malik, Adeel. "Stochastic Coded Caching Networks : a Study of Cache-Load Imbalance and Random User Activity." Electronic Thesis or Diss., Sorbonne université, 2022. https://accesdistant.sorbonne-universite.fr/login?url=https://theses-intra.sorbonne-universite.fr/2022SORUS045.pdf.

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Dans cette thèse, nous élevons la mise en cache codée de son cadre purement théorique de l'information à un cadre stochastique où la stochasticité des réseaux provient de l'hétérogénéité des comportements de demande des utilisateurs. Nos résultats soulignent que la stochasticité des réseaux assistés par cache peut conduire à la disparition des gains de la mise en cache codée. Nous déterminons l'étendue exacte du goulot d'étranglement du déséquilibre de la charge du cache codé dans les réseaux stochastiques, ce qui n'a jamais été exploré auparavant. Notre travail fournit des techniques pour att

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3

Brunero, Federico. "Unearthing the Impact of Structure in Data and in Topology for Caching and Computing Networks." Electronic Thesis or Diss., Sorbonne université, 2022. https://accesdistant.sorbonne-universite.fr/login?url=https://theses-intra.sorbonne-universite.fr/2022SORUS368.pdf.

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La mise en cache s'est avérée être un excellent moyen de réduire la charge de trafic dans les réseaux de données. Une étude de la mise en cache en théorie de l'information, connue sous le nom de mise en cache codée, a représenté une percée clé dans la compréhension de la façon dont la mémoire peut être efficacement transformée en débit de données. La mise en cache codée a également révélé le lien profond entre la mise en cache et les réseaux informatiques, qui présentent le même besoin de solutions algorithmiques novatrices pour réduire la charge de trafic. Malgré la vaste littérature, il rest

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4

Beg, Azam Muhammad. "Improving instruction fetch rate with code pattern cache for superscalar architecture." Diss., Mississippi State : Mississippi State University, 2005. http://library.msstate.edu/etd/show.asp?etd=etd-06202005-103032.

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5

Palki, Anand B. "CACHE OPTIMIZATION AND PERFORMANCE EVALUATION OF A STRUCTURED CFD CODE - GHOST." UKnowledge, 2006. http://uknowledge.uky.edu/gradschool_theses/363.

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This research focuses on evaluating and enhancing the performance of an in-house, structured, 2D CFD code - GHOST, on modern commodity clusters. The basic philosophy of this work is to optimize the cache performance of the code by splitting up the grid into smaller blocks and carrying out the required calculations on these smaller blocks. This in turn leads to enhanced code performance on commodity clusters. Accordingly, this work presents a discussion along with a detailed description of two techniques: external and internal blocking, for data access optimization. These techniques have been t

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6

Gupta, Saurabh. "PERFORMANCE EVALUATION AND OPTIMIZATION OF THE UNSTRUCTURED CFD CODE UNCLE." UKnowledge, 2006. http://uknowledge.uky.edu/gradschool_theses/360.

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Numerous advancements made in the field of computational sciences have made CFD a viable solution to the modern day fluid dynamics problems. Progress in computer performance allows us to solve a complex flow field in practical CPU time. Commodity clusters are also gaining popularity as computational research platform for various CFD communities. This research focuses on evaluating and enhancing the performance of an in-house, unstructured, 3D CFD code on modern commodity clusters. The fundamental idea is to tune the codes to optimize the cache behavior of the node on commodity clusters to achi

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7

Zhao, Hui. "High performance cache-aided downlink systems : novel algorithms and analysis." Electronic Thesis or Diss., Sorbonne université, 2022. http://www.theses.fr/2022SORUS366.

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La thèse aborde d'abord le pire goulot d'étranglement de la mise en cache codée sans fil, qui est connue pour diminuer considérablement les gains de multidiffusion assistée par cache. Nous présentons un nouveau schéma, appelé mise en cache codée agrégée, qui peut récupérer entièrement les gains de mise en cache codée en capitalisant sur les informations partagées apportées par la contrainte de taille de fichier effectivement inévitable. La thèse passe ensuite à des scénarios avec des émetteurs avec des réseaux multi-antennes. En particulier, nous considérons maintenant le scénario multi-utilis

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8

Seyr, Luciana. "Manejo do solo e ensacamento do cacho em pomar de bananeira 'Nanicão'." Universidade Estadual de Londrina. Centro de Ciências Agrárias. Programa de Pós-Graduação em Agronomia, 2011. http://www.bibliotecadigital.uel.br/document/?code=vtls000166653.

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O Brasil é o quarto produtor mundial de banana, com uma produção anual de 6,99 milhões de toneladas. É uma fruta de grande importância econômica e social, visto que é cultivada de Norte a Sul do país, garantindo emprego, renda e alimento para milhões de brasileiros durante o ano inteiro. No Paraná é a terceira fruta mais produzida no estado, com área de 9.900 ha. A maior parte da produção brasileira é destinada ao mercado interno, visto que é a segunda fruta mais consumida no país, e também devido à baixa qualidade da maior parte do produto. Essa baixa qualidade é o reflexo da falta de tecnolo

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9

Kristipati, Pavan K. "Performance optimization of a structured CFD code GHOST on commodity cluster architectures /." Lexington, Ky. : [University of Kentucky Libraries], 2008. http://hdl.handle.net/10225/976.

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Thesis (M.S.)--University of Kentucky, 2008.<br>Title from document title page (viewed on February 3, 2009). Document formatted into pages; contains: xi, 144 p. : ill. (some col.). Includes abstract and vita. Includes bibliographical references (p. 139-143).

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10

Dias, Wanderson Roger Azevedo. "Arquitetura pdccm em hardware para compressão/descompressão de instruções em sistemas embarcados." Universidade Federal do Amazonas, 2009. http://tede.ufam.edu.br/handle/tede/2950.

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Made available in DSpace on 2015-04-11T14:03:12Z (GMT). No. of bitstreams: 1 DISSERTACAO - WANDERSON ROGER.pdf: 2032449 bytes, checksum: f75ada58e34bb5da29e9716bc5899cab (MD5) Previous issue date: 2009-04-30<br>Fundação de Amparo à Pesquisa do Estado do Amazonas<br>In the development of the design of embedded systems several factors must be led in account, such as: physical size, weight, mobility, energy consumption, memory, cooling, security requirements, trustiness and everything ally to a reduced cost and of easy utilization. But, on the measure that the systems become more heterogene

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11

Patterson, Jason Robert Carey. "VGO : very global optimizer." Thesis, Queensland University of Technology, 2001.

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12

Carrascal, Manzanares Carlos. "Parallélisation d’un code éléments finis spectraux. Application au contrôle non destructif par ultrasons." Electronic Thesis or Diss., Sorbonne université, 2019. http://www.theses.fr/2019SORUS586.

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Le sujet de cette thèse consiste à étudier diverses pistes pour optimiser le temps de calcul de la méthode des éléments finis spectraux d'ordre élevé (SFEM). L’objectif est d’améliorer la performance en se basant sur des architectures facilement accessibles, à savoir des processeurs multicœurs SIMD et des processeurs graphiques. Les noyaux de calcul étant limités par les accès mémoire (signe d’une faible intensité arithmétique), la plupart des optimisations présentées visent la réduction et l’accélération des accès mémoire. Une indexation améliorée des matrices et vecteurs, une combinaison des

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13

Dridi, Noura. "Estimation aveugle de chaînes de Markov cachées simples et doubles : Application au décodage de codes graphiques." Thesis, Evry, Institut national des télécommunications, 2012. http://www.theses.fr/2012TELE0022.

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Depuis leur création, les codes graphiques constituent un outil d'identification automatique largement exploité en industrie. Cependant, les performances de lecture sont limitées par un flou optique et un flou de mouvement. L'objectif de la thèse est l'optimisation de lecture des codes 1D et 2D en exploitant des modèles de Markov cachés simples et doubles, et des méthodes d'estimation aveugles. En premier lieu, le système de lecture de codes graphiques est modélisé par une chaîne de Markov cachée, et des nouveaux algorithmes pour l'estimation du canal et la détection des symboles sont développ

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14

Liu, Chun-Cheng, and 劉俊成. "Enhanced Heterogeneous Code Cache Management Scheme for Dynamic Binary Translation." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/78064859901464682041.

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碩士<br>國立清華大學<br>資訊工程學系<br>98<br>Recently, DBT has gained much attentions on embedded systems. However, the memory resource in embedded systems is often limited. This leads to the overhead of code re-translation and causes significant performance degradation. To reduce this overhead, Heterogeneous Code Cache (HCC), is proposed to split the code cache among SPM and main memory to avoid re-translation of code fragments. Although HCC is effective in handling applications with large working set, it ignores the execution frequencies of program fragments. Frequently executed program fragments can be

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15

Meng-Chun, Wueng. "Design of Code Caches in Active RMI." 2003. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0009-0112200611341549.

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Wueng, Meng-Chun, and 翁孟君. "Design of Code Caches in Active RMI." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/29692126895466665053.

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碩士<br>元智大學<br>資訊工程學系<br>91<br>In distributed computing, Remote Method Invocation (RMI) provides an easy and transparent programming interface that simplifies programmers in designing distributed applications. However, based on the end-to-end network model, when a large amount of client requests bursts to the server, the server may become a centralized bottleneck if its workload is heavy. Another is that the network traffic is congested along the paths between the clients and the server. Therefore, not only the clients wait for the responses in a lengthy time, but also all network services on t

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17

Liu, Chia-Lun, and 劉家倫. "Dynamic Binary Translation for Multi-Threaded Programs with Shared Code Cache." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/40583090410769099911.

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碩士<br>國立交通大學<br>資訊科學與工程研究所<br>101<br>We present a process-level ARM-to-x86/64 dynamic binary translator which can efficiently emulate multi-threaded binaries based on mc2llvm. The difficulty of translating multi-threaded binaries is the synchronization overhead incurred by the translator, which has a great impact on the performance. We find the performance bottleneck of the synchronization and solve it by (1) shortening the lock section as we can (2) using the concurrent data structure (3) using the thread-private memory. In addition, we add trace compilation in mc2llvm to speed up the emulati

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18

Ku, Chang-Jung, and 顧長榮. "Designing a Power-aware Embedded System with Code Compression and Linked Cache." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/62903343890650401477.

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碩士<br>朝陽科技大學<br>資訊工程系碩士班<br>94<br>In designing an embedded system, three issues -- hardware cost, system performance, and power consumption -- have to be taken carefully into consideration. We present an embedded system with cache design which considers performance and power consumption based on the frequency with which instructions are executed. We use the locality of running programs to optimize the use of memory space, system performance, and power consumption; that is, we compress infrequently executed codes to save the use of memory space but compress (encode) frequently executed codes to

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19

Li, Chong-Jian, and 李重建. "An Energy-Efficient Code Compression Scheme For Embedded Cache by Address Translation." Thesis, 2001. http://ndltd.ncl.edu.tw/handle/64206670660898124806.

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碩士<br>國立中正大學<br>資訊工程研究所<br>89<br>In portable products, with more and more increasing functions and work speed, the power dissipation is more and more plenty. Cache consumes the greater part of power dissipation in processor, so we will present a new low power cache architecture to reduce power dissipation in cache. We present two subjects in this paper. One is that separate dictionary code compression. This compression scheme is that uses two dictionaries to compressed cache and memory instructions individu

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20

Chien, Chia-Hung, and 簡嘉宏. "A Separate Code Cache Model for a Parallel Multi-Core System Emulator Based on QEMU." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/09894241610457505087.

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碩士<br>國立清華大學<br>資訊工程學系<br>99<br>QEMU is a fast processor emulator by adopting dynamic binary translation techniques to achieve high emulation efficiency. With QEMU, various operating systems and programs created for one ISA can be run on a machine with a different ISA. However, the current design of QEMU is only suitable for single-core processor emulation. When executing a multi-threaded application on a multi-core machine, QEMU emulates the execution of the application in serial and cannot take advantage of the parallelism available in the application and the underlying hardware. In this wor

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21

Suresha, *. "Caching Techniques For Dynamic Web Servers." Thesis, 2006. https://etd.iisc.ac.in/handle/2005/438.

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Websites are shifting from static model to dynamic model, in order to deliver their users with dynamic, interactive, and personalized experiences. However, dynamic content generation comes at a cost – each request requires computation as well as communication across multiple components within the website and across the Internet. In fact, dynamic pages are constructed on the fly, on demand. Due to their construction overheads and non-cacheability, dynamic pages result in substantially increased user response times, server load and increased bandwidth consumption, as compared to static

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Suresha, *. "Caching Techniques For Dynamic Web Servers." Thesis, 2006. http://hdl.handle.net/2005/438.

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Websites are shifting from static model to dynamic model, in order to deliver their users with dynamic, interactive, and personalized experiences. However, dynamic content generation comes at a cost – each request requires computation as well as communication across multiple components within the website and across the Internet. In fact, dynamic pages are constructed on the fly, on demand. Due to their construction overheads and non-cacheability, dynamic pages result in substantially increased user response times, server load and increased bandwidth consumption, as compared to static

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