Journal articles on the topic 'Buffering Architecture'
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Mulder, H., and M. J. Flynn. "Processor architecture and data buffering." IEEE Transactions on Computers 41, no. 10 (1992): 1211–22. http://dx.doi.org/10.1109/12.166600.
Full textTaleb, Tarik, Nei Kato, and Yoshiaki Nemoto. "Neighbors-buffering-based video-on-demand architecture." Signal Processing: Image Communication 18, no. 7 (August 2003): 515–26. http://dx.doi.org/10.1016/s0923-5965(03)00039-0.
Full textMauceri, Daniela, Anna M. Hagenston, Kathrin Schramm, Ursula Weiss, and Hilmar Bading. "Nuclear Calcium Buffering Capacity Shapes Neuronal Architecture." Journal of Biological Chemistry 290, no. 38 (July 31, 2015): 23039–49. http://dx.doi.org/10.1074/jbc.m115.654962.
Full textGuild, K. M., and M. J. O'Mahony. "Routing and buffering architecture in all-optical switching node." Electronics Letters 35, no. 2 (1999): 161. http://dx.doi.org/10.1049/el:19990129.
Full textWang, Ru-yan, Jie Zhang, Fang Guo, and Ke-ping Long. "An effective buffering architecture for optical packet switching networks." Photonic Network Communications 16, no. 3 (June 27, 2008): 239–43. http://dx.doi.org/10.1007/s11107-008-0135-0.
Full textTan, Xu, Xiao-Wei Shen, Xiao-Chun Ye, Da Wang, Dong-Rui Fan, Lunkai Zhang, Wen-Ming Li, Zhi-Min Zhang, and Zhi-Min Tang. "A Non-Stop Double Buffering Mechanism for Dataflow Architecture." Journal of Computer Science and Technology 33, no. 1 (January 2018): 145–57. http://dx.doi.org/10.1007/s11390-017-1747-6.
Full textKim, Joongheon, and Aziz Mohaisen. "Distributed and reliable decision-making for cloud-enabled mobile service platforms." International Journal of Distributed Sensor Networks 13, no. 8 (August 2017): 155014771772650. http://dx.doi.org/10.1177/1550147717726509.
Full textLeff, A., J. L. Wolf, and P. S. Yu. "Efficient LRU-based buffering in a LAN remote caching architecture." IEEE Transactions on Parallel and Distributed Systems 7, no. 2 (1996): 191–206. http://dx.doi.org/10.1109/71.485508.
Full textBrustoloni, José Carlos, and Peter Steenkiste. "Effects of buffering semantics on I/O performance." ACM SIGOPS Operating Systems Review 30, SI (October 28, 1996): 277–91. http://dx.doi.org/10.1145/248155.238787.
Full textManiotis, P., D. Fitsios, G. T. Kanellos, and N. Pleros. "Optical Buffering for Chip Multiprocessors: A 16GHz Optical Cache Memory Architecture." Journal of Lightwave Technology 31, no. 24 (December 2013): 4175–91. http://dx.doi.org/10.1109/jlt.2013.2290741.
Full textDe Rossi, Giacomo, and Riccardo Muradore. "A Bilateral Teleoperation Architecture using Smith Predictor and Adaptive Network Buffering." IFAC-PapersOnLine 50, no. 1 (July 2017): 11421–26. http://dx.doi.org/10.1016/j.ifacol.2017.08.1806.
Full textChen, Kai-Sheng, and Wien Hong. "Multi-Level Buffering Services Based on Optical Packet Encoding of Composite Maximal-Length Sequences in a GMPLS Network." Applied Sciences 10, no. 3 (January 21, 2020): 730. http://dx.doi.org/10.3390/app10030730.
Full textYang, Shuna, and Norvald Stol. "A novel delay line buffering architecture for asynchronous optical packet switched networks." International Journal of Information, Communication Technology and Applications 1, no. 1 (March 9, 2015): 69–82. http://dx.doi.org/10.17972/ajicta20151112.
Full textLi, Lin, Jitender S. Deogun, and Stephen D. Scott. "Performance analysis of optical packet switches with a hybrid buffering architecture [Invited]." Journal of Optical Networking 3, no. 6 (2004): 433. http://dx.doi.org/10.1364/jon.3.000433.
Full textReza, Ahmed Galib, and Hyotaek Lim. "Hybrid buffering architecture for packet contention resolution of an optical packet switch." Optik 122, no. 7 (April 2011): 591–93. http://dx.doi.org/10.1016/j.ijleo.2010.04.017.
Full textKong, B. Y. "Multi‐touch detector architecture based on efficient buffering of intensities and labels." Electronics Letters 56, no. 14 (July 2020): 699–701. http://dx.doi.org/10.1049/el.2020.0884.
Full textGeorge, Binto, and Jayant R. Haritsa. "Secure buffering in firm real-time database systems." VLDB Journal The International Journal on Very Large Data Bases 8, no. 3-4 (February 1, 2000): 178–98. http://dx.doi.org/10.1007/s007780050003.
Full textDesnoyers, Mathieu, and Michel R. Dagenais. "Lockless multi-core high-throughput buffering scheme for kernel tracing." ACM SIGOPS Operating Systems Review 46, no. 3 (December 18, 2012): 65–81. http://dx.doi.org/10.1145/2421648.2421659.
Full textOrtiz, Jorge, and David Andrews. "A Streaming High-Throughput Linear Sorter System with Contention Buffering." International Journal of Reconfigurable Computing 2011 (2011): 1–12. http://dx.doi.org/10.1155/2011/963539.
Full textWang, Jia, Lin Liu, Yuchen Zhou, and Shiyan Hu. "Buffering Carbon Nanotube Interconnects Considering Inductive Effects." Journal of Circuits, Systems and Computers 25, no. 08 (May 17, 2016): 1650093. http://dx.doi.org/10.1142/s0218126616500936.
Full textBYNA, SURENDRA, KIRK W. CAMERON, and XIAN-HE SUN. "ISOLATING COSTS IN SHARED MEMORY COMMUNICATION BUFFERING." Parallel Processing Letters 15, no. 04 (December 2005): 357–65. http://dx.doi.org/10.1142/s0129626405002271.
Full textWhite, Marcus, and Stephen Glackin. "Broadband‐acre City: ‘No Traffic Problem, No Buffering’." Architectural Design 93, no. 1 (January 2023): 30–37. http://dx.doi.org/10.1002/ad.2891.
Full textZhang, Tianpei, and Sachin S. Sapatnekar. "Buffering global interconnects in structured ASIC design." Integration 41, no. 2 (February 2008): 171–82. http://dx.doi.org/10.1016/j.vlsi.2007.04.002.
Full textNenninger, Philipp, Oliver Rooks, and Uwe Kiencke. "IMPROVED SYSTEM ARCHITECTURE FOR SAFETY-RELEVANT SYSTEMS USING DYNAMIC DISTRIBUTION AND STATE BUFFERING." IFAC Proceedings Volumes 38, no. 1 (2005): 176–81. http://dx.doi.org/10.3182/20050703-6-cz-1902.01917.
Full textSundan, Bose, and Kannan Arputharaj. "ADAPTIVE MULTIPATH MULTIMEDIA STREAMING ARCHITECTURE FOR MOBILE NETWORKS WITH PROACTIVE BUFFERING USING MOBILE PROXIES." Journal of Computing and Information Technology 15, no. 3 (2007): 215. http://dx.doi.org/10.2498/cit.1000884.
Full textHuang, Sheng-Min, and Li-Pin Chang. "Exploiting Page Correlations for Write Buffering in Page-Mapping Multichannel SSDs." ACM Transactions on Embedded Computing Systems 15, no. 1 (February 20, 2016): 1–25. http://dx.doi.org/10.1145/2815622.
Full textGeldenhuys, R., Y. Liu, M. T. Hill, G. D. Khoe, F. W. Leuschner, and H. J. S. Dorren. "Architectures and Buffering for All-Optical Packet-Switched Cross-Connects." Photonic Network Communications 11, no. 1 (January 2006): 65–75. http://dx.doi.org/10.1007/s11107-006-5324-0.
Full textQadri, Muhammad Yasir, Nadia N. Qadri, Martin Fleury, and Klaus D. McDonald-Maier. "Software-Controlled Instruction Prefetch Buffering for Low-End Processors." Journal of Circuits, Systems and Computers 24, no. 10 (October 25, 2015): 1550161. http://dx.doi.org/10.1142/s0218126615501613.
Full textFang, J. P., Y. S. Tong, and S. J. Chen. "Simultaneous routing and buffering in SOC floorplan design." IEE Proceedings - Computers and Digital Techniques 151, no. 1 (2004): 17. http://dx.doi.org/10.1049/ip-cdt:20040072.
Full textLee, J. H., C. Weems, and S. D. Kim. "Selective block buffering TLB system for embedded processors." IEE Proceedings - Computers and Digital Techniques 152, no. 4 (2005): 507. http://dx.doi.org/10.1049/ip-cdt:20045025.
Full textChi Ta Wu, Ang-Chih Hsieh, and Ting Ting Hwang. "Instruction buffering for nested loops in low-power design." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 14, no. 7 (July 2006): 780–84. http://dx.doi.org/10.1109/tvlsi.2006.878348.
Full textMin, P. S., M. V. Hegde, A. Chandra, and A. Maunder. "Analysis of banyan-based copy networks with internal buffering." Journal of High Speed Networks 5, no. 3 (1996): 259–75. http://dx.doi.org/10.3233/jhs-1996-5303.
Full textGou, Xiantai. "An Adaptive Jitter Buffering Algorithm for Voice over IP Networks." Journal of Computer Research and Development 42, no. 12 (2005): 2149. http://dx.doi.org/10.1360/crad20051218.
Full textHo, Dennis. "Climatic responsive atrium design in Europe." Architectural Research Quarterly 1, no. 3 (1996): 64–75. http://dx.doi.org/10.1017/s135913550000292x.
Full textBregni, Stefano, Angelo Caruso, and Achille Pattavina. "Buffering-deflection tradeoffs in optical burst switching." Photonic Network Communications 20, no. 2 (August 4, 2010): 193–200. http://dx.doi.org/10.1007/s11107-010-0259-x.
Full textYiannopoulos, K., S. Sygletos, M. Spyropoulou, E. Varvarigos, and I. Tomkos. "Optical buffering up to 160 Gb/s employing a quantum dot semiconductor optical amplifier-based architecture." IET Optoelectronics 5, no. 1 (February 1, 2011): 50–56. http://dx.doi.org/10.1049/iet-opt.2009.0057.
Full textWang, Diane R., Rongkui Han, Edward J. Wolfrum, and Susan R. McCouch. "The buffering capacity of stems: genetic architecture of nonstructural carbohydrates in cultivated Asian rice,Oryza sativa." New Phytologist 215, no. 2 (May 30, 2017): 658–71. http://dx.doi.org/10.1111/nph.14614.
Full textSarper, Hasan, and Isik Aybay. "Improving VoD Performance with LAN Client Back-End Buffering." IEEE Multimedia 14, no. 1 (2007): 48–60. http://dx.doi.org/10.1109/mmul.2007.13.
Full textLee, J., F. Peper, S. Adachi, and K. Morita. "Universal delay-insensitive circuits with bidirectional and buffering lines." IEEE Transactions on Computers 53, no. 8 (August 2004): 1034–46. http://dx.doi.org/10.1109/tc.2004.51.
Full textMyllymaki, Jussi, and Miron Livny. "Efficient buffering for concurrent disk and tape I/O." Performance Evaluation 27-28 (October 1996): 453–71. http://dx.doi.org/10.1016/s0166-5316(96)90040-1.
Full textGarzarán, María Jesús, Milos Prvulovic, José María Llabería, Víctor Viñals, Lawrence Rauchwerger, and Josep Torrellas. "Tradeoffs in buffering speculative memory state for thread-level speculation in multiprocessors." ACM Transactions on Architecture and Code Optimization 2, no. 3 (September 2005): 247–79. http://dx.doi.org/10.1145/1089008.1089010.
Full textYoon, Hanbin, Justin Meza, Naveen Muralimanohar, Norman P. Jouppi, and Onur Mutlu. "Efficient Data Mapping and Buffering Techniques for Multilevel Cell Phase-Change Memories." ACM Transactions on Architecture and Code Optimization 11, no. 4 (January 9, 2015): 1–25. http://dx.doi.org/10.1145/2669365.
Full textPETRELLIS, N., G. ADAM, and D. VENTZAS. "MONOTONIC ERROR ELIMINATION IN SUBRANGE A/D CONVERTERS." Journal of Circuits, Systems and Computers 22, no. 01 (January 2013): 1250073. http://dx.doi.org/10.1142/s0218126612500739.
Full textDOROSHENKO, A. E. "ON ASYNCHRONOUS AVOIDANCE OF DEADLOCKS IN PARALLEL PROGRAMS." Parallel Processing Letters 02, no. 02n03 (September 1992): 291–97. http://dx.doi.org/10.1142/s012962649200043x.
Full textWodnicki, Robert, Haochen Kang, Di Li, Douglas N. Stephens, Hayong Jung, Yizhe Sun, Ruimin Chen, et al. "Highly Integrated Multiplexing and Buffering Electronics for Large Aperture Ultrasonic Arrays." BME Frontiers 2022 (June 30, 2022): 1–22. http://dx.doi.org/10.34133/2022/9870386.
Full textLoghi, M., P. Azzoni, and M. Poncino. "Tag Overflow Buffering: Reducing Total Memory Energy by Reduced-Tag Matching." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 17, no. 5 (May 2009): 728–32. http://dx.doi.org/10.1109/tvlsi.2009.2016720.
Full textTOMITA, Ryuta, Katsuo INOUE, and Syuta KAWAMATA. "HEAD IMPACT BUFFERING EFFECT OF DIRECT PASTED WOODEN FLOORINGS BY HUMAN FALLING IN THE HOUSE." AIJ Journal of Technology and Design 13, no. 26 (2007): 591–96. http://dx.doi.org/10.3130/aijt.13.591.
Full textDavaasambuu, Battulga. "Handover with Buffering for Distributed Mobility Management in Software Defined Mobile Networks." Australian Journal of Telecommunications and the Digital Economy 6, no. 1 (March 30, 2018): 26–40. http://dx.doi.org/10.18080/ajtde.v6n1.137.
Full textDavaasambuu, Battulga. "Handover with Buffering for Distributed Mobility Management in Software Defined Mobile Networks." Journal of Telecommunications and the Digital Economy 6, no. 1 (March 30, 2018): 26–40. http://dx.doi.org/10.18080/jtde.v6n1.137.
Full textMa, X., J. Lee, and M. Winslett. "High-level buffering for hiding periodic output cost in scientific simulations." IEEE Transactions on Parallel and Distributed Systems 17, no. 3 (March 2006): 193–204. http://dx.doi.org/10.1109/tpds.2006.36.
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