Relevant bibliographies by topics / AUTOSAR OS verification

Academic literature on the topic 'AUTOSAR OS verification'

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Published: 14 March 2023

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Journal articles on the topic "AUTOSAR OS verification"

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Gravier, Erwan, Markus Gros, and Anne Geburzi. "Verification of Autosar software architectures." ATZelektronik worldwide 5, no. 4 (August 2010): 24–27. http://dx.doi.org/10.1007/bf03242277.

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Safar, Mona, Magdy A. El-Moursy, Mohamed Abdelsalam, Ayman Bakr, Keroles Khalil, and Ashraf Salem. "Virtual Verification and Validation of Automotive System." Journal of Circuits, Systems and Computers 28, no. 04 (March 31, 2019): 1950071. http://dx.doi.org/10.1142/s0218126619500713.

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An integrated framework for Virtual Verification and Validation (VVV) for a complete automotive system is proposed. The framework can simulate/emulate the system on three levels: System on Chip (SoC), Electronic control unit (ECU) and system level. The framework emulates the real system including hardware (HW) and software (SW). It enhances the automotive V-cycle and allows co-development of the automotive system SW and HW. The procedure for debugging AUTOSAR application on the virtual platform (VP) is shown. SW and HW profiling is feasible with the presented methodology. Verification and validation of automotive embedded SW is also presented. The proposed methodology is efficient as the system complexity increases which shortens the development cycle of automotive system. It also provides fault injection capability. With HW emulation, co-debugging mechanism is demonstrated. A case study covering the framework capability is presented. The case study demonstrates the proposed framework and methodology to design, simulate, trace, profile and debug AUTOSAR SW using VPs.
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Eisemann, Ulrich, Dirk Stichling, and Joachim Stroop. "Efficient software development and verification in an Autosar tool chain." ATZelektronik worldwide 4, no. 3 (May 2009): 34–37. http://dx.doi.org/10.1007/bf03242223.

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Gordon, Steven, and San Choosang. "Verification of the FlexRay Transport Protocol for AUTOSAR In-Vehicle Communications." International Journal of Vehicular Technology 2010 (December 27, 2010): 1–23. http://dx.doi.org/10.1155/2010/238518.

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The FlexRay Transport Protocol (FrTp) is designed to support reliable and efficient communication between various computers embedded in vehicles. It uses a standardised FlexRay communication bus and introduces a go-back-N style retransmission algorithm. A formal modelling language, Coloured Petri nets (CPN), has been applied to verify the protocol design. Separate CPN models of the FrTp service and protocol are developed and with state space analysis-used to prove for selected configurations that FrTp is deadlock-free and conforms to the service specification when transferring a single-protocol data unit from sender to receiver. In addition, closed-form solutions relating the state space size, retransmission limit, and number of segments are found, giving increased confidence that FrTp is error-free, even for configurations where the state explosion problem arises.
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Park, Inseok, Eunhwan Kang, Jaesung Chung, Jeongwon Sohn, Myoungho Sunwoo, Kangseok Lee, Wootaik Lee, Jeamyoung Youn, and Donghoon Won. "Timing Verification of AUTOSAR-compliant Diesel Engine Management System Using Measurement-based Worst-case Execution Time Analysis." Transactions of the Korean Society of Automotive Engineers 22, no. 5 (July 1, 2014): 91–101. http://dx.doi.org/10.7467/ksae.2014.22.5.091.

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Gowda, Jagadish Narayan. "ECU Inter‐processor data communication End to End verification in Autosar for achieving Functional Safety Goals." INCOSE International Symposium 29, S1 (December 2019): 443–53. http://dx.doi.org/10.1002/j.2334-5837.2019.00698.x.

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Qi, Q., X. Liu, and Xiang Qian Jiang. "A Surface Texture Information System Integrated with AutoCAD for Next Generation GPS." Key Engineering Materials 381-382 (June 2008): 237–40. http://dx.doi.org/10.4028/www.scientific.net/kem.381-382.237.

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To meet the requirements of next generation Geometrical Product Specification and Verification (GPS), a surface texture information system integrated with AutoCAD is developed. The information system mainly consists of three parts: a surface texture database containing large amount of surface texture specification information, inference algorithms and interfaces with AutoCAD, so that unambiguous, explicit and complete specification for design, manufacture and verification of surface texture can be provided in AutoCAD for function assurance.
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Khalid, Hasnan Bin, Saesar Budi Luhur, and Yudhistira Adhi Prima. "A Size-Bed Wheelchair Design Manufacture with Scaled Prototype and Kinematic-Virtual Reality Model Simulation." Advanced Materials Research 488-489 (March 2012): 1207–12. http://dx.doi.org/10.4028/www.scientific.net/amr.488-489.1207.

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This paper presents the design verification of a novel concept wheelchair using SimMechanics toolboxes. A wheelchair-sized bed concept (patent pending) with 3 modes of ability (sitting-lying-standing) is proposed. Design begins by deciding the actuator and the component integrated in reality. The 3D wheelchair model was done in AutoCAD 3D and in Vrealm builder to connect with simulink. All components like joint, frame, actuator, gear box and any other part of wheelchair was register in SimMechanics. To verify the kinematics model, a joystick input was connected to the model for visual movement and collision verification. Finally from virtual reality simulation and SimMechanics kinematic modeling, the movement and collision can be verified, and also the actuator condition can be reported.
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Li, Guo Zhi, Jian Li Gao, Wen Feng Li, and Man Ru Chen. "Research and Development of Box/Carton CAD System Based on AutoLISP Language." Applied Mechanics and Materials 200 (October 2012): 621–24. http://dx.doi.org/10.4028/www.scientific.net/amm.200.621.

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By using AutoLISP language based on Autocad, the development process of the tray /carton CAD system should focus on software workflow and overall development program. The system uses nodes descript by a relatively polar coordinate, parametric design, the combination of box/carton-type library with box/carton components library, splicing design methods, etc. With the program designed by AutoLISP language, paper box/carton structure parametric drawing can be achieved according to the mathematical model. The system has the input data legality verification, error handling function, output expansion plan, and automatic dimensioning features.
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Novotný, Milan, Radek Neugebauer, and Milan Šimek. "Static analysis of an office desk construction." Acta Universitatis Agriculturae et Silviculturae Mendelianae Brunensis 59, no. 6 (2011): 247–54. http://dx.doi.org/10.11118/actaun201159060247.

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The objective of the paper is a static analysis of a desk construction and the determination of its probable mechanical behaviour using Finite Element Method. The construction was modelled and numerically analysed in Autocad Inventor 2011 and the stability of the entire desk was calculated with the size and placement of the loading force based on the standards and cited literature. Possible locations and directions of the deformation were analysed and a solution for its prevention was proposed and the stability of the desk as well as the extreme position of the stand were calculated. The verification of the obtained results in an accredited furniture testing lab is planned using a prototype of the office desk.
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Dissertations / Theses on the topic "AUTOSAR OS verification"

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Haur, Imane. "AUTOSAR compliant multi-core RTOS formal modeling and verification." Electronic Thesis or Diss., Ecole centrale de Nantes, 2022. http://www.theses.fr/2022ECDN0057.

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La vérification formelle est une solution pour augmenter la fiabilité de l’implémentation du système. Dans notre travail de thèse, nous nous intéressons à l’utilisation de ces méthodes pour la vérification des systèmes d’exploitation multi-coeurs temps réel. Nous proposons une approche de model-checking utilisant les réseaux de Petri temporels, étendus avec des transitions colorées et des fonctionnalités de haut niveau. Nous utilisons ce formalisme pour modéliser le système d’exploitation multi-coeur Trampoline, conforme aux standards OSEK/VDX etAUTOSAR. Nous définissons dans un premier temps ce formalisme et montrons son adéquation avec la modélisation de systèmes concurrents temps reel. Nous utilisons ensuite ce formalisme pour modéliser le système d’exploitation multi-coeur Trampoline et vérifions par model-checking sa conformité avec le standard AUTOSAR. À partir de ce modèle, nous pouvons vérifier des propriétés aussi bien sur l’OS que sur l’application telles que l’ordonnançabilité d’un système tempsréel ainsi que les mécanismes de synchronisation : accès concurrents aux structures de données du système d’exploitation, ordonnancement multi-coeur et traitement des interruptions inter-coeur. À titre d’illustration, cette méthode a permis l’identification automatique de deux erreurs possibles de l’OS Trampoline dans l’exécution concurrente, montrant une protection insuffisante des données et une synchronisation défectueuse
Formal verification is a solution to increase the system’s implementation reliability. In our thesis work, we are interestedin using these methods to verify multi-core RTOS. We propose a model-checking approach using time Petri nets extended with colored transitions and high-level features. We use this formalism to model the Trampoline multi-core OS, compliant with the OSEK/VDX and AUTOSAR standards. We first define this formalism and show its suitability for modeling real-time concurrent systems. We then use this formalism to model the Trampoline multi-core RTOS and verify by model-checkingits conformity with the AUTOSAR standard. From this model, we can verify properties of both the OS and the application, such as the schedulability of a real-time system and the synchronization mechanisms: concurrent access to the data structures of the OS, multicore scheduling, and inter-core interrupt handling. As an illustration, this method allowed the automatic identification of two possible errors of the Trampoline OS in concurrent execution, showing insufficient data protection andfaulty synchronization
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Mohammad, Hassan [Verfasser], and Peter [Akademischer Betreuer] Liggesmeyer. "Verification & Performance Measurement for Transport Protocol Parallel Routing of an AUTOSAR Gateway System / Hassan Mohammad. Betreuer: Peter Liggesmeyer." Kaiserslautern : Technische Universität Kaiserslautern, 2016. http://d-nb.info/1105472183/34.

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Pathni, Charu. "Round-trip engineering concept for hierarchical UML models in AUTOSAR-based safety projects." Master's thesis, Universitätsbibliothek Chemnitz, 2015. http://nbn-resolving.de/urn:nbn:de:bsz:ch1-qucosa-187153.

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Product development process begins at a very abstract level of understanding the requirements. The data needs to be passed on the next phase of development. This happens after every stage for further development and finally a product is made. This thesis deals with the data exchange process of software development process in specific. The problem lies in handling of data in terms of redundancy and versions of the data to be handled. Also, once data passed on to next stage, the ability to exchange it in reveres order is not existent in evident forms. The results found during this thesis discusses the solutions for the problem by getting all the data at same level, in terms of its format. Having the concept ready, provides an opportunity to use this data based on our requirements. In this research, the problem of data consistency, data verification is dealt with. This data is used during the development and data merging from various sources. The concept that is formulated can be expanded to a wide variety of applications with respect to development process. If the process involves exchange of data - scalability and generalization are the main foundation concepts that are contained within the concept.
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Deicke, Markus. "Virtuelle Absicherung von Steuergeräte-Software mit hardwareabhängigen Komponenten." Doctoral thesis, Universitätsbibliothek Chemnitz, 2018. http://nbn-resolving.de/urn:nbn:de:bsz:ch1-qucosa-230123.

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Der stetig steigende Funktionsumfang im Automobil und die zunehmende Vernetzung von Steuergeräten erfordern neue Methoden zur Beherrschung der Komplexität in der Validierung und Verifikation. Die virtuelle Absicherung ermöglicht die Integration der Software in einem PC-System, unabhängig von der Ziel-Hardware, zur frühzeitigen Gewährleistung der Softwarequalität im Entwicklungsprozess. Ebenso kann die Wiederverwendbarkeit vorhandener Komponenten in zukünftigen Mikrocontrollern sichergestellt werden. Die Grundlage dafür liefert der AUTOSAR-Standard durch einheitliche Schnittstellenbeschreibungen, welche die Abstraktion von Hardware und Software ermöglichen. Allerdings enthält der Standard hardwareabhängige Software-Komponenten, die als Complex-Device-Drivers (CDDs) bezeichnet werden. Aufgrund ihrer Hardwareabhängigkeit sind CDDs nicht direkt in eine virtuelle Absicherungsplattform integrierbar, da die spezifischen Hardware-Module nicht verfügbar sind. Die Treiber sind dennoch Teil der Steuergeräte-Software und somit bei einem ganzheitlichen Absicherungsansatz mit zu betrachten. Diese Dissertation beschreibt sieben unterschiedliche Konzepte zur Berücksichtigung von CDDs in der virtuellen Absicherung. Aus der Evaluierung der Praxistauglichkeit aller Ansätze wird eine Auswahlmethodik für die optimale Lösung bei sämtlichen Anwendungsfällen von CDDs in der Steuergeräte-Software entwickelt. Daraus abgeleitet, eignen sich zwei der Konzepte für die häufigsten Anwendungsfälle, die im Weiteren detailliert beschrieben und realisiert werden. Das erste Konzept erlaubt die vollständige Simulation eines CDD. Dies ist notwendig, um die Integration der Funktions-Software selbst ohne den Treiber zu ermöglichen und alle Schnittstellen abzusichern, auch wenn der CDD noch nicht verfügbar ist. Durch eine vollständige Automatisierung ist die Erstellung der Simulation nur mit geringem Arbeitsaufwand verbunden. Das zweite Konzept ermöglicht die vollständige Integration eines CDD, wobei die Hardware-Schnittstellen über einen zusätzlichen Hardware-Abstraction-Layer an die verfügbare Hardware des Systems zur virtuellen Absicherung angebunden werden. So ist der Treiber in der Lage, reale Hardware-Komponenten anzusteuern und kann funktional abgesichert werden. Eine flexible Konfiguration der Abstraktionsschicht erlaubt den Einsatz für eine große Bandbreite von CDDs. Im Rahmen der Arbeit werden beide Konzepte anhand von industrierelevanten Projekten aus der Serienentwicklung erprobt und detailliert evaluiert
The constantly increasing amount of functions in modern automobiles and the growing degree of cross-linking between electronic control units (ECU) require new methods to master the complexity in the validation and verification process. The virtual validation and verification enables the integration of the software on a PC system, which is independent from the target hardware, to guarantee the required software quality in the early development stages. Furthermore, the software reuse in future microcontrollers can be verified. All this is enabled by the AUTOSAR standard which provides consistent interface descriptions to allow the abstraction of hardware and software. However, the standard contains hardware-dependent components, called complex device drivers (CDD). Those CDDs cannot be directly integrated into a platform for virtual verification, because they require a specific hardware which is not generally available on such a platform. Regardless, CDDs are an essential part of the ECU software and therefore need to be considered in an holistic approach for validation and verification. This thesis describes seven different concepts to include CDDs in the virtual verification process. A method to always choose the optimal solution for all use cases of CDDs in ECU software is developed using an evaluation of the suitably for daily use of all concepts. As a result from this method, the two concepts suited for the most frequent use cases are detailed and developed as prototypes in this thesis. The first concept enables the full simulation of a CDD. This is necessary to allow the integration of the functional software itself without the driver. This way all interfaces can be tested even if the CDD is not available. The complete automation of the generation of the simulation makes the process very efficient. With the second concept a CDD can be entirely integrated into a platform for virtual verification, using an hardware abstraction layer to connect the hardware interfaces to the available hardware of the platform. This way, the driver is able to control real hardware components and can be tested completely. A flexible configuration of the abstraction layer allows the application of the concept for a wide variety of CDDs. In this thesis both concepts are tested and evaluated using genuine projects from series development
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Deicke, Markus. "Virtuelle Absicherung von Steuergeräte-Software mit hardwareabhängigen Komponenten." Universitätsverlag Chemnitz, 2016. https://monarch.qucosa.de/id/qucosa%3A20810.

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Der stetig steigende Funktionsumfang im Automobil und die zunehmende Vernetzung von Steuergeräten erfordern neue Methoden zur Beherrschung der Komplexität in der Validierung und Verifikation. Die virtuelle Absicherung ermöglicht die Integration der Software in einem PC-System, unabhängig von der Ziel-Hardware, zur frühzeitigen Gewährleistung der Softwarequalität im Entwicklungsprozess. Ebenso kann die Wiederverwendbarkeit vorhandener Komponenten in zukünftigen Mikrocontrollern sichergestellt werden. Die Grundlage dafür liefert der AUTOSAR-Standard durch einheitliche Schnittstellenbeschreibungen, welche die Abstraktion von Hardware und Software ermöglichen. Allerdings enthält der Standard hardwareabhängige Software-Komponenten, die als Complex-Device-Drivers (CDDs) bezeichnet werden. Aufgrund ihrer Hardwareabhängigkeit sind CDDs nicht direkt in eine virtuelle Absicherungsplattform integrierbar, da die spezifischen Hardware-Module nicht verfügbar sind. Die Treiber sind dennoch Teil der Steuergeräte-Software und somit bei einem ganzheitlichen Absicherungsansatz mit zu betrachten. Diese Dissertation beschreibt sieben unterschiedliche Konzepte zur Berücksichtigung von CDDs in der virtuellen Absicherung. Aus der Evaluierung der Praxistauglichkeit aller Ansätze wird eine Auswahlmethodik für die optimale Lösung bei sämtlichen Anwendungsfällen von CDDs in der Steuergeräte-Software entwickelt. Daraus abgeleitet, eignen sich zwei der Konzepte für die häufigsten Anwendungsfälle, die im Weiteren detailliert beschrieben und realisiert werden. Das erste Konzept erlaubt die vollständige Simulation eines CDD. Dies ist notwendig, um die Integration der Funktions-Software selbst ohne den Treiber zu ermöglichen und alle Schnittstellen abzusichern, auch wenn der CDD noch nicht verfügbar ist. Durch eine vollständige Automatisierung ist die Erstellung der Simulation nur mit geringem Arbeitsaufwand verbunden. Das zweite Konzept ermöglicht die vollständige Integration eines CDD, wobei die Hardware-Schnittstellen über einen zusätzlichen Hardware-Abstraction-Layer an die verfügbare Hardware des Systems zur virtuellen Absicherung angebunden werden. So ist der Treiber in der Lage, reale Hardware-Komponenten anzusteuern und kann funktional abgesichert werden. Eine flexible Konfiguration der Abstraktionsschicht erlaubt den Einsatz für eine große Bandbreite von CDDs. Im Rahmen der Arbeit werden beide Konzepte anhand von industrierelevanten Projekten aus der Serienentwicklung erprobt und detailliert evaluiert.
The constantly increasing amount of functions in modern automobiles and the growing degree of cross-linking between electronic control units (ECU) require new methods to master the complexity in the validation and verification process. The virtual validation and verification enables the integration of the software on a PC system, which is independent from the target hardware, to guarantee the required software quality in the early development stages. Furthermore, the software reuse in future microcontrollers can be verified. All this is enabled by the AUTOSAR standard which provides consistent interface descriptions to allow the abstraction of hardware and software. However, the standard contains hardware-dependent components, called complex device drivers (CDD). Those CDDs cannot be directly integrated into a platform for virtual verification, because they require a specific hardware which is not generally available on such a platform. Regardless, CDDs are an essential part of the ECU software and therefore need to be considered in an holistic approach for validation and verification. This thesis describes seven different concepts to include CDDs in the virtual verification process. A method to always choose the optimal solution for all use cases of CDDs in ECU software is developed using an evaluation of the suitably for daily use of all concepts. As a result from this method, the two concepts suited for the most frequent use cases are detailed and developed as prototypes in this thesis. The first concept enables the full simulation of a CDD. This is necessary to allow the integration of the functional software itself without the driver. This way all interfaces can be tested even if the CDD is not available. The complete automation of the generation of the simulation makes the process very efficient. With the second concept a CDD can be entirely integrated into a platform for virtual verification, using an hardware abstraction layer to connect the hardware interfaces to the available hardware of the platform. This way, the driver is able to control real hardware components and can be tested completely. A flexible configuration of the abstraction layer allows the application of the concept for a wide variety of CDDs. In this thesis both concepts are tested and evaluated using genuine projects from series development.
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Kebaili, Mejid. "Réflexions autour de la méthodologie de vérification des circuits multi-horloges : analyse qualitative et automatisation." Thesis, Université Grenoble Alpes (ComUE), 2017. http://www.theses.fr/2017GREAT064/document.

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Depuis plusieurs années, le marché des circuits intégrés numériques requiert des systèmes de plus en plus complexes dans un temps toujours plus réduit. Afin de répondre à ses deux exigences, les industriels de la conception font appel à des fournisseurs externes proposant des circuits fonctionnant sur des signaux d'horloge dédiés. Lorsque ces derniers communiquent entre eux, les horloges d'émission et de réception ne sont pas les mêmes, on parle de « Clock Domain Crossing » (CDC).Les CDC correspondent à des communications asynchrones et peuvent provoquer des dysfonctionnements critiques. Par ailleurs, ces problèmes étant intermittents et complexes à analyser, ils ne peuvent pas être exhaustivement vérifiés avec des méthodes telles que l’analyse de timing ou la simulation fonctionnelle. Avec l'augmentation du nombre de CDC dans les circuits, les industriels de la conception assistée par ordinateur (EDA) ont proposé des solutions logicielles spécialisées dans la vérification statique des CDC. Cependant, les circuits développés étant en constante évolution, les outils ne sont pas en mesure de s’adapter. Pour pallier ces problèmes, la vérification industrielle des CDC est basée sur la spécification de contraintes et d'exclusions par l'utilisateur. Ces actions, qui se substituent aux outils, peuvent masquer des bugs. De plus, l’effort humain requis par cette approche n’est pas compatible avec le temps alloué au développement de circuits industriels. Nous avons donc cherché à automatiser la vérification en proposant des solutions basées sur des propriétés formelles. Les travaux ont consisté à analyser les différentes techniques de conception et de vérification des CDC à travers l’évaluation des principaux outils du marché. A partir des résultats obtenus, nous avons formalisé les problèmes pratiques et proposé des modèles permettant d’obtenir des résultats exhaustifs automatiquement. Les essais ont été réalisés sur un sous-système à base de processeurs (CPUSS) développé chez STMicroelectronics. L'adoption de nos modèles permet une vérification complète des CPUSS de manière automatique ce qui est essentiel dans un environnement industriel compétitif. En effet, le nombre d’informations devant être spécifiées par l’utilisateur a été réduit de moitié pour chacun des outils évalués. Par ailleurs, ces travaux ont montré que l’axe de développement des outils CDC avec l’ajout de fonctionnalités telles que les flots hiérarchiques ou l’injection de fautes n’améliore pas la qualité de résultats. Une collaboration ayant été mise en place avec les principaux fournisseurs outils, certaines solutions seront probablement intégrées aux outils dans les années à venir
For several years now, the digital IC market has been requiring both more complex systems and reduced production times. In this context, the semiconductor chip maker companies call on external IP providers offering components working on dedicated clock signals. When these IPs communicate between them, the source and destination clocks are not the same, we talk about "Clock Domain Crossing" (CDC).CDC correspond to asynchronous communications and can cause critical failures. Furthermore, due to the complexity and the random nature of CDC issues, they can not be exhaustively checked with methods such as timing analysis or functional simulation. With the increase of CDC in the digital designs, EDA tools providers have developed software solutions dedicated to CDC static verification.Whereas, the designs are subject to continuous change, the verification tools are not able to be up to date. To resolve these practical issues, the CDC industrial verification is based on the specification of constraints and exclusions by the user. This manual flow, which replaces the tools, can mask bugs. Moreover, the human effort required by this approach is incompatible with the time allowed to industrial designs development.Our goal has been to automate the verification submitting solutions based on formal properties.The work consisted in the analysis of the different CDC design and verification approaches through the evaluation of main CDC checker tools. From the results obtained, we have formalized the practical problems and proposed models to obtain automatically exhaustive results. The tests have been performed on a processor-based subsystem (CPUSS) developed at STMicroelectronics.Adopting our models enables a complete checking of CPUSS in an automatic way, which is essential within a competitive industrial environment. Actually, the amount of information to be specified by the user has been reduced by half for each one of the evaluated tools. Otherwise, this work has shown that the development axis of the CDC tools despite the addition of functionalities such as hierarchical flows or fault injection, doesn’t improve the quality of results (QoR). Since a collaboration has been established with the main tool providers some solutions would probably be included into the tools over the coming years
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Vargovčík, Pavol. "Inkrementální induktivní pokrytelnost pro alternující konečné automaty." Master's thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2018. http://www.nusl.cz/ntk/nusl-386013.

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In this work, we propose a specialization of the inductive incremental coverability algorithm that solves alternating finite automata emptiness problem. We experiment with various design decisions, analyze them and prove their correctness. Even though the problem itself is PSpace-complete, we are focusing on making the decision of emptiness computationally feasible for some practical classes of applications. We have obtained interesting comparative results against state-of-the-art algorithms, especially in comparison with antichain-based algorithms.
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Lengál, Ondřej. "Automaty v nekonečně stavové formální verifikaci." Doctoral thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2015. http://www.nusl.cz/ntk/nusl-261279.

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Tato práce se zaměřuje na konečné automaty nad konečnými slovy a konečnými stromy, a použití těchto automatů při formální verifikaci nekonečně stavových systémů. Práce se nejdříve věnuje rozšíření existujícího přístupu pro verifikaci programů které manipulují s haldou (konkrétně programů s dynamickými datovými strukturami), jenž je založen na stromových automatech. V práci je navrženo několik rozšíření tohoto přístupu, jako například jeho plná automatizace či jeho rozšíření o podporu uspořádaných dat. V práci jsou popsány nové rozhodovací procedury pro dvě logiky, které jsou často používány ve formální verifikaci: pro separační logiku a pro slabou monadickou druhořádovou logiku s následníkem. Obě tyto rozhodovací procedury jsou založeny na převodu jejich problému do automatové domény a následné manipulaci v této cílové doméně. Posledním přínosem této práce je vývoj nových algoritmů k efektivní manipulaci se stromovými automaty, s důrazem na testování inkluze jazyků těchto automatů a manipulaci s automaty s velkými abecedami, a implementace těchto algoritmů v knihovně pro obecné použití. Tyto vyvinuté algoritmy jsou použity jako klíčová technologie, která umožňuje použití výše uvedených technik v praxi.
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Kuchařík, David. "Systém pro zabezpečení a střežení objektů a prostor." Master's thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2008. http://www.nusl.cz/ntk/nusl-235876.

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This project deals with given safeguard possibilities, both mechanical and electronic. A row house with garden was chosen for being secured. Subsequently, were elaborated two`s proposals of securing and guarding of this object. First, was based on camera`s system and second on common system ESS. Later on they were evaluated and the most considerable benefits were emphasized. A system based on control panel with connected detectors was selected upon specification. Subsequently was created a model of the chosen system, at which the required behaviour was simulated and verified. An outline of an implementation was created in the C language.
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Höttger, Robert Martin. "Model-Based Exploration of Parallelism in Context of Automotive Multi-Processor Systems." Doctoral thesis, 2021. https://repositorium.ub.uni-osnabrueck.de/handle/urn:nbn:de:gbv:700-202107155208.

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This dissertation entitled ’Model-Based Exploration of Parallelism in the Context of Automotive Multi-Core Systems’ deals with the analytical investigation of different temporal relationships for automotive multi-processor systems subject to critical, embedded, real-time, distributed, and heterogeneous domain requirements. Vehicle innovation increasingly demands high-performance platforms in terms of, e.g., highly assisted or autonomous driving such that established software development processes must be examined, revised, and advanced. The goal is not to develop application software itself, but instead to improve the model-based development process, subject to numerous constraints and requirements. Model-based software development is, for example, an established process that allows systems to be analyzed and simulated in an abstracted, standardized, modular, isolated, or integrated manner. The verification of real-time behavior taking into account various constraints and modern architectures, which include graphics and heterogeneous processors as well as dedicated hardware accelerators, is one of many challenges in the real-time and automotive community. The software distribution across hardware entities and the identification of software that can be executed in parallel are crucial in the development process. Since these processes usually optimize one or more properties, they belong to the category of problems that can only be solved in polynomial time using non-deterministic methods and thus make use of (meta) heuristics for being solved. Such (meta) heuristics require sophisticated implementation and configuration, due to the properties to be optimized are usually subject to many different analyses. With the results of this dissertation, various development processes can be adjusted to modern architectures by using new and extended processes that enable future and computationally intensive vehicle applications on the one hand and improve existing processes in terms of efficiency and effectiveness on the other hand. These processes include runnable partitioning, task mapping, data allocation, and timing verification, which are addressed with the help of constraint programming, genetic algorithms, and heuristics.
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Books on the topic "AUTOSAR OS verification"

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Automated Technology For Verification And Analysis 7th International Symposium Atva 2009 Macao China October 1416 2009 Proceedings. Springer, 2009.

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Book chapters on the topic "AUTOSAR OS verification"

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Beringer, Steffen, and Heike Wehrheim. "Verification of AUTOSAR Software Architectures with Timed Automata." In Lecture Notes in Computer Science, 189–204. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-45943-1_13.

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Skoglund, Martin, Hans Svensson, Henrik Eriksson, Thomas Arts, Rolf Johansson, and Alex Gerdes. "Checking Verification Compliance of Technical Safety Requirements on the AUTOSAR Platform Using Annotated Semi-formal Executable Models." In Lecture Notes in Computer Science, 19–26. Cham: Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-10557-4_4.

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Faucou, Sebastien, Francoise Simonot-Lion, and Yvon Trinquet. "Architecture Description Languages for the Automotive Domain." In Behavioral Modeling for Embedded Systems and Technologies, 353–76. IGI Global, 2010. http://dx.doi.org/10.4018/978-1-60566-750-8.ch014.

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The embedded electronic architecture of a modern vehicle is a distributed system composed of several tenths of nodes. The development of these systems relies on a cooperative process involving several partners (carmakers and several suppliers). In such highly competitive domain, three main factors have to be taken into account: the design and production costs, the performance, comfort, and quality of driving, and several stringent safety requirements. In order to fulfill these requirements in such a context, it is vital for the different stakeholders to master the effects of the different sources of complexity. One way to reach this goal is to provide them with a common modeling language capable of representing the system at all its design steps and a common reference architecture in terms of components and organization. This chapter illustrates this approach. It focuses on EAST-ADL, an architecture description language dedicated to the automotive domain. Its links to the reference architecture defined by the AUTOSAR consortium are given. The chapter focuses especially on the ability offered by EAST-ADL to support the validation and verification (V&V) activities in order to fulfill the safety requirements.
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Conference papers on the topic "AUTOSAR OS verification"

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Friese, Max Jonas, Hannes Kallwies, Martin Leucker, Martin Sachenbacher, Hendrik Streichhahn, and Daniel Thoma. "Runtime Verification of AUTOSAR Timing Extensions." In RTNS 2022: The 30th International Conference on Real-Time Networks and Systems. New York, NY, USA: ACM, 2022. http://dx.doi.org/10.1145/3534879.3534898.

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Jovicic, Jelena, Mila Kotur, Milan Z. Bjelica, and Istvan Papp. "Visualizing Functional Verification in Adaptive AUTOSAR." In 2018 IEEE 8th International Conference on Consumer Electronics - Berlin. IEEE, 2018. http://dx.doi.org/10.1109/icce-berlin.2018.8576232.

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Bahig, Ghada, Amr El-Kadi, and Ashraf Salem. "Formal verification of AUTOSAR FlexRay state manager." In 2014 9th International Design & Test Symposium (IDT). IEEE, 2014. http://dx.doi.org/10.1109/idt.2014.7038612.

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Arts, Thomas, John Hughes, Ulf Norell, and Hans Svensson. "Testing AUTOSAR software with QuickCheck." In 2015 IEEE Eighth International Conference on Software Testing, Verification and Validation Workshops (ICSTW). IEEE, 2015. http://dx.doi.org/10.1109/icstw.2015.7107466.

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Fang, Ling, Takashi Kitamura, Thi Bich Ngoc Do, and Hitoshi Ohsaki. "Formal Model-Based Test for AUTOSAR Multicore RTOS." In 2012 IEEE Fifth International Conference on Software Testing, Verification and Validation (ICST). IEEE, 2012. http://dx.doi.org/10.1109/icst.2012.105.

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Peng, Yunhui, Yanhong Huang, Ting Su, and Jian Guo. "Modeling and Verification of AUTOSAR OS and EMS Application." In 2013 International Symposium on Theoretical Aspects of Software Engineering (TASE). IEEE, 2013. http://dx.doi.org/10.1109/tase.2013.13.

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Trinh, Le Khanh, Yuki Chiba, and Toshiaki Aoki. "Formalization and Verification of AUTOSAR OS Standard's Memory Protection." In 2018 International Symposium on Theoretical Aspects of Software Engineering (TASE). IEEE, 2018. http://dx.doi.org/10.1109/tase.2018.00017.

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Ahmed, Mazen, and Mona Safar. "Formal Verification of AUTOSAR Watchdog Manager Module Using Symbolic Execution." In 2018 30th International Conference on Microelectronics (ICM). IEEE, 2018. http://dx.doi.org/10.1109/icm.2018.8704088.

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Richter, Kai. "The AUTOSAR Timing Model – Status and Challenges –." In Second International Symposium on Leveraging Applications of Formal Methods, Verification and Validation (isola 2006). IEEE, 2006. http://dx.doi.org/10.1109/isola.2006.59.

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Cotard, Sylvain, Sebastien Faucou, Jean-Luc Bechennec, Audrey Queudet, and Yvon Trinquet. "A Data Flow Monitoring Service Based on Runtime Verification for AUTOSAR." In 2012 IEEE 14th Int'l Conf. on High Performance Computing and Communication (HPCC) & 2012 IEEE 9th Int'l Conf. on Embedded Software and Systems (ICESS). IEEE, 2012. http://dx.doi.org/10.1109/hpcc.2012.220.

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