Relevant bibliographies by topics / Assertion generation

Academic literature on the topic 'Assertion generation'

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Published: 11 March 2023

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Journal articles on the topic "Assertion generation"

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Li, Pengyi, Jing Sun, and Hai Wang. "Formal Approach to Assertion-Based Code Generation." International Journal of Software Engineering and Knowledge Engineering 27, no. 09n10 (November 2017): 1637–62. http://dx.doi.org/10.1142/s0218194017400162.

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With the growing in size and complexity of modern computer systems, the need for improving the quality at all stages of software development has become a critical issue. The current software production has been largely dependent on manual code development. Despite the slow development process, the errors introduced by the programmers contribute to a substantial portion of defects in the final software product. This paper investigates the synergy of generating code and assertion constraints from formal design models and use them to verify the implementation. We translate Z formal models into their OCL counterparts and Java assertions. With the help of existing tools, we demonstrate various checkings at different levels to enhance correctness.
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Boulé, M., J. S. Chenard, and Z. Zilic. "Debug enhancements in assertion-checker generation." IET Computers & Digital Techniques 1, no. 6 (2007): 669. http://dx.doi.org/10.1049/iet-cdt:20060209.

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Witharana, Hasini, Yangdi Lyu, and Prabhat Mishra. "Directed Test Generation for Activation of Security Assertions in RTL Models." ACM Transactions on Design Automation of Electronic Systems 26, no. 4 (April 2021): 1–28. http://dx.doi.org/10.1145/3441297.

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Assertions are widely used for functional validation as well as coverage analysis for both software and hardware designs. Assertions enable runtime error detection as well as faster localization of errors. While there is a vast literature on both software and hardware assertions for monitoring functional scenarios, there is limited effort in utilizing assertions to monitor System-on-Chip (SoC) security vulnerabilities. We have identified common SoC security vulnerabilities and defined several classes of assertions to enable runtime checking of security vulnerabilities. A major challenge in assertion-based validation is how to activate the security assertions to ensure that they are valid. While existing test generation using model checking is promising, it cannot generate directed tests for large designs due to state space explosion. We propose an automated and scalable mechanism to generate directed tests using a combination of symbolic execution and concrete simulation of RTL models. Experimental results on diverse benchmarks demonstrate that the directed tests are able to activate security assertions non-vacuously.
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Tong, Jason G., Marc Boulé, and Zeljko Zilic. "Test compaction techniques for assertion-based test generation." ACM Transactions on Design Automation of Electronic Systems 19, no. 1 (December 2013): 1–29. http://dx.doi.org/10.1145/2534397.

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Kerpedjiev, Stephan. "Model-Driven, Assertion-Based Generation of Multimedia Weather Information." Bulletin of the American Meteorological Society 76, no. 10 (October 1995): 1791–800. http://dx.doi.org/10.1175/1520-0477(1995)076<1791:mdabgo>2.0.co;2.

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Salehi Fathabadi, Asieh, Mohammadsadegh Dalvandi, Michael Butler, and Bashir M. Al-Hashimi. "Verifying Cross-Layer Interactions Through Formal Model-Based Assertion Generation." IEEE Embedded Systems Letters 12, no. 3 (September 2020): 83–86. http://dx.doi.org/10.1109/les.2019.2955316.

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Crowley, Timothy J. "On the “Perceptible Bodies” at De Generatione et Corruptione II.1." Revista Archai, no. 27 (September 1, 2019): e2703. http://dx.doi.org/10.14195/1984-249x_27_3.

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Near the beginning of De Gen. et Cor. II.1, Aristotle claims that the generation and corruption of all naturally constituted substances are “not without the perceptible bodies” (328b32-33). It is not clear what he intends by this. In this paper I offer a new interpretation of this assertion. I argue that the assumption behind the usual reading, namely, that these “perceptible bodies” ought to be distinguished from the naturally constituted substances, is flawed, and that the assertion is best understood as a claim that Aristotle has established in the second half of the first book of the De Gen. et Cor.
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Pečiuliauskienė, Palmira. "The Structure of Interpersonal Communication Skills of the New Generation Senior School Students: The Case of Generations X and Z." Pedagogika 130, no. 2 (June 20, 2018): 116–30. http://dx.doi.org/10.15823/p.2018.26.

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The article deals with the interpersonal communication skills of senior school students of the new generation Z. These skills were investigated using a questionnaire for measuring the interpersonal competence. Through application of factor analysis, five groups of interpersonal communication skills of senior students have been identified: initiation of interpersonal relationships, assertion of displeasure with others’ actions, self-disclosure, provision of emotional support, and management of interpersonal conflicts. The interpersonal communication skills of the new generation (Z) senior students were compared to the interpersonal communication skills of the representatives of generation X. Psychologists (Buhrmester et al, 1988) analyzed the skills of interpersonal communication competence in the field of behavior and distinguished five domains of behavioral skills: initiating interpersonal relationships; asserting displeasure with others’ actions, self-disclosure of personal information, providing emotional support, and managing of interpersonal conflicts. These domains of the interpersonal communication competence were identified in the study of the representatives of the generation X in 1988. It is urgent to investigate the interpersonal communication skills of the new generation (Z), whether they are identical to those of the generation X. The research question was formulated as follows: what are the interpersonal skills of the students of the new generation, what is their internal structure? The focus of the research: interpersonal communication skills of school students. The aim of the research was to systematically investigate the interpersonal communication skills of students of the new generation (Z), highlighting the essential groups of skills. Research objectives: 1. To single out the groups of interpersonal communication skills of the new generation of school students. 2. To contrast the groups of interpersonal communication skills of the new generation of senior school students with the ones of generation X. 3. To contrast the interpersonal communication skills of different generations (X and Z) of learners across different groups of interpersonal communication skills. The skills of interpersonal competence of students were measured using the Interpersonal Competence Questionnaire (ICQ) (Buhrmester et al., 1988). The items of this questionnaire were rated on a 4-point scale. The research sample. The research sample is reliable and representative. The representativeness of the sample was ensured by using random cluster sampling. Senior school students (of forms 11-12) participated in the research. The research clusters were the major cities of the country. In the standard random sample, the classes from the clusters were selected and all of the students of the chosen class participated in the research. The study was conducted in 2015. Theoretically there were distinguished five groups of interpersonal communication skills: initiation of interpersonal relationships, assertion of displeasure with others’ actions, selfdisclosure, provision of emotional support, and management of interpersonal conflicts. Based on these five factors, it was revealed that the most strongly expressed skills of the new generation (Z) of senior school students were in the domain of providing emotional support, and the least strongly expressed ones were in the group of self-disclosure. It was determined that the factor loadings for providing emotional support differed in the two groups of different generation (X and Z) participants. For the representatives of X generation the priority in providing emotional support was related to global decisions in their lives and career decisions. In the case of Z generation, the priority in providing emotional support was related to providing emotional support while solving problems in their families and among closest friends. Different generations (X and Z) had different priorities in initiating interpersonal relationships. It was important for the participants of generation X to actively initiate interpersonal relationships; they expressed the desire ‘to do something together’. In the case of Generation Z, the weight of this claim was only in the fourth place – 0.721. It was the most important for the participants of generation Z to initiate and keep up a conversation. In addition, the flexibility was a characteristic feature of the skills of the senior school students of generation Z in initiating interpersonal relationships. Different generations (X and Z) varied in their skills of interpersonal conflict resolution. The new generation (Z) senior school students were reluctant to acknowledge their mistakes during interpersonal conflicts, but they were able to refrain from saying unnecessary things that could further escalate the conflict. The participants of the generation X, on the other hand, tended to acknowledge their mistakes during interpersonal conflicts; they were better at taking a hold of themselves and casting away the feelings of jealousy / outrage while in conflict with the close people. There was a difference between representatives of generations X and Z in their skills of assertion of personal rights and displeasure with others. In this group there emerged the ability of the representatives of generation X to tell their interlocutor about unacceptable ways of communication for them. Meanwhile, for the generation Z, this item was of the lowest factorial weight. In the group of self-disclosure skills there emerged the ability of the generation Z senior school students to fully trust their closest interlocutor and take off their ‘masks’, the ability to tell a close interlocutor things that were deeply worrying for them. The generation X participants also had the ability to reveal certain very personal details and events of their lives to a newly acquainted person.
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Bennett, Tyler James. "Second-Generation Semiology and Detotalization." Linguistic Frontiers 4, no. 2 (September 1, 2021): 44–53. http://dx.doi.org/10.2478/lf-2021-0010.

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Abstract The fashionable disavowal of structural semiology as logocentric is easily countered by a review of the important innovations of second-generation semiology, spearheaded by Jacques Derrida, Roland Barthes, and Jacques Lacan. The scope of Saussurean semiology is hampered only by its reliance upon alphabetic language and presence grounded in the voice; the assertion that semiology is a part of linguistics, rather than the reverse, does not reject the existence of nonlinguistic meaning; wordplay and textual experimentation are no mere stylistic ornamentation, but are on the contrary the key strategy of second-generation semiology for exposing the limitations of language. All three of these writers rely upon the glossematics of Louis Hjelmslev for the articulation of the concrete, non-logocentric object of general linguistics — his stratification of the Saussurean sign provides the centerpiece for the synthetic theoretical model introduced here.
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Holt, Marilyn E., Kathleen F. Mittendorf, Michele LeNoue-Newton, Neha M. Jain, Ingrid Anderson, Christine M. Lovly, Travis Osterman, Christine Micheel, and Mia Levy. "My Cancer Genome: Coevolution of Precision Oncology and a Molecular Oncology Knowledgebase." JCO Clinical Cancer Informatics, no. 5 (September 2021): 995–1004. http://dx.doi.org/10.1200/cci.21.00084.

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PURPOSE The My Cancer Genome (MCG) knowledgebase and resulting website were launched in 2011 with the purpose of guiding clinicians in the application of genomic testing results for treatment of patients with cancer. Both knowledgebase and website were originally developed using a wiki-style approach that relied on manual evidence curation and synthesis of that evidence into cancer-related biomarker, disease, and pathway pages on the website that summarized the literature for a clinical audience. This approach required significant time investment for each page, which limited website scalability as the field advanced. To address this challenge, we designed and used an assertion-based data model that allows the knowledgebase and website to expand with the field of precision oncology. METHODS Assertions, or computationally accessible cause and effect statements, are both manually curated from primary sources and imported from external databases and stored in a knowledge management system. To generate pages for the MCG website, reusable templates transform assertions into reconfigurable text and visualizations that form the building blocks for automatically updating disease, biomarker, drug, and clinical trial pages. RESULTS Combining text and graph templates with assertions in our knowledgebase allows generation of web pages that automatically update with our knowledgebase. Automated page generation empowers rapid scaling of the website as assertions with new biomarkers and drugs are added to the knowledgebase. This process has generated more than 9,100 clinical trial pages, 18,100 gene and alteration pages, 900 disease pages, and 2,700 drug pages to date. CONCLUSION Leveraging both computational and manual curation processes in combination with reusable templates empowers automation and scalability for both the MCG knowledgebase and MCG website.
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Dissertations / Theses on the topic "Assertion generation"

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Tong, Jason. "Providing an infrastructure for assertion-based test generation and GPU accelerated mutation testing." Thesis, McGill University, 2014. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=123078.

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Functional verification of modern digital designs is a never ending challenge in the Integrated Circuit (IC) industry. Fuelled by the continuous demand of more integration, the increased effort in verification does not always entail error-free circuits after first production. Emerging technologies such as Assertion-based verification, can help in verifying the functional correctness of digital designs and can be easily integrated into existing design verification methodologies. Simulation-based verification is still the most predominant method in industry because of its ability to scale with largedesigns. Assertions can be inserted into the design and they can be treated as coverage points, where the input tests are responsible for exerting the design's conditions in evaluating those assertions. The effectiveness of this approach relies on the quality of the tests, where poor test quality can prevent the design from being thoroughly verified.This thesis presents novel techniques and algorithms for generating tests from assertions. Assertions serve as an invaluable source of information, where one can leverage the defined behaviours for generating the appropriate functional tests that can be used in simulation. A proposed set of coverage metrics helps in generating tests that thoroughly evaluate assertions during simulation. Verification engineers can make use of these tests in performing effective simulation in order to detect and then correct any design errors. The tool developed for generating tests from assertions was evaluated using nearly 300 assertions that were written for verifying the correctness of several industry-based designs. As a result, the proposed test generation approach was able to provide additional tests which led to an improvement in coverage compared to assertion-based test generator developed by another research team. This thesis also developed novel algorithms for Graphics Processing Units and used for accelerating mutation-based simulations, which is a computationally intensive application. It was empirically shown for a set of 10 industry-based designs, that efficiently using the GPU's resources can drastically improve the simulation performance on the GPU, when compared to a commercial tool. The additional performance is a necessity, where maximal acceleration is needed for rigorously assessing test quality when simulating large quantities of mutations. This can have a positive impact in the quest for improving assertion quality, ultimately leading to an effective dynamic verification of digital designs.
La vérification fonctionnelle de circuits numériques modernes comporte des défis sans fin dans l'industrie des circuits intégrés (CI). Alimentés par la demande continue d'intégration croissante, les efforts grandissants en vérification ne mènent pas toujours à des circuits sans erreur du premier coup. Une technologie émergente telle que la vérification par assertions peut aider à vérifier le bon fonctionnement des circuits numériques et peut être facilement intégrée aux méthodologies de vérification existantes. La simulation fonctionnelle représente toujours la méthode de vérification laplus répandue dans l'industrie, étant donné sa capacité à traiter des circuits plus volumineux. Les assertions peuvent être insérées dans un circuit et peuvent aussi servir comme repères de couverture, pour lesquels les tests d'entrée ont la responsabilité d'exercer le circuit évaluant ces assertions. L'efficacité de cette approche repose sur la qualité des tests, car de piètres tests peuvent empêcher une vérification complète. Cette thèse présente des techniques et algorithmes novateurs ayant pour but de produire des tests à partir des assertions. En raison des comportements qu'elles décrivent, les assertions représentent une source importante d'information permettant d'extraire des séries de tests fonctionnels, pouvant servir lors de la simulation. Un ensemble de métriques de couverture aide à produire des tests qui évaluent rigoureusement les assertions durant la simulation. Les ingénieurs en vérification peuvent ainsi utiliser ces tests pour effectuer des simulations efficaces dans le but de détecter et corriger des erreurs de conception. L'outil servant à générer des tests à partir des assertions qui a été développé fut évalué avec près de 300 assertions créées dans le but de vérifier le bon fonctionnement de plusieurs circuits industriels. Sur le plan des résultats, l'approche de génération de test proposée a été capable de produire des tests supplémentaires menant à une couverture de test améliorée comparativement à un générateur de test d'une autre équipe de recherche.Le test par mutation est une technique permettant d'évaluer la qualité des tests découlant des assertions. Les simulations de mutations exigent une grande puissance de calcul. Basés sur des processeurs graphiques (GPU), cette thèse présente aussi des algorithmes novateurs dans le domaine des tests par mutations. Sur une série de 10 circuits industriels, les résultats expérimentaux démontrent une amélioration importante de la performance de simulation comparativement à un outil commercial. Cette amélioration des performances est nécessaire étant donné l'accélération de calcul requise pour évaluer la qualité des tests lors de simulations de plusieurs mutations. Cela a un impact bénéfique dans la quête visant à améliorer la qualité des assertions, menant ultimement vers une vérification dynamique efficace de circuits numériques.
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Mafi, Salote Christine Laumanukilupe. "Assertive communication by first- and second-generation Tongan employees in Australia /." [St. Lucia, Qld.], 2003. http://www.library.uq.edu.au/pdfserve.php?image=thesisabs/absthe17040.pdf.

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Siddiqui, Asher. "Capturing JUnit Behavior into Static Programs : Static Testing Framework." Thesis, Linnaeus University, School of Computer Science, Physics and Mathematics, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:lnu:diva-5510.

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In this research paper, it evaluates the benefits achievable from static testing framework by analyzing and transforming the JUnit3.8 source code and static execution of transformed code. Static structure enables us to analyze the code statically during creation and execution of test cases. The concept of research is by now well established in static analysis and testing development. The research approach is also increasingly affecting the static testing process and such research oriented work has proved particularly valuable for those of us who want to understand the reflective behavior of JUnit3.8 Framework.

JUnit3.8 Framework uses Java Reflection API to invoke core functionality (test cases creation and execution) dynamically. However, Java Reflection API allows developers to access and modify structure and behavior of a program.  Reflection provides flexible solution for creating test cases and controlling the execution of test cases. Java reflection helps to encapsulate test cases in a single object representing the test suite. It also helps to associate each test method with a test object. Where reflection is a powerful tool to perform potential operations, on the other hand, it limits static analysis. Static analysis tools often cannot work effectively with reflection.

In order to avoid the reflection, Static Testing Framework provides a static platform to analyze the JUnit3.8 source code and transform it into non-reflective version that emulates the dynamic behavior of JUnit3.8. The transformed source code has possible leverage to replace reflection with static code and does same things in an execution environment of Static Testing Framework that reflection does in JUnit3.8. More besides, the transformed code also enables execution environment of Static Testing Framework to run test methods statically. In order to measure the degree of efficiency, the implemented tool is evaluated. The evaluation of Static Testing Framework draws results for different Java projects and these statistical data is compared with JUnit3.8 results to measure the effectiveness of Static Testing Framework. As a result of evaluation, STF can be used for static creation and execution of test cases up to JUnit3.8 where test cases are not creating within a test class and where real definition of constructors is not required. These problems can be dealt as future work by introducing a middle layer to execute test fixtures for each test method and by generating test classes as per real definition of constructors.

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GHASEMPOURI, TARA. "Improving ABV by generation and abstraction of PSL assertions." Doctoral thesis, 2016. http://hdl.handle.net/11562/939548.

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Lo scopo di questa tesi è quello di fornire le metodologie efficienti per migliorare ABV in tre settori della generazione, astrazione e qualificazione delle asserzioni PSL. I principali contributi di questa tesi possono essere riassunti come segue: 1- una metodologia di estrazione automatica è stato proposta, per catturare le descrizioni del comportamento di un sistema in grado di generare un insiemi di asserzioni temporali da tracce di esecuzione. L'approccio è particolarmente adatto per asserzioni minerarie che descrive le relazioni aritmetiche tra ingressi e uscite secondo un insieme di pattern temporali. In comparazione con lo stato dell'arte, l'affermazione minatore proposto in questa metodologia, genera una serie di affermazioni di qualità più compatti e più alti. 2- una metodologia automatica astrazione che riutilizzare asserzioni originariamente definite per un dato IP RTL, per verificare il modello TLM corrispondente. La metodologia può essere diviso in due fasi principali, innanzitutto, asserzioni sintetizzate in metodi C ++ e in secondo luogo, inseriti nel modello TLM. I risultati mostrano che la metodologia può astrarre e riutilizzare le asserzioni da RTL a TLM ed evitare ridefinizione delle affermazioni che sono già esistenti a RTL. 3- una metodologia automatica qualificazione è stata proposta per valutare la qualità di asserzioni e per misurare la interestingness di asserzioni. L'approccio ri-adatta metriche da data mining per misurare la qualità delle asserzioni in base alla sua frequenza di attivazione durante simulazioni e la correlazione tra antecedente e conseguente. risultato sperimentale descrive la metodologia proposta fornisce una migliore stima di asserzioni interestingness.
The aim of this thesis is to provide efficient methodologies to improve ABV in three domains of generation, abstraction and qualification of PSL assertions. The main contributions of this thesis can be summarized as follows: 1- An automatic mining methodology has been proposed, for capturing behavioral descriptions of a system that can generate set of temporal assertions from execution traces. The approach is particularly suited for mining assertions that describes arithmetic relations between inputs and outputs according to a set of temporal patterns. In comparation with state of the art, assertion miner proposed in this methodology, generates a set of more compact and higher quality assertions. 2- An automatic abstraction methodology has been proposed to reuse assertions originally defined for a given RTL IP, to verify the corresponding TLM model. The methodology can be divided into two main phases, firstly, assertions synthesized into C++ methods and secondly, inserted in the TLM model. The results show that the methodology can abstract and reuse assertions from RTL to TLM and avoid redefinition of assertions which are already exist at RTL. 3- An automatic qualification methodology has been proposed to evaluate the quality of assertions to measure the interestingness of assertions. The approach re-adapts metrics from data mining to measure the quality of assertions based on its activation frequency during simulation runs and the correlation between antecedent and consequent. Experimental result depicts the proposed methodology provides a better estimation of assertions interestingness.
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Shih-Kuei, Wei. "Automatic Multi-Cycle Path Assertion Property Generation in VLSI Designs." 2006. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-2407200613513900.

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Wei, Shih-Kuei, and 魏士貴. "Automatic Multi-Cycle Path Assertion Property Generation in VLSI Designs." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/76943192905263562864.

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碩士
國立臺灣大學
電子工程學研究所
94
In this thesis, we proposed an effective method to verify the multi-cycle paths in a gate-level design with the SDC (Synopsis Design Constraint) timing constraints in the design setup file. We analyzed the usage of multi-cycle paths, and summarized it into several types of multi-cycle path structures. Based on the different types of multi-cycle path structures, we generated the assertion properties for them in the format of SystemVerilog assertions. The assertion properties define the behavior of the multi-cycle paths in the design, and they can be used as checkers in the dynamic simulation tool to verify the multi-cycle path timing constraints. In the experiment result, we showed some examples to illustrate the procedure of our approach.
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Danese, Alessandro. "System-level functional and extra-functional characterization of SoCs through assertion mining." Doctoral thesis, 2018. http://hdl.handle.net/11562/979447.

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Virtual prototyping is today an essential technology for modeling, verification, and re-design of full HW/SW platforms. This allows a fast prototyping of platforms with a higher and higher complexity, which precludes traditional verification approaches based on the static analysis of the source code. Consequently, several technologies based on the analysis of simulation traces have proposed to efficiently validate the entire system from both the functional and extra-functional point of view. From the functional point of view, different approaches based on invariant and assertion mining have been proposed in literature to validate the functionality of a system under verification (SUV). Dynamic mining of invariants is a class of approaches to extract logic formulas with the purpose of expressing stable conditions in the behavior of the SUV. The mined formulas represent likely invariants for the SUV, which certainly hold on the considered traces. A large set of representative execution traces must be analyzed to increase the probability that mined invariants are generally true. However, this is extremely time-consuming for current sequential approaches when long execution traces and large set of SUV's variables are considered. Dynamic mining of assertions is instead a class of approaches to extract temporal logic formulas with the purpose of expressing temporal relations among the variables of a SUV. However, in most cases, existing tools can only mine assertions compliant with a limited set of pre-defined templates. Furthermore, they tend to generate a huge amount of assertions, while they still lack an effective way to measure their coverage in terms of design behaviors. Moreover, the security vulnerability of a firmware running on a HW/SW platforms is becoming ever more critical in the functional verification of a SUV. Current approaches in literature focus only on raising an error as soon as an assertion monitoring the SUV fails. No approach was proposed to investigate the issue that this set of assertions could be incomplete and that different, unusual behaviors could remain not investigated. From the extra-functional point of view of a SUV, several approaches based on power state machines (PSMs) have been proposed for modeling and simulating the power consumption of an IP at system-level. However, while they focus on the use of PSMs as the underlying formalism for implementing dynamic power management techniques of a SoC, they generally do not deal with the basic problem of how to generate a PSM. In this context, the thesis aims at exploiting dynamic assertion mining to improve the current approaches for the characterization of functional and extra-functional properties of a SoC with the final goal of providing an efficient and effective system-level virtual prototyping environment. In detail, the presented methodologies focus on: efficient extraction of invariants from execution traces by exploiting GP-GPU architectures; extraction of human-readable temporal assertions by combining user-defined assertion templates, data mining and coverage analysis; generation of assertions pinpointing the unlike execution paths of a firmware to guide the analysis of the security vulnerabilities of a SoC; and last but not least, automatic generation of PSMs for the extra-functional characterization of the SoC.
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Books on the topic "Assertion generation"

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Boulé, Marc, and Zeljko Zilic. Generating Hardware Assertion Checkers. Dordrecht: Springer Netherlands, 2008. http://dx.doi.org/10.1007/978-1-4020-8586-4.

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Zeljko, Zilic, and SpringerLink (Online service), eds. Generating Hardware Assertion Checkers: For Hardware Verification, Emulation, Post-Fabrication Debugging and On-Line Monitoring. Dordrecht: Springer Science + Business Media B.V, 2008.

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Generation me: Why today's young Americans are more confident, assertive, entitled-and more miserable-than ever before. New York , N.Y: Free Press, 2006.

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Twenge, Jean M. Generation me: Why today's young Americans are more confident, assertive, entitled-and more miserable-than ever before. New York, NY: Free Press, 2006.

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Zilic, Zeljko, and Marc Boulé. Generating Hardware Assertion Checkers. Springer, 2008.

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Knox, Philip. The Romance of the Rose and the Making of Fourteenth-Century English Literature. Oxford University Press, 2022. http://dx.doi.org/10.1093/oso/9780192847171.001.0001.

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This book examines the place of the French love allegory the Romance of the Rose in fourteenth-century English literary culture. The Rose had a transformative effect on the multilingual literary culture of fourteenth-century England, leaving more material evidence for late medieval English-speaking readers than any other vernacular literary work from mainland Europe. In an ongoing series of encounters both within and beyond the territorial boundaries of Britain, continuously reshaped by new ideas and attitudes from across fourteenth-century Europe, the Rose in England became a cultural artefact of huge significance for a wide range of readers—men and women, clerics and laypeople, those at the centre and those on the fringes of the aristocratic courts. The central assertion of this book is that by tracing the radically plural afterlife of the Rose as it moves through a series of distinct but related cultural spheres in fourteenth-century England, it is possible to reveal the poem’s decisive importance in shaping the terms in which literary value was produced and contested. The book examines three different but related spheres of literary culture: aristocratic reading communities, Latinate philosophical poetry, and ideas about poetry and the role of the poet derived from classical literature. In each of these areas, the Rose is revealed to be both a generative and a disruptive text for the English poets who followed in its wake, making possible the newly ambitious writing that emerged in the generation that included Geoffrey Chaucer, William Langland, John Gower, and the Gawain-poet.
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Zilic, Zeljko, and Marc Boulé. Generating Hardware Assertion Checkers: For Hardware Verification, Emulation, Post-Fabrication Debugging and On-Line Monitoring. Springer, 2010.

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Generation Me: Why Today's Young Americans Are More Confident, Assertive, Entitled--and More Miserable Than Ever Before. Free Press, 2007.

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Generation me: Why today's young Americans are more confident, assertive, entitled--and more miserable than ever before. Atria Books, 2014.

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Twenge, Jean M. Generation Me - Revised and Updated: Why Today's Young Americans Are More Confident, Assertive, Entitled--And More Miserable Than Ever Before. Free Press, 2006.

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Book chapters on the topic "Assertion generation"

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H. Pham, Long, Ly Ly Tran Thi, and Jun Sun. "Assertion Generation Through Active Learning." In Formal Methods and Software Engineering, 174–91. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-68690-5_11.

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Wessendorf, Susanne. "Who Do You Hang Out With? Peer Group Association and Cultural Assertion among Second-Generation Italians in Switzerland." In Jugend, Zugehörigkeit und Migration, 113–29. Wiesbaden: VS Verlag für Sozialwissenschaften, 2010. http://dx.doi.org/10.1007/978-3-531-92145-7_6.

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Rotter, Anita, and Erol Yildiz. "Opening up Localities to the Wider World and the Postmigrant Generation: New Forms of Resistance and Self-Assertion." In Youth Cultures in a Globalized World, 173–91. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-65177-0_11.

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Bjørner, Nikolaj, Anca Browne, and Zohar Manna. "Automatic generation of invariants and intermediate assertions." In Principles and Practice of Constraint Programming — CP '95, 589–623. Berlin, Heidelberg: Springer Berlin Heidelberg, 1995. http://dx.doi.org/10.1007/3-540-60299-2_37.

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Caballero, Rafael, Manuel Montenegro, Herbert Kuchen, and Vincent von Hof. "Checking Java Assertions Using Automated Test-Case Generation." In Logic-Based Program Synthesis and Transformation, 221–26. Cham: Springer International Publishing, 2015. http://dx.doi.org/10.1007/978-3-319-27436-2_13.

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Bulles, John, Ralph Mak, and Diederik Dulfer. "Proof of Concept on Time Travelling and Assertions Generating an Assertions Administration Using FBM." In On the Move to Meaningful Internet Systems: OTM 2018 Workshops, 67–76. Cham: Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-030-11683-5_7.

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Neto, Luís Eufrasio T., Vânia Maria P. Vidal, Marco A. Casanova, and José Maria Monteiro. "R2RML by Assertion: A Semi-automatic Tool for Generating Customised R2RML Mappings." In Advanced Information Systems Engineering, 248–52. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013. http://dx.doi.org/10.1007/978-3-642-41242-4_33.

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Hagiya, Masami, Kosuke Fukuda, Yoshinori Tanabe, and Toshinori Saito. "Automatically Generating Programming Questions Corresponding to Rubrics Using Assertions and Invariants." In Sustainable ICT, Education and Learning, 89–98. Cham: Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-030-28764-1_11.

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Danese, Alessandro, Francesca Filini, Tara Ghasempouri, and Graziano Pravadelli. "Automatic Generation and Qualification of Assertions on Control Signals: A Time Window-Based Approach." In VLSI-SoC: Design for Reliability, Security, and Low Power, 193–221. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-46097-0_10.

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Moiseev, Rodion, Shinpei Hayashi, and Motoshi Saeki. "Generating Assertion Code from OCL: A Transformational Approach Based on Similarities of Implementation Languages." In Model Driven Engineering Languages and Systems, 650–64. Berlin, Heidelberg: Springer Berlin Heidelberg, 2009. http://dx.doi.org/10.1007/978-3-642-04425-0_52.

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Conference papers on the topic "Assertion generation"

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Pham, Long H., Ly Ly Tran Thi, and Jun Sun. "Assertion Generation through Active Learning." In 2017 IEEE/ACM 39th International Conference on Software Engineering (ICSE). IEEE, 2017. http://dx.doi.org/10.1109/icse-c.2017.87.

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Zeng, Fanping, Chaoqiang Deng, and Yuan Yuan. "Assertion-Directed Test Case Generation." In 2012 4th World Congress on Software Engineering (WCSE). IEEE, 2012. http://dx.doi.org/10.1109/wcse.2012.16.

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Tong, Jason G., Marc Boule, and Zeljko Zilic. "Assertion clustering for compacted test sequence generation." In 2012 13th International Symposium on Quality Electronic Design (ISQED 2012). IEEE, 2012. http://dx.doi.org/10.1109/isqed.2012.6187567.

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Frederiksen, Steven J., John Aromando, and Michael S. Hsiao. "Automated Assertion Generation from Natural Language Specifications." In 2020 IEEE International Test Conference (ITC). IEEE, 2020. http://dx.doi.org/10.1109/itc44778.2020.9325264.

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Wenzl, Matthias, Peter Roessler, and Andreas Puhm. "Checking Application Level Properties Using Assertion Synthesis." In ASME 2019 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference. American Society of Mechanical Engineers, 2019. http://dx.doi.org/10.1115/detc2019-97950.

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Abstract This work presents a proof-of-concept of a new approach on automatic generation of digital hardware that is able to check application-level properties of an embedded system such as a faulty system behavior at runtime. The approach makes use of assertion-based verification setups that today are very common in the area of digital hardware design with, however, the sole focus on logic simulation. Thus, a PSL-to-VHDL compiler is introduced that generates VHDL (Very High Speed Integrated Circuit Description Language) code out of PSL (Property Specification Language) assertions which can be further processed by a traditional digital logic synthesis tool. That way, runtime checker units can be automatically generated with little effort because of the already existing assertion-based test benches. Furthermore, a model railway demonstrator is presented herein as an example for a safety-critical application to prove the proposed tool flow on a use case. Implementation results based on that use case are discussed. Finally, the paper concludes with a brief outlook on related future work of the authors.
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Keszocze, Oliver, and Ian G. Harris. "Chatbot-based assertion generation from natural language specifications." In 2019 Forum for Specification and Design Languages (FDL). IEEE, 2019. http://dx.doi.org/10.1109/fdl.2019.8876925.

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Wang, Cong, Hao Sun, Yiwen Xu, Yu Jiang, Huafeng Zhang, and Ming Gu. "Go-Sanitizer: Bug-Oriented Assertion Generation for Golang." In 2019 IEEE International Symposium on Software Reliability Engineering Workshops (ISSREW). IEEE, 2019. http://dx.doi.org/10.1109/issrew.2019.00039.

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Hu, A. J., J. Cases, and Jin Yang. "Efficient generation of monitor circuits for GSTE assertion graphs." In ICCAD-2003. International Conference on Computer Aided Design. IEEE, 2003. http://dx.doi.org/10.1109/iccad.2003.159685.

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Piccolboni, Luca, and Graziano Pravadelli. "Simplified stimuli generation for scenario and assertion based verification." In 2014 15th Latin American Test Workshop - LATW. IEEE, 2014. http://dx.doi.org/10.1109/latw.2014.6841904.

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Pierre, Laurence. "Towards a toolchain for assertion-driven test sequence generation." In 2015 Forum on Specification and Design Languages (FDL). IEEE, 2015. http://dx.doi.org/10.1109/fdl.2015.7306354.

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