Academic literature on the topic 'ASIP'

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Journal articles on the topic "ASIP"

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Hamed, Ahmed, M. Watheq El-Kharashi, Ashraf Salem, and Mona Safar. "Two-Layer Bus-Independent Instruction Set Architecture for Securing Long Protocol Data Units in Automotive Open System Architecture-Based Automotive Electronic Control Units." Electronics 11, no. 6 (March 18, 2022): 952. http://dx.doi.org/10.3390/electronics11060952.

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In this paper, we propose a bus-independent hardware (HW)-based approach to secure long protocol data units (PDUs) in Automotive Open System Architecture (AUTOSAR)-based automotive electronic control units (ECUs). Our approach is based on extending previous works that implemented two AUTOSAR communication (COM) application-specific instruction set processors (ASIPs). COM ASIP V1 introduced two instructions to handle the transmission and reception of PDUs no larger than 8 bytes and signals no larger than 32 bits individually through send signal and receive signal instructions. COM ASIP V2 introduced two extra instructions to handle long signals and PDUs of arbitrary lengths. We extended the instruction set architecture (ISA) of our previous ASIPs by introducing six new instructions, in COM ASIP V3, to hash PDUs that contain these signals to authenticate transmission and reception of such PDUs. The experimental results show that COM ASIP V3 can handle (i.e., transmit, receive, calculate hash, or verify hash) a 64-byte controller area network flexible data-rate (CAN FD) frame in 1.575 μs and a 254-byte FlexRay frame in 6.301 μs. These measurements indicate that the throughput of our new COM ASIP is much higher, 42× to 75×, than the throughput required by these communication buses.
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Andorno, M., M. Andersen, G. Borghello, A. Caratelli, D. Ceresa, J. Dhaliwal, K. Kloukinas, and R. Pejasinovic. "Rad-hard RISC-V SoC and ASIP ecosystems studies for high-energy physics applications." Journal of Instrumentation 18, no. 01 (January 1, 2023): C01018. http://dx.doi.org/10.1088/1748-0221/18/01/c01018.

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Abstract The increase in complexity and size of modern ASIC designs in the HEP community and the use of advanced semiconductor fabrication processes raises the need for a shift toward a more abstract design methodology, that takes advantage of modularity and programmability to achieve a faster turnaround time both for design and verification. This contribution will present two complementary approaches, one using a RISC-V based System-on-Chip (SoC) and the other based on Application-Specific Instruction set Processors (ASIP). The SoC uses the PicoRV32 open-source RISC-V core and a rad-hard version of the AMBA APB bus to connect peripherals and is primarily geared towards control and monitoring applications. This solution is a demonstrator of what can become a more complete fully radiation-tolerant SoC platform with a standardized interconnect and an IP block library, to serve as the starting point for future ASIC designs. The ASIP based approach targets more the design of data path elements and the use in data processing applications. The presented approach makes use of a commercial ASIP Designer EDA tool to demonstrate an integrated workflow to define, benchmark and optimize an ASIP for a specific use case, starting from a general-purpose processor.
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Yang, Ying-Kui, Chris Dickinson, Yu-Mei Lai, Ji-Yao Li, and Ira Gantz. "Functional properties of an agouti signaling protein variant and characteristics of its cognate radioligand." American Journal of Physiology-Regulatory, Integrative and Comparative Physiology 281, no. 6 (December 1, 2001): R1877—R1886. http://dx.doi.org/10.1152/ajpregu.2001.281.6.r1877.

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Agouti signaling protein (ASIP), the human (h) homolog of agouti, is an endogenous melanocortin peptide antagonist. To date, characterization of this protein has been performed with recombinant protein only and without the availability of an ASIP/agouti radioligand. In this report we describe the functional characteristics of a chemically synthesized truncated ASIP variant, ASIP-[90–132 (L89Y)], and the binding characteristics of its cognate radioligand,125I-ASIP-[90–132 (L89Y)]. Similar to full-length recombinant ASIP/agouti, ASIP-[90–132 (L89Y)] was a potent inhibitor of α-melanocyte-stimulating hormone cAMP generation at the cloned human melanocortin receptor (hMCR) subtypes hMC1R and hMC4R. It also displayed a lesser degree of inhibition at the hMC3R and hMC5R. However, ASIP-[90–132 (L89Y)] was found to be less potent than full-length recombinant ASIP and, surprisingly, only exhibited weak inhibitory activity at the hMC2R. In competition binding assays with the radioligand 125I-ASIP-[90–132 (L89Y)], ASIP-[90–132 (L89Y)] displayed a hierarchy of binding affinity that roughly paralleled its rank order of inhibitory potency at the various MCR subtypes, i.e., hMC1R ≈ hMC4R > hMC3R ≈ hMC5R > hMC2R. Structure-activity studies revealed that ASIP-[90–132 (L89Y)] possessed greater pharmacological potency than either the further truncated ASIP variants ASIP-(116–132) or cyclo(CRFFRSAC). Interestingly, the latter molecules were both weak agonists at the hMC1R. These studies further support the concept that ASIP/agouti inhibits melanocortin action by directly binding to target MCRs and provide additional insight into the structural requirements for maximal inhibitory potency.
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Baldwin, H., M. Zhang, J. Current, and J. Yao. "84 Characterization of agouti-signalling protein expression within the bovine ovary and early embryo." Reproduction, Fertility and Development 33, no. 2 (2021): 150. http://dx.doi.org/10.1071/rdv33n2ab84.

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Factors present in the oocyte and surrounding follicular cells aid in the attainment of oocyte competence. Agouti-signalling protein (ASIP) is a known regulator of melanocyte function through binding to melanocortin receptors including MC1R and MC4R. Additionally, ASIP has been classified as an adipokine due to a link with insulin resistance and obesity in humans. In mice, expression is limited to hair follicles where ASIP regulates hair pigmentation. In cattle, however, ASIP mRNA has been detected in a variety of tissues, including adipose, skin, heart, testis, and the ovary. Despite ovarian expression, the role of ASIP in reproduction remains undetermined. Bovine ASIP is a secreted protein consisting of 133 amino acids. The aim of this experiment was to provide a detailed description of the ASIP expression profile within the bovine ovary and during early embryonic development. Reverse transcription PCR (RT-PCR) was conducted to analyse ASIP, MC1R, and MC4R mRNA expression. Samples examined included fetal ovaries from gestational day 90 to 250, adult ovary, fetal testis, adult testis, and 12 somatic tissues including adrenal, cerebral cortex, gut, heart, intestine, kidney, liver, lung, muscle, pituitary, stomach, and thymus. Amplification of ribosomal protein L19 (RPL19) served as a positive control for all samples. Expression of ASIP was detected in the fetal testis, 9 somatic tissues, and the fetal and adult ovary. In the fetal ovary, ASIP was detected as early as 90 days of gestation and continued throughout gestation. Expression of the ASIP receptors, MC1R and MC4R, were detected exclusively in the fetal ovary. To further characterise ASIP expression, quantitative real-time PCR (RT-qPCR) was utilised to examine samples including germinal vesicle and MII oocytes (pool of 10 oocytes), invitro-produced embryos ranging from the 2-cell to blastocyst stages (pool of 10 embryos), and cumulus and granulosa cells collected from a pool from 5 cumulus–oocyte complexes (COCs) and follicles, respectively. Theca cells from a single follicle were analysed. Samples with cycle threshold values below 35 were considered to express the gene of interest. Of the follicular cells examined, ASIP expression was present in theca, granulosa, and cumulus cells. ASIP expression was detected in both GV and MII oocytes. Early embryonic expression of ASIP was detected in the 2-cell embryo and continued to the blastocyst stage of development. In conclusion, ASIP is present in the bovine adult and fetal ovary, follicular cells including cumulus, granulosa, and theca cells, GV and MII oocytes, and invitro-produced embryos from the 2-cell to blastocyst stages. Future research will focus on identifying the function of ovarian and early embryonic ASIP in cattle.
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Baldwin, H., M. Zhang, J. Current, and J. Yao. "84 Characterization of agouti-signalling protein expression within the bovine ovary and early embryo." Reproduction, Fertility and Development 33, no. 2 (2021): 150. http://dx.doi.org/10.1071/rdv33n2ab84.

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Factors present in the oocyte and surrounding follicular cells aid in the attainment of oocyte competence. Agouti-signalling protein (ASIP) is a known regulator of melanocyte function through binding to melanocortin receptors including MC1R and MC4R. Additionally, ASIP has been classified as an adipokine due to a link with insulin resistance and obesity in humans. In mice, expression is limited to hair follicles where ASIP regulates hair pigmentation. In cattle, however, ASIP mRNA has been detected in a variety of tissues, including adipose, skin, heart, testis, and the ovary. Despite ovarian expression, the role of ASIP in reproduction remains undetermined. Bovine ASIP is a secreted protein consisting of 133 amino acids. The aim of this experiment was to provide a detailed description of the ASIP expression profile within the bovine ovary and during early embryonic development. Reverse transcription PCR (RT-PCR) was conducted to analyse ASIP, MC1R, and MC4R mRNA expression. Samples examined included fetal ovaries from gestational day 90 to 250, adult ovary, fetal testis, adult testis, and 12 somatic tissues including adrenal, cerebral cortex, gut, heart, intestine, kidney, liver, lung, muscle, pituitary, stomach, and thymus. Amplification of ribosomal protein L19 (RPL19) served as a positive control for all samples. Expression of ASIP was detected in the fetal testis, 9 somatic tissues, and the fetal and adult ovary. In the fetal ovary, ASIP was detected as early as 90 days of gestation and continued throughout gestation. Expression of the ASIP receptors, MC1R and MC4R, were detected exclusively in the fetal ovary. To further characterise ASIP expression, quantitative real-time PCR (RT-qPCR) was utilised to examine samples including germinal vesicle and MII oocytes (pool of 10 oocytes), invitro-produced embryos ranging from the 2-cell to blastocyst stages (pool of 10 embryos), and cumulus and granulosa cells collected from a pool from 5 cumulus–oocyte complexes (COCs) and follicles, respectively. Theca cells from a single follicle were analysed. Samples with cycle threshold values below 35 were considered to express the gene of interest. Of the follicular cells examined, ASIP expression was present in theca, granulosa, and cumulus cells. ASIP expression was detected in both GV and MII oocytes. Early embryonic expression of ASIP was detected in the 2-cell embryo and continued to the blastocyst stage of development. In conclusion, ASIP is present in the bovine adult and fetal ovary, follicular cells including cumulus, granulosa, and theca cells, GV and MII oocytes, and invitro-produced embryos from the 2-cell to blastocyst stages. Future research will focus on identifying the function of ovarian and early embryonic ASIP in cattle.
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Pebrianthy, Lola. "HUBUNGAN PENDIDIKAN DAN PENGETAHUAN IBU TENTANG ASI ESKLUSIF DENGAN PEMBERIAN ASI PERAH PADA IBU BEKERJA." Jurnal Kesehatan Ilmiah Indonesia (Indonesian Health Scientific Journal) 6, no. 2 (December 31, 2021): 212. http://dx.doi.org/10.51933/health.v6i2.554.

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Pemberian ASI pada Ibu Bekerja terhambat pada waktu menyusui karena intensitas pertemuan Ibu dan Bayi berkurang. Alternatif yang bisa ditempuh adalah pemberian ASIP. Tujuan penelitian adalah untuk mengetahui Hubungan Pendidikan dan Pengetahuan tentang ASIP dengan Pemberian ASIP pada Ibu Bekerja di Puskesmas Batangtoru Tahun 2021. Metode Penelitian bersifat Survey analitik desain cross sectional dilaksanakan di Puskesmas Batangtoru. Populasi seluruh Ibu bekerja yang memiliki bayi usia ≥ 6 bulan sampel sebanyak 36 orang teknik Purvosive sampling. Hasil Pengumpulan data dengan kuesioner dan uji statistic Fisher dan Continuity Correlation. Pada analisa bivariat didapatkan p value < α, ada hubungan pendidikan dengan pemberian ASIP ( P value = 0,004) dan ada hubungan pengetahuan dengan pemberian ASIP (P value = 0,002). Kesimpulan ada hubungan pendidikan dan pengetahuan ibu tentang asi eksklusif dengan pemberian ASI perah pada ibu bekerja. Disarankan kepada Puskesmas meningkatkan Promosi kesehatan tentang ASIP agar ibu mau melakukan ASIP.`
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Xu, Jian Zhou, Jin Hai Su, Zi Bin Dai, and Wei Li. "A Study in Functional Verification of ASIP." Advanced Materials Research 457-458 (January 2012): 218–24. http://dx.doi.org/10.4028/www.scientific.net/amr.457-458.218.

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ASIP can fulfill data processing effectively and flexibly in specific application. Due to the instruction’s diversity and the flexibility of logical structure, it has increased test vectors and enhanced difficulty in the functional verification of ASIP [1].With the continuous spread of ASIP application, the scale of designing is enlarging and the functional verification has become the bottleneck of designing of ASIP. This paper presents a methodology able to accomplish the functional verification of ASIP. The “Bottom-up” methodology is composed of the component-level verification, the instruction-level verification and the FPGA-based prototype system verification. The paper proves the feasibility and efficiency through the experiments in functional verification of ASIP.
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Harfiandri, Sunesni, Dea Dea, and Ananda Putri. "HUBUNGAN PENDIDIKAN DAN PENGETAHUAN IBU TENTANG ASI PERAH DENGAN PRAKTEK PEMBERIAN ASI PERAH." Jurnal Endurance 3, no. 2 (June 29, 2018): 415. http://dx.doi.org/10.22216/jen.v3i2.3191.

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<p><em>Background: Breastfeeding on Working Mothers is hampered at breastfeeding as the intensity of the mother and baby encounters decreases. The alternative that can be taken is the provision of ASIP. Objective: To know the Education Relationship and Knowledge of ASIP with ASIP Assessment on Working Mother in Desa Tanjung Aur Kelurahan Balai Gadang Work Area of Cold Water Health Center Year 2017. Method: Cross sectional design cross sectional study was conducted in Tanjung Aur Village Balai Gadang District Working Area of Puskesmas Cold Water 2017. Data collection dated 3-7 July 2017. Population of all working mothers with infants aged ≥ 2-11 months sampled as many as 36 people total sampling technique. Result: Data collection with questionnaire and chi-square statistic test. Univariate was found from 36 respondents, 25 people (69,4%) did not give ASIP to their babies, 21 people (58,3%) low education level, 29 people (80,6%) low knowledge level. In bivariate analysis obtained p value &lt;α, there is correlation of education with giving ASIP (P value = 0,002) and there is correlation of knowledge with giving ASIP (P value = 0,001). Conclusion: Mothers Working in breastfeeding in the village of Tanjung Aur Kelurahan Balai Gadang Working Area Cold Water Health Center partially did not provide ASIP to the baby. Suggested to Health Center to increase health promotion about ASIP.</em><em></em></p><p> </p><p>Latar belakang : Pemberian ASI pada Ibu Bekerja terhambat pada waktu menyusui karena intensitas pertemuan Ibu dan Bayi berkurang. Alternatif yang bisa ditempuh adalah pemberian ASIP. Tujuan : untuk mengetahui Hubungan Pendidikan dan Pengetahuan tentang ASIP dengan Pemberian ASIP pada Ibu Bekerja di Desa Tanjung Aur Kelurahan Balai Gadang Wilayah Kerja Puskesmas Air Dingin Tahun 2017. Metode : Penelitian bersifat analitik desain cross sectional dilaksanakan di Desa Tanjung Aur Kelurahan Balai Gadang Wilayah Kerja Puskesmas Air Dingin 2017. Pengumpulan data tanggal 3-7 Juli 2017. Populasi seluruh Ibu bekerja yang memiliki bayi usia ≥ 2-11 bulan sampel sebanyak 36 orang teknik total sampling. Hasil : Pengumpulan data dengan kuesionerdan uji statistic chi-square. Univariat ditemukan dari 36 orang responden, 25 orang (69,4%) tidak memberikan ASIP pada Bayinya, 21 orang (58,3%) tingkat pendidikan rendah, 29 orang (80,6%) tingkat pengetahuan rendah. Pada analisa bivariat didapatkan p value &lt; α, ada hubungan pendidikan dengan pemberian ASIP ( P value = 0,002) dan ada hubungan pengetahuan dengan pemberian ASIP ( P value = 0,001). Simpulan : Ibu-Ibu Bekerja menyusui di Desa Tanjung Aur Kelurahan Balai Gadang Wilayah Kerja Puskesmas Air Dingin sebagian tidak melakukan pemberian ASIP pada Bayinya. Disarankan kepada Puskesmas meningkatkan Promosi kesehatan tentang ASIP.</p>
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Kempf, Elena, Kathrin Landgraf, Robert Stein, Martha Hanschkow, Anja Hilbert, Rami Abou Jamra, Paula Boczki, et al. "Aberrant expression of agouti signaling protein (ASIP) as a cause of monogenic severe childhood obesity." Nature Metabolism 4, no. 12 (December 19, 2022): 1697–712. http://dx.doi.org/10.1038/s42255-022-00703-9.

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AbstractHere we report a heterozygous tandem duplication at the ASIP (agouti signaling protein) gene locus causing ubiquitous, ectopic ASIP expression in a female patient with extreme childhood obesity. The mutation places ASIP under control of the ubiquitously active itchy E3 ubiquitin protein ligase promoter, driving the generation of ASIP in patient-derived native and induced pluripotent stem cells for all germ layers and hypothalamic-like neurons. The patient’s phenotype of early-onset obesity, overgrowth, red hair and hyperinsulinemia is concordant with that of mutant mice ubiquitously expressing the homolog nonagouti. ASIP represses melanocyte-stimulating hormone-mediated activation as a melanocortin receptor antagonist, which might affect eating behavior, energy expenditure, adipocyte differentiation and pigmentation, as observed in the index patient. As the type of mutation escapes standard genetic screening algorithms, we rescreened the Leipzig Childhood Obesity cohort of 1,745 patients and identified four additional patients with the identical mutation, ectopic ASIP expression and a similar phenotype. Taken together, our data indicate that ubiquitous ectopic ASIP expression is likely a monogenic cause of human obesity.
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Hirose, Tomonori, Yasushi Izumi, Yoji Nagashima, Yoko Tamai-Nagai, Hidetake Kurihara, Tatsuo Sakai, Yukari Suzuki, et al. "Involvement of ASIP/PAR-3 in the promotion of epithelial tight junction formation." Journal of Cell Science 115, no. 12 (June 15, 2002): 2485–95. http://dx.doi.org/10.1242/jcs.115.12.2485.

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The mammalian protein ASIP/PAR-3 interacts with atypical protein kinase C isotypes (aPKC) and shows overall sequence similarity to the invertebrate proteins C. elegans PAR-3 and Drosophila Bazooka, which are crucial for the establishment of polarity in various cells. The physical interaction between ASIP/PAR-3 and aPKC is also conserved in C. elegans PAR-3 and PKC-3 and in Drosophila Bazooka and DaPKC. In mammals, ASIP/PAR-3 colocalizes with aPKC and concentrates at the tight junctions of epithelial cells, but the biological meaning of ASIP/PAR-3 in tight junctions remains to be clarified. In the present study, we show that ASIP/PAR-3 staining distributes to the subapical domain of epithelial cell-cell junctions, including epithelial cells with less-developed tight junctions, in clear contrast with ZO-1, another tight-junction-associated protein, the staining of which is stronger in cells with well-developed tight junctions. Consistently, immunogold electron microscopy revealed that ASIP/PAR-3 concentrates at the apical edge of tight junctions, whereas ZO-1 distributes alongside tight junctions. To clarify the meaning of this characteristic localization of ASIP, we analyzed the effects of overexpressed ASIP/PAR-3 on tight junction formation in cultured epithelial MDCK cells. The induced overexpression of ASIP/PAR-3, but not its deletion mutant lacking the aPKC-binding sequence, promotes cell-cell contact-induced tight junction formation in MDCK cells when evaluated on the basis of transepithelial electrical resistance and occludin insolubilization. The significance of the aPKC-binding sequence in tight junction formation is also supported by the finding that the conserved PKC-phosphorylation site within this sequence,ASIP-Ser827, is phosphorylated at the most apical tip of cell-cell contacts during the initial phase of tight junction formation in MDCK cells. Together,our present data suggest that ASIP/PAR-3 regulates epithelial tight junction formation positively through interaction with aPKC.
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Dissertations / Theses on the topic "ASIP"

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Šulek, Jakub. "Verifikace ASIP založena na formálních tvrzeních." Master's thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2015. http://www.nusl.cz/ntk/nusl-264941.

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This thesis introduces the concept of assertion-based verifi cation of application-specifi c instruction set processors (ASIPs). The proposed design is implemented in SystemVerilog Assertions language as a part of veri fication environment created using Codasip Framework. The implemented concept is simulated in QuestaSim tool using model of Codix RISC processor. Main outcome of this thesis is the verifi cation concept usable not only on other processors, but as a part of system that automates the processor design as well.
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Karlsson, Andréas. "Design of Energy-Efficient High-Performance ASIP-DSP Platforms." Doctoral thesis, Linköpings universitet, Datorteknik, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-130723.

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In the last ten years, limited clock frequency scaling and increasing power density has shifted IC design focus towards parallelism, heterogeneity and energy efficiency. Improving energy efficiency is by no means simple and it calls for a reevaluation of old design choices in processor architecture, and perhaps more importantly, development of new programming methodologies that exploit the features of modern architectures. This thesis discusses the design of energy-efficient digital signal processors with application-specific instructions sets, so-called ASIP-DSPs, and their programming tools. Target applications for such processors include, but are not limited to, communications, multimedia, image processing, intelligent vision and radar. These applications are often implemented by a limited set of kernel algorithms, whose performance and efficiency are critical to the application's success. At the same time, the extreme non-recurring engineering cost of system-on-chip designs means that product life-time must be kept as long as possible. Neither general-purpose processors nor non-programmable ASICs can meet both the flexibility and efficiency requirements, and ASIPs may instead be the best trade-off between all the conflicting goals. Traditional superscalar- and VLIW processor design focus has been to improve the throughput of fine-grained instructions, which results in high flexibility, but also high energy consumption. SIMD architectures, on the other hand, are often restricted by inefficient data access. The result is architectures which spend more energy and/or time on supporting operations rather than actual computing. This thesis defines the performance limit of an architecture with an N-way parallel datapath as consuming 2N elements of compute data per clock cycle. To approach this performance, this work proposes coarse-grained higher-order functional (HOF) instructions, which encode the most  frequently executed compute-, data access- and control sequences into single many-cycle instructions, to reduce the overheads of instruction delivery, while at the same time maintaining orthogonality. The work further investigates opportunities for operation fusion to improve computing performance, and proposes a flexible memory subsystem for conflict-free parallel memory access with permutation and lookup-table-based addressing, to ensure that high computing throughput can be sustained even in the presence of irregular data access patterns. These concepts are extensively studied by implementing a large kernel algorithm library with typical DSP kernels, to prove their effectiveness and adequacy. Compared to contemporary VLIW DSP solutions, our solution can practically eliminate instruction fetching energy in many scenarios, significantly reduce control path switching, simplify the implementation of kernels and reduce code size, sometimes by as much as 30 times. The techniques proposed in this thesis have been implemented in the DSP platform ePUMA (embedded Parallel DSP processor with Unique Memory Access), a configurable control-compute heterogeneous platform with distributed memory, optimized for low-power predictable DSP computing. Hardware evaluation has been done with FPGA prototypes. In addition, several VLSI layouts have been created for energy and area estimations. This includes smaller designs, as well as a large design with 73 cores, capable of 1280 integer GOPS or 256 GFLOPS at 500MHz and which measures 45mm2 in 28nm FD-SOI technology. In addition to the hardware design, this thesis also discusses parallel programming flow for distributed memory architectures and ePUMA application implementation. A DSP kernel programming language and its compiler is presented. This effectively demonstrates how kernels written in a high-level language can be translated into HOF instructions for very high processing efficiency.
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Shahabuddin, S. (Shahriar). "MIMO detection and precoding architectures." Doctoral thesis, Oulun yliopisto, 2019. http://urn.fi/urn:isbn:9789526222837.

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Abstract Multiple-input multiple-output (MIMO) techniques have been adopted since the third generation (3G) wireless communication standard to increase the spectral efficiency, data rate and reliability. The blessings of MIMO technologies for the baseband transceiver comes with the price of added complexity. Therefore, research on VLSI architectures for MIMO signal processing has generated a lot of interest over the past two decades. The advent of massive MIMO as a key technology for the fifth generation (5G) era also increased the interest in VLSI architectures related to MIMO communication research. In this thesis, we explored different VLSI architectures for MIMO detection and precoding algorithms. The detection and precoding are the most complex parts of a MIMO baseband transceiver. We focused on algorithm and architecture optimization and presented several VLSI architectures for MIMO detection and precoding. The thesis proposed an application specific instruction-set processor (ASIP) for a multimode small-scale MIMO detector. In a single design the detector supports minimum mean-square error (MMSE), selective spanning with fast enumeration (SSFE) and list sphere detection (LSD). In addition, a multiprocessor architecture is proposed in this thesis for a lattice reduction (LR) algorithm. A modified Lenstra-Lenstra-Lovasz (LLL) algorithm is proposed for LR to reduce the complexity of the original LLL algorithm. We also propose a massive MIMO detection algorithm based on alternating direction method of multipliers (ADMM). The algorithm is referred to as ADMM based infinity norm (ADMIN) constrained equalization. The ADMIN detection algorithm is implemented as an application-specific integrated circuit (ASIC) and for field programmable gate array (FPGA). A multimode precoder ASIP is also proposed in this thesis. In a single design, the ASIP supports norm-based scheduling, QR-decomposition, MMSE precoding and dirty paper coding (DPC) based precoding
Tiivistelmä Moni-tulo moni-lähtö (MIMO) -tekniikoita on sopeutettu kolmannen sukupolven (3G) langattomasta viestintästandardista alkaen spektritehokkuuden, tiedonsiirtonopeuden ja luotettavuuden parantamiseksi. MIMO-teknologioilla on useita hyviä puolia suhteessa peruskaistan vastaanottimeen, mutta samalla monimutkaisuus on lisääntynyt. VLSI-arkkitehtuurien tutkimus MIMO-signaalinkäsittelyssä on sen vuoksi herättänyt paljon kiinnostusta viimeisen kahden vuosikymmenen aikana. Myös MIMO:n saavuttama asema viidennen sukupolven (5G) viestintästandardin pääteknologiana on lisännyt kiinnostusta VLSI-arkkitehtuureihin MIMO-viestinnän tutkimuksessa. Tässä tutkielmassa on tutkittu erilaisia VLSI-arkkitehtuureja MIMO-signaalien tunnistus- ja esikoodausalgoritmeissa. Signaalien tunnistus ja esikoodaus ovat peruskaistaa käyttävän MIMO-vastaanottimen monimutkaisimmat osa-alueet. Tutkielmassa on keskitytty algoritmien ja arkkitehtuurien optimointiin ja esitetty useita VLSI-arkkitehtuureja MIMO-signaalien tunnistusta ja esikoodausta varten. Tutkielmassa on ehdotettu sovelluskohtaisen prosessorin (Application Specific Instruction-set Processor eli ASIP) käyttä pienen mittakaavan monimuotodetektorissa. Detektorin rakenne tukee samanaikaisesti keskineliöpoikkeaman minimointia (MMSE), SSFE (Selective Spanning with Fast Enumeration) -algoritmia ja LSD (List Sphere Detection) -algoritmia. Lisäksi tässä tutkielmassa ehdotetaan monisuoritinarkkitehtuuria hilan redusointialgoritmille (Lattice Reduction eli LR). LR-algoritmia varten ehdotetaan muokattua Lenstra-Lenstra-Lovasz (LLL) -algoritmia vähentämään alkuperäisen LLL-algoritmin monimutkaisuutta. Lisäksi MIMO-signaalien tunnistusalgoritmin perustaksi ehdotetaan vuorottelevaa kertoimien suuntaustapaa Alternating Direction Method of Multipliers eli ADMM). ADMM-perustaisesta taajuusvasteen rajoitetusta ääretön-normi-korjauksesta (infinity norm constrained equalization) käytetään nimitystä ADMIN-algoritmi. ADMIN-tunnistusalgoritmi toteutetaan sovelluskohtaisena integroituna piirinä (Application-Specific Integrated Circuit eli ASIC) ohjelmoitavaa porttimatriisia (Field Programmable Gate Array eli FPGA) varten. Lisäksi ehdotetaan ASIP-monimuotoesikooderin käyttöä. ASIP-esikooderin rakenne tukee normiperustaista aikataulutusta, QR-hajotelmaa, MMSE-esikoodausta ja likaisen paperin koodaukseen (Dirty Paper Coding eli DPC) perustuvaa esikoodausta
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Sydow, Thorsten von [Verfasser]. "Modellbildung und Analyse heterogener ASIP-eFPGA-Architekturen / Thorsten von Sydow." Aachen : Hochschulbibliothek der Rheinisch-Westfälischen Technischen Hochschule Aachen, 2011. http://d-nb.info/1018226036/34.

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Murugappa, Velayuthan Purushotham. "Towards Optimized Flexible Multi-ASIP Architectures for LDPC/Turbo Decoding." Télécom Bretagne, 2012. http://www.telecom-bretagne.eu/publications/publication.php?idpublication=13220.

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De nombreuses techniques de codage de canal sont spécifiées dans les nouvelles normes de communications numériques, chacune adaptée à des besoins applicatifs spécifiques (taille de trame, type de canal de transmission, rapport signal-à-bruit, bande-passante, etc. ). Si l'on considère les applications naissantes multi-mode et multi-standard, ainsi que l'intérêt croissant pour la radio logicielle et la radio cognitive, la combinaison de plusieurs techniques de correction d'erreur devient incontournable. Néanmoins, des solutions optimales en termes de performance, de consommation d'énergie et de surface sont encore à inventer et ne doivent pas être négligées au profit de la flexibilité. Dans ce contexte, ce travail de thèse a exploré le modèle d'architecture multi-ASIP dans le but d¿unifier l'approche orientée sur la flexibilité et celle orientée sur l'optimalité dans la conception de décodeurs de canal flexibles. En considérant principalement les applications exigeantes de décodage itératif des turbocodes et des codes LDPC, des architectures multi-ASIP de décodeurs de canal sont proposées ciblant une grande flexibilité combinée à une haute efficacité architecturale en termes de bits/cycle/iteration/mm2. Différentes solutions architecturales et différentes approches de conception sont explorées pour proposer trois contributions originales. La première contribution concerne la conception d'un décodeur LDPC/Turbo multi-ASIP extensible, flexible et haut débit. Plusieurs objectifs de conception sont atteints en termes d'extensibilité, de partage de ressources, et de vitesse de configuration. Le décodeur proposé, nommé DecASIP, supporte le décodage des codes LDPC et turbocodes spécifiés dans les normes WiFi, WiMAX et LTE. L'extensibilité apportée par l'approche multi-ASIP basée sur des réseaux sur puces (NoC) permet d'atteindre les besoins en haut débit des normes actuelles et futures. La deuxième contribution concerne la conception d'un ASIP paramétré pour le turbo-décodage (TDecASIP). L'objectif étant d'étudier l'efficacité maximale atteignable pour un turbo décodeur basé sur le concept ASIP en maximisant l'exploitation du parallélisme de sous-blocs. En outre, avec cette architecture nous avons démontré la possibilité de concevoir des coeurs de traitement paramétrables et dédiés à l'application en utilisant le flot de conception ASIP existant. La troisième contribution correspond à la conception d'un ASIP optimisé pour le décodage des codes LDPC (LDecASIP). Comme pour TDecASIP, l'objectif étant d'étudier l'efficacité maximale atteignable pour un décodeur de codes LDPC basé sur le concept ASIP en augmentant le degré de parallélisme et la bande passante des mémoires. Une quatrième contribution principale de cette thèse porte sur le prototypage matériel. Une plateforme de communication complète intégrant 4-DecASIP pour le décodage de canal a été prototypé sur une carte à base de circuits FPGA. À notre connaissance, c'est le premier prototype FPGA publié de décodeur de canal flexible supportant le décodage des turbocodes et des codes LDPC avec une architecture multi-ASIP intégrant des NoC. De plus, une intégration ASIC de ce décodeur a été réalisée par le CEA-LETI dans la puce MAG3D visant des applications de communications pour la 4G. Ces résultats démontrent le cycle de conception rapide et l'efficacité offerte par l'approche de conception basée sur le concept ASIP dans ce domaine d'application, permettant ainsi d'affiner les compromis de conception par rapport aux divers objectifs ciblés
Large variety of channel coding techniques are specified in existing and emerging digital communication standards, each suitable for specific application needs (frame size, transmission channel, signal-to-noise ratio, bandwidth, etc). Considering the emerging multi-mode and multi-standard applications, as well as the increasing interest for Software Defined Radio (SDR) and Cognitive Radio (CR) applications, flexible implementations combining multiple error correction techniques becomes mandatory. However, the need of optimal solutions in terms of performance, area, and power consumption is increasing too and cannot be neglected against flexibility. In this context, this thesis work has investigated multi-ASIP architecture model towards the target of unifying flexibility-oriented and optimization-oriented approaches in the design of flexible channel decoders. By considering mainly the challenging Turbo and LDPC decoding applications, multi-ASIP channel decoder architectures are proposed targeting high flexibility combined with high architecture efficiency in terms of bits/cycle/iteration/mm2. Different architecture alternatives and design approaches are explored. Three original contributions have been proposed. The first one concerns the design of a scalable and flexible high throughput multi-ASIP LDPC/Turbo decoder. Several design objectives have been attained in this work in terms of scalability, resource sharing, and configurability speed. The proposed DecASIP supports the decoding of LDPC and Turbo codes specified in WiFi, WiMAX, and LTE standards. The achieved scalability through the multi-ASIP NoC based approach enables the accommodation of current and future high throughput requirements. The second contribution concerns the design of a parameterized ASIP for Turbo decoding (TDecASIP). Here the objective was to investigate the maximum attainable architecture efficiency for ASIP-based Turbo decoding when maximizing the usage of sub-block parallelism. Furthermore, with this architecture we demonstrated the possibility to design application-specific parameterized cores using the available ASIP design flow. The third contribution corresponds to the design of an optimized ASIP for LDPC decoding (LDecASIP). As for TDecASIP, the objective was to investigate the maximum attainable architecture efficiency for ASIP-based LDPC decoding by increasing the parallelism degree and the necessary memory bandwidth. A fourth main contribution of this thesis work concerns the hardware prototyping. A complete communication system platform including 4-DecASIP channel decoder has been prototyped on an FPGA-based logic emulation board. To our knowledge, this is the first demonstrated multi-ASIP NoC-based FPGA prototype that is capable of decoding LDPC and Turbo (SBTC and DBTC) codes. Furthermore, an ASIC integration of the 4-DecASIP system decoder has been accomplished by the CEA-LETI on the MAG3D Telecom chip which targets 4G communication applications. These results demonstrate the rapid design cycle and the effectiveness offered by the ASIP based design approach in this application domain to fine tune design trade-offs w. R. T. Diverse design objectives
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Yu, Bin. "Scaffold study of ASIP and AgRP : antagonists of melanocortin system /." Diss., Digital Dissertations Database. Restricted to UC campuses, 2007. http://uclibs.org/PID/11984.

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Santos, Daniela Copetti. "Padrões de variabilidade do gene ASIP (agouti signaling protein) em mamíferos." Pontifícia Universidade Católica do Rio Grande do Sul, 2007. http://hdl.handle.net/10923/1294.

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Made available in DSpace on 2013-08-07T18:41:28Z (GMT). No. of bitstreams: 1 000395749-Texto+Completo-0.pdf: 1423043 bytes, checksum: ca56d3788b6dc3481d9aed7040fc6130 (MD5) Previous issue date: 2007
O melanismo em mamíferos decorre principalmente da atividade de dois genes: MC1R (Melanocortin-1 Receptor), cujo produto induz a produção de eumelanina (pretomarrom); e ASIP (Agouti Signaling Protein), que codifica um peptídeo antagonista que promove a produção de feomelanina (pigmento claro). A combinação do efeito destes dois locos faz com que o pêlo cresça escuro com bandas subapicais amarelas. No presente estudo investigamos a diversidade nucleotídica e os padrões de variabilidade presentes no gene ASIP, principalmente nas regiões codificadoras dos éxons 2 e 3 e em regiões não codificadoras dos íntrons 2 e 3 em alguns mamíferos, com ênfase em felídeos (Mammalia, Carnivora, Felidae). Através do alinhamento entre as espécies analisadas nesse estudo foi possível construir três bases de dados que foram divididas em diferentes blocos conforme as regiões de alinhamento. A análise comparativa de seqüências permitiu a caracterização de diferentes blocos de seqüência conservada, assim como a identificação de uma inserção SINE presente apenas no gato doméstico, de uma região repetitiva hipervariável em todos os felídeos analisados, e também de variantes moleculares (SNPs) em Felis catus e Leopardus geoffroyi. Nenhum dos polimorfismos identificados nesta espécie estava localizado em regiões exônicas ou apresentou associação a fenótipos de coloração, indicando que as regiões analisadas não estão envolvidas na indução do melanismo nesta espécie.
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Packiaraj, Vivek. "Study, Design and Implementation of an Application Specific Instruction Set Processor for a Specific DSP Task." Thesis, Linköping University, Electronics System, 2008. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-52314.

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There is a lot of literature already available describing well-structured approach for embeddeddesign and implementation of Application Specific Integrated Processor (ASIP) micro processorcore.

This concept features hardware structured approach for implementation of processor core fromminimal instruction set, encoding standards, hardware mapping, and micro architecture design,coding conventions, RTL,verification and burning into a FPGA. The goal is to design an ASIPprocessor core (Micro architecture design and RTL) which can perform DSP task, e.g., FIR. Thereport is a well structured approach of design and implementation of an ASIP DSP processor forDSP applications like FIR. This report contains design flow starting from Instruction set design,micro architecture design and RTL implementation of the core. Details of the power simulationsof FPGA are also listed and analyzed.

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Lapinskii, Viktor. "Algorithms for compiler-assisted design space exploration of clustered VLIW ASIP datapaths /." Full text (PDF) from UMI/Dissertation Abstracts International, 2001. http://wwwlib.umi.com/cr/utexas/fullcit?p3008376.

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Chan, Chun-Jung. "Investigation of NoGap : SIMD Datapath Implementation." Thesis, Linköpings universitet, Institutionen för systemteknik, 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-72131.

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Nowadays, many ASIP systems with high computational capabilities are designed in order to fulfill the increasing demands of technical applications. However, the design of ASIP system usually takes many man hours. Therefore, a number of EDA tools are developed to ease the design effort, but they limit the design freedom due to their predefined design templates. Consequently, designers are forced to use lower level HDLs which offer high design flexibility but require substantial design hours. A novel design automation tool called NoGap was proposed to balance such issues. The NoGap system, which is especially used in ASIPs and accelerator design, effectively provides high design flexibility and saves design effort for designers. The efficiency and design ability of NoGap were investigated in this thesis work. NoGap was used to implement an eight-way SIMD datapath of an ASIP called Sleipnir, which was devised by the Division of Computer Engineering at Linköping University. For contrast, the manually crafted HDL implementation of the Sleipnir was taken. The critical path implementations, done by both design approaches, were synthesized to the Altera Strtix IV FPGA. The synthesize results showed that the NoGap design although used 1.358 times as many hardware units as the original HDL design. Their timing performance is comparable (HDL/NoGap-60.042/58.156Mhz). In this thesis, based on the design experience of SIMD datapath, valuable aspects were suggested to benefit the future users who will use NoGap to implement SIMD structures. In addition, the hidden bugs and insufficient features of NoGap were discovered, and the referable suggestions were provided in order to help the developers to improve the NoGap system.
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Books on the topic "ASIP"

1

Karuri, Kingshuk, and Rainer Leupers. Application Analysis Tools for ASIP Design. New York, NY: Springer New York, 2011. http://dx.doi.org/10.1007/978-1-4419-8255-1.

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Rainer, Leupers, and SpringerLink (Online service), eds. Application Analysis Tools for ASIP Design: Application Profiling and Instruction-set Customization. New York, NY: Springer Science+Business Media, LLC, 2011.

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Association of SIDS and Infant Mortality Programs and United States. Maternal and Child Health Bureau, eds. Pilot of ASIP SIDS and other infant death program evaluation plan: Final report. [Washington, D.C.]: U.S. Dept. of Health and Human Services, Health Resoources and Services Administration, Maternal and Child Health Bureau, 2003.

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Kalinda, H. K. C. Agricultural sector performance analysis: Pre-ASIP policy analysis, 1975-95, Zambia : final report. [Lusaka]: Institute of African Studies, University of Zambia, 1997.

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Association of SIDS and Infant Mortality Programs. and United States. Maternal and Child Health Bureau., eds. Pilot of ASIP SIDS and other infant death program evaluation plan: Final report. [Washington, D.C.]: U.S. Dept. of Health and Human Services, Health Resources and Services Administration, Maternal and Child Health Bureau, 2003.

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Association of SIDS and Infant Mortality Programs. and United States. Maternal and Child Health Bureau., eds. Pilot of ASIP SIDS and other infant death program evaluation plan: Final report. [Washington, D.C.]: U.S. Dept. of Health and Human Services, Health Resoources and Services Administration, Maternal and Child Health Bureau, 2003.

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United States. Maternal and Child Health Bureau. Pilot of ASIP SIDS and other infant death program evaluation plan: Final report. [Rockville, MD?]: The Bureau, 2003.

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Nokkala, Marko. Sector investments as part of national fiscal policy: Experience from ASIP in Zambia. Helsinki: United Nations University, World Institute for Development Economics Research, 2001.

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Tembo, S. P. M. A review of major ASIP implementation issues, 1996: Programme financing, decentralization, and changes in institutional structure. [Lusaka]: Institute for Economic and Social Research, University of Zambia, 1997.

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University of Zambia. Institute for African Studies. The status of smallholder farming and agricultural services in Zambia: A pre-ASIP systematic client consultation study. [Lusaka]: Institute for African Studies, University of Zambia, 1996.

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Book chapters on the topic "ASIP"

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Hohenauer, Manuel, and Rainer Leupers. "ASIP Design Methodology." In C Compilers for ASIPs, 7–13. New York, NY: Springer New York, 2009. http://dx.doi.org/10.1007/978-1-4419-1176-6_2.

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Catthoor, Francky, Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Angeliki Kritikakou, and Javed Absar. "Bioimaging ASIP benchmark study." In Ultra-Low Energy Domain-Specific Instruction-Set Processors, 315–72. Dordrecht: Springer Netherlands, 2010. http://dx.doi.org/10.1007/978-90-481-9528-2_11.

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Hoffmann, Andreas, Heinrich Meyr, and Rainer Leupers. "Traditional ASIP Design Methodology." In Architecture Exploration for Embedded Processors with LISA, 11–27. Boston, MA: Springer US, 2002. http://dx.doi.org/10.1007/978-1-4757-4538-2_2.

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Kreku, Jari, Kari Tiensyrjä, Andreas Wieferink, and Bart Vanthournout. "ASIP Exploration and Design." In Scalable Multi-core Architectures, 81–103. New York, NY: Springer New York, 2011. http://dx.doi.org/10.1007/978-1-4419-6778-7_4.

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Karuri, Kingshuk, and Rainer Leupers. "The ASIP Design Space." In Application Analysis Tools for ASIP Design, 11–34. New York, NY: Springer New York, 2011. http://dx.doi.org/10.1007/978-1-4419-8255-1_2.

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Karuri, Kingshuk, and Rainer Leupers. "Profiling for ASIP Design." In Application Analysis Tools for ASIP Design, 51–57. New York, NY: Springer New York, 2011. http://dx.doi.org/10.1007/978-1-4419-8255-1_4.

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Hoffmann, Andreas, Heinrich Meyr, and Rainer Leupers. "Processor Models for ASIP Design." In Architecture Exploration for Embedded Processors with LISA, 29–43. Boston, MA: Springer US, 2002. http://dx.doi.org/10.1007/978-1-4757-4538-2_3.

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Karuri, Kingshuk, and Rainer Leupers. "Design Automation Tools for ASIP Design." In Application Analysis Tools for ASIP Design, 35–49. New York, NY: Springer New York, 2011. http://dx.doi.org/10.1007/978-1-4419-8255-1_3.

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Gomony, Manil Dev, Mihaela Jivanescu, and Nikolas Olaziregi. "Towards ASIP Architecture-Driven Algorithm Development." In Analysis, Estimations, and Applications of Embedded Systems, 91–100. Cham: Springer Nature Switzerland, 2023. http://dx.doi.org/10.1007/978-3-031-26500-6_8.

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Li, Yibin, Zhiping Jia, and Renhai Chen. "Towards a Dedicated ASIP for AES Implementation." In Advances in Intelligent and Soft Computing, 441–44. Berlin, Heidelberg: Springer Berlin Heidelberg, 2012. http://dx.doi.org/10.1007/978-3-642-27329-2_60.

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Conference papers on the topic "ASIP"

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Yongping Liu, S. Sezer, and J. McCanny. "ASIP: developments, challenges and trends." In China-Ireland International Conference on Information and Communications Technologies (CIICT 2007). IEE, 2007. http://dx.doi.org/10.1049/cp:20070790.

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Radhakrishnan, Swarnalatha, Hui Guo, and Sri Parameswaran. "Dual-pipeline heterogeneous ASIP design." In the 2nd IEEE/ACM/IFIP international conference. New York, New York, USA: ACM Press, 2004. http://dx.doi.org/10.1145/1016720.1016727.

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Gao, Yan-yan, Xi Li, and Jie Yu. "Validation of ASIP Architecture Description." In 2008 Fifth IEEE International Symposium on Embedded Computing (SEC). IEEE, 2008. http://dx.doi.org/10.1109/sec.2008.49.

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Hoozemans, Joost, Kati Tervo, Pekka Jaaskelainen, and Zaid Al-Ars. "Energy Efficient Multistandard Decompressor ASIP." In ICCDE 2021: 2021 7th International Conference on Computing and Data Engineering. New York, NY, USA: ACM, 2021. http://dx.doi.org/10.1145/3456172.3456218.

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Zhu, Yong, Yong Wei Liao, and Qiong Fei Wu. "ASIP MDA Based on UML/XML." In 2010 International Conference on Multimedia Technology (ICMT). IEEE, 2010. http://dx.doi.org/10.1109/icmult.2010.5629795.

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Jain, M. K., M. Balakrishnan, and A. Kumar. "Exploring storage organization in ASIP synthesis." In Proceedings. Euromicro Symposium on Digital System Design. IEEE, 2003. http://dx.doi.org/10.1109/dsd.2003.1231909.

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Gschwind, Michael. "Instruction set selection for ASIP design." In the seventh international workshop. New York, New York, USA: ACM Press, 1999. http://dx.doi.org/10.1145/301177.301187.

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Gupta, T. Vinod Kumar, Roberto E. Ko, and Rajeev Barua. "Compiler-directed customization of ASIP cores." In the tenth international symposium. New York, New York, USA: ACM Press, 2002. http://dx.doi.org/10.1145/774789.774810.

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Micconi, Laura, Rosilde Corvino, Deepak Gangadharan, Jan Madsen, Paul Pop, and Lech Jozwiak. "Hierarchical DSE for multi-ASIP platforms." In 2013 2nd Mediterranean Conference on Embedded Computing (MECO). IEEE, 2013. http://dx.doi.org/10.1109/meco.2013.6601379.

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Mirzaee, Reza Faghih, and Mohammad Eshghi. "Design of an ASIP IDEA crypto processor." In 2011 IEEE 2nd International Conference on Networked Embedded Systems for Enterprise Applications (NESEA). IEEE, 2011. http://dx.doi.org/10.1109/nesea.2011.6144954.

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Reports on the topic "ASIP"

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Lincoln, John W. Proceedings of USAF Structural Integrity Program (ASIP, ENSIP) conference Held in Sacramento, California on 2-4 December 1986. Fort Belvoir, VA: Defense Technical Information Center, December 1986. http://dx.doi.org/10.21236/ada222585.

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Fluhr, Robert, and Volker Brendel. Harnessing the genetic diversity engendered by alternative gene splicing. United States Department of Agriculture, December 2005. http://dx.doi.org/10.32747/2005.7696517.bard.

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Our original objectives were to assess the unexplored dimension of alternative splicing as a source of genetic variation. In particular, we sought to initially establish an alternative splicing database for Arabidopsis, the only plant for which a near-complete genome has been assembled. Our goal was to then use the database, in part, to advance plant gene prediction programs that are currently a limiting factor in annotating genomic sequence data and thus will facilitate the exploitation of the ever increasing quantity of raw genomic data accumulating for plants. Additionally, the database was to be used to generate probes for establishing high-throughput alternative transcriptome analysis in the form of a splicing-specific oligonucleotide microarray. We achieved the first goal and established a database and web site termed Alternative Splicing In Plants (ASIP, http://www.plantgdb.org/ASIP/). We also thoroughly reviewed the extent of alternative splicing in plants (Arabidopsis and rice) and proposed mechanisms for transcript processing. We noted that the repertoire of plant alternative splicing differs from that encountered in animals. For example, intron retention turned out to be the major type. This surprising development was proven by direct RNA isolation techniques. We further analyzed EST databases available from many plants and developed a process to assess their alternative splicing rate. Our results show that the lager genome-sized plant species have enhanced rates of alternative splicing. We did advance gene prediction accuracy in plants by incorporating scoring for non-canonical introns. Our data and programs are now being used in the continuing annotation of plant genomes of agronomic importance, including corn, soybean, and tomato. Based on the gene annotation data developed in the early part of the project, it turned out that specific probes for different exons could not be scaled up to a large array because no uniform hybridization conditions could be found. Therefore, we modified our original objective to design and produce an oligonucleotide microarray for probing alternative splicing and realized that it may be reasonable to investigate the extent of alternative splicing using novel commercial whole genome arrays. This possibility was directly examined by establishing algorithms for the analysis of such arrays. The predictive value of the algorithms was then shown by isolation and verification of alternative splicing predictions from the published whole genome array databases. The BARD-funded work provides a significant advance in understanding the extent and possible roles of alternative splicing in plants as well as a foundation for advances in computational gene prediction.
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Masters, Mark, Mark Christian, and Douglas Lengenfelder. Southeast Asia. Fort Belvoir, VA: Defense Technical Information Center, January 1996. http://dx.doi.org/10.21236/ada441385.

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Strasburg, Aaron. ASIC Commitments. Office of Scientific and Technical Information (OSTI), December 2017. http://dx.doi.org/10.2172/1415017.

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Marshak, David. Convoq ASAP. Boston, MA: Patricia Seybold Group, May 2004. http://dx.doi.org/10.1571/pr5-6-04cc.

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Howson, Peter, Rini Astuti, Oliver Hensengerth, and Sara Kindon. Asia-Pacific ClimateScapes. The British Academy, February 2023. http://dx.doi.org/10.5871/just-transitions-a-p/p-h-s-k-vietnamese.

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Howson, Peter, Rini Astuti, Oliver Hensengerth, and Sara Kindon. Asia-Pacific ClimateScapes. The British Academy, February 2023. http://dx.doi.org/10.5871/just-transitions-a-p/p-h-s-k-indonesian.

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Anthony, Ian, Fei Su, and Lora Saalman. Naval Incident Management in Europe, East Asia and South East Asia. Stockholm International Peace Research Institute, March 2023. http://dx.doi.org/10.55163/zzbg6990.

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Unprecedented global turbulence in 2022 has demonstrated the need to pay increased attention to naval operations. Enhanced military capability allows naval power projection far beyond home waters. New threats and challenges are emerging from technological advances and new applications, not least the vulnerability of warships and naval facilities to cyber intrusions and cyberattacks. As states implement the programmes they need to protect and promote their interests at sea, there is also likely to be an increase in the number of close tracking incidents. How effective current risk reduction mechanisms will be at dealing with incidents at sea is unclear. This Insights Paper provides a preliminary assessment of the existing mechanisms and suggests areas for further improvement.
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Sauers, Aaron G. DITAC FASPAX / ASIC Development. Office of Scientific and Technical Information (OSTI), October 2017. http://dx.doi.org/10.2172/1460391.

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Smart, Andy, and Shanti Jagannathan, eds. Textbook Policies in Asia:. Manila, Philippines: Asian Development Bank, December 2018. http://dx.doi.org/10.22617/tcs189651-2.

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