Academic literature on the topic 'ASIP'
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Journal articles on the topic "ASIP"
Hamed, Ahmed, M. Watheq El-Kharashi, Ashraf Salem, and Mona Safar. "Two-Layer Bus-Independent Instruction Set Architecture for Securing Long Protocol Data Units in Automotive Open System Architecture-Based Automotive Electronic Control Units." Electronics 11, no. 6 (March 18, 2022): 952. http://dx.doi.org/10.3390/electronics11060952.
Full textAndorno, M., M. Andersen, G. Borghello, A. Caratelli, D. Ceresa, J. Dhaliwal, K. Kloukinas, and R. Pejasinovic. "Rad-hard RISC-V SoC and ASIP ecosystems studies for high-energy physics applications." Journal of Instrumentation 18, no. 01 (January 1, 2023): C01018. http://dx.doi.org/10.1088/1748-0221/18/01/c01018.
Full textYang, Ying-Kui, Chris Dickinson, Yu-Mei Lai, Ji-Yao Li, and Ira Gantz. "Functional properties of an agouti signaling protein variant and characteristics of its cognate radioligand." American Journal of Physiology-Regulatory, Integrative and Comparative Physiology 281, no. 6 (December 1, 2001): R1877—R1886. http://dx.doi.org/10.1152/ajpregu.2001.281.6.r1877.
Full textBaldwin, H., M. Zhang, J. Current, and J. Yao. "84 Characterization of agouti-signalling protein expression within the bovine ovary and early embryo." Reproduction, Fertility and Development 33, no. 2 (2021): 150. http://dx.doi.org/10.1071/rdv33n2ab84.
Full textBaldwin, H., M. Zhang, J. Current, and J. Yao. "84 Characterization of agouti-signalling protein expression within the bovine ovary and early embryo." Reproduction, Fertility and Development 33, no. 2 (2021): 150. http://dx.doi.org/10.1071/rdv33n2ab84.
Full textPebrianthy, Lola. "HUBUNGAN PENDIDIKAN DAN PENGETAHUAN IBU TENTANG ASI ESKLUSIF DENGAN PEMBERIAN ASI PERAH PADA IBU BEKERJA." Jurnal Kesehatan Ilmiah Indonesia (Indonesian Health Scientific Journal) 6, no. 2 (December 31, 2021): 212. http://dx.doi.org/10.51933/health.v6i2.554.
Full textXu, Jian Zhou, Jin Hai Su, Zi Bin Dai, and Wei Li. "A Study in Functional Verification of ASIP." Advanced Materials Research 457-458 (January 2012): 218–24. http://dx.doi.org/10.4028/www.scientific.net/amr.457-458.218.
Full textHarfiandri, Sunesni, Dea Dea, and Ananda Putri. "HUBUNGAN PENDIDIKAN DAN PENGETAHUAN IBU TENTANG ASI PERAH DENGAN PRAKTEK PEMBERIAN ASI PERAH." Jurnal Endurance 3, no. 2 (June 29, 2018): 415. http://dx.doi.org/10.22216/jen.v3i2.3191.
Full textKempf, Elena, Kathrin Landgraf, Robert Stein, Martha Hanschkow, Anja Hilbert, Rami Abou Jamra, Paula Boczki, et al. "Aberrant expression of agouti signaling protein (ASIP) as a cause of monogenic severe childhood obesity." Nature Metabolism 4, no. 12 (December 19, 2022): 1697–712. http://dx.doi.org/10.1038/s42255-022-00703-9.
Full textHirose, Tomonori, Yasushi Izumi, Yoji Nagashima, Yoko Tamai-Nagai, Hidetake Kurihara, Tatsuo Sakai, Yukari Suzuki, et al. "Involvement of ASIP/PAR-3 in the promotion of epithelial tight junction formation." Journal of Cell Science 115, no. 12 (June 15, 2002): 2485–95. http://dx.doi.org/10.1242/jcs.115.12.2485.
Full textDissertations / Theses on the topic "ASIP"
Šulek, Jakub. "Verifikace ASIP založena na formálních tvrzeních." Master's thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2015. http://www.nusl.cz/ntk/nusl-264941.
Full textKarlsson, Andréas. "Design of Energy-Efficient High-Performance ASIP-DSP Platforms." Doctoral thesis, Linköpings universitet, Datorteknik, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-130723.
Full textShahabuddin, S. (Shahriar). "MIMO detection and precoding architectures." Doctoral thesis, Oulun yliopisto, 2019. http://urn.fi/urn:isbn:9789526222837.
Full textTiivistelmä Moni-tulo moni-lähtö (MIMO) -tekniikoita on sopeutettu kolmannen sukupolven (3G) langattomasta viestintästandardista alkaen spektritehokkuuden, tiedonsiirtonopeuden ja luotettavuuden parantamiseksi. MIMO-teknologioilla on useita hyviä puolia suhteessa peruskaistan vastaanottimeen, mutta samalla monimutkaisuus on lisääntynyt. VLSI-arkkitehtuurien tutkimus MIMO-signaalinkäsittelyssä on sen vuoksi herättänyt paljon kiinnostusta viimeisen kahden vuosikymmenen aikana. Myös MIMO:n saavuttama asema viidennen sukupolven (5G) viestintästandardin pääteknologiana on lisännyt kiinnostusta VLSI-arkkitehtuureihin MIMO-viestinnän tutkimuksessa. Tässä tutkielmassa on tutkittu erilaisia VLSI-arkkitehtuureja MIMO-signaalien tunnistus- ja esikoodausalgoritmeissa. Signaalien tunnistus ja esikoodaus ovat peruskaistaa käyttävän MIMO-vastaanottimen monimutkaisimmat osa-alueet. Tutkielmassa on keskitytty algoritmien ja arkkitehtuurien optimointiin ja esitetty useita VLSI-arkkitehtuureja MIMO-signaalien tunnistusta ja esikoodausta varten. Tutkielmassa on ehdotettu sovelluskohtaisen prosessorin (Application Specific Instruction-set Processor eli ASIP) käyttä pienen mittakaavan monimuotodetektorissa. Detektorin rakenne tukee samanaikaisesti keskineliöpoikkeaman minimointia (MMSE), SSFE (Selective Spanning with Fast Enumeration) -algoritmia ja LSD (List Sphere Detection) -algoritmia. Lisäksi tässä tutkielmassa ehdotetaan monisuoritinarkkitehtuuria hilan redusointialgoritmille (Lattice Reduction eli LR). LR-algoritmia varten ehdotetaan muokattua Lenstra-Lenstra-Lovasz (LLL) -algoritmia vähentämään alkuperäisen LLL-algoritmin monimutkaisuutta. Lisäksi MIMO-signaalien tunnistusalgoritmin perustaksi ehdotetaan vuorottelevaa kertoimien suuntaustapaa Alternating Direction Method of Multipliers eli ADMM). ADMM-perustaisesta taajuusvasteen rajoitetusta ääretön-normi-korjauksesta (infinity norm constrained equalization) käytetään nimitystä ADMIN-algoritmi. ADMIN-tunnistusalgoritmi toteutetaan sovelluskohtaisena integroituna piirinä (Application-Specific Integrated Circuit eli ASIC) ohjelmoitavaa porttimatriisia (Field Programmable Gate Array eli FPGA) varten. Lisäksi ehdotetaan ASIP-monimuotoesikooderin käyttöä. ASIP-esikooderin rakenne tukee normiperustaista aikataulutusta, QR-hajotelmaa, MMSE-esikoodausta ja likaisen paperin koodaukseen (Dirty Paper Coding eli DPC) perustuvaa esikoodausta
Sydow, Thorsten von [Verfasser]. "Modellbildung und Analyse heterogener ASIP-eFPGA-Architekturen / Thorsten von Sydow." Aachen : Hochschulbibliothek der Rheinisch-Westfälischen Technischen Hochschule Aachen, 2011. http://d-nb.info/1018226036/34.
Full textMurugappa, Velayuthan Purushotham. "Towards Optimized Flexible Multi-ASIP Architectures for LDPC/Turbo Decoding." Télécom Bretagne, 2012. http://www.telecom-bretagne.eu/publications/publication.php?idpublication=13220.
Full textLarge variety of channel coding techniques are specified in existing and emerging digital communication standards, each suitable for specific application needs (frame size, transmission channel, signal-to-noise ratio, bandwidth, etc). Considering the emerging multi-mode and multi-standard applications, as well as the increasing interest for Software Defined Radio (SDR) and Cognitive Radio (CR) applications, flexible implementations combining multiple error correction techniques becomes mandatory. However, the need of optimal solutions in terms of performance, area, and power consumption is increasing too and cannot be neglected against flexibility. In this context, this thesis work has investigated multi-ASIP architecture model towards the target of unifying flexibility-oriented and optimization-oriented approaches in the design of flexible channel decoders. By considering mainly the challenging Turbo and LDPC decoding applications, multi-ASIP channel decoder architectures are proposed targeting high flexibility combined with high architecture efficiency in terms of bits/cycle/iteration/mm2. Different architecture alternatives and design approaches are explored. Three original contributions have been proposed. The first one concerns the design of a scalable and flexible high throughput multi-ASIP LDPC/Turbo decoder. Several design objectives have been attained in this work in terms of scalability, resource sharing, and configurability speed. The proposed DecASIP supports the decoding of LDPC and Turbo codes specified in WiFi, WiMAX, and LTE standards. The achieved scalability through the multi-ASIP NoC based approach enables the accommodation of current and future high throughput requirements. The second contribution concerns the design of a parameterized ASIP for Turbo decoding (TDecASIP). Here the objective was to investigate the maximum attainable architecture efficiency for ASIP-based Turbo decoding when maximizing the usage of sub-block parallelism. Furthermore, with this architecture we demonstrated the possibility to design application-specific parameterized cores using the available ASIP design flow. The third contribution corresponds to the design of an optimized ASIP for LDPC decoding (LDecASIP). As for TDecASIP, the objective was to investigate the maximum attainable architecture efficiency for ASIP-based LDPC decoding by increasing the parallelism degree and the necessary memory bandwidth. A fourth main contribution of this thesis work concerns the hardware prototyping. A complete communication system platform including 4-DecASIP channel decoder has been prototyped on an FPGA-based logic emulation board. To our knowledge, this is the first demonstrated multi-ASIP NoC-based FPGA prototype that is capable of decoding LDPC and Turbo (SBTC and DBTC) codes. Furthermore, an ASIC integration of the 4-DecASIP system decoder has been accomplished by the CEA-LETI on the MAG3D Telecom chip which targets 4G communication applications. These results demonstrate the rapid design cycle and the effectiveness offered by the ASIP based design approach in this application domain to fine tune design trade-offs w. R. T. Diverse design objectives
Yu, Bin. "Scaffold study of ASIP and AgRP : antagonists of melanocortin system /." Diss., Digital Dissertations Database. Restricted to UC campuses, 2007. http://uclibs.org/PID/11984.
Full textSantos, Daniela Copetti. "Padrões de variabilidade do gene ASIP (agouti signaling protein) em mamíferos." Pontifícia Universidade Católica do Rio Grande do Sul, 2007. http://hdl.handle.net/10923/1294.
Full textO melanismo em mamíferos decorre principalmente da atividade de dois genes: MC1R (Melanocortin-1 Receptor), cujo produto induz a produção de eumelanina (pretomarrom); e ASIP (Agouti Signaling Protein), que codifica um peptídeo antagonista que promove a produção de feomelanina (pigmento claro). A combinação do efeito destes dois locos faz com que o pêlo cresça escuro com bandas subapicais amarelas. No presente estudo investigamos a diversidade nucleotídica e os padrões de variabilidade presentes no gene ASIP, principalmente nas regiões codificadoras dos éxons 2 e 3 e em regiões não codificadoras dos íntrons 2 e 3 em alguns mamíferos, com ênfase em felídeos (Mammalia, Carnivora, Felidae). Através do alinhamento entre as espécies analisadas nesse estudo foi possível construir três bases de dados que foram divididas em diferentes blocos conforme as regiões de alinhamento. A análise comparativa de seqüências permitiu a caracterização de diferentes blocos de seqüência conservada, assim como a identificação de uma inserção SINE presente apenas no gato doméstico, de uma região repetitiva hipervariável em todos os felídeos analisados, e também de variantes moleculares (SNPs) em Felis catus e Leopardus geoffroyi. Nenhum dos polimorfismos identificados nesta espécie estava localizado em regiões exônicas ou apresentou associação a fenótipos de coloração, indicando que as regiões analisadas não estão envolvidas na indução do melanismo nesta espécie.
Packiaraj, Vivek. "Study, Design and Implementation of an Application Specific Instruction Set Processor for a Specific DSP Task." Thesis, Linköping University, Electronics System, 2008. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-52314.
Full textThere is a lot of literature already available describing well-structured approach for embeddeddesign and implementation of Application Specific Integrated Processor (ASIP) micro processorcore.
This concept features hardware structured approach for implementation of processor core fromminimal instruction set, encoding standards, hardware mapping, and micro architecture design,coding conventions, RTL,verification and burning into a FPGA. The goal is to design an ASIPprocessor core (Micro architecture design and RTL) which can perform DSP task, e.g., FIR. Thereport is a well structured approach of design and implementation of an ASIP DSP processor forDSP applications like FIR. This report contains design flow starting from Instruction set design,micro architecture design and RTL implementation of the core. Details of the power simulationsof FPGA are also listed and analyzed.
Lapinskii, Viktor. "Algorithms for compiler-assisted design space exploration of clustered VLIW ASIP datapaths /." Full text (PDF) from UMI/Dissertation Abstracts International, 2001. http://wwwlib.umi.com/cr/utexas/fullcit?p3008376.
Full textChan, Chun-Jung. "Investigation of NoGap : SIMD Datapath Implementation." Thesis, Linköpings universitet, Institutionen för systemteknik, 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-72131.
Full textBooks on the topic "ASIP"
Karuri, Kingshuk, and Rainer Leupers. Application Analysis Tools for ASIP Design. New York, NY: Springer New York, 2011. http://dx.doi.org/10.1007/978-1-4419-8255-1.
Full textRainer, Leupers, and SpringerLink (Online service), eds. Application Analysis Tools for ASIP Design: Application Profiling and Instruction-set Customization. New York, NY: Springer Science+Business Media, LLC, 2011.
Find full textAssociation of SIDS and Infant Mortality Programs and United States. Maternal and Child Health Bureau, eds. Pilot of ASIP SIDS and other infant death program evaluation plan: Final report. [Washington, D.C.]: U.S. Dept. of Health and Human Services, Health Resoources and Services Administration, Maternal and Child Health Bureau, 2003.
Find full textKalinda, H. K. C. Agricultural sector performance analysis: Pre-ASIP policy analysis, 1975-95, Zambia : final report. [Lusaka]: Institute of African Studies, University of Zambia, 1997.
Find full textAssociation of SIDS and Infant Mortality Programs. and United States. Maternal and Child Health Bureau., eds. Pilot of ASIP SIDS and other infant death program evaluation plan: Final report. [Washington, D.C.]: U.S. Dept. of Health and Human Services, Health Resources and Services Administration, Maternal and Child Health Bureau, 2003.
Find full textAssociation of SIDS and Infant Mortality Programs. and United States. Maternal and Child Health Bureau., eds. Pilot of ASIP SIDS and other infant death program evaluation plan: Final report. [Washington, D.C.]: U.S. Dept. of Health and Human Services, Health Resoources and Services Administration, Maternal and Child Health Bureau, 2003.
Find full textUnited States. Maternal and Child Health Bureau. Pilot of ASIP SIDS and other infant death program evaluation plan: Final report. [Rockville, MD?]: The Bureau, 2003.
Find full textNokkala, Marko. Sector investments as part of national fiscal policy: Experience from ASIP in Zambia. Helsinki: United Nations University, World Institute for Development Economics Research, 2001.
Find full textTembo, S. P. M. A review of major ASIP implementation issues, 1996: Programme financing, decentralization, and changes in institutional structure. [Lusaka]: Institute for Economic and Social Research, University of Zambia, 1997.
Find full textUniversity of Zambia. Institute for African Studies. The status of smallholder farming and agricultural services in Zambia: A pre-ASIP systematic client consultation study. [Lusaka]: Institute for African Studies, University of Zambia, 1996.
Find full textBook chapters on the topic "ASIP"
Hohenauer, Manuel, and Rainer Leupers. "ASIP Design Methodology." In C Compilers for ASIPs, 7–13. New York, NY: Springer New York, 2009. http://dx.doi.org/10.1007/978-1-4419-1176-6_2.
Full textCatthoor, Francky, Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Angeliki Kritikakou, and Javed Absar. "Bioimaging ASIP benchmark study." In Ultra-Low Energy Domain-Specific Instruction-Set Processors, 315–72. Dordrecht: Springer Netherlands, 2010. http://dx.doi.org/10.1007/978-90-481-9528-2_11.
Full textHoffmann, Andreas, Heinrich Meyr, and Rainer Leupers. "Traditional ASIP Design Methodology." In Architecture Exploration for Embedded Processors with LISA, 11–27. Boston, MA: Springer US, 2002. http://dx.doi.org/10.1007/978-1-4757-4538-2_2.
Full textKreku, Jari, Kari Tiensyrjä, Andreas Wieferink, and Bart Vanthournout. "ASIP Exploration and Design." In Scalable Multi-core Architectures, 81–103. New York, NY: Springer New York, 2011. http://dx.doi.org/10.1007/978-1-4419-6778-7_4.
Full textKaruri, Kingshuk, and Rainer Leupers. "The ASIP Design Space." In Application Analysis Tools for ASIP Design, 11–34. New York, NY: Springer New York, 2011. http://dx.doi.org/10.1007/978-1-4419-8255-1_2.
Full textKaruri, Kingshuk, and Rainer Leupers. "Profiling for ASIP Design." In Application Analysis Tools for ASIP Design, 51–57. New York, NY: Springer New York, 2011. http://dx.doi.org/10.1007/978-1-4419-8255-1_4.
Full textHoffmann, Andreas, Heinrich Meyr, and Rainer Leupers. "Processor Models for ASIP Design." In Architecture Exploration for Embedded Processors with LISA, 29–43. Boston, MA: Springer US, 2002. http://dx.doi.org/10.1007/978-1-4757-4538-2_3.
Full textKaruri, Kingshuk, and Rainer Leupers. "Design Automation Tools for ASIP Design." In Application Analysis Tools for ASIP Design, 35–49. New York, NY: Springer New York, 2011. http://dx.doi.org/10.1007/978-1-4419-8255-1_3.
Full textGomony, Manil Dev, Mihaela Jivanescu, and Nikolas Olaziregi. "Towards ASIP Architecture-Driven Algorithm Development." In Analysis, Estimations, and Applications of Embedded Systems, 91–100. Cham: Springer Nature Switzerland, 2023. http://dx.doi.org/10.1007/978-3-031-26500-6_8.
Full textLi, Yibin, Zhiping Jia, and Renhai Chen. "Towards a Dedicated ASIP for AES Implementation." In Advances in Intelligent and Soft Computing, 441–44. Berlin, Heidelberg: Springer Berlin Heidelberg, 2012. http://dx.doi.org/10.1007/978-3-642-27329-2_60.
Full textConference papers on the topic "ASIP"
Yongping Liu, S. Sezer, and J. McCanny. "ASIP: developments, challenges and trends." In China-Ireland International Conference on Information and Communications Technologies (CIICT 2007). IEE, 2007. http://dx.doi.org/10.1049/cp:20070790.
Full textRadhakrishnan, Swarnalatha, Hui Guo, and Sri Parameswaran. "Dual-pipeline heterogeneous ASIP design." In the 2nd IEEE/ACM/IFIP international conference. New York, New York, USA: ACM Press, 2004. http://dx.doi.org/10.1145/1016720.1016727.
Full textGao, Yan-yan, Xi Li, and Jie Yu. "Validation of ASIP Architecture Description." In 2008 Fifth IEEE International Symposium on Embedded Computing (SEC). IEEE, 2008. http://dx.doi.org/10.1109/sec.2008.49.
Full textHoozemans, Joost, Kati Tervo, Pekka Jaaskelainen, and Zaid Al-Ars. "Energy Efficient Multistandard Decompressor ASIP." In ICCDE 2021: 2021 7th International Conference on Computing and Data Engineering. New York, NY, USA: ACM, 2021. http://dx.doi.org/10.1145/3456172.3456218.
Full textZhu, Yong, Yong Wei Liao, and Qiong Fei Wu. "ASIP MDA Based on UML/XML." In 2010 International Conference on Multimedia Technology (ICMT). IEEE, 2010. http://dx.doi.org/10.1109/icmult.2010.5629795.
Full textJain, M. K., M. Balakrishnan, and A. Kumar. "Exploring storage organization in ASIP synthesis." In Proceedings. Euromicro Symposium on Digital System Design. IEEE, 2003. http://dx.doi.org/10.1109/dsd.2003.1231909.
Full textGschwind, Michael. "Instruction set selection for ASIP design." In the seventh international workshop. New York, New York, USA: ACM Press, 1999. http://dx.doi.org/10.1145/301177.301187.
Full textGupta, T. Vinod Kumar, Roberto E. Ko, and Rajeev Barua. "Compiler-directed customization of ASIP cores." In the tenth international symposium. New York, New York, USA: ACM Press, 2002. http://dx.doi.org/10.1145/774789.774810.
Full textMicconi, Laura, Rosilde Corvino, Deepak Gangadharan, Jan Madsen, Paul Pop, and Lech Jozwiak. "Hierarchical DSE for multi-ASIP platforms." In 2013 2nd Mediterranean Conference on Embedded Computing (MECO). IEEE, 2013. http://dx.doi.org/10.1109/meco.2013.6601379.
Full textMirzaee, Reza Faghih, and Mohammad Eshghi. "Design of an ASIP IDEA crypto processor." In 2011 IEEE 2nd International Conference on Networked Embedded Systems for Enterprise Applications (NESEA). IEEE, 2011. http://dx.doi.org/10.1109/nesea.2011.6144954.
Full textReports on the topic "ASIP"
Lincoln, John W. Proceedings of USAF Structural Integrity Program (ASIP, ENSIP) conference Held in Sacramento, California on 2-4 December 1986. Fort Belvoir, VA: Defense Technical Information Center, December 1986. http://dx.doi.org/10.21236/ada222585.
Full textFluhr, Robert, and Volker Brendel. Harnessing the genetic diversity engendered by alternative gene splicing. United States Department of Agriculture, December 2005. http://dx.doi.org/10.32747/2005.7696517.bard.
Full textMasters, Mark, Mark Christian, and Douglas Lengenfelder. Southeast Asia. Fort Belvoir, VA: Defense Technical Information Center, January 1996. http://dx.doi.org/10.21236/ada441385.
Full textStrasburg, Aaron. ASIC Commitments. Office of Scientific and Technical Information (OSTI), December 2017. http://dx.doi.org/10.2172/1415017.
Full textMarshak, David. Convoq ASAP. Boston, MA: Patricia Seybold Group, May 2004. http://dx.doi.org/10.1571/pr5-6-04cc.
Full textHowson, Peter, Rini Astuti, Oliver Hensengerth, and Sara Kindon. Asia-Pacific ClimateScapes. The British Academy, February 2023. http://dx.doi.org/10.5871/just-transitions-a-p/p-h-s-k-vietnamese.
Full textHowson, Peter, Rini Astuti, Oliver Hensengerth, and Sara Kindon. Asia-Pacific ClimateScapes. The British Academy, February 2023. http://dx.doi.org/10.5871/just-transitions-a-p/p-h-s-k-indonesian.
Full textAnthony, Ian, Fei Su, and Lora Saalman. Naval Incident Management in Europe, East Asia and South East Asia. Stockholm International Peace Research Institute, March 2023. http://dx.doi.org/10.55163/zzbg6990.
Full textSauers, Aaron G. DITAC FASPAX / ASIC Development. Office of Scientific and Technical Information (OSTI), October 2017. http://dx.doi.org/10.2172/1460391.
Full textSmart, Andy, and Shanti Jagannathan, eds. Textbook Policies in Asia:. Manila, Philippines: Asian Development Bank, December 2018. http://dx.doi.org/10.22617/tcs189651-2.
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